qla_init.c 100 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2005 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. /* XXX(hch): this is ugly, but we don't want to pull in exioctl.h */
  12. #ifndef EXT_IS_LUN_BIT_SET
  13. #define EXT_IS_LUN_BIT_SET(P,L) \
  14. (((P)->mask[L/8] & (0x80 >> (L%8)))?1:0)
  15. #define EXT_SET_LUN_BIT(P,L) \
  16. ((P)->mask[L/8] |= (0x80 >> (L%8)))
  17. #endif
  18. /*
  19. * QLogic ISP2x00 Hardware Support Function Prototypes.
  20. */
  21. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  22. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  23. static int qla2x00_setup_chip(scsi_qla_host_t *);
  24. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  25. static int qla2x00_init_rings(scsi_qla_host_t *);
  26. static int qla2x00_fw_ready(scsi_qla_host_t *);
  27. static int qla2x00_configure_hba(scsi_qla_host_t *);
  28. static int qla2x00_configure_loop(scsi_qla_host_t *);
  29. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  30. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  31. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  32. static int qla2x00_device_resync(scsi_qla_host_t *);
  33. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  34. uint16_t *);
  35. static int qla2x00_restart_isp(scsi_qla_host_t *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  51. {
  52. int rval;
  53. uint8_t restart_risc = 0;
  54. uint8_t retry;
  55. uint32_t wait_time;
  56. /* Clear adapter flags. */
  57. ha->flags.online = 0;
  58. ha->flags.reset_active = 0;
  59. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  60. atomic_set(&ha->loop_state, LOOP_DOWN);
  61. ha->device_flags = 0;
  62. ha->dpc_flags = 0;
  63. ha->flags.management_server_logged_in = 0;
  64. ha->marker_needed = 0;
  65. ha->mbx_flags = 0;
  66. ha->isp_abort_cnt = 0;
  67. ha->beacon_blink_led = 0;
  68. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops.pci_config(ha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space=n",
  73. ha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops.reset_chip(ha);
  77. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  78. ha->isp_ops.nvram_config(ha);
  79. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  80. retry = 10;
  81. /*
  82. * Try to configure the loop.
  83. */
  84. do {
  85. restart_risc = 0;
  86. /* If firmware needs to be loaded */
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. if ((rval = ha->isp_ops.chip_diag(ha)) == QLA_SUCCESS) {
  89. rval = qla2x00_setup_chip(ha);
  90. }
  91. }
  92. if (rval == QLA_SUCCESS &&
  93. (rval = qla2x00_init_rings(ha)) == QLA_SUCCESS) {
  94. check_fw_ready_again:
  95. /*
  96. * Wait for a successful LIP up to a maximum
  97. * of (in seconds): RISC login timeout value,
  98. * RISC retry count value, and port down retry
  99. * value OR a minimum of 4 seconds OR If no
  100. * cable, only 5 seconds.
  101. */
  102. rval = qla2x00_fw_ready(ha);
  103. if (rval == QLA_SUCCESS) {
  104. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  105. /* Issue a marker after FW becomes ready. */
  106. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  107. /*
  108. * Wait at most MAX_TARGET RSCNs for a stable
  109. * link.
  110. */
  111. wait_time = 256;
  112. do {
  113. clear_bit(LOOP_RESYNC_NEEDED,
  114. &ha->dpc_flags);
  115. rval = qla2x00_configure_loop(ha);
  116. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  117. &ha->dpc_flags)) {
  118. restart_risc = 1;
  119. break;
  120. }
  121. /*
  122. * If loop state change while we were
  123. * discoverying devices then wait for
  124. * LIP to complete
  125. */
  126. if (atomic_read(&ha->loop_state) !=
  127. LOOP_READY && retry--) {
  128. goto check_fw_ready_again;
  129. }
  130. wait_time--;
  131. } while (!atomic_read(&ha->loop_down_timer) &&
  132. retry &&
  133. wait_time &&
  134. (test_bit(LOOP_RESYNC_NEEDED,
  135. &ha->dpc_flags)));
  136. if (wait_time == 0)
  137. rval = QLA_FUNCTION_FAILED;
  138. } else if (ha->device_flags & DFLG_NO_CABLE)
  139. /* If no cable, then all is good. */
  140. rval = QLA_SUCCESS;
  141. }
  142. } while (restart_risc && retry--);
  143. if (rval == QLA_SUCCESS) {
  144. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  145. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  146. ha->marker_needed = 0;
  147. ha->flags.online = 1;
  148. } else {
  149. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  150. }
  151. return (rval);
  152. }
  153. /**
  154. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  155. * @ha: HA context
  156. *
  157. * Returns 0 on success.
  158. */
  159. int
  160. qla2100_pci_config(scsi_qla_host_t *ha)
  161. {
  162. uint16_t w, mwi;
  163. uint32_t d;
  164. unsigned long flags;
  165. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  166. pci_set_master(ha->pdev);
  167. mwi = 0;
  168. if (pci_set_mwi(ha->pdev))
  169. mwi = PCI_COMMAND_INVALIDATE;
  170. pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->revision);
  171. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  172. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  173. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  174. /* Reset expansion ROM address decode enable */
  175. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  176. d &= ~PCI_ROM_ADDRESS_ENABLE;
  177. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  178. /* Get PCI bus information. */
  179. spin_lock_irqsave(&ha->hardware_lock, flags);
  180. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  181. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  182. return QLA_SUCCESS;
  183. }
  184. /**
  185. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  186. * @ha: HA context
  187. *
  188. * Returns 0 on success.
  189. */
  190. int
  191. qla2300_pci_config(scsi_qla_host_t *ha)
  192. {
  193. uint16_t w, mwi;
  194. uint32_t d;
  195. unsigned long flags = 0;
  196. uint32_t cnt;
  197. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  198. pci_set_master(ha->pdev);
  199. mwi = 0;
  200. if (pci_set_mwi(ha->pdev))
  201. mwi = PCI_COMMAND_INVALIDATE;
  202. pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->revision);
  203. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  204. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  205. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  206. w &= ~PCI_COMMAND_INTX_DISABLE;
  207. /*
  208. * If this is a 2300 card and not 2312, reset the
  209. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  210. * the 2310 also reports itself as a 2300 so we need to get the
  211. * fb revision level -- a 6 indicates it really is a 2300 and
  212. * not a 2310.
  213. */
  214. if (IS_QLA2300(ha)) {
  215. spin_lock_irqsave(&ha->hardware_lock, flags);
  216. /* Pause RISC. */
  217. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  218. for (cnt = 0; cnt < 30000; cnt++) {
  219. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  220. break;
  221. udelay(10);
  222. }
  223. /* Select FPM registers. */
  224. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  225. RD_REG_WORD(&reg->ctrl_status);
  226. /* Get the fb rev level */
  227. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  228. if (ha->fb_rev == FPM_2300)
  229. w &= ~PCI_COMMAND_INVALIDATE;
  230. /* Deselect FPM registers. */
  231. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  232. RD_REG_WORD(&reg->ctrl_status);
  233. /* Release RISC module. */
  234. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  235. for (cnt = 0; cnt < 30000; cnt++) {
  236. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  237. break;
  238. udelay(10);
  239. }
  240. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  241. }
  242. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  243. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  244. /* Reset expansion ROM address decode enable */
  245. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  246. d &= ~PCI_ROM_ADDRESS_ENABLE;
  247. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  248. /* Get PCI bus information. */
  249. spin_lock_irqsave(&ha->hardware_lock, flags);
  250. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  251. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  252. return QLA_SUCCESS;
  253. }
  254. /**
  255. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  256. * @ha: HA context
  257. *
  258. * Returns 0 on success.
  259. */
  260. int
  261. qla24xx_pci_config(scsi_qla_host_t *ha)
  262. {
  263. uint16_t w, mwi;
  264. uint32_t d;
  265. unsigned long flags = 0;
  266. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  267. int pcix_cmd_reg, pcie_dctl_reg;
  268. pci_set_master(ha->pdev);
  269. mwi = 0;
  270. if (pci_set_mwi(ha->pdev))
  271. mwi = PCI_COMMAND_INVALIDATE;
  272. pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->revision);
  273. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  274. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  275. w &= ~PCI_COMMAND_INTX_DISABLE;
  276. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  277. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  278. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  279. pcix_cmd_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX);
  280. if (pcix_cmd_reg) {
  281. uint16_t pcix_cmd;
  282. pcix_cmd_reg += PCI_X_CMD;
  283. pci_read_config_word(ha->pdev, pcix_cmd_reg, &pcix_cmd);
  284. pcix_cmd &= ~PCI_X_CMD_MAX_READ;
  285. pcix_cmd |= 0x0008;
  286. pci_write_config_word(ha->pdev, pcix_cmd_reg, pcix_cmd);
  287. }
  288. /* PCIe -- adjust Maximum Read Request Size (2048). */
  289. pcie_dctl_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  290. if (pcie_dctl_reg) {
  291. uint16_t pcie_dctl;
  292. pcie_dctl_reg += PCI_EXP_DEVCTL;
  293. pci_read_config_word(ha->pdev, pcie_dctl_reg, &pcie_dctl);
  294. pcie_dctl &= ~PCI_EXP_DEVCTL_READRQ;
  295. pcie_dctl |= 0x4000;
  296. pci_write_config_word(ha->pdev, pcie_dctl_reg, pcie_dctl);
  297. }
  298. /* Reset expansion ROM address decode enable */
  299. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  300. d &= ~PCI_ROM_ADDRESS_ENABLE;
  301. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  302. /* Get PCI bus information. */
  303. spin_lock_irqsave(&ha->hardware_lock, flags);
  304. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  305. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  306. return QLA_SUCCESS;
  307. }
  308. /**
  309. * qla2x00_isp_firmware() - Choose firmware image.
  310. * @ha: HA context
  311. *
  312. * Returns 0 on success.
  313. */
  314. static int
  315. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  316. {
  317. int rval;
  318. /* Assume loading risc code */
  319. rval = QLA_FUNCTION_FAILED;
  320. if (ha->flags.disable_risc_code_load) {
  321. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  322. ha->host_no));
  323. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  324. /* Verify checksum of loaded RISC code. */
  325. rval = qla2x00_verify_checksum(ha,
  326. IS_QLA24XX(ha) || IS_QLA54XX(ha) ? RISC_SADDRESS :
  327. *ha->brd_info->fw_info[0].fwstart);
  328. }
  329. if (rval) {
  330. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  331. ha->host_no));
  332. }
  333. return (rval);
  334. }
  335. /**
  336. * qla2x00_reset_chip() - Reset ISP chip.
  337. * @ha: HA context
  338. *
  339. * Returns 0 on success.
  340. */
  341. void
  342. qla2x00_reset_chip(scsi_qla_host_t *ha)
  343. {
  344. unsigned long flags = 0;
  345. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  346. uint32_t cnt;
  347. unsigned long mbx_flags = 0;
  348. uint16_t cmd;
  349. ha->isp_ops.disable_intrs(ha);
  350. spin_lock_irqsave(&ha->hardware_lock, flags);
  351. /* Turn off master enable */
  352. cmd = 0;
  353. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  354. cmd &= ~PCI_COMMAND_MASTER;
  355. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  356. if (!IS_QLA2100(ha)) {
  357. /* Pause RISC. */
  358. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  359. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  360. for (cnt = 0; cnt < 30000; cnt++) {
  361. if ((RD_REG_WORD(&reg->hccr) &
  362. HCCR_RISC_PAUSE) != 0)
  363. break;
  364. udelay(100);
  365. }
  366. } else {
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. udelay(10);
  369. }
  370. /* Select FPM registers. */
  371. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  372. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  373. /* FPM Soft Reset. */
  374. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  375. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  376. /* Toggle Fpm Reset. */
  377. if (!IS_QLA2200(ha)) {
  378. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  379. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  380. }
  381. /* Select frame buffer registers. */
  382. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  383. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  384. /* Reset frame buffer FIFOs. */
  385. if (IS_QLA2200(ha)) {
  386. WRT_FB_CMD_REG(ha, reg, 0xa000);
  387. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  388. } else {
  389. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  390. /* Read back fb_cmd until zero or 3 seconds max */
  391. for (cnt = 0; cnt < 3000; cnt++) {
  392. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  393. break;
  394. udelay(100);
  395. }
  396. }
  397. /* Select RISC module registers. */
  398. WRT_REG_WORD(&reg->ctrl_status, 0);
  399. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  400. /* Reset RISC processor. */
  401. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  402. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  403. /* Release RISC processor. */
  404. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  405. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  406. }
  407. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  408. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  409. /* Reset ISP chip. */
  410. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  411. /* Wait for RISC to recover from reset. */
  412. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  413. /*
  414. * It is necessary to for a delay here since the card doesn't
  415. * respond to PCI reads during a reset. On some architectures
  416. * this will result in an MCA.
  417. */
  418. udelay(20);
  419. for (cnt = 30000; cnt; cnt--) {
  420. if ((RD_REG_WORD(&reg->ctrl_status) &
  421. CSR_ISP_SOFT_RESET) == 0)
  422. break;
  423. udelay(100);
  424. }
  425. } else
  426. udelay(10);
  427. /* Reset RISC processor. */
  428. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  429. WRT_REG_WORD(&reg->semaphore, 0);
  430. /* Release RISC processor. */
  431. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  432. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  433. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  434. for (cnt = 0; cnt < 30000; cnt++) {
  435. if (!(test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags)))
  436. spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
  437. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) {
  438. if (!(test_bit(ABORT_ISP_ACTIVE,
  439. &ha->dpc_flags)))
  440. spin_unlock_irqrestore(
  441. &ha->mbx_reg_lock, mbx_flags);
  442. break;
  443. }
  444. if (!(test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags)))
  445. spin_unlock_irqrestore(&ha->mbx_reg_lock,
  446. mbx_flags);
  447. udelay(100);
  448. }
  449. } else
  450. udelay(100);
  451. /* Turn on master enable */
  452. cmd |= PCI_COMMAND_MASTER;
  453. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  454. /* Disable RISC pause on FPM parity error. */
  455. if (!IS_QLA2100(ha)) {
  456. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  457. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  458. }
  459. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  460. }
  461. /**
  462. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  463. * @ha: HA context
  464. *
  465. * Returns 0 on success.
  466. */
  467. static inline void
  468. qla24xx_reset_risc(scsi_qla_host_t *ha)
  469. {
  470. unsigned long flags = 0;
  471. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  472. uint32_t cnt, d2;
  473. uint16_t wd;
  474. spin_lock_irqsave(&ha->hardware_lock, flags);
  475. /* Reset RISC. */
  476. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  477. for (cnt = 0; cnt < 30000; cnt++) {
  478. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  479. break;
  480. udelay(10);
  481. }
  482. WRT_REG_DWORD(&reg->ctrl_status,
  483. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  484. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  485. udelay(100);
  486. /* Wait for firmware to complete NVRAM accesses. */
  487. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  488. for (cnt = 10000 ; cnt && d2; cnt--) {
  489. udelay(5);
  490. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  491. barrier();
  492. }
  493. /* Wait for soft-reset to complete. */
  494. d2 = RD_REG_DWORD(&reg->ctrl_status);
  495. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  496. udelay(5);
  497. d2 = RD_REG_DWORD(&reg->ctrl_status);
  498. barrier();
  499. }
  500. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  501. RD_REG_DWORD(&reg->hccr);
  502. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  503. RD_REG_DWORD(&reg->hccr);
  504. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  505. RD_REG_DWORD(&reg->hccr);
  506. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  507. for (cnt = 6000000 ; cnt && d2; cnt--) {
  508. udelay(5);
  509. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  510. barrier();
  511. }
  512. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  513. }
  514. /**
  515. * qla24xx_reset_chip() - Reset ISP24xx chip.
  516. * @ha: HA context
  517. *
  518. * Returns 0 on success.
  519. */
  520. void
  521. qla24xx_reset_chip(scsi_qla_host_t *ha)
  522. {
  523. ha->isp_ops.disable_intrs(ha);
  524. /* Perform RISC reset. */
  525. qla24xx_reset_risc(ha);
  526. }
  527. /**
  528. * qla2x00_chip_diag() - Test chip for proper operation.
  529. * @ha: HA context
  530. *
  531. * Returns 0 on success.
  532. */
  533. int
  534. qla2x00_chip_diag(scsi_qla_host_t *ha)
  535. {
  536. int rval;
  537. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  538. unsigned long flags = 0;
  539. uint16_t data;
  540. uint32_t cnt;
  541. uint16_t mb[5];
  542. /* Assume a failed state */
  543. rval = QLA_FUNCTION_FAILED;
  544. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  545. ha->host_no, (u_long)&reg->flash_address));
  546. spin_lock_irqsave(&ha->hardware_lock, flags);
  547. /* Reset ISP chip. */
  548. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  549. /*
  550. * We need to have a delay here since the card will not respond while
  551. * in reset causing an MCA on some architectures.
  552. */
  553. udelay(20);
  554. data = qla2x00_debounce_register(&reg->ctrl_status);
  555. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  556. udelay(5);
  557. data = RD_REG_WORD(&reg->ctrl_status);
  558. barrier();
  559. }
  560. if (!cnt)
  561. goto chip_diag_failed;
  562. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  563. ha->host_no));
  564. /* Reset RISC processor. */
  565. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  566. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  567. /* Workaround for QLA2312 PCI parity error */
  568. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  569. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  570. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  571. udelay(5);
  572. data = RD_MAILBOX_REG(ha, reg, 0);
  573. barrier();
  574. }
  575. } else
  576. udelay(10);
  577. if (!cnt)
  578. goto chip_diag_failed;
  579. /* Check product ID of chip */
  580. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  581. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  582. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  583. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  584. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  585. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  586. mb[3] != PROD_ID_3) {
  587. qla_printk(KERN_WARNING, ha,
  588. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  589. goto chip_diag_failed;
  590. }
  591. ha->product_id[0] = mb[1];
  592. ha->product_id[1] = mb[2];
  593. ha->product_id[2] = mb[3];
  594. ha->product_id[3] = mb[4];
  595. /* Adjust fw RISC transfer size */
  596. if (ha->request_q_length > 1024)
  597. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  598. else
  599. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  600. ha->request_q_length;
  601. if (IS_QLA2200(ha) &&
  602. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  603. /* Limit firmware transfer size with a 2200A */
  604. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  605. ha->host_no));
  606. ha->device_type |= DT_ISP2200A;
  607. ha->fw_transfer_size = 128;
  608. }
  609. /* Wrap Incoming Mailboxes Test. */
  610. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  611. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  612. rval = qla2x00_mbx_reg_test(ha);
  613. if (rval) {
  614. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  615. ha->host_no));
  616. qla_printk(KERN_WARNING, ha,
  617. "Failed mailbox send register test\n");
  618. }
  619. else {
  620. /* Flag a successful rval */
  621. rval = QLA_SUCCESS;
  622. }
  623. spin_lock_irqsave(&ha->hardware_lock, flags);
  624. chip_diag_failed:
  625. if (rval)
  626. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  627. "****\n", ha->host_no));
  628. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  629. return (rval);
  630. }
  631. /**
  632. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  633. * @ha: HA context
  634. *
  635. * Returns 0 on success.
  636. */
  637. int
  638. qla24xx_chip_diag(scsi_qla_host_t *ha)
  639. {
  640. int rval;
  641. /* Perform RISC reset. */
  642. qla24xx_reset_risc(ha);
  643. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  644. rval = qla2x00_mbx_reg_test(ha);
  645. if (rval) {
  646. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  647. ha->host_no));
  648. qla_printk(KERN_WARNING, ha,
  649. "Failed mailbox send register test\n");
  650. } else {
  651. /* Flag a successful rval */
  652. rval = QLA_SUCCESS;
  653. }
  654. return rval;
  655. }
  656. static void
  657. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  658. {
  659. ha->fw_dumped = 0;
  660. ha->fw_dump24_len = sizeof(struct qla24xx_fw_dump);
  661. ha->fw_dump24_len += (ha->fw_memory_size - 0x100000) * sizeof(uint32_t);
  662. ha->fw_dump24 = vmalloc(ha->fw_dump24_len);
  663. if (ha->fw_dump24)
  664. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware "
  665. "dump...\n", ha->fw_dump24_len / 1024);
  666. else
  667. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  668. "firmware dump!!!\n", ha->fw_dump24_len / 1024);
  669. }
  670. /**
  671. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  672. * @ha: HA context
  673. *
  674. * Returns 0 on success.
  675. */
  676. static void
  677. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  678. {
  679. int rval;
  680. uint16_t fw_iocb_cnt = 0;
  681. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  682. dma_addr_t request_dma;
  683. request_t *request_ring;
  684. /* Valid only on recent ISPs. */
  685. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  686. return;
  687. if (IS_QLA24XX(ha) || IS_QLA54XX(ha))
  688. qla2x00_alloc_fw_dump(ha);
  689. /* Retrieve IOCB counts available to the firmware. */
  690. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt);
  691. if (rval)
  692. return;
  693. /* No point in continuing if current settings are sufficient. */
  694. if (fw_iocb_cnt < 1024)
  695. return;
  696. if (ha->request_q_length >= request_q_length)
  697. return;
  698. /* Attempt to claim larger area for request queue. */
  699. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  700. (request_q_length + 1) * sizeof(request_t), &request_dma,
  701. GFP_KERNEL);
  702. if (request_ring == NULL)
  703. return;
  704. /* Resize successful, report extensions. */
  705. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  706. (ha->fw_memory_size + 1) / 1024);
  707. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  708. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  709. /* Clear old allocations. */
  710. dma_free_coherent(&ha->pdev->dev,
  711. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  712. ha->request_dma);
  713. /* Begin using larger queue. */
  714. ha->request_q_length = request_q_length;
  715. ha->request_ring = request_ring;
  716. ha->request_dma = request_dma;
  717. }
  718. /**
  719. * qla2x00_setup_chip() - Load and start RISC firmware.
  720. * @ha: HA context
  721. *
  722. * Returns 0 on success.
  723. */
  724. static int
  725. qla2x00_setup_chip(scsi_qla_host_t *ha)
  726. {
  727. int rval;
  728. uint32_t srisc_address = 0;
  729. /* Load firmware sequences */
  730. rval = ha->isp_ops.load_risc(ha, &srisc_address);
  731. if (rval == QLA_SUCCESS) {
  732. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  733. "code.\n", ha->host_no));
  734. rval = qla2x00_verify_checksum(ha, srisc_address);
  735. if (rval == QLA_SUCCESS) {
  736. /* Start firmware execution. */
  737. DEBUG(printk("scsi(%ld): Checksum OK, start "
  738. "firmware.\n", ha->host_no));
  739. rval = qla2x00_execute_fw(ha, srisc_address);
  740. /* Retrieve firmware information. */
  741. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  742. qla2x00_get_fw_version(ha,
  743. &ha->fw_major_version,
  744. &ha->fw_minor_version,
  745. &ha->fw_subminor_version,
  746. &ha->fw_attributes, &ha->fw_memory_size);
  747. qla2x00_resize_request_q(ha);
  748. }
  749. } else {
  750. DEBUG2(printk(KERN_INFO
  751. "scsi(%ld): ISP Firmware failed checksum.\n",
  752. ha->host_no));
  753. }
  754. }
  755. if (rval) {
  756. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  757. ha->host_no));
  758. }
  759. return (rval);
  760. }
  761. /**
  762. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  763. * @ha: HA context
  764. *
  765. * Beginning of request ring has initialization control block already built
  766. * by nvram config routine.
  767. *
  768. * Returns 0 on success.
  769. */
  770. static void
  771. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  772. {
  773. uint16_t cnt;
  774. response_t *pkt;
  775. pkt = ha->response_ring_ptr;
  776. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  777. pkt->signature = RESPONSE_PROCESSED;
  778. pkt++;
  779. }
  780. }
  781. /**
  782. * qla2x00_update_fw_options() - Read and process firmware options.
  783. * @ha: HA context
  784. *
  785. * Returns 0 on success.
  786. */
  787. void
  788. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  789. {
  790. uint16_t swing, emphasis, tx_sens, rx_sens;
  791. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  792. qla2x00_get_fw_options(ha, ha->fw_options);
  793. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  794. return;
  795. /* Serial Link options. */
  796. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  797. ha->host_no));
  798. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  799. sizeof(ha->fw_seriallink_options)));
  800. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  801. if (ha->fw_seriallink_options[3] & BIT_2) {
  802. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  803. /* 1G settings */
  804. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  805. emphasis = (ha->fw_seriallink_options[2] &
  806. (BIT_4 | BIT_3)) >> 3;
  807. tx_sens = ha->fw_seriallink_options[0] &
  808. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  809. rx_sens = (ha->fw_seriallink_options[0] &
  810. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  811. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  812. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  813. if (rx_sens == 0x0)
  814. rx_sens = 0x3;
  815. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  816. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  817. ha->fw_options[10] |= BIT_5 |
  818. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  819. (tx_sens & (BIT_1 | BIT_0));
  820. /* 2G settings */
  821. swing = (ha->fw_seriallink_options[2] &
  822. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  823. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  824. tx_sens = ha->fw_seriallink_options[1] &
  825. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  826. rx_sens = (ha->fw_seriallink_options[1] &
  827. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  828. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  829. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  830. if (rx_sens == 0x0)
  831. rx_sens = 0x3;
  832. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  833. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  834. ha->fw_options[11] |= BIT_5 |
  835. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  836. (tx_sens & (BIT_1 | BIT_0));
  837. }
  838. /* FCP2 options. */
  839. /* Return command IOCBs without waiting for an ABTS to complete. */
  840. ha->fw_options[3] |= BIT_13;
  841. /* LED scheme. */
  842. if (ha->flags.enable_led_scheme)
  843. ha->fw_options[2] |= BIT_12;
  844. /* Detect ISP6312. */
  845. if (IS_QLA6312(ha))
  846. ha->fw_options[2] |= BIT_13;
  847. /* Update firmware options. */
  848. qla2x00_set_fw_options(ha, ha->fw_options);
  849. }
  850. void
  851. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  852. {
  853. int rval;
  854. /* Update Serial Link options. */
  855. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  856. return;
  857. rval = qla2x00_set_serdes_params(ha,
  858. le16_to_cpu(ha->fw_seriallink_options24[1]),
  859. le16_to_cpu(ha->fw_seriallink_options24[2]),
  860. le16_to_cpu(ha->fw_seriallink_options24[3]));
  861. if (rval != QLA_SUCCESS) {
  862. qla_printk(KERN_WARNING, ha,
  863. "Unable to update Serial Link options (%x).\n", rval);
  864. }
  865. }
  866. void
  867. qla2x00_config_rings(struct scsi_qla_host *ha)
  868. {
  869. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  870. /* Setup ring parameters in initialization control block. */
  871. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  872. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  873. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  874. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  875. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  876. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  877. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  878. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  879. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  880. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  881. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  882. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  883. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  884. }
  885. void
  886. qla24xx_config_rings(struct scsi_qla_host *ha)
  887. {
  888. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  889. struct init_cb_24xx *icb;
  890. /* Setup ring parameters in initialization control block. */
  891. icb = (struct init_cb_24xx *)ha->init_cb;
  892. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  893. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  894. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  895. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  896. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  897. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  898. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  899. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  900. WRT_REG_DWORD(&reg->req_q_in, 0);
  901. WRT_REG_DWORD(&reg->req_q_out, 0);
  902. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  903. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  904. RD_REG_DWORD(&reg->rsp_q_out);
  905. }
  906. /**
  907. * qla2x00_init_rings() - Initializes firmware.
  908. * @ha: HA context
  909. *
  910. * Beginning of request ring has initialization control block already built
  911. * by nvram config routine.
  912. *
  913. * Returns 0 on success.
  914. */
  915. static int
  916. qla2x00_init_rings(scsi_qla_host_t *ha)
  917. {
  918. int rval;
  919. unsigned long flags = 0;
  920. int cnt;
  921. spin_lock_irqsave(&ha->hardware_lock, flags);
  922. /* Clear outstanding commands array. */
  923. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  924. ha->outstanding_cmds[cnt] = NULL;
  925. ha->current_outstanding_cmd = 0;
  926. /* Clear RSCN queue. */
  927. ha->rscn_in_ptr = 0;
  928. ha->rscn_out_ptr = 0;
  929. /* Initialize firmware. */
  930. ha->request_ring_ptr = ha->request_ring;
  931. ha->req_ring_index = 0;
  932. ha->req_q_cnt = ha->request_q_length;
  933. ha->response_ring_ptr = ha->response_ring;
  934. ha->rsp_ring_index = 0;
  935. /* Initialize response queue entries */
  936. qla2x00_init_response_q_entries(ha);
  937. ha->isp_ops.config_rings(ha);
  938. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  939. /* Update any ISP specific firmware options before initialization. */
  940. ha->isp_ops.update_fw_options(ha);
  941. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  942. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  943. if (rval) {
  944. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  945. ha->host_no));
  946. } else {
  947. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  948. ha->host_no));
  949. }
  950. return (rval);
  951. }
  952. /**
  953. * qla2x00_fw_ready() - Waits for firmware ready.
  954. * @ha: HA context
  955. *
  956. * Returns 0 on success.
  957. */
  958. static int
  959. qla2x00_fw_ready(scsi_qla_host_t *ha)
  960. {
  961. int rval;
  962. unsigned long wtime, mtime;
  963. uint16_t min_wait; /* Minimum wait time if loop is down */
  964. uint16_t wait_time; /* Wait time if loop is coming ready */
  965. uint16_t fw_state;
  966. rval = QLA_SUCCESS;
  967. /* 20 seconds for loop down. */
  968. min_wait = 20;
  969. /*
  970. * Firmware should take at most one RATOV to login, plus 5 seconds for
  971. * our own processing.
  972. */
  973. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  974. wait_time = min_wait;
  975. }
  976. /* Min wait time if loop down */
  977. mtime = jiffies + (min_wait * HZ);
  978. /* wait time before firmware ready */
  979. wtime = jiffies + (wait_time * HZ);
  980. /* Wait for ISP to finish LIP */
  981. if (!ha->flags.init_done)
  982. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  983. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  984. ha->host_no));
  985. do {
  986. rval = qla2x00_get_firmware_state(ha, &fw_state);
  987. if (rval == QLA_SUCCESS) {
  988. if (fw_state < FSTATE_LOSS_OF_SYNC) {
  989. ha->device_flags &= ~DFLG_NO_CABLE;
  990. }
  991. if (fw_state == FSTATE_READY) {
  992. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  993. ha->host_no));
  994. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  995. &ha->login_timeout, &ha->r_a_tov);
  996. rval = QLA_SUCCESS;
  997. break;
  998. }
  999. rval = QLA_FUNCTION_FAILED;
  1000. if (atomic_read(&ha->loop_down_timer) &&
  1001. (fw_state >= FSTATE_LOSS_OF_SYNC ||
  1002. fw_state == FSTATE_WAIT_AL_PA)) {
  1003. /* Loop down. Timeout on min_wait for states
  1004. * other than Wait for Login.
  1005. */
  1006. if (time_after_eq(jiffies, mtime)) {
  1007. qla_printk(KERN_INFO, ha,
  1008. "Cable is unplugged...\n");
  1009. ha->device_flags |= DFLG_NO_CABLE;
  1010. break;
  1011. }
  1012. }
  1013. } else {
  1014. /* Mailbox cmd failed. Timeout on min_wait. */
  1015. if (time_after_eq(jiffies, mtime))
  1016. break;
  1017. }
  1018. if (time_after_eq(jiffies, wtime))
  1019. break;
  1020. /* Delay for a while */
  1021. msleep(500);
  1022. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1023. ha->host_no, fw_state, jiffies));
  1024. } while (1);
  1025. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1026. ha->host_no, fw_state, jiffies));
  1027. if (rval) {
  1028. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1029. ha->host_no));
  1030. }
  1031. return (rval);
  1032. }
  1033. /*
  1034. * qla2x00_configure_hba
  1035. * Setup adapter context.
  1036. *
  1037. * Input:
  1038. * ha = adapter state pointer.
  1039. *
  1040. * Returns:
  1041. * 0 = success
  1042. *
  1043. * Context:
  1044. * Kernel context.
  1045. */
  1046. static int
  1047. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1048. {
  1049. int rval;
  1050. uint16_t loop_id;
  1051. uint16_t topo;
  1052. uint8_t al_pa;
  1053. uint8_t area;
  1054. uint8_t domain;
  1055. char connect_type[22];
  1056. /* Get host addresses. */
  1057. rval = qla2x00_get_adapter_id(ha,
  1058. &loop_id, &al_pa, &area, &domain, &topo);
  1059. if (rval != QLA_SUCCESS) {
  1060. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1061. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1062. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1063. __func__, ha->host_no));
  1064. } else {
  1065. qla_printk(KERN_WARNING, ha,
  1066. "ERROR -- Unable to get host loop ID.\n");
  1067. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1068. }
  1069. return (rval);
  1070. }
  1071. if (topo == 4) {
  1072. qla_printk(KERN_INFO, ha,
  1073. "Cannot get topology - retrying.\n");
  1074. return (QLA_FUNCTION_FAILED);
  1075. }
  1076. ha->loop_id = loop_id;
  1077. /* initialize */
  1078. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1079. ha->operating_mode = LOOP;
  1080. switch (topo) {
  1081. case 0:
  1082. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1083. ha->host_no));
  1084. ha->current_topology = ISP_CFG_NL;
  1085. strcpy(connect_type, "(Loop)");
  1086. break;
  1087. case 1:
  1088. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1089. ha->host_no));
  1090. ha->current_topology = ISP_CFG_FL;
  1091. strcpy(connect_type, "(FL_Port)");
  1092. break;
  1093. case 2:
  1094. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1095. ha->host_no));
  1096. ha->operating_mode = P2P;
  1097. ha->current_topology = ISP_CFG_N;
  1098. strcpy(connect_type, "(N_Port-to-N_Port)");
  1099. break;
  1100. case 3:
  1101. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1102. ha->host_no));
  1103. ha->operating_mode = P2P;
  1104. ha->current_topology = ISP_CFG_F;
  1105. strcpy(connect_type, "(F_Port)");
  1106. break;
  1107. default:
  1108. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1109. "Using NL.\n",
  1110. ha->host_no, topo));
  1111. ha->current_topology = ISP_CFG_NL;
  1112. strcpy(connect_type, "(Loop)");
  1113. break;
  1114. }
  1115. /* Save Host port and loop ID. */
  1116. /* byte order - Big Endian */
  1117. ha->d_id.b.domain = domain;
  1118. ha->d_id.b.area = area;
  1119. ha->d_id.b.al_pa = al_pa;
  1120. if (!ha->flags.init_done)
  1121. qla_printk(KERN_INFO, ha,
  1122. "Topology - %s, Host Loop address 0x%x\n",
  1123. connect_type, ha->loop_id);
  1124. if (rval) {
  1125. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1126. } else {
  1127. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1128. }
  1129. return(rval);
  1130. }
  1131. /*
  1132. * NVRAM configuration for ISP 2xxx
  1133. *
  1134. * Input:
  1135. * ha = adapter block pointer.
  1136. *
  1137. * Output:
  1138. * initialization control block in response_ring
  1139. * host adapters parameters in host adapter block
  1140. *
  1141. * Returns:
  1142. * 0 = success.
  1143. */
  1144. int
  1145. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1146. {
  1147. int rval;
  1148. uint8_t chksum = 0;
  1149. uint16_t cnt;
  1150. uint8_t *dptr1, *dptr2;
  1151. init_cb_t *icb = ha->init_cb;
  1152. nvram_t *nv = (nvram_t *)ha->request_ring;
  1153. uint8_t *ptr = (uint8_t *)ha->request_ring;
  1154. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1155. rval = QLA_SUCCESS;
  1156. /* Determine NVRAM starting address. */
  1157. ha->nvram_size = sizeof(nvram_t);
  1158. ha->nvram_base = 0;
  1159. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1160. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1161. ha->nvram_base = 0x80;
  1162. /* Get NVRAM data and calculate checksum. */
  1163. ha->isp_ops.read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1164. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1165. chksum += *ptr++;
  1166. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1167. DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
  1168. ha->nvram_size));
  1169. /* Bad NVRAM data, set defaults parameters. */
  1170. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1171. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1172. /* Reset NVRAM data. */
  1173. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1174. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1175. nv->nvram_version);
  1176. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1177. "invalid -- WWPN) defaults.\n");
  1178. /*
  1179. * Set default initialization control block.
  1180. */
  1181. memset(nv, 0, ha->nvram_size);
  1182. nv->parameter_block_version = ICB_VERSION;
  1183. if (IS_QLA23XX(ha)) {
  1184. nv->firmware_options[0] = BIT_2 | BIT_1;
  1185. nv->firmware_options[1] = BIT_7 | BIT_5;
  1186. nv->add_firmware_options[0] = BIT_5;
  1187. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1188. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1189. nv->special_options[1] = BIT_7;
  1190. } else if (IS_QLA2200(ha)) {
  1191. nv->firmware_options[0] = BIT_2 | BIT_1;
  1192. nv->firmware_options[1] = BIT_7 | BIT_5;
  1193. nv->add_firmware_options[0] = BIT_5;
  1194. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1195. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1196. } else if (IS_QLA2100(ha)) {
  1197. nv->firmware_options[0] = BIT_3 | BIT_1;
  1198. nv->firmware_options[1] = BIT_5;
  1199. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1200. }
  1201. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1202. nv->execution_throttle = __constant_cpu_to_le16(16);
  1203. nv->retry_count = 8;
  1204. nv->retry_delay = 1;
  1205. nv->port_name[0] = 33;
  1206. nv->port_name[3] = 224;
  1207. nv->port_name[4] = 139;
  1208. nv->login_timeout = 4;
  1209. /*
  1210. * Set default host adapter parameters
  1211. */
  1212. nv->host_p[1] = BIT_2;
  1213. nv->reset_delay = 5;
  1214. nv->port_down_retry_count = 8;
  1215. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1216. nv->link_down_timeout = 60;
  1217. rval = 1;
  1218. }
  1219. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1220. /*
  1221. * The SN2 does not provide BIOS emulation which means you can't change
  1222. * potentially bogus BIOS settings. Force the use of default settings
  1223. * for link rate and frame size. Hope that the rest of the settings
  1224. * are valid.
  1225. */
  1226. if (ia64_platform_is("sn2")) {
  1227. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1228. if (IS_QLA23XX(ha))
  1229. nv->special_options[1] = BIT_7;
  1230. }
  1231. #endif
  1232. /* Reset Initialization control block */
  1233. memset(icb, 0, ha->init_cb_size);
  1234. /*
  1235. * Setup driver NVRAM options.
  1236. */
  1237. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1238. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1239. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1240. nv->firmware_options[1] &= ~BIT_4;
  1241. if (IS_QLA23XX(ha)) {
  1242. nv->firmware_options[0] |= BIT_2;
  1243. nv->firmware_options[0] &= ~BIT_3;
  1244. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1245. if (IS_QLA2300(ha)) {
  1246. if (ha->fb_rev == FPM_2310) {
  1247. strcpy(ha->model_number, "QLA2310");
  1248. } else {
  1249. strcpy(ha->model_number, "QLA2300");
  1250. }
  1251. } else {
  1252. if (rval == 0 &&
  1253. memcmp(nv->model_number, BINZERO,
  1254. sizeof(nv->model_number)) != 0) {
  1255. char *st, *en;
  1256. strncpy(ha->model_number, nv->model_number,
  1257. sizeof(nv->model_number));
  1258. st = en = ha->model_number;
  1259. en += sizeof(nv->model_number) - 1;
  1260. while (en > st) {
  1261. if (*en != 0x20 && *en != 0x00)
  1262. break;
  1263. *en-- = '\0';
  1264. }
  1265. } else {
  1266. uint16_t index;
  1267. index = (ha->pdev->subsystem_device & 0xff);
  1268. if (index < QLA_MODEL_NAMES) {
  1269. strcpy(ha->model_number,
  1270. qla2x00_model_name[index * 2]);
  1271. ha->model_desc =
  1272. qla2x00_model_name[index * 2 + 1];
  1273. } else {
  1274. strcpy(ha->model_number, "QLA23xx");
  1275. }
  1276. }
  1277. }
  1278. } else if (IS_QLA2200(ha)) {
  1279. nv->firmware_options[0] |= BIT_2;
  1280. /*
  1281. * 'Point-to-point preferred, else loop' is not a safe
  1282. * connection mode setting.
  1283. */
  1284. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1285. (BIT_5 | BIT_4)) {
  1286. /* Force 'loop preferred, else point-to-point'. */
  1287. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1288. nv->add_firmware_options[0] |= BIT_5;
  1289. }
  1290. strcpy(ha->model_number, "QLA22xx");
  1291. } else /*if (IS_QLA2100(ha))*/ {
  1292. strcpy(ha->model_number, "QLA2100");
  1293. }
  1294. /*
  1295. * Copy over NVRAM RISC parameter block to initialization control block.
  1296. */
  1297. dptr1 = (uint8_t *)icb;
  1298. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1299. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1300. while (cnt--)
  1301. *dptr1++ = *dptr2++;
  1302. /* Copy 2nd half. */
  1303. dptr1 = (uint8_t *)icb->add_firmware_options;
  1304. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1305. while (cnt--)
  1306. *dptr1++ = *dptr2++;
  1307. /* Prepare nodename */
  1308. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1309. /*
  1310. * Firmware will apply the following mask if the nodename was
  1311. * not provided.
  1312. */
  1313. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1314. icb->node_name[0] &= 0xF0;
  1315. }
  1316. /*
  1317. * Set host adapter parameters.
  1318. */
  1319. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1320. /* Always load RISC code on non ISP2[12]00 chips. */
  1321. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1322. ha->flags.disable_risc_code_load = 0;
  1323. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1324. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1325. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1326. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1327. ha->operating_mode =
  1328. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1329. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1330. sizeof(ha->fw_seriallink_options));
  1331. /* save HBA serial number */
  1332. ha->serial0 = icb->port_name[5];
  1333. ha->serial1 = icb->port_name[6];
  1334. ha->serial2 = icb->port_name[7];
  1335. ha->node_name = icb->node_name;
  1336. ha->port_name = icb->port_name;
  1337. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1338. ha->retry_count = nv->retry_count;
  1339. /* Set minimum login_timeout to 4 seconds. */
  1340. if (nv->login_timeout < ql2xlogintimeout)
  1341. nv->login_timeout = ql2xlogintimeout;
  1342. if (nv->login_timeout < 4)
  1343. nv->login_timeout = 4;
  1344. ha->login_timeout = nv->login_timeout;
  1345. icb->login_timeout = nv->login_timeout;
  1346. /* Set minimum RATOV to 200 tenths of a second. */
  1347. ha->r_a_tov = 200;
  1348. ha->loop_reset_delay = nv->reset_delay;
  1349. /* Link Down Timeout = 0:
  1350. *
  1351. * When Port Down timer expires we will start returning
  1352. * I/O's to OS with "DID_NO_CONNECT".
  1353. *
  1354. * Link Down Timeout != 0:
  1355. *
  1356. * The driver waits for the link to come up after link down
  1357. * before returning I/Os to OS with "DID_NO_CONNECT".
  1358. */
  1359. if (nv->link_down_timeout == 0) {
  1360. ha->loop_down_abort_time =
  1361. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1362. } else {
  1363. ha->link_down_timeout = nv->link_down_timeout;
  1364. ha->loop_down_abort_time =
  1365. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1366. }
  1367. /*
  1368. * Need enough time to try and get the port back.
  1369. */
  1370. ha->port_down_retry_count = nv->port_down_retry_count;
  1371. if (qlport_down_retry)
  1372. ha->port_down_retry_count = qlport_down_retry;
  1373. /* Set login_retry_count */
  1374. ha->login_retry_count = nv->retry_count;
  1375. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1376. ha->port_down_retry_count > 3)
  1377. ha->login_retry_count = ha->port_down_retry_count;
  1378. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1379. ha->login_retry_count = ha->port_down_retry_count;
  1380. if (ql2xloginretrycount)
  1381. ha->login_retry_count = ql2xloginretrycount;
  1382. icb->lun_enables = __constant_cpu_to_le16(0);
  1383. icb->command_resource_count = 0;
  1384. icb->immediate_notify_resource_count = 0;
  1385. icb->timeout = __constant_cpu_to_le16(0);
  1386. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1387. /* Enable RIO */
  1388. icb->firmware_options[0] &= ~BIT_3;
  1389. icb->add_firmware_options[0] &=
  1390. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1391. icb->add_firmware_options[0] |= BIT_2;
  1392. icb->response_accumulation_timer = 3;
  1393. icb->interrupt_delay_timer = 5;
  1394. ha->flags.process_response_queue = 1;
  1395. } else {
  1396. /* Enable ZIO. */
  1397. if (!ha->flags.init_done) {
  1398. ha->zio_mode = icb->add_firmware_options[0] &
  1399. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1400. ha->zio_timer = icb->interrupt_delay_timer ?
  1401. icb->interrupt_delay_timer: 2;
  1402. }
  1403. icb->add_firmware_options[0] &=
  1404. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1405. ha->flags.process_response_queue = 0;
  1406. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1407. ha->zio_mode = QLA_ZIO_MODE_6;
  1408. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1409. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1410. ha->zio_timer * 100));
  1411. qla_printk(KERN_INFO, ha,
  1412. "ZIO mode %d enabled; timer delay (%d us).\n",
  1413. ha->zio_mode, ha->zio_timer * 100);
  1414. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1415. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1416. ha->flags.process_response_queue = 1;
  1417. }
  1418. }
  1419. if (rval) {
  1420. DEBUG2_3(printk(KERN_WARNING
  1421. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1422. }
  1423. return (rval);
  1424. }
  1425. static void
  1426. qla2x00_rport_add(void *data)
  1427. {
  1428. fc_port_t *fcport = data;
  1429. qla2x00_reg_remote_port(fcport->ha, fcport);
  1430. }
  1431. static void
  1432. qla2x00_rport_del(void *data)
  1433. {
  1434. fc_port_t *fcport = data;
  1435. struct fc_rport *rport;
  1436. unsigned long flags;
  1437. spin_lock_irqsave(&fcport->rport_lock, flags);
  1438. rport = fcport->drport;
  1439. fcport->drport = NULL;
  1440. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1441. if (rport)
  1442. fc_remote_port_delete(rport);
  1443. }
  1444. /**
  1445. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1446. * @ha: HA context
  1447. * @flags: allocation flags
  1448. *
  1449. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1450. */
  1451. fc_port_t *
  1452. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1453. {
  1454. fc_port_t *fcport;
  1455. fcport = kmalloc(sizeof(fc_port_t), flags);
  1456. if (fcport == NULL)
  1457. return (fcport);
  1458. /* Setup fcport template structure. */
  1459. memset(fcport, 0, sizeof (fc_port_t));
  1460. fcport->ha = ha;
  1461. fcport->port_type = FCT_UNKNOWN;
  1462. fcport->loop_id = FC_NO_LOOP_ID;
  1463. fcport->iodesc_idx_sent = IODESC_INVALID_INDEX;
  1464. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1465. fcport->flags = FCF_RLC_SUPPORT;
  1466. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1467. spin_lock_init(&fcport->rport_lock);
  1468. INIT_WORK(&fcport->rport_add_work, qla2x00_rport_add, fcport);
  1469. INIT_WORK(&fcport->rport_del_work, qla2x00_rport_del, fcport);
  1470. return (fcport);
  1471. }
  1472. /*
  1473. * qla2x00_configure_loop
  1474. * Updates Fibre Channel Device Database with what is actually on loop.
  1475. *
  1476. * Input:
  1477. * ha = adapter block pointer.
  1478. *
  1479. * Returns:
  1480. * 0 = success.
  1481. * 1 = error.
  1482. * 2 = database was full and device was not configured.
  1483. */
  1484. static int
  1485. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1486. {
  1487. int rval;
  1488. unsigned long flags, save_flags;
  1489. rval = QLA_SUCCESS;
  1490. /* Get Initiator ID */
  1491. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1492. rval = qla2x00_configure_hba(ha);
  1493. if (rval != QLA_SUCCESS) {
  1494. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1495. ha->host_no));
  1496. return (rval);
  1497. }
  1498. }
  1499. save_flags = flags = ha->dpc_flags;
  1500. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1501. ha->host_no, flags));
  1502. /*
  1503. * If we have both an RSCN and PORT UPDATE pending then handle them
  1504. * both at the same time.
  1505. */
  1506. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1507. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1508. /* Determine what we need to do */
  1509. if (ha->current_topology == ISP_CFG_FL &&
  1510. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1511. ha->flags.rscn_queue_overflow = 1;
  1512. set_bit(RSCN_UPDATE, &flags);
  1513. } else if (ha->current_topology == ISP_CFG_F &&
  1514. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1515. ha->flags.rscn_queue_overflow = 1;
  1516. set_bit(RSCN_UPDATE, &flags);
  1517. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1518. } else if (!ha->flags.online ||
  1519. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1520. ha->flags.rscn_queue_overflow = 1;
  1521. set_bit(RSCN_UPDATE, &flags);
  1522. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1523. }
  1524. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1525. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1526. rval = QLA_FUNCTION_FAILED;
  1527. } else {
  1528. rval = qla2x00_configure_local_loop(ha);
  1529. }
  1530. }
  1531. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1532. if (LOOP_TRANSITION(ha)) {
  1533. rval = QLA_FUNCTION_FAILED;
  1534. } else {
  1535. rval = qla2x00_configure_fabric(ha);
  1536. }
  1537. }
  1538. if (rval == QLA_SUCCESS) {
  1539. if (atomic_read(&ha->loop_down_timer) ||
  1540. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1541. rval = QLA_FUNCTION_FAILED;
  1542. } else {
  1543. atomic_set(&ha->loop_state, LOOP_READY);
  1544. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1545. }
  1546. }
  1547. if (rval) {
  1548. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1549. __func__, ha->host_no));
  1550. } else {
  1551. DEBUG3(printk("%s: exiting normally\n", __func__));
  1552. }
  1553. /* Restore state if a resync event occured during processing */
  1554. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1555. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1556. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1557. if (test_bit(RSCN_UPDATE, &save_flags))
  1558. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1559. }
  1560. return (rval);
  1561. }
  1562. /*
  1563. * qla2x00_configure_local_loop
  1564. * Updates Fibre Channel Device Database with local loop devices.
  1565. *
  1566. * Input:
  1567. * ha = adapter block pointer.
  1568. *
  1569. * Returns:
  1570. * 0 = success.
  1571. */
  1572. static int
  1573. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1574. {
  1575. int rval, rval2;
  1576. int found_devs;
  1577. int found;
  1578. fc_port_t *fcport, *new_fcport;
  1579. uint16_t index;
  1580. uint16_t entries;
  1581. char *id_iter;
  1582. uint16_t loop_id;
  1583. uint8_t domain, area, al_pa;
  1584. found_devs = 0;
  1585. new_fcport = NULL;
  1586. entries = MAX_FIBRE_DEVICES;
  1587. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1588. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1589. /* Get list of logged in devices. */
  1590. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1591. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1592. &entries);
  1593. if (rval != QLA_SUCCESS)
  1594. goto cleanup_allocation;
  1595. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1596. ha->host_no, entries));
  1597. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1598. entries * sizeof(struct gid_list_info)));
  1599. /* Allocate temporary fcport for any new fcports discovered. */
  1600. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1601. if (new_fcport == NULL) {
  1602. rval = QLA_MEMORY_ALLOC_FAILED;
  1603. goto cleanup_allocation;
  1604. }
  1605. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1606. /*
  1607. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1608. */
  1609. list_for_each_entry(fcport, &ha->fcports, list) {
  1610. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1611. fcport->port_type != FCT_BROADCAST &&
  1612. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1613. DEBUG(printk("scsi(%ld): Marking port lost, "
  1614. "loop_id=0x%04x\n",
  1615. ha->host_no, fcport->loop_id));
  1616. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1617. fcport->flags &= ~FCF_FARP_DONE;
  1618. }
  1619. }
  1620. /* Add devices to port list. */
  1621. id_iter = (char *)ha->gid_list;
  1622. for (index = 0; index < entries; index++) {
  1623. domain = ((struct gid_list_info *)id_iter)->domain;
  1624. area = ((struct gid_list_info *)id_iter)->area;
  1625. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1626. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1627. loop_id = (uint16_t)
  1628. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1629. else
  1630. loop_id = le16_to_cpu(
  1631. ((struct gid_list_info *)id_iter)->loop_id);
  1632. id_iter += ha->gid_list_info_size;
  1633. /* Bypass reserved domain fields. */
  1634. if ((domain & 0xf0) == 0xf0)
  1635. continue;
  1636. /* Bypass if not same domain and area of adapter. */
  1637. if (area && domain &&
  1638. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1639. continue;
  1640. /* Bypass invalid local loop ID. */
  1641. if (loop_id > LAST_LOCAL_LOOP_ID)
  1642. continue;
  1643. /* Fill in member data. */
  1644. new_fcport->d_id.b.domain = domain;
  1645. new_fcport->d_id.b.area = area;
  1646. new_fcport->d_id.b.al_pa = al_pa;
  1647. new_fcport->loop_id = loop_id;
  1648. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1649. if (rval2 != QLA_SUCCESS) {
  1650. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1651. "information -- get_port_database=%x, "
  1652. "loop_id=0x%04x\n",
  1653. ha->host_no, rval2, new_fcport->loop_id));
  1654. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1655. ha->host_no));
  1656. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1657. continue;
  1658. }
  1659. /* Check for matching device in port list. */
  1660. found = 0;
  1661. fcport = NULL;
  1662. list_for_each_entry(fcport, &ha->fcports, list) {
  1663. if (memcmp(new_fcport->port_name, fcport->port_name,
  1664. WWN_SIZE))
  1665. continue;
  1666. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1667. FCF_PERSISTENT_BOUND);
  1668. fcport->loop_id = new_fcport->loop_id;
  1669. fcport->port_type = new_fcport->port_type;
  1670. fcport->d_id.b24 = new_fcport->d_id.b24;
  1671. memcpy(fcport->node_name, new_fcport->node_name,
  1672. WWN_SIZE);
  1673. found++;
  1674. break;
  1675. }
  1676. if (!found) {
  1677. /* New device, add to fcports list. */
  1678. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1679. list_add_tail(&new_fcport->list, &ha->fcports);
  1680. /* Allocate a new replacement fcport. */
  1681. fcport = new_fcport;
  1682. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1683. if (new_fcport == NULL) {
  1684. rval = QLA_MEMORY_ALLOC_FAILED;
  1685. goto cleanup_allocation;
  1686. }
  1687. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1688. }
  1689. qla2x00_update_fcport(ha, fcport);
  1690. found_devs++;
  1691. }
  1692. cleanup_allocation:
  1693. kfree(new_fcport);
  1694. if (rval != QLA_SUCCESS) {
  1695. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1696. "rval=%x\n", ha->host_no, rval));
  1697. }
  1698. if (found_devs) {
  1699. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1700. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1701. }
  1702. return (rval);
  1703. }
  1704. static void
  1705. qla2x00_probe_for_all_luns(scsi_qla_host_t *ha)
  1706. {
  1707. fc_port_t *fcport;
  1708. qla2x00_mark_all_devices_lost(ha, 0);
  1709. list_for_each_entry(fcport, &ha->fcports, list) {
  1710. if (fcport->port_type != FCT_TARGET)
  1711. continue;
  1712. qla2x00_update_fcport(ha, fcport);
  1713. }
  1714. }
  1715. /*
  1716. * qla2x00_update_fcport
  1717. * Updates device on list.
  1718. *
  1719. * Input:
  1720. * ha = adapter block pointer.
  1721. * fcport = port structure pointer.
  1722. *
  1723. * Return:
  1724. * 0 - Success
  1725. * BIT_0 - error
  1726. *
  1727. * Context:
  1728. * Kernel context.
  1729. */
  1730. void
  1731. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1732. {
  1733. fcport->ha = ha;
  1734. fcport->login_retry = 0;
  1735. fcport->port_login_retry_count = ha->port_down_retry_count *
  1736. PORT_RETRY_TIME;
  1737. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  1738. PORT_RETRY_TIME);
  1739. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1740. if (fcport->port_type == FCT_INITIATOR ||
  1741. fcport->port_type == FCT_BROADCAST)
  1742. fcport->device_type = TYPE_PROCESSOR;
  1743. atomic_set(&fcport->state, FCS_ONLINE);
  1744. if (ha->flags.init_done)
  1745. qla2x00_reg_remote_port(ha, fcport);
  1746. }
  1747. void
  1748. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1749. {
  1750. struct fc_rport_identifiers rport_ids;
  1751. struct fc_rport *rport;
  1752. unsigned long flags;
  1753. if (fcport->drport)
  1754. qla2x00_rport_del(fcport);
  1755. if (fcport->rport)
  1756. return;
  1757. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1758. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1759. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1760. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1761. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1762. rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1763. if (!rport) {
  1764. qla_printk(KERN_WARNING, ha,
  1765. "Unable to allocate fc remote port!\n");
  1766. return;
  1767. }
  1768. spin_lock_irqsave(&fcport->rport_lock, flags);
  1769. fcport->rport = rport;
  1770. *((fc_port_t **)rport->dd_data) = fcport;
  1771. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1772. rport->supported_classes = fcport->supported_classes;
  1773. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1774. if (fcport->port_type == FCT_INITIATOR)
  1775. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1776. if (fcport->port_type == FCT_TARGET)
  1777. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1778. fc_remote_port_rolechg(rport, rport_ids.roles);
  1779. if (rport->scsi_target_id != -1 &&
  1780. rport->scsi_target_id < ha->host->max_id)
  1781. fcport->os_target_id = rport->scsi_target_id;
  1782. }
  1783. /*
  1784. * qla2x00_configure_fabric
  1785. * Setup SNS devices with loop ID's.
  1786. *
  1787. * Input:
  1788. * ha = adapter block pointer.
  1789. *
  1790. * Returns:
  1791. * 0 = success.
  1792. * BIT_0 = error
  1793. */
  1794. static int
  1795. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1796. {
  1797. int rval, rval2;
  1798. fc_port_t *fcport, *fcptemp;
  1799. uint16_t next_loopid;
  1800. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1801. uint16_t loop_id;
  1802. LIST_HEAD(new_fcports);
  1803. /* If FL port exists, then SNS is present */
  1804. if (IS_QLA24XX(ha) || IS_QLA54XX(ha))
  1805. loop_id = NPH_F_PORT;
  1806. else
  1807. loop_id = SNS_FL_PORT;
  1808. rval = qla2x00_get_port_name(ha, loop_id, NULL, 0);
  1809. if (rval != QLA_SUCCESS) {
  1810. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1811. "Port\n", ha->host_no));
  1812. ha->device_flags &= ~SWITCH_FOUND;
  1813. return (QLA_SUCCESS);
  1814. }
  1815. /* Mark devices that need re-synchronization. */
  1816. rval2 = qla2x00_device_resync(ha);
  1817. if (rval2 == QLA_RSCNS_HANDLED) {
  1818. /* No point doing the scan, just continue. */
  1819. return (QLA_SUCCESS);
  1820. }
  1821. do {
  1822. /* FDMI support. */
  1823. if (ql2xfdmienable &&
  1824. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  1825. qla2x00_fdmi_register(ha);
  1826. /* Ensure we are logged into the SNS. */
  1827. if (IS_QLA24XX(ha) || IS_QLA54XX(ha))
  1828. loop_id = NPH_SNS;
  1829. else
  1830. loop_id = SIMPLE_NAME_SERVER;
  1831. ha->isp_ops.fabric_login(ha, loop_id, 0xff, 0xff,
  1832. 0xfc, mb, BIT_1 | BIT_0);
  1833. if (mb[0] != MBS_COMMAND_COMPLETE) {
  1834. DEBUG2(qla_printk(KERN_INFO, ha,
  1835. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  1836. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  1837. mb[0], mb[1], mb[2], mb[6], mb[7]));
  1838. return (QLA_SUCCESS);
  1839. }
  1840. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  1841. if (qla2x00_rft_id(ha)) {
  1842. /* EMPTY */
  1843. DEBUG2(printk("scsi(%ld): Register FC-4 "
  1844. "TYPE failed.\n", ha->host_no));
  1845. }
  1846. if (qla2x00_rff_id(ha)) {
  1847. /* EMPTY */
  1848. DEBUG2(printk("scsi(%ld): Register FC-4 "
  1849. "Features failed.\n", ha->host_no));
  1850. }
  1851. if (qla2x00_rnn_id(ha)) {
  1852. /* EMPTY */
  1853. DEBUG2(printk("scsi(%ld): Register Node Name "
  1854. "failed.\n", ha->host_no));
  1855. } else if (qla2x00_rsnn_nn(ha)) {
  1856. /* EMPTY */
  1857. DEBUG2(printk("scsi(%ld): Register Symbolic "
  1858. "Node Name failed.\n", ha->host_no));
  1859. }
  1860. }
  1861. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  1862. if (rval != QLA_SUCCESS)
  1863. break;
  1864. /*
  1865. * Logout all previous fabric devices marked lost, except
  1866. * tape devices.
  1867. */
  1868. list_for_each_entry(fcport, &ha->fcports, list) {
  1869. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1870. break;
  1871. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  1872. continue;
  1873. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  1874. qla2x00_mark_device_lost(ha, fcport,
  1875. ql2xplogiabsentdevice, 0);
  1876. if (fcport->loop_id != FC_NO_LOOP_ID &&
  1877. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  1878. fcport->port_type != FCT_INITIATOR &&
  1879. fcport->port_type != FCT_BROADCAST) {
  1880. ha->isp_ops.fabric_logout(ha,
  1881. fcport->loop_id,
  1882. fcport->d_id.b.domain,
  1883. fcport->d_id.b.area,
  1884. fcport->d_id.b.al_pa);
  1885. fcport->loop_id = FC_NO_LOOP_ID;
  1886. }
  1887. }
  1888. }
  1889. /* Starting free loop ID. */
  1890. next_loopid = ha->min_external_loopid;
  1891. /*
  1892. * Scan through our port list and login entries that need to be
  1893. * logged in.
  1894. */
  1895. list_for_each_entry(fcport, &ha->fcports, list) {
  1896. if (atomic_read(&ha->loop_down_timer) ||
  1897. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1898. break;
  1899. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  1900. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  1901. continue;
  1902. if (fcport->loop_id == FC_NO_LOOP_ID) {
  1903. fcport->loop_id = next_loopid;
  1904. rval = qla2x00_find_new_loop_id(ha, fcport);
  1905. if (rval != QLA_SUCCESS) {
  1906. /* Ran out of IDs to use */
  1907. break;
  1908. }
  1909. }
  1910. /* Login and update database */
  1911. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  1912. }
  1913. /* Exit if out of loop IDs. */
  1914. if (rval != QLA_SUCCESS) {
  1915. break;
  1916. }
  1917. /*
  1918. * Login and add the new devices to our port list.
  1919. */
  1920. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  1921. if (atomic_read(&ha->loop_down_timer) ||
  1922. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1923. break;
  1924. /* Find a new loop ID to use. */
  1925. fcport->loop_id = next_loopid;
  1926. rval = qla2x00_find_new_loop_id(ha, fcport);
  1927. if (rval != QLA_SUCCESS) {
  1928. /* Ran out of IDs to use */
  1929. break;
  1930. }
  1931. /* Remove device from the new list and add it to DB */
  1932. list_del(&fcport->list);
  1933. list_add_tail(&fcport->list, &ha->fcports);
  1934. /* Login and update database */
  1935. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  1936. }
  1937. } while (0);
  1938. /* Free all new device structures not processed. */
  1939. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  1940. list_del(&fcport->list);
  1941. kfree(fcport);
  1942. }
  1943. if (rval) {
  1944. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  1945. "rval=%d\n", ha->host_no, rval));
  1946. }
  1947. return (rval);
  1948. }
  1949. /*
  1950. * qla2x00_find_all_fabric_devs
  1951. *
  1952. * Input:
  1953. * ha = adapter block pointer.
  1954. * dev = database device entry pointer.
  1955. *
  1956. * Returns:
  1957. * 0 = success.
  1958. *
  1959. * Context:
  1960. * Kernel context.
  1961. */
  1962. static int
  1963. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  1964. {
  1965. int rval;
  1966. uint16_t loop_id;
  1967. fc_port_t *fcport, *new_fcport, *fcptemp;
  1968. int found;
  1969. sw_info_t *swl;
  1970. int swl_idx;
  1971. int first_dev, last_dev;
  1972. port_id_t wrap, nxt_d_id;
  1973. rval = QLA_SUCCESS;
  1974. /* Try GID_PT to get device list, else GAN. */
  1975. swl = kmalloc(sizeof(sw_info_t) * MAX_FIBRE_DEVICES, GFP_ATOMIC);
  1976. if (swl == NULL) {
  1977. /*EMPTY*/
  1978. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  1979. "on GA_NXT\n", ha->host_no));
  1980. } else {
  1981. memset(swl, 0, sizeof(sw_info_t) * MAX_FIBRE_DEVICES);
  1982. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  1983. kfree(swl);
  1984. swl = NULL;
  1985. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  1986. kfree(swl);
  1987. swl = NULL;
  1988. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  1989. kfree(swl);
  1990. swl = NULL;
  1991. }
  1992. }
  1993. swl_idx = 0;
  1994. /* Allocate temporary fcport for any new fcports discovered. */
  1995. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1996. if (new_fcport == NULL) {
  1997. kfree(swl);
  1998. return (QLA_MEMORY_ALLOC_FAILED);
  1999. }
  2000. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2001. /* Set start port ID scan at adapter ID. */
  2002. first_dev = 1;
  2003. last_dev = 0;
  2004. /* Starting free loop ID. */
  2005. loop_id = ha->min_external_loopid;
  2006. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2007. if (qla2x00_is_reserved_id(ha, loop_id))
  2008. continue;
  2009. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2010. break;
  2011. if (swl != NULL) {
  2012. if (last_dev) {
  2013. wrap.b24 = new_fcport->d_id.b24;
  2014. } else {
  2015. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2016. memcpy(new_fcport->node_name,
  2017. swl[swl_idx].node_name, WWN_SIZE);
  2018. memcpy(new_fcport->port_name,
  2019. swl[swl_idx].port_name, WWN_SIZE);
  2020. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2021. last_dev = 1;
  2022. }
  2023. swl_idx++;
  2024. }
  2025. } else {
  2026. /* Send GA_NXT to the switch */
  2027. rval = qla2x00_ga_nxt(ha, new_fcport);
  2028. if (rval != QLA_SUCCESS) {
  2029. qla_printk(KERN_WARNING, ha,
  2030. "SNS scan failed -- assuming zero-entry "
  2031. "result...\n");
  2032. list_for_each_entry_safe(fcport, fcptemp,
  2033. new_fcports, list) {
  2034. list_del(&fcport->list);
  2035. kfree(fcport);
  2036. }
  2037. rval = QLA_SUCCESS;
  2038. break;
  2039. }
  2040. }
  2041. /* If wrap on switch device list, exit. */
  2042. if (first_dev) {
  2043. wrap.b24 = new_fcport->d_id.b24;
  2044. first_dev = 0;
  2045. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2046. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2047. ha->host_no, new_fcport->d_id.b.domain,
  2048. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2049. break;
  2050. }
  2051. /* Bypass if host adapter. */
  2052. if (new_fcport->d_id.b24 == ha->d_id.b24)
  2053. continue;
  2054. /* Bypass if same domain and area of adapter. */
  2055. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2056. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2057. ISP_CFG_FL)
  2058. continue;
  2059. /* Bypass reserved domain fields. */
  2060. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2061. continue;
  2062. /* Locate matching device in database. */
  2063. found = 0;
  2064. list_for_each_entry(fcport, &ha->fcports, list) {
  2065. if (memcmp(new_fcport->port_name, fcport->port_name,
  2066. WWN_SIZE))
  2067. continue;
  2068. found++;
  2069. /*
  2070. * If address the same and state FCS_ONLINE, nothing
  2071. * changed.
  2072. */
  2073. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2074. atomic_read(&fcport->state) == FCS_ONLINE) {
  2075. break;
  2076. }
  2077. /*
  2078. * If device was not a fabric device before.
  2079. */
  2080. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2081. fcport->d_id.b24 = new_fcport->d_id.b24;
  2082. fcport->loop_id = FC_NO_LOOP_ID;
  2083. fcport->flags |= (FCF_FABRIC_DEVICE |
  2084. FCF_LOGIN_NEEDED);
  2085. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2086. break;
  2087. }
  2088. /*
  2089. * Port ID changed or device was marked to be updated;
  2090. * Log it out if still logged in and mark it for
  2091. * relogin later.
  2092. */
  2093. fcport->d_id.b24 = new_fcport->d_id.b24;
  2094. fcport->flags |= FCF_LOGIN_NEEDED;
  2095. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2096. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2097. fcport->port_type != FCT_INITIATOR &&
  2098. fcport->port_type != FCT_BROADCAST) {
  2099. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2100. fcport->d_id.b.domain, fcport->d_id.b.area,
  2101. fcport->d_id.b.al_pa);
  2102. fcport->loop_id = FC_NO_LOOP_ID;
  2103. }
  2104. break;
  2105. }
  2106. if (found)
  2107. continue;
  2108. /* If device was not in our fcports list, then add it. */
  2109. list_add_tail(&new_fcport->list, new_fcports);
  2110. /* Allocate a new replacement fcport. */
  2111. nxt_d_id.b24 = new_fcport->d_id.b24;
  2112. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2113. if (new_fcport == NULL) {
  2114. kfree(swl);
  2115. return (QLA_MEMORY_ALLOC_FAILED);
  2116. }
  2117. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2118. new_fcport->d_id.b24 = nxt_d_id.b24;
  2119. }
  2120. kfree(swl);
  2121. kfree(new_fcport);
  2122. if (!list_empty(new_fcports))
  2123. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2124. return (rval);
  2125. }
  2126. /*
  2127. * qla2x00_find_new_loop_id
  2128. * Scan through our port list and find a new usable loop ID.
  2129. *
  2130. * Input:
  2131. * ha: adapter state pointer.
  2132. * dev: port structure pointer.
  2133. *
  2134. * Returns:
  2135. * qla2x00 local function return status code.
  2136. *
  2137. * Context:
  2138. * Kernel context.
  2139. */
  2140. int
  2141. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2142. {
  2143. int rval;
  2144. int found;
  2145. fc_port_t *fcport;
  2146. uint16_t first_loop_id;
  2147. rval = QLA_SUCCESS;
  2148. /* Save starting loop ID. */
  2149. first_loop_id = dev->loop_id;
  2150. for (;;) {
  2151. /* Skip loop ID if already used by adapter. */
  2152. if (dev->loop_id == ha->loop_id) {
  2153. dev->loop_id++;
  2154. }
  2155. /* Skip reserved loop IDs. */
  2156. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2157. dev->loop_id++;
  2158. }
  2159. /* Reset loop ID if passed the end. */
  2160. if (dev->loop_id > ha->last_loop_id) {
  2161. /* first loop ID. */
  2162. dev->loop_id = ha->min_external_loopid;
  2163. }
  2164. /* Check for loop ID being already in use. */
  2165. found = 0;
  2166. fcport = NULL;
  2167. list_for_each_entry(fcport, &ha->fcports, list) {
  2168. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2169. /* ID possibly in use */
  2170. found++;
  2171. break;
  2172. }
  2173. }
  2174. /* If not in use then it is free to use. */
  2175. if (!found) {
  2176. break;
  2177. }
  2178. /* ID in use. Try next value. */
  2179. dev->loop_id++;
  2180. /* If wrap around. No free ID to use. */
  2181. if (dev->loop_id == first_loop_id) {
  2182. dev->loop_id = FC_NO_LOOP_ID;
  2183. rval = QLA_FUNCTION_FAILED;
  2184. break;
  2185. }
  2186. }
  2187. return (rval);
  2188. }
  2189. /*
  2190. * qla2x00_device_resync
  2191. * Marks devices in the database that needs resynchronization.
  2192. *
  2193. * Input:
  2194. * ha = adapter block pointer.
  2195. *
  2196. * Context:
  2197. * Kernel context.
  2198. */
  2199. static int
  2200. qla2x00_device_resync(scsi_qla_host_t *ha)
  2201. {
  2202. int rval;
  2203. int rval2;
  2204. uint32_t mask;
  2205. fc_port_t *fcport;
  2206. uint32_t rscn_entry;
  2207. uint8_t rscn_out_iter;
  2208. uint8_t format;
  2209. port_id_t d_id;
  2210. rval = QLA_RSCNS_HANDLED;
  2211. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2212. ha->flags.rscn_queue_overflow) {
  2213. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2214. format = MSB(MSW(rscn_entry));
  2215. d_id.b.domain = LSB(MSW(rscn_entry));
  2216. d_id.b.area = MSB(LSW(rscn_entry));
  2217. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2218. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2219. "[%02x/%02x%02x%02x].\n",
  2220. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2221. d_id.b.area, d_id.b.al_pa));
  2222. ha->rscn_out_ptr++;
  2223. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2224. ha->rscn_out_ptr = 0;
  2225. /* Skip duplicate entries. */
  2226. for (rscn_out_iter = ha->rscn_out_ptr;
  2227. !ha->flags.rscn_queue_overflow &&
  2228. rscn_out_iter != ha->rscn_in_ptr;
  2229. rscn_out_iter = (rscn_out_iter ==
  2230. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2231. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2232. break;
  2233. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2234. "entry found at [%d].\n", ha->host_no,
  2235. rscn_out_iter));
  2236. ha->rscn_out_ptr = rscn_out_iter;
  2237. }
  2238. /* Queue overflow, set switch default case. */
  2239. if (ha->flags.rscn_queue_overflow) {
  2240. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2241. "overflow.\n", ha->host_no));
  2242. format = 3;
  2243. ha->flags.rscn_queue_overflow = 0;
  2244. }
  2245. switch (format) {
  2246. case 0:
  2247. if (ql2xprocessrscn &&
  2248. !IS_QLA2100(ha) && !IS_QLA2200(ha) &&
  2249. !IS_QLA6312(ha) && !IS_QLA6322(ha) &&
  2250. !IS_QLA24XX(ha) && !IS_QLA54XX(ha) &&
  2251. ha->flags.init_done) {
  2252. /* Handle port RSCN via asyncronous IOCBs */
  2253. rval2 = qla2x00_handle_port_rscn(ha, rscn_entry,
  2254. NULL, 0);
  2255. if (rval2 == QLA_SUCCESS)
  2256. continue;
  2257. }
  2258. mask = 0xffffff;
  2259. break;
  2260. case 1:
  2261. mask = 0xffff00;
  2262. break;
  2263. case 2:
  2264. mask = 0xff0000;
  2265. break;
  2266. default:
  2267. mask = 0x0;
  2268. d_id.b24 = 0;
  2269. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2270. break;
  2271. }
  2272. rval = QLA_SUCCESS;
  2273. /* Abort any outstanding IO descriptors. */
  2274. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2275. qla2x00_cancel_io_descriptors(ha);
  2276. list_for_each_entry(fcport, &ha->fcports, list) {
  2277. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2278. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2279. fcport->port_type == FCT_BROADCAST)
  2280. continue;
  2281. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2282. if (format != 3 ||
  2283. fcport->port_type != FCT_INITIATOR) {
  2284. qla2x00_mark_device_lost(ha, fcport,
  2285. 0, 0);
  2286. }
  2287. }
  2288. fcport->flags &= ~FCF_FARP_DONE;
  2289. }
  2290. }
  2291. return (rval);
  2292. }
  2293. /*
  2294. * qla2x00_fabric_dev_login
  2295. * Login fabric target device and update FC port database.
  2296. *
  2297. * Input:
  2298. * ha: adapter state pointer.
  2299. * fcport: port structure list pointer.
  2300. * next_loopid: contains value of a new loop ID that can be used
  2301. * by the next login attempt.
  2302. *
  2303. * Returns:
  2304. * qla2x00 local function return status code.
  2305. *
  2306. * Context:
  2307. * Kernel context.
  2308. */
  2309. static int
  2310. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2311. uint16_t *next_loopid)
  2312. {
  2313. int rval;
  2314. int retry;
  2315. uint8_t opts;
  2316. rval = QLA_SUCCESS;
  2317. retry = 0;
  2318. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2319. if (rval == QLA_SUCCESS) {
  2320. /* Send an ADISC to tape devices.*/
  2321. opts = 0;
  2322. if (fcport->flags & FCF_TAPE_PRESENT)
  2323. opts |= BIT_1;
  2324. rval = qla2x00_get_port_database(ha, fcport, opts);
  2325. if (rval != QLA_SUCCESS) {
  2326. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2327. fcport->d_id.b.domain, fcport->d_id.b.area,
  2328. fcport->d_id.b.al_pa);
  2329. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2330. } else {
  2331. qla2x00_update_fcport(ha, fcport);
  2332. }
  2333. }
  2334. return (rval);
  2335. }
  2336. /*
  2337. * qla2x00_fabric_login
  2338. * Issue fabric login command.
  2339. *
  2340. * Input:
  2341. * ha = adapter block pointer.
  2342. * device = pointer to FC device type structure.
  2343. *
  2344. * Returns:
  2345. * 0 - Login successfully
  2346. * 1 - Login failed
  2347. * 2 - Initiator device
  2348. * 3 - Fatal error
  2349. */
  2350. int
  2351. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2352. uint16_t *next_loopid)
  2353. {
  2354. int rval;
  2355. int retry;
  2356. uint16_t tmp_loopid;
  2357. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2358. retry = 0;
  2359. tmp_loopid = 0;
  2360. for (;;) {
  2361. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2362. "for port %02x%02x%02x.\n",
  2363. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2364. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2365. /* Login fcport on switch. */
  2366. ha->isp_ops.fabric_login(ha, fcport->loop_id,
  2367. fcport->d_id.b.domain, fcport->d_id.b.area,
  2368. fcport->d_id.b.al_pa, mb, BIT_0);
  2369. if (mb[0] == MBS_PORT_ID_USED) {
  2370. /*
  2371. * Device has another loop ID. The firmware team
  2372. * recommends the driver perform an implicit login with
  2373. * the specified ID again. The ID we just used is save
  2374. * here so we return with an ID that can be tried by
  2375. * the next login.
  2376. */
  2377. retry++;
  2378. tmp_loopid = fcport->loop_id;
  2379. fcport->loop_id = mb[1];
  2380. DEBUG(printk("Fabric Login: port in use - next "
  2381. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2382. fcport->loop_id, fcport->d_id.b.domain,
  2383. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2384. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2385. /*
  2386. * Login succeeded.
  2387. */
  2388. if (retry) {
  2389. /* A retry occurred before. */
  2390. *next_loopid = tmp_loopid;
  2391. } else {
  2392. /*
  2393. * No retry occurred before. Just increment the
  2394. * ID value for next login.
  2395. */
  2396. *next_loopid = (fcport->loop_id + 1);
  2397. }
  2398. if (mb[1] & BIT_0) {
  2399. fcport->port_type = FCT_INITIATOR;
  2400. } else {
  2401. fcport->port_type = FCT_TARGET;
  2402. if (mb[1] & BIT_1) {
  2403. fcport->flags |= FCF_TAPE_PRESENT;
  2404. }
  2405. }
  2406. if (mb[10] & BIT_0)
  2407. fcport->supported_classes |= FC_COS_CLASS2;
  2408. if (mb[10] & BIT_1)
  2409. fcport->supported_classes |= FC_COS_CLASS3;
  2410. rval = QLA_SUCCESS;
  2411. break;
  2412. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2413. /*
  2414. * Loop ID already used, try next loop ID.
  2415. */
  2416. fcport->loop_id++;
  2417. rval = qla2x00_find_new_loop_id(ha, fcport);
  2418. if (rval != QLA_SUCCESS) {
  2419. /* Ran out of loop IDs to use */
  2420. break;
  2421. }
  2422. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2423. /*
  2424. * Firmware possibly timed out during login. If NO
  2425. * retries are left to do then the device is declared
  2426. * dead.
  2427. */
  2428. *next_loopid = fcport->loop_id;
  2429. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2430. fcport->d_id.b.domain, fcport->d_id.b.area,
  2431. fcport->d_id.b.al_pa);
  2432. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2433. rval = 1;
  2434. break;
  2435. } else {
  2436. /*
  2437. * unrecoverable / not handled error
  2438. */
  2439. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2440. "loop_id=%x jiffies=%lx.\n",
  2441. __func__, ha->host_no, mb[0],
  2442. fcport->d_id.b.domain, fcport->d_id.b.area,
  2443. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2444. *next_loopid = fcport->loop_id;
  2445. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2446. fcport->d_id.b.domain, fcport->d_id.b.area,
  2447. fcport->d_id.b.al_pa);
  2448. fcport->loop_id = FC_NO_LOOP_ID;
  2449. fcport->login_retry = 0;
  2450. rval = 3;
  2451. break;
  2452. }
  2453. }
  2454. return (rval);
  2455. }
  2456. /*
  2457. * qla2x00_local_device_login
  2458. * Issue local device login command.
  2459. *
  2460. * Input:
  2461. * ha = adapter block pointer.
  2462. * loop_id = loop id of device to login to.
  2463. *
  2464. * Returns (Where's the #define!!!!):
  2465. * 0 - Login successfully
  2466. * 1 - Login failed
  2467. * 3 - Fatal error
  2468. */
  2469. int
  2470. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2471. {
  2472. int rval;
  2473. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2474. memset(mb, 0, sizeof(mb));
  2475. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2476. if (rval == QLA_SUCCESS) {
  2477. /* Interrogate mailbox registers for any errors */
  2478. if (mb[0] == MBS_COMMAND_ERROR)
  2479. rval = 1;
  2480. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2481. /* device not in PCB table */
  2482. rval = 3;
  2483. }
  2484. return (rval);
  2485. }
  2486. /*
  2487. * qla2x00_loop_resync
  2488. * Resync with fibre channel devices.
  2489. *
  2490. * Input:
  2491. * ha = adapter block pointer.
  2492. *
  2493. * Returns:
  2494. * 0 = success
  2495. */
  2496. int
  2497. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2498. {
  2499. int rval;
  2500. uint32_t wait_time;
  2501. rval = QLA_SUCCESS;
  2502. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2503. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2504. if (ha->flags.online) {
  2505. if (!(rval = qla2x00_fw_ready(ha))) {
  2506. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2507. wait_time = 256;
  2508. do {
  2509. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2510. /* Issue a marker after FW becomes ready. */
  2511. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2512. ha->marker_needed = 0;
  2513. /* Remap devices on Loop. */
  2514. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2515. qla2x00_configure_loop(ha);
  2516. wait_time--;
  2517. } while (!atomic_read(&ha->loop_down_timer) &&
  2518. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2519. wait_time &&
  2520. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2521. }
  2522. }
  2523. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2524. return (QLA_FUNCTION_FAILED);
  2525. }
  2526. if (rval) {
  2527. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2528. }
  2529. return (rval);
  2530. }
  2531. void
  2532. qla2x00_rescan_fcports(scsi_qla_host_t *ha)
  2533. {
  2534. int rescan_done;
  2535. fc_port_t *fcport;
  2536. rescan_done = 0;
  2537. list_for_each_entry(fcport, &ha->fcports, list) {
  2538. if ((fcport->flags & FCF_RESCAN_NEEDED) == 0)
  2539. continue;
  2540. qla2x00_update_fcport(ha, fcport);
  2541. fcport->flags &= ~FCF_RESCAN_NEEDED;
  2542. rescan_done = 1;
  2543. }
  2544. qla2x00_probe_for_all_luns(ha);
  2545. }
  2546. void
  2547. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2548. {
  2549. fc_port_t *fcport;
  2550. /* Go with deferred removal of rport references. */
  2551. list_for_each_entry(fcport, &ha->fcports, list)
  2552. if (fcport->drport)
  2553. qla2x00_rport_del(fcport);
  2554. }
  2555. /*
  2556. * qla2x00_abort_isp
  2557. * Resets ISP and aborts all outstanding commands.
  2558. *
  2559. * Input:
  2560. * ha = adapter block pointer.
  2561. *
  2562. * Returns:
  2563. * 0 = success
  2564. */
  2565. int
  2566. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2567. {
  2568. unsigned long flags = 0;
  2569. uint16_t cnt;
  2570. srb_t *sp;
  2571. uint8_t status = 0;
  2572. if (ha->flags.online) {
  2573. ha->flags.online = 0;
  2574. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2575. qla_printk(KERN_INFO, ha,
  2576. "Performing ISP error recovery - ha= %p.\n", ha);
  2577. ha->isp_ops.reset_chip(ha);
  2578. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2579. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2580. atomic_set(&ha->loop_state, LOOP_DOWN);
  2581. qla2x00_mark_all_devices_lost(ha, 0);
  2582. } else {
  2583. if (!atomic_read(&ha->loop_down_timer))
  2584. atomic_set(&ha->loop_down_timer,
  2585. LOOP_DOWN_TIME);
  2586. }
  2587. spin_lock_irqsave(&ha->hardware_lock, flags);
  2588. /* Requeue all commands in outstanding command list. */
  2589. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  2590. sp = ha->outstanding_cmds[cnt];
  2591. if (sp) {
  2592. ha->outstanding_cmds[cnt] = NULL;
  2593. sp->flags = 0;
  2594. sp->cmd->result = DID_RESET << 16;
  2595. sp->cmd->host_scribble = (unsigned char *)NULL;
  2596. qla2x00_sp_compl(ha, sp);
  2597. }
  2598. }
  2599. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2600. ha->isp_ops.nvram_config(ha);
  2601. if (!qla2x00_restart_isp(ha)) {
  2602. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2603. if (!atomic_read(&ha->loop_down_timer)) {
  2604. /*
  2605. * Issue marker command only when we are going
  2606. * to start the I/O .
  2607. */
  2608. ha->marker_needed = 1;
  2609. }
  2610. ha->flags.online = 1;
  2611. ha->isp_ops.enable_intrs(ha);
  2612. ha->isp_abort_cnt = 0;
  2613. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2614. } else { /* failed the ISP abort */
  2615. ha->flags.online = 1;
  2616. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2617. if (ha->isp_abort_cnt == 0) {
  2618. qla_printk(KERN_WARNING, ha,
  2619. "ISP error recovery failed - "
  2620. "board disabled\n");
  2621. /*
  2622. * The next call disables the board
  2623. * completely.
  2624. */
  2625. ha->isp_ops.reset_adapter(ha);
  2626. ha->flags.online = 0;
  2627. clear_bit(ISP_ABORT_RETRY,
  2628. &ha->dpc_flags);
  2629. status = 0;
  2630. } else { /* schedule another ISP abort */
  2631. ha->isp_abort_cnt--;
  2632. DEBUG(printk("qla%ld: ISP abort - "
  2633. "retry remaining %d\n",
  2634. ha->host_no, ha->isp_abort_cnt);)
  2635. status = 1;
  2636. }
  2637. } else {
  2638. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2639. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2640. "- retrying (%d) more times\n",
  2641. ha->host_no, ha->isp_abort_cnt);)
  2642. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2643. status = 1;
  2644. }
  2645. }
  2646. }
  2647. if (status) {
  2648. qla_printk(KERN_INFO, ha,
  2649. "qla2x00_abort_isp: **** FAILED ****\n");
  2650. } else {
  2651. DEBUG(printk(KERN_INFO
  2652. "qla2x00_abort_isp(%ld): exiting.\n",
  2653. ha->host_no);)
  2654. }
  2655. return(status);
  2656. }
  2657. /*
  2658. * qla2x00_restart_isp
  2659. * restarts the ISP after a reset
  2660. *
  2661. * Input:
  2662. * ha = adapter block pointer.
  2663. *
  2664. * Returns:
  2665. * 0 = success
  2666. */
  2667. static int
  2668. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2669. {
  2670. uint8_t status = 0;
  2671. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2672. unsigned long flags = 0;
  2673. uint32_t wait_time;
  2674. /* If firmware needs to be loaded */
  2675. if (qla2x00_isp_firmware(ha)) {
  2676. ha->flags.online = 0;
  2677. if (!(status = ha->isp_ops.chip_diag(ha))) {
  2678. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2679. status = qla2x00_setup_chip(ha);
  2680. goto done;
  2681. }
  2682. spin_lock_irqsave(&ha->hardware_lock, flags);
  2683. if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) {
  2684. /*
  2685. * Disable SRAM, Instruction RAM and GP RAM
  2686. * parity.
  2687. */
  2688. WRT_REG_WORD(&reg->hccr,
  2689. (HCCR_ENABLE_PARITY + 0x0));
  2690. RD_REG_WORD(&reg->hccr);
  2691. }
  2692. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2693. status = qla2x00_setup_chip(ha);
  2694. spin_lock_irqsave(&ha->hardware_lock, flags);
  2695. if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) {
  2696. /* Enable proper parity */
  2697. if (IS_QLA2300(ha))
  2698. /* SRAM parity */
  2699. WRT_REG_WORD(&reg->hccr,
  2700. (HCCR_ENABLE_PARITY + 0x1));
  2701. else
  2702. /*
  2703. * SRAM, Instruction RAM and GP RAM
  2704. * parity.
  2705. */
  2706. WRT_REG_WORD(&reg->hccr,
  2707. (HCCR_ENABLE_PARITY + 0x7));
  2708. RD_REG_WORD(&reg->hccr);
  2709. }
  2710. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2711. }
  2712. }
  2713. done:
  2714. if (!status && !(status = qla2x00_init_rings(ha))) {
  2715. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2716. if (!(status = qla2x00_fw_ready(ha))) {
  2717. DEBUG(printk("%s(): Start configure loop, "
  2718. "status = %d\n", __func__, status);)
  2719. /* Issue a marker after FW becomes ready. */
  2720. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2721. ha->flags.online = 1;
  2722. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2723. wait_time = 256;
  2724. do {
  2725. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2726. qla2x00_configure_loop(ha);
  2727. wait_time--;
  2728. } while (!atomic_read(&ha->loop_down_timer) &&
  2729. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2730. wait_time &&
  2731. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2732. }
  2733. /* if no cable then assume it's good */
  2734. if ((ha->device_flags & DFLG_NO_CABLE))
  2735. status = 0;
  2736. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2737. __func__,
  2738. status);)
  2739. }
  2740. return (status);
  2741. }
  2742. /*
  2743. * qla2x00_reset_adapter
  2744. * Reset adapter.
  2745. *
  2746. * Input:
  2747. * ha = adapter block pointer.
  2748. */
  2749. void
  2750. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2751. {
  2752. unsigned long flags = 0;
  2753. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2754. ha->flags.online = 0;
  2755. ha->isp_ops.disable_intrs(ha);
  2756. spin_lock_irqsave(&ha->hardware_lock, flags);
  2757. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2758. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2759. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2760. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2761. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2762. }
  2763. void
  2764. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2765. {
  2766. unsigned long flags = 0;
  2767. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2768. ha->flags.online = 0;
  2769. ha->isp_ops.disable_intrs(ha);
  2770. spin_lock_irqsave(&ha->hardware_lock, flags);
  2771. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2772. RD_REG_DWORD(&reg->hccr);
  2773. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2774. RD_REG_DWORD(&reg->hccr);
  2775. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2776. }
  2777. int
  2778. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2779. {
  2780. int rval;
  2781. struct init_cb_24xx *icb;
  2782. struct nvram_24xx *nv;
  2783. uint32_t *dptr;
  2784. uint8_t *dptr1, *dptr2;
  2785. uint32_t chksum;
  2786. uint16_t cnt;
  2787. rval = QLA_SUCCESS;
  2788. icb = (struct init_cb_24xx *)ha->init_cb;
  2789. nv = (struct nvram_24xx *)ha->request_ring;
  2790. /* Determine NVRAM starting address. */
  2791. ha->nvram_size = sizeof(struct nvram_24xx);
  2792. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  2793. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  2794. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  2795. if (PCI_FUNC(ha->pdev->devfn)) {
  2796. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  2797. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  2798. }
  2799. /* Get NVRAM data and calculate checksum. */
  2800. dptr = (uint32_t *)nv;
  2801. ha->isp_ops.read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  2802. ha->nvram_size);
  2803. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  2804. chksum += le32_to_cpu(*dptr++);
  2805. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  2806. DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
  2807. ha->nvram_size));
  2808. /* Bad NVRAM data, set defaults parameters. */
  2809. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  2810. || nv->id[3] != ' ' ||
  2811. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  2812. /* Reset NVRAM data. */
  2813. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  2814. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  2815. le16_to_cpu(nv->nvram_version));
  2816. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  2817. "invalid -- WWPN) defaults.\n");
  2818. /*
  2819. * Set default initialization control block.
  2820. */
  2821. memset(nv, 0, ha->nvram_size);
  2822. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  2823. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  2824. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  2825. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2826. nv->exchange_count = __constant_cpu_to_le16(0);
  2827. nv->hard_address = __constant_cpu_to_le16(124);
  2828. nv->port_name[0] = 0x21;
  2829. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  2830. nv->port_name[2] = 0x00;
  2831. nv->port_name[3] = 0xe0;
  2832. nv->port_name[4] = 0x8b;
  2833. nv->port_name[5] = 0x1c;
  2834. nv->port_name[6] = 0x55;
  2835. nv->port_name[7] = 0x86;
  2836. nv->node_name[0] = 0x20;
  2837. nv->node_name[1] = 0x00;
  2838. nv->node_name[2] = 0x00;
  2839. nv->node_name[3] = 0xe0;
  2840. nv->node_name[4] = 0x8b;
  2841. nv->node_name[5] = 0x1c;
  2842. nv->node_name[6] = 0x55;
  2843. nv->node_name[7] = 0x86;
  2844. nv->login_retry_count = __constant_cpu_to_le16(8);
  2845. nv->link_down_timeout = __constant_cpu_to_le16(200);
  2846. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  2847. nv->login_timeout = __constant_cpu_to_le16(0);
  2848. nv->firmware_options_1 =
  2849. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  2850. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  2851. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  2852. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  2853. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  2854. nv->efi_parameters = __constant_cpu_to_le32(0);
  2855. nv->reset_delay = 5;
  2856. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  2857. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  2858. nv->link_down_timeout = __constant_cpu_to_le16(30);
  2859. rval = 1;
  2860. }
  2861. /* Reset Initialization control block */
  2862. memset(icb, 0, sizeof(struct init_cb_24xx));
  2863. /* Copy 1st segment. */
  2864. dptr1 = (uint8_t *)icb;
  2865. dptr2 = (uint8_t *)&nv->version;
  2866. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  2867. while (cnt--)
  2868. *dptr1++ = *dptr2++;
  2869. icb->login_retry_count = nv->login_retry_count;
  2870. icb->link_down_timeout = nv->link_down_timeout;
  2871. /* Copy 2nd segment. */
  2872. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  2873. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  2874. cnt = (uint8_t *)&icb->reserved_3 -
  2875. (uint8_t *)&icb->interrupt_delay_timer;
  2876. while (cnt--)
  2877. *dptr1++ = *dptr2++;
  2878. /*
  2879. * Setup driver NVRAM options.
  2880. */
  2881. if (memcmp(nv->model_name, BINZERO, sizeof(nv->model_name)) != 0) {
  2882. char *st, *en;
  2883. uint16_t index;
  2884. strncpy(ha->model_number, nv->model_name,
  2885. sizeof(nv->model_name));
  2886. st = en = ha->model_number;
  2887. en += sizeof(nv->model_name) - 1;
  2888. while (en > st) {
  2889. if (*en != 0x20 && *en != 0x00)
  2890. break;
  2891. *en-- = '\0';
  2892. }
  2893. index = (ha->pdev->subsystem_device & 0xff);
  2894. if (index < QLA_MODEL_NAMES)
  2895. ha->model_desc = qla2x00_model_name[index * 2 + 1];
  2896. } else
  2897. strcpy(ha->model_number, "QLA2462");
  2898. /* Prepare nodename */
  2899. if ((icb->firmware_options_1 & BIT_14) == 0) {
  2900. /*
  2901. * Firmware will apply the following mask if the nodename was
  2902. * not provided.
  2903. */
  2904. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2905. icb->node_name[0] &= 0xF0;
  2906. }
  2907. /* Set host adapter parameters. */
  2908. ha->flags.disable_risc_code_load = 0;
  2909. ha->flags.enable_lip_reset = 1;
  2910. ha->flags.enable_lip_full_login = 1;
  2911. ha->flags.enable_target_reset = 1;
  2912. ha->flags.enable_led_scheme = 0;
  2913. ha->operating_mode =
  2914. (icb->firmware_options_2 & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2915. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  2916. sizeof(ha->fw_seriallink_options24));
  2917. /* save HBA serial number */
  2918. ha->serial0 = icb->port_name[5];
  2919. ha->serial1 = icb->port_name[6];
  2920. ha->serial2 = icb->port_name[7];
  2921. ha->node_name = icb->node_name;
  2922. ha->port_name = icb->port_name;
  2923. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2924. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  2925. /* Set minimum login_timeout to 4 seconds. */
  2926. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  2927. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  2928. if (le16_to_cpu(nv->login_timeout) < 4)
  2929. nv->login_timeout = __constant_cpu_to_le16(4);
  2930. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  2931. icb->login_timeout = cpu_to_le16(nv->login_timeout);
  2932. /* Set minimum RATOV to 200 tenths of a second. */
  2933. ha->r_a_tov = 200;
  2934. ha->loop_reset_delay = nv->reset_delay;
  2935. /* Link Down Timeout = 0:
  2936. *
  2937. * When Port Down timer expires we will start returning
  2938. * I/O's to OS with "DID_NO_CONNECT".
  2939. *
  2940. * Link Down Timeout != 0:
  2941. *
  2942. * The driver waits for the link to come up after link down
  2943. * before returning I/Os to OS with "DID_NO_CONNECT".
  2944. */
  2945. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  2946. ha->loop_down_abort_time =
  2947. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2948. } else {
  2949. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  2950. ha->loop_down_abort_time =
  2951. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2952. }
  2953. /* Need enough time to try and get the port back. */
  2954. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  2955. if (qlport_down_retry)
  2956. ha->port_down_retry_count = qlport_down_retry;
  2957. /* Set login_retry_count */
  2958. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  2959. if (ha->port_down_retry_count ==
  2960. le16_to_cpu(nv->port_down_retry_count) &&
  2961. ha->port_down_retry_count > 3)
  2962. ha->login_retry_count = ha->port_down_retry_count;
  2963. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2964. ha->login_retry_count = ha->port_down_retry_count;
  2965. if (ql2xloginretrycount)
  2966. ha->login_retry_count = ql2xloginretrycount;
  2967. /* Enable ZIO. */
  2968. if (!ha->flags.init_done) {
  2969. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  2970. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2971. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  2972. le16_to_cpu(icb->interrupt_delay_timer): 2;
  2973. }
  2974. icb->firmware_options_2 &= __constant_cpu_to_le32(
  2975. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  2976. ha->flags.process_response_queue = 0;
  2977. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2978. ha->zio_mode = QLA_ZIO_MODE_6;
  2979. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  2980. "(%d us).\n", ha->host_no, ha->zio_mode,
  2981. ha->zio_timer * 100));
  2982. qla_printk(KERN_INFO, ha,
  2983. "ZIO mode %d enabled; timer delay (%d us).\n",
  2984. ha->zio_mode, ha->zio_timer * 100);
  2985. icb->firmware_options_2 |= cpu_to_le32(
  2986. (uint32_t)ha->zio_mode);
  2987. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  2988. ha->flags.process_response_queue = 1;
  2989. }
  2990. if (rval) {
  2991. DEBUG2_3(printk(KERN_WARNING
  2992. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  2993. }
  2994. return (rval);
  2995. }
  2996. int
  2997. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  2998. {
  2999. int rval;
  3000. int segments, fragment;
  3001. uint32_t faddr;
  3002. uint32_t *dcode, dlen;
  3003. uint32_t risc_addr;
  3004. uint32_t risc_size;
  3005. uint32_t i;
  3006. rval = QLA_SUCCESS;
  3007. segments = FA_RISC_CODE_SEGMENTS;
  3008. faddr = FA_RISC_CODE_ADDR;
  3009. dcode = (uint32_t *)ha->request_ring;
  3010. *srisc_addr = 0;
  3011. /* Validate firmware image by checking version. */
  3012. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3013. for (i = 0; i < 4; i++)
  3014. dcode[i] = be32_to_cpu(dcode[i]);
  3015. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3016. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3017. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3018. dcode[3] == 0)) {
  3019. qla_printk(KERN_WARNING, ha,
  3020. "Unable to verify integrity of flash firmware image!\n");
  3021. qla_printk(KERN_WARNING, ha,
  3022. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3023. dcode[1], dcode[2], dcode[3]);
  3024. return QLA_FUNCTION_FAILED;
  3025. }
  3026. while (segments && rval == QLA_SUCCESS) {
  3027. /* Read segment's load information. */
  3028. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3029. risc_addr = be32_to_cpu(dcode[2]);
  3030. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3031. risc_size = be32_to_cpu(dcode[3]);
  3032. fragment = 0;
  3033. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3034. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3035. if (dlen > risc_size)
  3036. dlen = risc_size;
  3037. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3038. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3039. ha->host_no, risc_addr, dlen, faddr));
  3040. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3041. for (i = 0; i < dlen; i++)
  3042. dcode[i] = swab32(dcode[i]);
  3043. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3044. dlen);
  3045. if (rval) {
  3046. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3047. "segment %d of firmware\n", ha->host_no,
  3048. fragment));
  3049. qla_printk(KERN_WARNING, ha,
  3050. "[ERROR] Failed to load segment %d of "
  3051. "firmware\n", fragment);
  3052. break;
  3053. }
  3054. faddr += dlen;
  3055. risc_addr += dlen;
  3056. risc_size -= dlen;
  3057. fragment++;
  3058. }
  3059. /* Next segment. */
  3060. segments--;
  3061. }
  3062. return rval;
  3063. }
  3064. #if defined(CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE)
  3065. int
  3066. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3067. {
  3068. int rval, num, i;
  3069. uint32_t cnt;
  3070. uint16_t *risc_code;
  3071. uint32_t risc_addr, risc_size;
  3072. uint16_t *req_ring;
  3073. struct qla_fw_info *fw_iter;
  3074. rval = QLA_SUCCESS;
  3075. /* Load firmware sequences */
  3076. fw_iter = ha->brd_info->fw_info;
  3077. *srisc_addr = *ha->brd_info->fw_info->fwstart;
  3078. while (fw_iter->addressing != FW_INFO_ADDR_NOMORE) {
  3079. risc_code = fw_iter->fwcode;
  3080. risc_size = *fw_iter->fwlen;
  3081. if (fw_iter->addressing == FW_INFO_ADDR_NORMAL)
  3082. risc_addr = *fw_iter->fwstart;
  3083. else
  3084. risc_addr = *fw_iter->lfwstart;
  3085. num = 0;
  3086. rval = 0;
  3087. while (risc_size > 0 && !rval) {
  3088. cnt = (uint16_t)(ha->fw_transfer_size >> 1);
  3089. if (cnt > risc_size)
  3090. cnt = risc_size;
  3091. DEBUG7(printk("scsi(%ld): Loading risc segment@ "
  3092. "addr %p, number of bytes 0x%x, offset 0x%lx.\n",
  3093. ha->host_no, risc_code, cnt, risc_addr));
  3094. req_ring = (uint16_t *)ha->request_ring;
  3095. for (i = 0; i < cnt; i++)
  3096. req_ring[i] = cpu_to_le16(risc_code[i]);
  3097. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3098. cnt);
  3099. if (rval) {
  3100. DEBUG(printk("scsi(%ld): [ERROR] Failed to "
  3101. "load segment %d of firmware\n",
  3102. ha->host_no, num));
  3103. qla_printk(KERN_WARNING, ha,
  3104. "[ERROR] Failed to load segment %d of "
  3105. "firmware\n", num);
  3106. qla2x00_dump_regs(ha);
  3107. break;
  3108. }
  3109. risc_code += cnt;
  3110. risc_addr += cnt;
  3111. risc_size -= cnt;
  3112. num++;
  3113. }
  3114. /* Next firmware sequence */
  3115. fw_iter++;
  3116. }
  3117. return rval;
  3118. }
  3119. int
  3120. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3121. {
  3122. int rval, num, i;
  3123. uint32_t cnt;
  3124. uint32_t *risc_code;
  3125. uint32_t risc_addr, risc_size;
  3126. uint32_t *req_ring;
  3127. struct qla_fw_info *fw_iter;
  3128. rval = QLA_SUCCESS;
  3129. /* Load firmware sequences */
  3130. fw_iter = ha->brd_info->fw_info;
  3131. *srisc_addr = *((uint32_t *)fw_iter->lfwstart);
  3132. while (fw_iter->addressing != FW_INFO_ADDR_NOMORE) {
  3133. risc_code = (uint32_t *)fw_iter->fwcode;
  3134. risc_size = *((uint32_t *)fw_iter->fwlen);
  3135. risc_addr = *((uint32_t *)fw_iter->lfwstart);
  3136. num = 0;
  3137. rval = 0;
  3138. while (risc_size > 0 && !rval) {
  3139. cnt = (uint32_t)(ha->fw_transfer_size >> 2);
  3140. if (cnt > risc_size)
  3141. cnt = risc_size;
  3142. DEBUG7(printk("scsi(%ld): Loading risc segment@ "
  3143. "addr %p, number of bytes 0x%x, offset 0x%lx.\n",
  3144. ha->host_no, risc_code, cnt, risc_addr));
  3145. req_ring = (uint32_t *)ha->request_ring;
  3146. for (i = 0; i < cnt; i++)
  3147. req_ring[i] = cpu_to_le32(risc_code[i]);
  3148. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3149. cnt);
  3150. if (rval) {
  3151. DEBUG(printk("scsi(%ld): [ERROR] Failed to "
  3152. "load segment %d of firmware\n",
  3153. ha->host_no, num));
  3154. qla_printk(KERN_WARNING, ha,
  3155. "[ERROR] Failed to load segment %d of "
  3156. "firmware\n", num);
  3157. qla2x00_dump_regs(ha);
  3158. break;
  3159. }
  3160. risc_code += cnt;
  3161. risc_addr += cnt;
  3162. risc_size -= cnt;
  3163. num++;
  3164. }
  3165. /* Next firmware sequence */
  3166. fw_iter++;
  3167. }
  3168. return rval;
  3169. }
  3170. #else /* !defined(CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE) */
  3171. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3172. int
  3173. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3174. {
  3175. int rval;
  3176. int i, fragment;
  3177. uint16_t *wcode, *fwcode;
  3178. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3179. struct fw_blob *blob;
  3180. /* Load firmware blob. */
  3181. blob = qla2x00_request_firmware(ha);
  3182. if (!blob) {
  3183. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3184. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3185. "from: " QLA_FW_URL ".\n");
  3186. return QLA_FUNCTION_FAILED;
  3187. }
  3188. rval = QLA_SUCCESS;
  3189. wcode = (uint16_t *)ha->request_ring;
  3190. *srisc_addr = 0;
  3191. fwcode = (uint16_t *)blob->fw->data;
  3192. fwclen = 0;
  3193. /* Validate firmware image by checking version. */
  3194. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3195. qla_printk(KERN_WARNING, ha,
  3196. "Unable to verify integrity of firmware image (%Zd)!\n",
  3197. blob->fw->size);
  3198. goto fail_fw_integrity;
  3199. }
  3200. for (i = 0; i < 4; i++)
  3201. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3202. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3203. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3204. wcode[2] == 0 && wcode[3] == 0)) {
  3205. qla_printk(KERN_WARNING, ha,
  3206. "Unable to verify integrity of firmware image!\n");
  3207. qla_printk(KERN_WARNING, ha,
  3208. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3209. wcode[1], wcode[2], wcode[3]);
  3210. goto fail_fw_integrity;
  3211. }
  3212. seg = blob->segs;
  3213. while (*seg && rval == QLA_SUCCESS) {
  3214. risc_addr = *seg;
  3215. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3216. risc_size = be16_to_cpu(fwcode[3]);
  3217. /* Validate firmware image size. */
  3218. fwclen += risc_size * sizeof(uint16_t);
  3219. if (blob->fw->size < fwclen) {
  3220. qla_printk(KERN_WARNING, ha,
  3221. "Unable to verify integrity of firmware image "
  3222. "(%Zd)!\n", blob->fw->size);
  3223. goto fail_fw_integrity;
  3224. }
  3225. fragment = 0;
  3226. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3227. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3228. if (wlen > risc_size)
  3229. wlen = risc_size;
  3230. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3231. "addr %x, number of words 0x%x.\n", ha->host_no,
  3232. risc_addr, wlen));
  3233. for (i = 0; i < wlen; i++)
  3234. wcode[i] = swab16(fwcode[i]);
  3235. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3236. wlen);
  3237. if (rval) {
  3238. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3239. "segment %d of firmware\n", ha->host_no,
  3240. fragment));
  3241. qla_printk(KERN_WARNING, ha,
  3242. "[ERROR] Failed to load segment %d of "
  3243. "firmware\n", fragment);
  3244. break;
  3245. }
  3246. fwcode += wlen;
  3247. risc_addr += wlen;
  3248. risc_size -= wlen;
  3249. fragment++;
  3250. }
  3251. /* Next segment. */
  3252. seg++;
  3253. }
  3254. return rval;
  3255. fail_fw_integrity:
  3256. return QLA_FUNCTION_FAILED;
  3257. }
  3258. int
  3259. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3260. {
  3261. int rval;
  3262. int segments, fragment;
  3263. uint32_t *dcode, dlen;
  3264. uint32_t risc_addr;
  3265. uint32_t risc_size;
  3266. uint32_t i;
  3267. struct fw_blob *blob;
  3268. uint32_t *fwcode, fwclen;
  3269. /* Load firmware blob. */
  3270. blob = qla2x00_request_firmware(ha);
  3271. if (!blob) {
  3272. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3273. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3274. "from: " QLA_FW_URL ".\n");
  3275. /* Try to load RISC code from flash. */
  3276. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3277. "outdated) firmware from flash.\n");
  3278. return qla24xx_load_risc_flash(ha, srisc_addr);
  3279. }
  3280. rval = QLA_SUCCESS;
  3281. segments = FA_RISC_CODE_SEGMENTS;
  3282. dcode = (uint32_t *)ha->request_ring;
  3283. *srisc_addr = 0;
  3284. fwcode = (uint32_t *)blob->fw->data;
  3285. fwclen = 0;
  3286. /* Validate firmware image by checking version. */
  3287. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3288. qla_printk(KERN_WARNING, ha,
  3289. "Unable to verify integrity of firmware image (%Zd)!\n",
  3290. blob->fw->size);
  3291. goto fail_fw_integrity;
  3292. }
  3293. for (i = 0; i < 4; i++)
  3294. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3295. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3296. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3297. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3298. dcode[3] == 0)) {
  3299. qla_printk(KERN_WARNING, ha,
  3300. "Unable to verify integrity of firmware image!\n");
  3301. qla_printk(KERN_WARNING, ha,
  3302. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3303. dcode[1], dcode[2], dcode[3]);
  3304. goto fail_fw_integrity;
  3305. }
  3306. while (segments && rval == QLA_SUCCESS) {
  3307. risc_addr = be32_to_cpu(fwcode[2]);
  3308. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3309. risc_size = be32_to_cpu(fwcode[3]);
  3310. /* Validate firmware image size. */
  3311. fwclen += risc_size * sizeof(uint32_t);
  3312. if (blob->fw->size < fwclen) {
  3313. qla_printk(KERN_WARNING, ha,
  3314. "Unable to verify integrity of firmware image "
  3315. "(%Zd)!\n", blob->fw->size);
  3316. goto fail_fw_integrity;
  3317. }
  3318. fragment = 0;
  3319. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3320. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3321. if (dlen > risc_size)
  3322. dlen = risc_size;
  3323. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3324. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3325. risc_addr, dlen));
  3326. for (i = 0; i < dlen; i++)
  3327. dcode[i] = swab32(fwcode[i]);
  3328. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3329. dlen);
  3330. if (rval) {
  3331. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3332. "segment %d of firmware\n", ha->host_no,
  3333. fragment));
  3334. qla_printk(KERN_WARNING, ha,
  3335. "[ERROR] Failed to load segment %d of "
  3336. "firmware\n", fragment);
  3337. break;
  3338. }
  3339. fwcode += dlen;
  3340. risc_addr += dlen;
  3341. risc_size -= dlen;
  3342. fragment++;
  3343. }
  3344. /* Next segment. */
  3345. segments--;
  3346. }
  3347. return rval;
  3348. fail_fw_integrity:
  3349. return QLA_FUNCTION_FAILED;
  3350. }
  3351. #endif