mwl8k.c 145 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035
  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/list.h>
  18. #include <linux/pci.h>
  19. #include <linux/delay.h>
  20. #include <linux/completion.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/slab.h>
  23. #include <net/mac80211.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/firmware.h>
  26. #include <linux/workqueue.h>
  27. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  28. #define MWL8K_NAME KBUILD_MODNAME
  29. #define MWL8K_VERSION "0.13"
  30. /* Module parameters */
  31. static bool ap_mode_default;
  32. module_param(ap_mode_default, bool, 0);
  33. MODULE_PARM_DESC(ap_mode_default,
  34. "Set to 1 to make ap mode the default instead of sta mode");
  35. /* Register definitions */
  36. #define MWL8K_HIU_GEN_PTR 0x00000c10
  37. #define MWL8K_MODE_STA 0x0000005a
  38. #define MWL8K_MODE_AP 0x000000a5
  39. #define MWL8K_HIU_INT_CODE 0x00000c14
  40. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  41. #define MWL8K_FWAP_READY 0xf1f2f4a5
  42. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  43. #define MWL8K_HIU_SCRATCH 0x00000c40
  44. /* Host->device communications */
  45. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  46. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  47. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  48. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  49. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  50. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  51. #define MWL8K_H2A_INT_RESET (1 << 15)
  52. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  53. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  54. /* Device->host communications */
  55. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  56. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  57. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  58. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  59. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  60. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  61. #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
  62. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  63. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  64. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  65. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  66. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  67. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  68. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  69. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  70. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  71. /* HW micro second timer register
  72. * located at offset 0xA600. This
  73. * will be used to timestamp tx
  74. * packets.
  75. */
  76. #define MWL8K_HW_TIMER_REGISTER 0x0000a600
  77. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  78. MWL8K_A2H_INT_CHNL_SWITCHED | \
  79. MWL8K_A2H_INT_QUEUE_EMPTY | \
  80. MWL8K_A2H_INT_RADAR_DETECT | \
  81. MWL8K_A2H_INT_RADIO_ON | \
  82. MWL8K_A2H_INT_RADIO_OFF | \
  83. MWL8K_A2H_INT_MAC_EVENT | \
  84. MWL8K_A2H_INT_OPC_DONE | \
  85. MWL8K_A2H_INT_RX_READY | \
  86. MWL8K_A2H_INT_TX_DONE | \
  87. MWL8K_A2H_INT_BA_WATCHDOG)
  88. #define MWL8K_RX_QUEUES 1
  89. #define MWL8K_TX_WMM_QUEUES 4
  90. #define MWL8K_MAX_AMPDU_QUEUES 8
  91. #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
  92. #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
  93. /* txpriorities are mapped with hw queues.
  94. * Each hw queue has a txpriority.
  95. */
  96. #define TOTAL_HW_TX_QUEUES 8
  97. /* Each HW queue can have one AMPDU stream.
  98. * But, because one of the hw queue is reserved,
  99. * maximum AMPDU queues that can be created are
  100. * one short of total tx queues.
  101. */
  102. #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1)
  103. struct rxd_ops {
  104. int rxd_size;
  105. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  106. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  107. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  108. __le16 *qos, s8 *noise);
  109. };
  110. struct mwl8k_device_info {
  111. char *part_name;
  112. char *helper_image;
  113. char *fw_image_sta;
  114. char *fw_image_ap;
  115. struct rxd_ops *ap_rxd_ops;
  116. u32 fw_api_ap;
  117. };
  118. struct mwl8k_rx_queue {
  119. int rxd_count;
  120. /* hw receives here */
  121. int head;
  122. /* refill descs here */
  123. int tail;
  124. void *rxd;
  125. dma_addr_t rxd_dma;
  126. struct {
  127. struct sk_buff *skb;
  128. DEFINE_DMA_UNMAP_ADDR(dma);
  129. } *buf;
  130. };
  131. struct mwl8k_tx_queue {
  132. /* hw transmits here */
  133. int head;
  134. /* sw appends here */
  135. int tail;
  136. unsigned int len;
  137. struct mwl8k_tx_desc *txd;
  138. dma_addr_t txd_dma;
  139. struct sk_buff **skb;
  140. };
  141. enum {
  142. AMPDU_NO_STREAM,
  143. AMPDU_STREAM_NEW,
  144. AMPDU_STREAM_IN_PROGRESS,
  145. AMPDU_STREAM_ACTIVE,
  146. };
  147. struct mwl8k_ampdu_stream {
  148. struct ieee80211_sta *sta;
  149. u8 tid;
  150. u8 state;
  151. u8 idx;
  152. };
  153. struct mwl8k_priv {
  154. struct ieee80211_hw *hw;
  155. struct pci_dev *pdev;
  156. int irq;
  157. struct mwl8k_device_info *device_info;
  158. void __iomem *sram;
  159. void __iomem *regs;
  160. /* firmware */
  161. const struct firmware *fw_helper;
  162. const struct firmware *fw_ucode;
  163. /* hardware/firmware parameters */
  164. bool ap_fw;
  165. struct rxd_ops *rxd_ops;
  166. struct ieee80211_supported_band band_24;
  167. struct ieee80211_channel channels_24[14];
  168. struct ieee80211_rate rates_24[14];
  169. struct ieee80211_supported_band band_50;
  170. struct ieee80211_channel channels_50[4];
  171. struct ieee80211_rate rates_50[9];
  172. u32 ap_macids_supported;
  173. u32 sta_macids_supported;
  174. /* Ampdu stream information */
  175. u8 num_ampdu_queues;
  176. spinlock_t stream_lock;
  177. struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
  178. struct work_struct watchdog_ba_handle;
  179. /* firmware access */
  180. struct mutex fw_mutex;
  181. struct task_struct *fw_mutex_owner;
  182. struct task_struct *hw_restart_owner;
  183. int fw_mutex_depth;
  184. struct completion *hostcmd_wait;
  185. atomic_t watchdog_event_pending;
  186. /* lock held over TX and TX reap */
  187. spinlock_t tx_lock;
  188. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  189. struct completion *tx_wait;
  190. /* List of interfaces. */
  191. u32 macids_used;
  192. struct list_head vif_list;
  193. /* power management status cookie from firmware */
  194. u32 *cookie;
  195. dma_addr_t cookie_dma;
  196. u16 num_mcaddrs;
  197. u8 hw_rev;
  198. u32 fw_rev;
  199. /*
  200. * Running count of TX packets in flight, to avoid
  201. * iterating over the transmit rings each time.
  202. */
  203. int pending_tx_pkts;
  204. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  205. struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
  206. u32 txq_offset[MWL8K_MAX_TX_QUEUES];
  207. bool radio_on;
  208. bool radio_short_preamble;
  209. bool sniffer_enabled;
  210. bool wmm_enabled;
  211. /* XXX need to convert this to handle multiple interfaces */
  212. bool capture_beacon;
  213. u8 capture_bssid[ETH_ALEN];
  214. struct sk_buff *beacon_skb;
  215. /*
  216. * This FJ worker has to be global as it is scheduled from the
  217. * RX handler. At this point we don't know which interface it
  218. * belongs to until the list of bssids waiting to complete join
  219. * is checked.
  220. */
  221. struct work_struct finalize_join_worker;
  222. /* Tasklet to perform TX reclaim. */
  223. struct tasklet_struct poll_tx_task;
  224. /* Tasklet to perform RX. */
  225. struct tasklet_struct poll_rx_task;
  226. /* Most recently reported noise in dBm */
  227. s8 noise;
  228. /*
  229. * preserve the queue configurations so they can be restored if/when
  230. * the firmware image is swapped.
  231. */
  232. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
  233. /* To perform the task of reloading the firmware */
  234. struct work_struct fw_reload;
  235. bool hw_restart_in_progress;
  236. /* async firmware loading state */
  237. unsigned fw_state;
  238. char *fw_pref;
  239. char *fw_alt;
  240. struct completion firmware_loading_complete;
  241. };
  242. #define MAX_WEP_KEY_LEN 13
  243. #define NUM_WEP_KEYS 4
  244. /* Per interface specific private data */
  245. struct mwl8k_vif {
  246. struct list_head list;
  247. struct ieee80211_vif *vif;
  248. /* Firmware macid for this vif. */
  249. int macid;
  250. /* Non AMPDU sequence number assigned by driver. */
  251. u16 seqno;
  252. /* Saved WEP keys */
  253. struct {
  254. u8 enabled;
  255. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  256. } wep_key_conf[NUM_WEP_KEYS];
  257. /* BSSID */
  258. u8 bssid[ETH_ALEN];
  259. /* A flag to indicate is HW crypto is enabled for this bssid */
  260. bool is_hw_crypto_enabled;
  261. };
  262. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  263. #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
  264. struct tx_traffic_info {
  265. u32 start_time;
  266. u32 pkts;
  267. };
  268. #define MWL8K_MAX_TID 8
  269. struct mwl8k_sta {
  270. /* Index into station database. Returned by UPDATE_STADB. */
  271. u8 peer_id;
  272. u8 is_ampdu_allowed;
  273. struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
  274. };
  275. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  276. static const struct ieee80211_channel mwl8k_channels_24[] = {
  277. { .center_freq = 2412, .hw_value = 1, },
  278. { .center_freq = 2417, .hw_value = 2, },
  279. { .center_freq = 2422, .hw_value = 3, },
  280. { .center_freq = 2427, .hw_value = 4, },
  281. { .center_freq = 2432, .hw_value = 5, },
  282. { .center_freq = 2437, .hw_value = 6, },
  283. { .center_freq = 2442, .hw_value = 7, },
  284. { .center_freq = 2447, .hw_value = 8, },
  285. { .center_freq = 2452, .hw_value = 9, },
  286. { .center_freq = 2457, .hw_value = 10, },
  287. { .center_freq = 2462, .hw_value = 11, },
  288. { .center_freq = 2467, .hw_value = 12, },
  289. { .center_freq = 2472, .hw_value = 13, },
  290. { .center_freq = 2484, .hw_value = 14, },
  291. };
  292. static const struct ieee80211_rate mwl8k_rates_24[] = {
  293. { .bitrate = 10, .hw_value = 2, },
  294. { .bitrate = 20, .hw_value = 4, },
  295. { .bitrate = 55, .hw_value = 11, },
  296. { .bitrate = 110, .hw_value = 22, },
  297. { .bitrate = 220, .hw_value = 44, },
  298. { .bitrate = 60, .hw_value = 12, },
  299. { .bitrate = 90, .hw_value = 18, },
  300. { .bitrate = 120, .hw_value = 24, },
  301. { .bitrate = 180, .hw_value = 36, },
  302. { .bitrate = 240, .hw_value = 48, },
  303. { .bitrate = 360, .hw_value = 72, },
  304. { .bitrate = 480, .hw_value = 96, },
  305. { .bitrate = 540, .hw_value = 108, },
  306. { .bitrate = 720, .hw_value = 144, },
  307. };
  308. static const struct ieee80211_channel mwl8k_channels_50[] = {
  309. { .center_freq = 5180, .hw_value = 36, },
  310. { .center_freq = 5200, .hw_value = 40, },
  311. { .center_freq = 5220, .hw_value = 44, },
  312. { .center_freq = 5240, .hw_value = 48, },
  313. };
  314. static const struct ieee80211_rate mwl8k_rates_50[] = {
  315. { .bitrate = 60, .hw_value = 12, },
  316. { .bitrate = 90, .hw_value = 18, },
  317. { .bitrate = 120, .hw_value = 24, },
  318. { .bitrate = 180, .hw_value = 36, },
  319. { .bitrate = 240, .hw_value = 48, },
  320. { .bitrate = 360, .hw_value = 72, },
  321. { .bitrate = 480, .hw_value = 96, },
  322. { .bitrate = 540, .hw_value = 108, },
  323. { .bitrate = 720, .hw_value = 144, },
  324. };
  325. /* Set or get info from Firmware */
  326. #define MWL8K_CMD_GET 0x0000
  327. #define MWL8K_CMD_SET 0x0001
  328. #define MWL8K_CMD_SET_LIST 0x0002
  329. /* Firmware command codes */
  330. #define MWL8K_CMD_CODE_DNLD 0x0001
  331. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  332. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  333. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  334. #define MWL8K_CMD_GET_STAT 0x0014
  335. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  336. #define MWL8K_CMD_RF_TX_POWER 0x001e
  337. #define MWL8K_CMD_TX_POWER 0x001f
  338. #define MWL8K_CMD_RF_ANTENNA 0x0020
  339. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  340. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  341. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  342. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  343. #define MWL8K_CMD_SET_AID 0x010d
  344. #define MWL8K_CMD_SET_RATE 0x0110
  345. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  346. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  347. #define MWL8K_CMD_SET_SLOT 0x0114
  348. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  349. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  350. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  351. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  352. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  353. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  354. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  355. #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
  356. #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
  357. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  358. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  359. #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
  360. #define MWL8K_CMD_UPDATE_STADB 0x1123
  361. #define MWL8K_CMD_BASTREAM 0x1125
  362. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  363. {
  364. u16 command = le16_to_cpu(cmd);
  365. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  366. snprintf(buf, bufsize, "%s", #x);\
  367. return buf;\
  368. } while (0)
  369. switch (command & ~0x8000) {
  370. MWL8K_CMDNAME(CODE_DNLD);
  371. MWL8K_CMDNAME(GET_HW_SPEC);
  372. MWL8K_CMDNAME(SET_HW_SPEC);
  373. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  374. MWL8K_CMDNAME(GET_STAT);
  375. MWL8K_CMDNAME(RADIO_CONTROL);
  376. MWL8K_CMDNAME(RF_TX_POWER);
  377. MWL8K_CMDNAME(TX_POWER);
  378. MWL8K_CMDNAME(RF_ANTENNA);
  379. MWL8K_CMDNAME(SET_BEACON);
  380. MWL8K_CMDNAME(SET_PRE_SCAN);
  381. MWL8K_CMDNAME(SET_POST_SCAN);
  382. MWL8K_CMDNAME(SET_RF_CHANNEL);
  383. MWL8K_CMDNAME(SET_AID);
  384. MWL8K_CMDNAME(SET_RATE);
  385. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  386. MWL8K_CMDNAME(RTS_THRESHOLD);
  387. MWL8K_CMDNAME(SET_SLOT);
  388. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  389. MWL8K_CMDNAME(SET_WMM_MODE);
  390. MWL8K_CMDNAME(MIMO_CONFIG);
  391. MWL8K_CMDNAME(USE_FIXED_RATE);
  392. MWL8K_CMDNAME(ENABLE_SNIFFER);
  393. MWL8K_CMDNAME(SET_MAC_ADDR);
  394. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  395. MWL8K_CMDNAME(BSS_START);
  396. MWL8K_CMDNAME(SET_NEW_STN);
  397. MWL8K_CMDNAME(UPDATE_ENCRYPTION);
  398. MWL8K_CMDNAME(UPDATE_STADB);
  399. MWL8K_CMDNAME(BASTREAM);
  400. MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
  401. default:
  402. snprintf(buf, bufsize, "0x%x", cmd);
  403. }
  404. #undef MWL8K_CMDNAME
  405. return buf;
  406. }
  407. /* Hardware and firmware reset */
  408. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  409. {
  410. iowrite32(MWL8K_H2A_INT_RESET,
  411. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  412. iowrite32(MWL8K_H2A_INT_RESET,
  413. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  414. msleep(20);
  415. }
  416. /* Release fw image */
  417. static void mwl8k_release_fw(const struct firmware **fw)
  418. {
  419. if (*fw == NULL)
  420. return;
  421. release_firmware(*fw);
  422. *fw = NULL;
  423. }
  424. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  425. {
  426. mwl8k_release_fw(&priv->fw_ucode);
  427. mwl8k_release_fw(&priv->fw_helper);
  428. }
  429. /* states for asynchronous f/w loading */
  430. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  431. enum {
  432. FW_STATE_INIT = 0,
  433. FW_STATE_LOADING_PREF,
  434. FW_STATE_LOADING_ALT,
  435. FW_STATE_ERROR,
  436. };
  437. /* Request fw image */
  438. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  439. const char *fname, const struct firmware **fw,
  440. bool nowait)
  441. {
  442. /* release current image */
  443. if (*fw != NULL)
  444. mwl8k_release_fw(fw);
  445. if (nowait)
  446. return request_firmware_nowait(THIS_MODULE, 1, fname,
  447. &priv->pdev->dev, GFP_KERNEL,
  448. priv, mwl8k_fw_state_machine);
  449. else
  450. return request_firmware(fw, fname, &priv->pdev->dev);
  451. }
  452. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  453. bool nowait)
  454. {
  455. struct mwl8k_device_info *di = priv->device_info;
  456. int rc;
  457. if (di->helper_image != NULL) {
  458. if (nowait)
  459. rc = mwl8k_request_fw(priv, di->helper_image,
  460. &priv->fw_helper, true);
  461. else
  462. rc = mwl8k_request_fw(priv, di->helper_image,
  463. &priv->fw_helper, false);
  464. if (rc)
  465. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  466. pci_name(priv->pdev), di->helper_image);
  467. if (rc || nowait)
  468. return rc;
  469. }
  470. if (nowait) {
  471. /*
  472. * if we get here, no helper image is needed. Skip the
  473. * FW_STATE_INIT state.
  474. */
  475. priv->fw_state = FW_STATE_LOADING_PREF;
  476. rc = mwl8k_request_fw(priv, fw_image,
  477. &priv->fw_ucode,
  478. true);
  479. } else
  480. rc = mwl8k_request_fw(priv, fw_image,
  481. &priv->fw_ucode, false);
  482. if (rc) {
  483. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  484. pci_name(priv->pdev), fw_image);
  485. mwl8k_release_fw(&priv->fw_helper);
  486. return rc;
  487. }
  488. return 0;
  489. }
  490. struct mwl8k_cmd_pkt {
  491. __le16 code;
  492. __le16 length;
  493. __u8 seq_num;
  494. __u8 macid;
  495. __le16 result;
  496. char payload[0];
  497. } __packed;
  498. /*
  499. * Firmware loading.
  500. */
  501. static int
  502. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  503. {
  504. void __iomem *regs = priv->regs;
  505. dma_addr_t dma_addr;
  506. int loops;
  507. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  508. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  509. return -ENOMEM;
  510. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  511. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  512. iowrite32(MWL8K_H2A_INT_DOORBELL,
  513. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  514. iowrite32(MWL8K_H2A_INT_DUMMY,
  515. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  516. loops = 1000;
  517. do {
  518. u32 int_code;
  519. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  520. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  521. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  522. break;
  523. }
  524. cond_resched();
  525. udelay(1);
  526. } while (--loops);
  527. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  528. return loops ? 0 : -ETIMEDOUT;
  529. }
  530. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  531. const u8 *data, size_t length)
  532. {
  533. struct mwl8k_cmd_pkt *cmd;
  534. int done;
  535. int rc = 0;
  536. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  537. if (cmd == NULL)
  538. return -ENOMEM;
  539. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  540. cmd->seq_num = 0;
  541. cmd->macid = 0;
  542. cmd->result = 0;
  543. done = 0;
  544. while (length) {
  545. int block_size = length > 256 ? 256 : length;
  546. memcpy(cmd->payload, data + done, block_size);
  547. cmd->length = cpu_to_le16(block_size);
  548. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  549. sizeof(*cmd) + block_size);
  550. if (rc)
  551. break;
  552. done += block_size;
  553. length -= block_size;
  554. }
  555. if (!rc) {
  556. cmd->length = 0;
  557. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  558. }
  559. kfree(cmd);
  560. return rc;
  561. }
  562. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  563. const u8 *data, size_t length)
  564. {
  565. unsigned char *buffer;
  566. int may_continue, rc = 0;
  567. u32 done, prev_block_size;
  568. buffer = kmalloc(1024, GFP_KERNEL);
  569. if (buffer == NULL)
  570. return -ENOMEM;
  571. done = 0;
  572. prev_block_size = 0;
  573. may_continue = 1000;
  574. while (may_continue > 0) {
  575. u32 block_size;
  576. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  577. if (block_size & 1) {
  578. block_size &= ~1;
  579. may_continue--;
  580. } else {
  581. done += prev_block_size;
  582. length -= prev_block_size;
  583. }
  584. if (block_size > 1024 || block_size > length) {
  585. rc = -EOVERFLOW;
  586. break;
  587. }
  588. if (length == 0) {
  589. rc = 0;
  590. break;
  591. }
  592. if (block_size == 0) {
  593. rc = -EPROTO;
  594. may_continue--;
  595. udelay(1);
  596. continue;
  597. }
  598. prev_block_size = block_size;
  599. memcpy(buffer, data + done, block_size);
  600. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  601. if (rc)
  602. break;
  603. }
  604. if (!rc && length != 0)
  605. rc = -EREMOTEIO;
  606. kfree(buffer);
  607. return rc;
  608. }
  609. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  610. {
  611. struct mwl8k_priv *priv = hw->priv;
  612. const struct firmware *fw = priv->fw_ucode;
  613. int rc;
  614. int loops;
  615. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  616. const struct firmware *helper = priv->fw_helper;
  617. if (helper == NULL) {
  618. printk(KERN_ERR "%s: helper image needed but none "
  619. "given\n", pci_name(priv->pdev));
  620. return -EINVAL;
  621. }
  622. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  623. if (rc) {
  624. printk(KERN_ERR "%s: unable to load firmware "
  625. "helper image\n", pci_name(priv->pdev));
  626. return rc;
  627. }
  628. msleep(20);
  629. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  630. } else {
  631. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  632. }
  633. if (rc) {
  634. printk(KERN_ERR "%s: unable to load firmware image\n",
  635. pci_name(priv->pdev));
  636. return rc;
  637. }
  638. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  639. loops = 500000;
  640. do {
  641. u32 ready_code;
  642. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  643. if (ready_code == MWL8K_FWAP_READY) {
  644. priv->ap_fw = true;
  645. break;
  646. } else if (ready_code == MWL8K_FWSTA_READY) {
  647. priv->ap_fw = false;
  648. break;
  649. }
  650. cond_resched();
  651. udelay(1);
  652. } while (--loops);
  653. return loops ? 0 : -ETIMEDOUT;
  654. }
  655. /* DMA header used by firmware and hardware. */
  656. struct mwl8k_dma_data {
  657. __le16 fwlen;
  658. struct ieee80211_hdr wh;
  659. char data[0];
  660. } __packed;
  661. /* Routines to add/remove DMA header from skb. */
  662. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  663. {
  664. struct mwl8k_dma_data *tr;
  665. int hdrlen;
  666. tr = (struct mwl8k_dma_data *)skb->data;
  667. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  668. if (hdrlen != sizeof(tr->wh)) {
  669. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  670. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  671. *((__le16 *)(tr->data - 2)) = qos;
  672. } else {
  673. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  674. }
  675. }
  676. if (hdrlen != sizeof(*tr))
  677. skb_pull(skb, sizeof(*tr) - hdrlen);
  678. }
  679. #define REDUCED_TX_HEADROOM 8
  680. static void
  681. mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
  682. int head_pad, int tail_pad)
  683. {
  684. struct ieee80211_hdr *wh;
  685. int hdrlen;
  686. int reqd_hdrlen;
  687. struct mwl8k_dma_data *tr;
  688. /*
  689. * Add a firmware DMA header; the firmware requires that we
  690. * present a 2-byte payload length followed by a 4-address
  691. * header (without QoS field), followed (optionally) by any
  692. * WEP/ExtIV header (but only filled in for CCMP).
  693. */
  694. wh = (struct ieee80211_hdr *)skb->data;
  695. hdrlen = ieee80211_hdrlen(wh->frame_control);
  696. /*
  697. * Check if skb_resize is required because of
  698. * tx_headroom adjustment.
  699. */
  700. if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
  701. + REDUCED_TX_HEADROOM))) {
  702. if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
  703. wiphy_err(priv->hw->wiphy,
  704. "Failed to reallocate TX buffer\n");
  705. return;
  706. }
  707. skb->truesize += REDUCED_TX_HEADROOM;
  708. }
  709. reqd_hdrlen = sizeof(*tr) + head_pad;
  710. if (hdrlen != reqd_hdrlen)
  711. skb_push(skb, reqd_hdrlen - hdrlen);
  712. if (ieee80211_is_data_qos(wh->frame_control))
  713. hdrlen -= IEEE80211_QOS_CTL_LEN;
  714. tr = (struct mwl8k_dma_data *)skb->data;
  715. if (wh != &tr->wh)
  716. memmove(&tr->wh, wh, hdrlen);
  717. if (hdrlen != sizeof(tr->wh))
  718. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  719. /*
  720. * Firmware length is the length of the fully formed "802.11
  721. * payload". That is, everything except for the 802.11 header.
  722. * This includes all crypto material including the MIC.
  723. */
  724. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  725. }
  726. static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
  727. struct sk_buff *skb)
  728. {
  729. struct ieee80211_hdr *wh;
  730. struct ieee80211_tx_info *tx_info;
  731. struct ieee80211_key_conf *key_conf;
  732. int data_pad;
  733. int head_pad = 0;
  734. wh = (struct ieee80211_hdr *)skb->data;
  735. tx_info = IEEE80211_SKB_CB(skb);
  736. key_conf = NULL;
  737. if (ieee80211_is_data(wh->frame_control))
  738. key_conf = tx_info->control.hw_key;
  739. /*
  740. * Make sure the packet header is in the DMA header format (4-address
  741. * without QoS), and add head & tail padding when HW crypto is enabled.
  742. *
  743. * We have the following trailer padding requirements:
  744. * - WEP: 4 trailer bytes (ICV)
  745. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  746. * - CCMP: 8 trailer bytes (MIC)
  747. */
  748. data_pad = 0;
  749. if (key_conf != NULL) {
  750. head_pad = key_conf->iv_len;
  751. switch (key_conf->cipher) {
  752. case WLAN_CIPHER_SUITE_WEP40:
  753. case WLAN_CIPHER_SUITE_WEP104:
  754. data_pad = 4;
  755. break;
  756. case WLAN_CIPHER_SUITE_TKIP:
  757. data_pad = 12;
  758. break;
  759. case WLAN_CIPHER_SUITE_CCMP:
  760. data_pad = 8;
  761. break;
  762. }
  763. }
  764. mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
  765. }
  766. /*
  767. * Packet reception for 88w8366 AP firmware.
  768. */
  769. struct mwl8k_rxd_8366_ap {
  770. __le16 pkt_len;
  771. __u8 sq2;
  772. __u8 rate;
  773. __le32 pkt_phys_addr;
  774. __le32 next_rxd_phys_addr;
  775. __le16 qos_control;
  776. __le16 htsig2;
  777. __le32 hw_rssi_info;
  778. __le32 hw_noise_floor_info;
  779. __u8 noise_floor;
  780. __u8 pad0[3];
  781. __u8 rssi;
  782. __u8 rx_status;
  783. __u8 channel;
  784. __u8 rx_ctrl;
  785. } __packed;
  786. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  787. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  788. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  789. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  790. /* 8366 AP rx_status bits */
  791. #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  792. #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  793. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  794. #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  795. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  796. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  797. {
  798. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  799. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  800. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  801. }
  802. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  803. {
  804. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  805. rxd->pkt_len = cpu_to_le16(len);
  806. rxd->pkt_phys_addr = cpu_to_le32(addr);
  807. wmb();
  808. rxd->rx_ctrl = 0;
  809. }
  810. static int
  811. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  812. __le16 *qos, s8 *noise)
  813. {
  814. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  815. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  816. return -1;
  817. rmb();
  818. memset(status, 0, sizeof(*status));
  819. status->signal = -rxd->rssi;
  820. *noise = -rxd->noise_floor;
  821. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  822. status->flag |= RX_FLAG_HT;
  823. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  824. status->flag |= RX_FLAG_40MHZ;
  825. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  826. } else {
  827. int i;
  828. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  829. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  830. status->rate_idx = i;
  831. break;
  832. }
  833. }
  834. }
  835. if (rxd->channel > 14) {
  836. status->band = IEEE80211_BAND_5GHZ;
  837. if (!(status->flag & RX_FLAG_HT))
  838. status->rate_idx -= 5;
  839. } else {
  840. status->band = IEEE80211_BAND_2GHZ;
  841. }
  842. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  843. status->band);
  844. *qos = rxd->qos_control;
  845. if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  846. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  847. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  848. status->flag |= RX_FLAG_MMIC_ERROR;
  849. return le16_to_cpu(rxd->pkt_len);
  850. }
  851. static struct rxd_ops rxd_8366_ap_ops = {
  852. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  853. .rxd_init = mwl8k_rxd_8366_ap_init,
  854. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  855. .rxd_process = mwl8k_rxd_8366_ap_process,
  856. };
  857. /*
  858. * Packet reception for STA firmware.
  859. */
  860. struct mwl8k_rxd_sta {
  861. __le16 pkt_len;
  862. __u8 link_quality;
  863. __u8 noise_level;
  864. __le32 pkt_phys_addr;
  865. __le32 next_rxd_phys_addr;
  866. __le16 qos_control;
  867. __le16 rate_info;
  868. __le32 pad0[4];
  869. __u8 rssi;
  870. __u8 channel;
  871. __le16 pad1;
  872. __u8 rx_ctrl;
  873. __u8 rx_status;
  874. __u8 pad2[2];
  875. } __packed;
  876. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  877. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  878. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  879. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  880. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  881. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  882. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  883. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  884. /* ICV=0 or MIC=1 */
  885. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  886. /* Key is uploaded only in failure case */
  887. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  888. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  889. {
  890. struct mwl8k_rxd_sta *rxd = _rxd;
  891. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  892. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  893. }
  894. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  895. {
  896. struct mwl8k_rxd_sta *rxd = _rxd;
  897. rxd->pkt_len = cpu_to_le16(len);
  898. rxd->pkt_phys_addr = cpu_to_le32(addr);
  899. wmb();
  900. rxd->rx_ctrl = 0;
  901. }
  902. static int
  903. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  904. __le16 *qos, s8 *noise)
  905. {
  906. struct mwl8k_rxd_sta *rxd = _rxd;
  907. u16 rate_info;
  908. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  909. return -1;
  910. rmb();
  911. rate_info = le16_to_cpu(rxd->rate_info);
  912. memset(status, 0, sizeof(*status));
  913. status->signal = -rxd->rssi;
  914. *noise = -rxd->noise_level;
  915. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  916. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  917. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  918. status->flag |= RX_FLAG_SHORTPRE;
  919. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  920. status->flag |= RX_FLAG_40MHZ;
  921. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  922. status->flag |= RX_FLAG_SHORT_GI;
  923. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  924. status->flag |= RX_FLAG_HT;
  925. if (rxd->channel > 14) {
  926. status->band = IEEE80211_BAND_5GHZ;
  927. if (!(status->flag & RX_FLAG_HT))
  928. status->rate_idx -= 5;
  929. } else {
  930. status->band = IEEE80211_BAND_2GHZ;
  931. }
  932. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  933. status->band);
  934. *qos = rxd->qos_control;
  935. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  936. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  937. status->flag |= RX_FLAG_MMIC_ERROR;
  938. return le16_to_cpu(rxd->pkt_len);
  939. }
  940. static struct rxd_ops rxd_sta_ops = {
  941. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  942. .rxd_init = mwl8k_rxd_sta_init,
  943. .rxd_refill = mwl8k_rxd_sta_refill,
  944. .rxd_process = mwl8k_rxd_sta_process,
  945. };
  946. #define MWL8K_RX_DESCS 256
  947. #define MWL8K_RX_MAXSZ 3800
  948. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  949. {
  950. struct mwl8k_priv *priv = hw->priv;
  951. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  952. int size;
  953. int i;
  954. rxq->rxd_count = 0;
  955. rxq->head = 0;
  956. rxq->tail = 0;
  957. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  958. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  959. if (rxq->rxd == NULL) {
  960. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  961. return -ENOMEM;
  962. }
  963. memset(rxq->rxd, 0, size);
  964. rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
  965. if (rxq->buf == NULL) {
  966. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  967. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  968. return -ENOMEM;
  969. }
  970. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  971. int desc_size;
  972. void *rxd;
  973. int nexti;
  974. dma_addr_t next_dma_addr;
  975. desc_size = priv->rxd_ops->rxd_size;
  976. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  977. nexti = i + 1;
  978. if (nexti == MWL8K_RX_DESCS)
  979. nexti = 0;
  980. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  981. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  982. }
  983. return 0;
  984. }
  985. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  986. {
  987. struct mwl8k_priv *priv = hw->priv;
  988. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  989. int refilled;
  990. refilled = 0;
  991. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  992. struct sk_buff *skb;
  993. dma_addr_t addr;
  994. int rx;
  995. void *rxd;
  996. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  997. if (skb == NULL)
  998. break;
  999. addr = pci_map_single(priv->pdev, skb->data,
  1000. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  1001. rxq->rxd_count++;
  1002. rx = rxq->tail++;
  1003. if (rxq->tail == MWL8K_RX_DESCS)
  1004. rxq->tail = 0;
  1005. rxq->buf[rx].skb = skb;
  1006. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  1007. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  1008. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  1009. refilled++;
  1010. }
  1011. return refilled;
  1012. }
  1013. /* Must be called only when the card's reception is completely halted */
  1014. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  1015. {
  1016. struct mwl8k_priv *priv = hw->priv;
  1017. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1018. int i;
  1019. if (rxq->rxd == NULL)
  1020. return;
  1021. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  1022. if (rxq->buf[i].skb != NULL) {
  1023. pci_unmap_single(priv->pdev,
  1024. dma_unmap_addr(&rxq->buf[i], dma),
  1025. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1026. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  1027. kfree_skb(rxq->buf[i].skb);
  1028. rxq->buf[i].skb = NULL;
  1029. }
  1030. }
  1031. kfree(rxq->buf);
  1032. rxq->buf = NULL;
  1033. pci_free_consistent(priv->pdev,
  1034. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  1035. rxq->rxd, rxq->rxd_dma);
  1036. rxq->rxd = NULL;
  1037. }
  1038. /*
  1039. * Scan a list of BSSIDs to process for finalize join.
  1040. * Allows for extension to process multiple BSSIDs.
  1041. */
  1042. static inline int
  1043. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  1044. {
  1045. return priv->capture_beacon &&
  1046. ieee80211_is_beacon(wh->frame_control) &&
  1047. ether_addr_equal(wh->addr3, priv->capture_bssid);
  1048. }
  1049. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  1050. struct sk_buff *skb)
  1051. {
  1052. struct mwl8k_priv *priv = hw->priv;
  1053. priv->capture_beacon = false;
  1054. memset(priv->capture_bssid, 0, ETH_ALEN);
  1055. /*
  1056. * Use GFP_ATOMIC as rxq_process is called from
  1057. * the primary interrupt handler, memory allocation call
  1058. * must not sleep.
  1059. */
  1060. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  1061. if (priv->beacon_skb != NULL)
  1062. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  1063. }
  1064. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  1065. u8 *bssid)
  1066. {
  1067. struct mwl8k_vif *mwl8k_vif;
  1068. list_for_each_entry(mwl8k_vif,
  1069. vif_list, list) {
  1070. if (memcmp(bssid, mwl8k_vif->bssid,
  1071. ETH_ALEN) == 0)
  1072. return mwl8k_vif;
  1073. }
  1074. return NULL;
  1075. }
  1076. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  1077. {
  1078. struct mwl8k_priv *priv = hw->priv;
  1079. struct mwl8k_vif *mwl8k_vif = NULL;
  1080. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1081. int processed;
  1082. processed = 0;
  1083. while (rxq->rxd_count && limit--) {
  1084. struct sk_buff *skb;
  1085. void *rxd;
  1086. int pkt_len;
  1087. struct ieee80211_rx_status status;
  1088. struct ieee80211_hdr *wh;
  1089. __le16 qos;
  1090. skb = rxq->buf[rxq->head].skb;
  1091. if (skb == NULL)
  1092. break;
  1093. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1094. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1095. &priv->noise);
  1096. if (pkt_len < 0)
  1097. break;
  1098. rxq->buf[rxq->head].skb = NULL;
  1099. pci_unmap_single(priv->pdev,
  1100. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1101. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1102. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1103. rxq->head++;
  1104. if (rxq->head == MWL8K_RX_DESCS)
  1105. rxq->head = 0;
  1106. rxq->rxd_count--;
  1107. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1108. /*
  1109. * Check for a pending join operation. Save a
  1110. * copy of the beacon and schedule a tasklet to
  1111. * send a FINALIZE_JOIN command to the firmware.
  1112. */
  1113. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1114. mwl8k_save_beacon(hw, skb);
  1115. if (ieee80211_has_protected(wh->frame_control)) {
  1116. /* Check if hw crypto has been enabled for
  1117. * this bss. If yes, set the status flags
  1118. * accordingly
  1119. */
  1120. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1121. wh->addr1);
  1122. if (mwl8k_vif != NULL &&
  1123. mwl8k_vif->is_hw_crypto_enabled) {
  1124. /*
  1125. * When MMIC ERROR is encountered
  1126. * by the firmware, payload is
  1127. * dropped and only 32 bytes of
  1128. * mwl8k Firmware header is sent
  1129. * to the host.
  1130. *
  1131. * We need to add four bytes of
  1132. * key information. In it
  1133. * MAC80211 expects keyidx set to
  1134. * 0 for triggering Counter
  1135. * Measure of MMIC failure.
  1136. */
  1137. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1138. struct mwl8k_dma_data *tr;
  1139. tr = (struct mwl8k_dma_data *)skb->data;
  1140. memset((void *)&(tr->data), 0, 4);
  1141. pkt_len += 4;
  1142. }
  1143. if (!ieee80211_is_auth(wh->frame_control))
  1144. status.flag |= RX_FLAG_IV_STRIPPED |
  1145. RX_FLAG_DECRYPTED |
  1146. RX_FLAG_MMIC_STRIPPED;
  1147. }
  1148. }
  1149. skb_put(skb, pkt_len);
  1150. mwl8k_remove_dma_header(skb, qos);
  1151. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1152. ieee80211_rx_irqsafe(hw, skb);
  1153. processed++;
  1154. }
  1155. return processed;
  1156. }
  1157. /*
  1158. * Packet transmission.
  1159. */
  1160. #define MWL8K_TXD_STATUS_OK 0x00000001
  1161. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1162. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1163. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1164. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1165. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1166. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1167. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1168. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1169. #define MWL8K_QOS_EOSP 0x0010
  1170. struct mwl8k_tx_desc {
  1171. __le32 status;
  1172. __u8 data_rate;
  1173. __u8 tx_priority;
  1174. __le16 qos_control;
  1175. __le32 pkt_phys_addr;
  1176. __le16 pkt_len;
  1177. __u8 dest_MAC_addr[ETH_ALEN];
  1178. __le32 next_txd_phys_addr;
  1179. __le32 timestamp;
  1180. __le16 rate_info;
  1181. __u8 peer_id;
  1182. __u8 tx_frag_cnt;
  1183. } __packed;
  1184. #define MWL8K_TX_DESCS 128
  1185. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1186. {
  1187. struct mwl8k_priv *priv = hw->priv;
  1188. struct mwl8k_tx_queue *txq = priv->txq + index;
  1189. int size;
  1190. int i;
  1191. txq->len = 0;
  1192. txq->head = 0;
  1193. txq->tail = 0;
  1194. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1195. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  1196. if (txq->txd == NULL) {
  1197. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1198. return -ENOMEM;
  1199. }
  1200. memset(txq->txd, 0, size);
  1201. txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
  1202. if (txq->skb == NULL) {
  1203. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1204. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1205. return -ENOMEM;
  1206. }
  1207. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1208. struct mwl8k_tx_desc *tx_desc;
  1209. int nexti;
  1210. tx_desc = txq->txd + i;
  1211. nexti = (i + 1) % MWL8K_TX_DESCS;
  1212. tx_desc->status = 0;
  1213. tx_desc->next_txd_phys_addr =
  1214. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1215. }
  1216. return 0;
  1217. }
  1218. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1219. {
  1220. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1221. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1222. iowrite32(MWL8K_H2A_INT_DUMMY,
  1223. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1224. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1225. }
  1226. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1227. {
  1228. struct mwl8k_priv *priv = hw->priv;
  1229. int i;
  1230. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  1231. struct mwl8k_tx_queue *txq = priv->txq + i;
  1232. int fw_owned = 0;
  1233. int drv_owned = 0;
  1234. int unused = 0;
  1235. int desc;
  1236. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1237. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1238. u32 status;
  1239. status = le32_to_cpu(tx_desc->status);
  1240. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1241. fw_owned++;
  1242. else
  1243. drv_owned++;
  1244. if (tx_desc->pkt_len == 0)
  1245. unused++;
  1246. }
  1247. wiphy_err(hw->wiphy,
  1248. "txq[%d] len=%d head=%d tail=%d "
  1249. "fw_owned=%d drv_owned=%d unused=%d\n",
  1250. i,
  1251. txq->len, txq->head, txq->tail,
  1252. fw_owned, drv_owned, unused);
  1253. }
  1254. }
  1255. /*
  1256. * Must be called with priv->fw_mutex held and tx queues stopped.
  1257. */
  1258. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1259. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1260. {
  1261. struct mwl8k_priv *priv = hw->priv;
  1262. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1263. int retry;
  1264. int rc;
  1265. might_sleep();
  1266. /* Since fw restart is in progress, allow only the firmware
  1267. * commands from the restart code and block the other
  1268. * commands since they are going to fail in any case since
  1269. * the firmware has crashed
  1270. */
  1271. if (priv->hw_restart_in_progress) {
  1272. if (priv->hw_restart_owner == current)
  1273. return 0;
  1274. else
  1275. return -EBUSY;
  1276. }
  1277. if (atomic_read(&priv->watchdog_event_pending))
  1278. return 0;
  1279. /*
  1280. * The TX queues are stopped at this point, so this test
  1281. * doesn't need to take ->tx_lock.
  1282. */
  1283. if (!priv->pending_tx_pkts)
  1284. return 0;
  1285. retry = 0;
  1286. rc = 0;
  1287. spin_lock_bh(&priv->tx_lock);
  1288. priv->tx_wait = &tx_wait;
  1289. while (!rc) {
  1290. int oldcount;
  1291. unsigned long timeout;
  1292. oldcount = priv->pending_tx_pkts;
  1293. spin_unlock_bh(&priv->tx_lock);
  1294. timeout = wait_for_completion_timeout(&tx_wait,
  1295. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1296. if (atomic_read(&priv->watchdog_event_pending)) {
  1297. spin_lock_bh(&priv->tx_lock);
  1298. priv->tx_wait = NULL;
  1299. spin_unlock_bh(&priv->tx_lock);
  1300. return 0;
  1301. }
  1302. spin_lock_bh(&priv->tx_lock);
  1303. if (timeout) {
  1304. WARN_ON(priv->pending_tx_pkts);
  1305. if (retry)
  1306. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1307. break;
  1308. }
  1309. if (priv->pending_tx_pkts < oldcount) {
  1310. wiphy_notice(hw->wiphy,
  1311. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1312. oldcount, priv->pending_tx_pkts);
  1313. retry = 1;
  1314. continue;
  1315. }
  1316. priv->tx_wait = NULL;
  1317. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1318. MWL8K_TX_WAIT_TIMEOUT_MS);
  1319. mwl8k_dump_tx_rings(hw);
  1320. priv->hw_restart_in_progress = true;
  1321. ieee80211_queue_work(hw, &priv->fw_reload);
  1322. rc = -ETIMEDOUT;
  1323. }
  1324. priv->tx_wait = NULL;
  1325. spin_unlock_bh(&priv->tx_lock);
  1326. return rc;
  1327. }
  1328. #define MWL8K_TXD_SUCCESS(status) \
  1329. ((status) & (MWL8K_TXD_STATUS_OK | \
  1330. MWL8K_TXD_STATUS_OK_RETRY | \
  1331. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1332. static int mwl8k_tid_queue_mapping(u8 tid)
  1333. {
  1334. BUG_ON(tid > 7);
  1335. switch (tid) {
  1336. case 0:
  1337. case 3:
  1338. return IEEE80211_AC_BE;
  1339. break;
  1340. case 1:
  1341. case 2:
  1342. return IEEE80211_AC_BK;
  1343. break;
  1344. case 4:
  1345. case 5:
  1346. return IEEE80211_AC_VI;
  1347. break;
  1348. case 6:
  1349. case 7:
  1350. return IEEE80211_AC_VO;
  1351. break;
  1352. default:
  1353. return -1;
  1354. break;
  1355. }
  1356. }
  1357. /* The firmware will fill in the rate information
  1358. * for each packet that gets queued in the hardware
  1359. * and these macros will interpret that info.
  1360. */
  1361. #define RI_FORMAT(a) (a & 0x0001)
  1362. #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
  1363. static int
  1364. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1365. {
  1366. struct mwl8k_priv *priv = hw->priv;
  1367. struct mwl8k_tx_queue *txq = priv->txq + index;
  1368. int processed;
  1369. processed = 0;
  1370. while (txq->len > 0 && limit--) {
  1371. int tx;
  1372. struct mwl8k_tx_desc *tx_desc;
  1373. unsigned long addr;
  1374. int size;
  1375. struct sk_buff *skb;
  1376. struct ieee80211_tx_info *info;
  1377. u32 status;
  1378. struct ieee80211_sta *sta;
  1379. struct mwl8k_sta *sta_info = NULL;
  1380. u16 rate_info;
  1381. struct ieee80211_hdr *wh;
  1382. tx = txq->head;
  1383. tx_desc = txq->txd + tx;
  1384. status = le32_to_cpu(tx_desc->status);
  1385. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1386. if (!force)
  1387. break;
  1388. tx_desc->status &=
  1389. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1390. }
  1391. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1392. BUG_ON(txq->len == 0);
  1393. txq->len--;
  1394. priv->pending_tx_pkts--;
  1395. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1396. size = le16_to_cpu(tx_desc->pkt_len);
  1397. skb = txq->skb[tx];
  1398. txq->skb[tx] = NULL;
  1399. BUG_ON(skb == NULL);
  1400. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1401. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1402. wh = (struct ieee80211_hdr *) skb->data;
  1403. /* Mark descriptor as unused */
  1404. tx_desc->pkt_phys_addr = 0;
  1405. tx_desc->pkt_len = 0;
  1406. info = IEEE80211_SKB_CB(skb);
  1407. if (ieee80211_is_data(wh->frame_control)) {
  1408. rcu_read_lock();
  1409. sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
  1410. wh->addr2);
  1411. if (sta) {
  1412. sta_info = MWL8K_STA(sta);
  1413. BUG_ON(sta_info == NULL);
  1414. rate_info = le16_to_cpu(tx_desc->rate_info);
  1415. /* If rate is < 6.5 Mpbs for an ht station
  1416. * do not form an ampdu. If the station is a
  1417. * legacy station (format = 0), do not form an
  1418. * ampdu
  1419. */
  1420. if (RI_RATE_ID_MCS(rate_info) < 1 ||
  1421. RI_FORMAT(rate_info) == 0) {
  1422. sta_info->is_ampdu_allowed = false;
  1423. } else {
  1424. sta_info->is_ampdu_allowed = true;
  1425. }
  1426. }
  1427. rcu_read_unlock();
  1428. }
  1429. ieee80211_tx_info_clear_status(info);
  1430. /* Rate control is happening in the firmware.
  1431. * Ensure no tx rate is being reported.
  1432. */
  1433. info->status.rates[0].idx = -1;
  1434. info->status.rates[0].count = 1;
  1435. if (MWL8K_TXD_SUCCESS(status))
  1436. info->flags |= IEEE80211_TX_STAT_ACK;
  1437. ieee80211_tx_status_irqsafe(hw, skb);
  1438. processed++;
  1439. }
  1440. return processed;
  1441. }
  1442. /* must be called only when the card's transmit is completely halted */
  1443. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1444. {
  1445. struct mwl8k_priv *priv = hw->priv;
  1446. struct mwl8k_tx_queue *txq = priv->txq + index;
  1447. if (txq->txd == NULL)
  1448. return;
  1449. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1450. kfree(txq->skb);
  1451. txq->skb = NULL;
  1452. pci_free_consistent(priv->pdev,
  1453. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1454. txq->txd, txq->txd_dma);
  1455. txq->txd = NULL;
  1456. }
  1457. /* caller must hold priv->stream_lock when calling the stream functions */
  1458. static struct mwl8k_ampdu_stream *
  1459. mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
  1460. {
  1461. struct mwl8k_ampdu_stream *stream;
  1462. struct mwl8k_priv *priv = hw->priv;
  1463. int i;
  1464. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1465. stream = &priv->ampdu[i];
  1466. if (stream->state == AMPDU_NO_STREAM) {
  1467. stream->sta = sta;
  1468. stream->state = AMPDU_STREAM_NEW;
  1469. stream->tid = tid;
  1470. stream->idx = i;
  1471. wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
  1472. sta->addr, tid);
  1473. return stream;
  1474. }
  1475. }
  1476. return NULL;
  1477. }
  1478. static int
  1479. mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1480. {
  1481. int ret;
  1482. /* if the stream has already been started, don't start it again */
  1483. if (stream->state != AMPDU_STREAM_NEW)
  1484. return 0;
  1485. ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
  1486. if (ret)
  1487. wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
  1488. "%d\n", stream->sta->addr, stream->tid, ret);
  1489. else
  1490. wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
  1491. stream->sta->addr, stream->tid);
  1492. return ret;
  1493. }
  1494. static void
  1495. mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1496. {
  1497. wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
  1498. stream->tid);
  1499. memset(stream, 0, sizeof(*stream));
  1500. }
  1501. static struct mwl8k_ampdu_stream *
  1502. mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
  1503. {
  1504. struct mwl8k_priv *priv = hw->priv;
  1505. int i;
  1506. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1507. struct mwl8k_ampdu_stream *stream;
  1508. stream = &priv->ampdu[i];
  1509. if (stream->state == AMPDU_NO_STREAM)
  1510. continue;
  1511. if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
  1512. stream->tid == tid)
  1513. return stream;
  1514. }
  1515. return NULL;
  1516. }
  1517. #define MWL8K_AMPDU_PACKET_THRESHOLD 64
  1518. static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
  1519. {
  1520. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1521. struct tx_traffic_info *tx_stats;
  1522. BUG_ON(tid >= MWL8K_MAX_TID);
  1523. tx_stats = &sta_info->tx_stats[tid];
  1524. return sta_info->is_ampdu_allowed &&
  1525. tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
  1526. }
  1527. static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
  1528. {
  1529. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1530. struct tx_traffic_info *tx_stats;
  1531. BUG_ON(tid >= MWL8K_MAX_TID);
  1532. tx_stats = &sta_info->tx_stats[tid];
  1533. if (tx_stats->start_time == 0)
  1534. tx_stats->start_time = jiffies;
  1535. /* reset the packet count after each second elapses. If the number of
  1536. * packets ever exceeds the ampdu_min_traffic threshold, we will allow
  1537. * an ampdu stream to be started.
  1538. */
  1539. if (jiffies - tx_stats->start_time > HZ) {
  1540. tx_stats->pkts = 0;
  1541. tx_stats->start_time = 0;
  1542. } else
  1543. tx_stats->pkts++;
  1544. }
  1545. /* The hardware ampdu queues start from 5.
  1546. * txpriorities for ampdu queues are
  1547. * 5 6 7 0 1 2 3 4 ie., queue 5 is highest
  1548. * and queue 3 is lowest (queue 4 is reserved)
  1549. */
  1550. #define BA_QUEUE 5
  1551. static void
  1552. mwl8k_txq_xmit(struct ieee80211_hw *hw,
  1553. int index,
  1554. struct ieee80211_sta *sta,
  1555. struct sk_buff *skb)
  1556. {
  1557. struct mwl8k_priv *priv = hw->priv;
  1558. struct ieee80211_tx_info *tx_info;
  1559. struct mwl8k_vif *mwl8k_vif;
  1560. struct ieee80211_hdr *wh;
  1561. struct mwl8k_tx_queue *txq;
  1562. struct mwl8k_tx_desc *tx;
  1563. dma_addr_t dma;
  1564. u32 txstatus;
  1565. u8 txdatarate;
  1566. u16 qos;
  1567. int txpriority;
  1568. u8 tid = 0;
  1569. struct mwl8k_ampdu_stream *stream = NULL;
  1570. bool start_ba_session = false;
  1571. bool mgmtframe = false;
  1572. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  1573. bool eapol_frame = false;
  1574. wh = (struct ieee80211_hdr *)skb->data;
  1575. if (ieee80211_is_data_qos(wh->frame_control))
  1576. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1577. else
  1578. qos = 0;
  1579. if (skb->protocol == cpu_to_be16(ETH_P_PAE))
  1580. eapol_frame = true;
  1581. if (ieee80211_is_mgmt(wh->frame_control))
  1582. mgmtframe = true;
  1583. if (priv->ap_fw)
  1584. mwl8k_encapsulate_tx_frame(priv, skb);
  1585. else
  1586. mwl8k_add_dma_header(priv, skb, 0, 0);
  1587. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1588. tx_info = IEEE80211_SKB_CB(skb);
  1589. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1590. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1591. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1592. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1593. mwl8k_vif->seqno += 0x10;
  1594. }
  1595. /* Setup firmware control bit fields for each frame type. */
  1596. txstatus = 0;
  1597. txdatarate = 0;
  1598. if (ieee80211_is_mgmt(wh->frame_control) ||
  1599. ieee80211_is_ctl(wh->frame_control)) {
  1600. txdatarate = 0;
  1601. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1602. } else if (ieee80211_is_data(wh->frame_control)) {
  1603. txdatarate = 1;
  1604. if (is_multicast_ether_addr(wh->addr1))
  1605. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1606. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1607. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1608. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1609. else
  1610. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1611. }
  1612. /* Queue ADDBA request in the respective data queue. While setting up
  1613. * the ampdu stream, mac80211 queues further packets for that
  1614. * particular ra/tid pair. However, packets piled up in the hardware
  1615. * for that ra/tid pair will still go out. ADDBA request and the
  1616. * related data packets going out from different queues asynchronously
  1617. * will cause a shift in the receiver window which might result in
  1618. * ampdu packets getting dropped at the receiver after the stream has
  1619. * been setup.
  1620. */
  1621. if (unlikely(ieee80211_is_action(wh->frame_control) &&
  1622. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  1623. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
  1624. priv->ap_fw)) {
  1625. u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
  1626. tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
  1627. index = mwl8k_tid_queue_mapping(tid);
  1628. }
  1629. txpriority = index;
  1630. if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
  1631. ieee80211_is_data_qos(wh->frame_control)) {
  1632. tid = qos & 0xf;
  1633. mwl8k_tx_count_packet(sta, tid);
  1634. spin_lock(&priv->stream_lock);
  1635. stream = mwl8k_lookup_stream(hw, sta->addr, tid);
  1636. if (stream != NULL) {
  1637. if (stream->state == AMPDU_STREAM_ACTIVE) {
  1638. WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
  1639. txpriority = (BA_QUEUE + stream->idx) %
  1640. TOTAL_HW_TX_QUEUES;
  1641. if (stream->idx <= 1)
  1642. index = stream->idx +
  1643. MWL8K_TX_WMM_QUEUES;
  1644. } else if (stream->state == AMPDU_STREAM_NEW) {
  1645. /* We get here if the driver sends us packets
  1646. * after we've initiated a stream, but before
  1647. * our ampdu_action routine has been called
  1648. * with IEEE80211_AMPDU_TX_START to get the SSN
  1649. * for the ADDBA request. So this packet can
  1650. * go out with no risk of sequence number
  1651. * mismatch. No special handling is required.
  1652. */
  1653. } else {
  1654. /* Drop packets that would go out after the
  1655. * ADDBA request was sent but before the ADDBA
  1656. * response is received. If we don't do this,
  1657. * the recipient would probably receive it
  1658. * after the ADDBA request with SSN 0. This
  1659. * will cause the recipient's BA receive window
  1660. * to shift, which would cause the subsequent
  1661. * packets in the BA stream to be discarded.
  1662. * mac80211 queues our packets for us in this
  1663. * case, so this is really just a safety check.
  1664. */
  1665. wiphy_warn(hw->wiphy,
  1666. "Cannot send packet while ADDBA "
  1667. "dialog is underway.\n");
  1668. spin_unlock(&priv->stream_lock);
  1669. dev_kfree_skb(skb);
  1670. return;
  1671. }
  1672. } else {
  1673. /* Defer calling mwl8k_start_stream so that the current
  1674. * skb can go out before the ADDBA request. This
  1675. * prevents sequence number mismatch at the recepient
  1676. * as described above.
  1677. */
  1678. if (mwl8k_ampdu_allowed(sta, tid)) {
  1679. stream = mwl8k_add_stream(hw, sta, tid);
  1680. if (stream != NULL)
  1681. start_ba_session = true;
  1682. }
  1683. }
  1684. spin_unlock(&priv->stream_lock);
  1685. } else {
  1686. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1687. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1688. }
  1689. dma = pci_map_single(priv->pdev, skb->data,
  1690. skb->len, PCI_DMA_TODEVICE);
  1691. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1692. wiphy_debug(hw->wiphy,
  1693. "failed to dma map skb, dropping TX frame.\n");
  1694. if (start_ba_session) {
  1695. spin_lock(&priv->stream_lock);
  1696. mwl8k_remove_stream(hw, stream);
  1697. spin_unlock(&priv->stream_lock);
  1698. }
  1699. dev_kfree_skb(skb);
  1700. return;
  1701. }
  1702. spin_lock_bh(&priv->tx_lock);
  1703. txq = priv->txq + index;
  1704. /* Mgmt frames that go out frequently are probe
  1705. * responses. Other mgmt frames got out relatively
  1706. * infrequently. Hence reserve 2 buffers so that
  1707. * other mgmt frames do not get dropped due to an
  1708. * already queued probe response in one of the
  1709. * reserved buffers.
  1710. */
  1711. if (txq->len >= MWL8K_TX_DESCS - 2) {
  1712. if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
  1713. if (start_ba_session) {
  1714. spin_lock(&priv->stream_lock);
  1715. mwl8k_remove_stream(hw, stream);
  1716. spin_unlock(&priv->stream_lock);
  1717. }
  1718. spin_unlock_bh(&priv->tx_lock);
  1719. pci_unmap_single(priv->pdev, dma, skb->len,
  1720. PCI_DMA_TODEVICE);
  1721. dev_kfree_skb(skb);
  1722. return;
  1723. }
  1724. }
  1725. BUG_ON(txq->skb[txq->tail] != NULL);
  1726. txq->skb[txq->tail] = skb;
  1727. tx = txq->txd + txq->tail;
  1728. tx->data_rate = txdatarate;
  1729. tx->tx_priority = txpriority;
  1730. tx->qos_control = cpu_to_le16(qos);
  1731. tx->pkt_phys_addr = cpu_to_le32(dma);
  1732. tx->pkt_len = cpu_to_le16(skb->len);
  1733. tx->rate_info = 0;
  1734. if (!priv->ap_fw && sta != NULL)
  1735. tx->peer_id = MWL8K_STA(sta)->peer_id;
  1736. else
  1737. tx->peer_id = 0;
  1738. if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
  1739. tx->timestamp = cpu_to_le32(ioread32(priv->regs +
  1740. MWL8K_HW_TIMER_REGISTER));
  1741. else
  1742. tx->timestamp = 0;
  1743. wmb();
  1744. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1745. txq->len++;
  1746. priv->pending_tx_pkts++;
  1747. txq->tail++;
  1748. if (txq->tail == MWL8K_TX_DESCS)
  1749. txq->tail = 0;
  1750. mwl8k_tx_start(priv);
  1751. spin_unlock_bh(&priv->tx_lock);
  1752. /* Initiate the ampdu session here */
  1753. if (start_ba_session) {
  1754. spin_lock(&priv->stream_lock);
  1755. if (mwl8k_start_stream(hw, stream))
  1756. mwl8k_remove_stream(hw, stream);
  1757. spin_unlock(&priv->stream_lock);
  1758. }
  1759. }
  1760. /*
  1761. * Firmware access.
  1762. *
  1763. * We have the following requirements for issuing firmware commands:
  1764. * - Some commands require that the packet transmit path is idle when
  1765. * the command is issued. (For simplicity, we'll just quiesce the
  1766. * transmit path for every command.)
  1767. * - There are certain sequences of commands that need to be issued to
  1768. * the hardware sequentially, with no other intervening commands.
  1769. *
  1770. * This leads to an implementation of a "firmware lock" as a mutex that
  1771. * can be taken recursively, and which is taken by both the low-level
  1772. * command submission function (mwl8k_post_cmd) as well as any users of
  1773. * that function that require issuing of an atomic sequence of commands,
  1774. * and quiesces the transmit path whenever it's taken.
  1775. */
  1776. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1777. {
  1778. struct mwl8k_priv *priv = hw->priv;
  1779. if (priv->fw_mutex_owner != current) {
  1780. int rc;
  1781. mutex_lock(&priv->fw_mutex);
  1782. ieee80211_stop_queues(hw);
  1783. rc = mwl8k_tx_wait_empty(hw);
  1784. if (rc) {
  1785. if (!priv->hw_restart_in_progress)
  1786. ieee80211_wake_queues(hw);
  1787. mutex_unlock(&priv->fw_mutex);
  1788. return rc;
  1789. }
  1790. priv->fw_mutex_owner = current;
  1791. }
  1792. priv->fw_mutex_depth++;
  1793. return 0;
  1794. }
  1795. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1796. {
  1797. struct mwl8k_priv *priv = hw->priv;
  1798. if (!--priv->fw_mutex_depth) {
  1799. if (!priv->hw_restart_in_progress)
  1800. ieee80211_wake_queues(hw);
  1801. priv->fw_mutex_owner = NULL;
  1802. mutex_unlock(&priv->fw_mutex);
  1803. }
  1804. }
  1805. /*
  1806. * Command processing.
  1807. */
  1808. /* Timeout firmware commands after 10s */
  1809. #define MWL8K_CMD_TIMEOUT_MS 10000
  1810. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1811. {
  1812. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1813. struct mwl8k_priv *priv = hw->priv;
  1814. void __iomem *regs = priv->regs;
  1815. dma_addr_t dma_addr;
  1816. unsigned int dma_size;
  1817. int rc;
  1818. unsigned long timeout = 0;
  1819. u8 buf[32];
  1820. cmd->result = (__force __le16) 0xffff;
  1821. dma_size = le16_to_cpu(cmd->length);
  1822. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1823. PCI_DMA_BIDIRECTIONAL);
  1824. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1825. return -ENOMEM;
  1826. rc = mwl8k_fw_lock(hw);
  1827. if (rc) {
  1828. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1829. PCI_DMA_BIDIRECTIONAL);
  1830. return rc;
  1831. }
  1832. priv->hostcmd_wait = &cmd_wait;
  1833. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1834. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1835. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1836. iowrite32(MWL8K_H2A_INT_DUMMY,
  1837. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1838. timeout = wait_for_completion_timeout(&cmd_wait,
  1839. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1840. priv->hostcmd_wait = NULL;
  1841. mwl8k_fw_unlock(hw);
  1842. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1843. PCI_DMA_BIDIRECTIONAL);
  1844. if (!timeout) {
  1845. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1846. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1847. MWL8K_CMD_TIMEOUT_MS);
  1848. rc = -ETIMEDOUT;
  1849. } else {
  1850. int ms;
  1851. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1852. rc = cmd->result ? -EINVAL : 0;
  1853. if (rc)
  1854. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1855. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1856. le16_to_cpu(cmd->result));
  1857. else if (ms > 2000)
  1858. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1859. mwl8k_cmd_name(cmd->code,
  1860. buf, sizeof(buf)),
  1861. ms);
  1862. }
  1863. return rc;
  1864. }
  1865. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1866. struct ieee80211_vif *vif,
  1867. struct mwl8k_cmd_pkt *cmd)
  1868. {
  1869. if (vif != NULL)
  1870. cmd->macid = MWL8K_VIF(vif)->macid;
  1871. return mwl8k_post_cmd(hw, cmd);
  1872. }
  1873. /*
  1874. * Setup code shared between STA and AP firmware images.
  1875. */
  1876. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1877. {
  1878. struct mwl8k_priv *priv = hw->priv;
  1879. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1880. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1881. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1882. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1883. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1884. priv->band_24.channels = priv->channels_24;
  1885. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1886. priv->band_24.bitrates = priv->rates_24;
  1887. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1888. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1889. }
  1890. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1891. {
  1892. struct mwl8k_priv *priv = hw->priv;
  1893. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1894. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1895. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1896. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1897. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1898. priv->band_50.channels = priv->channels_50;
  1899. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1900. priv->band_50.bitrates = priv->rates_50;
  1901. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1902. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1903. }
  1904. /*
  1905. * CMD_GET_HW_SPEC (STA version).
  1906. */
  1907. struct mwl8k_cmd_get_hw_spec_sta {
  1908. struct mwl8k_cmd_pkt header;
  1909. __u8 hw_rev;
  1910. __u8 host_interface;
  1911. __le16 num_mcaddrs;
  1912. __u8 perm_addr[ETH_ALEN];
  1913. __le16 region_code;
  1914. __le32 fw_rev;
  1915. __le32 ps_cookie;
  1916. __le32 caps;
  1917. __u8 mcs_bitmap[16];
  1918. __le32 rx_queue_ptr;
  1919. __le32 num_tx_queues;
  1920. __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
  1921. __le32 caps2;
  1922. __le32 num_tx_desc_per_queue;
  1923. __le32 total_rxd;
  1924. } __packed;
  1925. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1926. #define MWL8K_CAP_GREENFIELD 0x08000000
  1927. #define MWL8K_CAP_AMPDU 0x04000000
  1928. #define MWL8K_CAP_RX_STBC 0x01000000
  1929. #define MWL8K_CAP_TX_STBC 0x00800000
  1930. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1931. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1932. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1933. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1934. #define MWL8K_CAP_DELAY_BA 0x00003000
  1935. #define MWL8K_CAP_MIMO 0x00000200
  1936. #define MWL8K_CAP_40MHZ 0x00000100
  1937. #define MWL8K_CAP_BAND_MASK 0x00000007
  1938. #define MWL8K_CAP_5GHZ 0x00000004
  1939. #define MWL8K_CAP_2GHZ4 0x00000001
  1940. static void
  1941. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1942. struct ieee80211_supported_band *band, u32 cap)
  1943. {
  1944. int rx_streams;
  1945. int tx_streams;
  1946. band->ht_cap.ht_supported = 1;
  1947. if (cap & MWL8K_CAP_MAX_AMSDU)
  1948. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1949. if (cap & MWL8K_CAP_GREENFIELD)
  1950. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1951. if (cap & MWL8K_CAP_AMPDU) {
  1952. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1953. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1954. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1955. }
  1956. if (cap & MWL8K_CAP_RX_STBC)
  1957. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1958. if (cap & MWL8K_CAP_TX_STBC)
  1959. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1960. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1961. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1962. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1963. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1964. if (cap & MWL8K_CAP_DELAY_BA)
  1965. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1966. if (cap & MWL8K_CAP_40MHZ)
  1967. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1968. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1969. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1970. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1971. if (rx_streams >= 2)
  1972. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1973. if (rx_streams >= 3)
  1974. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1975. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1976. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1977. if (rx_streams != tx_streams) {
  1978. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1979. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1980. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1981. }
  1982. }
  1983. static void
  1984. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1985. {
  1986. struct mwl8k_priv *priv = hw->priv;
  1987. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1988. mwl8k_setup_2ghz_band(hw);
  1989. if (caps & MWL8K_CAP_MIMO)
  1990. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1991. }
  1992. if (caps & MWL8K_CAP_5GHZ) {
  1993. mwl8k_setup_5ghz_band(hw);
  1994. if (caps & MWL8K_CAP_MIMO)
  1995. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1996. }
  1997. }
  1998. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1999. {
  2000. struct mwl8k_priv *priv = hw->priv;
  2001. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  2002. int rc;
  2003. int i;
  2004. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2005. if (cmd == NULL)
  2006. return -ENOMEM;
  2007. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2008. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2009. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2010. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2011. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2012. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2013. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  2014. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  2015. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2016. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2017. rc = mwl8k_post_cmd(hw, &cmd->header);
  2018. if (!rc) {
  2019. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2020. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2021. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2022. priv->hw_rev = cmd->hw_rev;
  2023. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2024. priv->ap_macids_supported = 0x00000000;
  2025. priv->sta_macids_supported = 0x00000001;
  2026. }
  2027. kfree(cmd);
  2028. return rc;
  2029. }
  2030. /*
  2031. * CMD_GET_HW_SPEC (AP version).
  2032. */
  2033. struct mwl8k_cmd_get_hw_spec_ap {
  2034. struct mwl8k_cmd_pkt header;
  2035. __u8 hw_rev;
  2036. __u8 host_interface;
  2037. __le16 num_wcb;
  2038. __le16 num_mcaddrs;
  2039. __u8 perm_addr[ETH_ALEN];
  2040. __le16 region_code;
  2041. __le16 num_antenna;
  2042. __le32 fw_rev;
  2043. __le32 wcbbase0;
  2044. __le32 rxwrptr;
  2045. __le32 rxrdptr;
  2046. __le32 ps_cookie;
  2047. __le32 wcbbase1;
  2048. __le32 wcbbase2;
  2049. __le32 wcbbase3;
  2050. __le32 fw_api_version;
  2051. __le32 caps;
  2052. __le32 num_of_ampdu_queues;
  2053. __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
  2054. } __packed;
  2055. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  2056. {
  2057. struct mwl8k_priv *priv = hw->priv;
  2058. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  2059. int rc, i;
  2060. u32 api_version;
  2061. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2062. if (cmd == NULL)
  2063. return -ENOMEM;
  2064. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2065. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2066. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2067. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2068. rc = mwl8k_post_cmd(hw, &cmd->header);
  2069. if (!rc) {
  2070. int off;
  2071. api_version = le32_to_cpu(cmd->fw_api_version);
  2072. if (priv->device_info->fw_api_ap != api_version) {
  2073. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  2074. " Expected %d got %d.\n", MWL8K_NAME,
  2075. priv->device_info->part_name,
  2076. priv->device_info->fw_api_ap,
  2077. api_version);
  2078. rc = -EINVAL;
  2079. goto done;
  2080. }
  2081. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2082. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2083. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2084. priv->hw_rev = cmd->hw_rev;
  2085. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2086. priv->ap_macids_supported = 0x000000ff;
  2087. priv->sta_macids_supported = 0x00000000;
  2088. priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
  2089. if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
  2090. wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
  2091. " but we only support %d.\n",
  2092. priv->num_ampdu_queues,
  2093. MWL8K_MAX_AMPDU_QUEUES);
  2094. priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
  2095. }
  2096. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  2097. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2098. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  2099. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2100. priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  2101. priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  2102. priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  2103. priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  2104. for (i = 0; i < priv->num_ampdu_queues; i++)
  2105. priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
  2106. le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
  2107. }
  2108. done:
  2109. kfree(cmd);
  2110. return rc;
  2111. }
  2112. /*
  2113. * CMD_SET_HW_SPEC.
  2114. */
  2115. struct mwl8k_cmd_set_hw_spec {
  2116. struct mwl8k_cmd_pkt header;
  2117. __u8 hw_rev;
  2118. __u8 host_interface;
  2119. __le16 num_mcaddrs;
  2120. __u8 perm_addr[ETH_ALEN];
  2121. __le16 region_code;
  2122. __le32 fw_rev;
  2123. __le32 ps_cookie;
  2124. __le32 caps;
  2125. __le32 rx_queue_ptr;
  2126. __le32 num_tx_queues;
  2127. __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
  2128. __le32 flags;
  2129. __le32 num_tx_desc_per_queue;
  2130. __le32 total_rxd;
  2131. } __packed;
  2132. /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
  2133. * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
  2134. * the packets that are queued for more than 500ms, will be dropped in the
  2135. * hardware. This helps minimizing the issues caused due to head-of-line
  2136. * blocking where a slow client can hog the bandwidth and affect traffic to a
  2137. * faster client.
  2138. */
  2139. #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
  2140. #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
  2141. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  2142. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  2143. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  2144. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  2145. {
  2146. struct mwl8k_priv *priv = hw->priv;
  2147. struct mwl8k_cmd_set_hw_spec *cmd;
  2148. int rc;
  2149. int i;
  2150. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2151. if (cmd == NULL)
  2152. return -ENOMEM;
  2153. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  2154. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2155. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2156. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2157. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2158. /*
  2159. * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
  2160. * that order. Firmware has Q3 as highest priority and Q0 as lowest
  2161. * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
  2162. * priority is interpreted the right way in firmware.
  2163. */
  2164. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  2165. int j = mwl8k_tx_queues(priv) - 1 - i;
  2166. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
  2167. }
  2168. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  2169. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  2170. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
  2171. MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
  2172. MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
  2173. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2174. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2175. rc = mwl8k_post_cmd(hw, &cmd->header);
  2176. kfree(cmd);
  2177. return rc;
  2178. }
  2179. /*
  2180. * CMD_MAC_MULTICAST_ADR.
  2181. */
  2182. struct mwl8k_cmd_mac_multicast_adr {
  2183. struct mwl8k_cmd_pkt header;
  2184. __le16 action;
  2185. __le16 numaddr;
  2186. __u8 addr[0][ETH_ALEN];
  2187. };
  2188. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  2189. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  2190. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  2191. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  2192. static struct mwl8k_cmd_pkt *
  2193. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  2194. struct netdev_hw_addr_list *mc_list)
  2195. {
  2196. struct mwl8k_priv *priv = hw->priv;
  2197. struct mwl8k_cmd_mac_multicast_adr *cmd;
  2198. int size;
  2199. int mc_count = 0;
  2200. if (mc_list)
  2201. mc_count = netdev_hw_addr_list_count(mc_list);
  2202. if (allmulti || mc_count > priv->num_mcaddrs) {
  2203. allmulti = 1;
  2204. mc_count = 0;
  2205. }
  2206. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  2207. cmd = kzalloc(size, GFP_ATOMIC);
  2208. if (cmd == NULL)
  2209. return NULL;
  2210. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  2211. cmd->header.length = cpu_to_le16(size);
  2212. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  2213. MWL8K_ENABLE_RX_BROADCAST);
  2214. if (allmulti) {
  2215. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  2216. } else if (mc_count) {
  2217. struct netdev_hw_addr *ha;
  2218. int i = 0;
  2219. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  2220. cmd->numaddr = cpu_to_le16(mc_count);
  2221. netdev_hw_addr_list_for_each(ha, mc_list) {
  2222. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  2223. }
  2224. }
  2225. return &cmd->header;
  2226. }
  2227. /*
  2228. * CMD_GET_STAT.
  2229. */
  2230. struct mwl8k_cmd_get_stat {
  2231. struct mwl8k_cmd_pkt header;
  2232. __le32 stats[64];
  2233. } __packed;
  2234. #define MWL8K_STAT_ACK_FAILURE 9
  2235. #define MWL8K_STAT_RTS_FAILURE 12
  2236. #define MWL8K_STAT_FCS_ERROR 24
  2237. #define MWL8K_STAT_RTS_SUCCESS 11
  2238. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  2239. struct ieee80211_low_level_stats *stats)
  2240. {
  2241. struct mwl8k_cmd_get_stat *cmd;
  2242. int rc;
  2243. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2244. if (cmd == NULL)
  2245. return -ENOMEM;
  2246. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  2247. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2248. rc = mwl8k_post_cmd(hw, &cmd->header);
  2249. if (!rc) {
  2250. stats->dot11ACKFailureCount =
  2251. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  2252. stats->dot11RTSFailureCount =
  2253. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  2254. stats->dot11FCSErrorCount =
  2255. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  2256. stats->dot11RTSSuccessCount =
  2257. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  2258. }
  2259. kfree(cmd);
  2260. return rc;
  2261. }
  2262. /*
  2263. * CMD_RADIO_CONTROL.
  2264. */
  2265. struct mwl8k_cmd_radio_control {
  2266. struct mwl8k_cmd_pkt header;
  2267. __le16 action;
  2268. __le16 control;
  2269. __le16 radio_on;
  2270. } __packed;
  2271. static int
  2272. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  2273. {
  2274. struct mwl8k_priv *priv = hw->priv;
  2275. struct mwl8k_cmd_radio_control *cmd;
  2276. int rc;
  2277. if (enable == priv->radio_on && !force)
  2278. return 0;
  2279. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2280. if (cmd == NULL)
  2281. return -ENOMEM;
  2282. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  2283. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2284. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2285. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  2286. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  2287. rc = mwl8k_post_cmd(hw, &cmd->header);
  2288. kfree(cmd);
  2289. if (!rc)
  2290. priv->radio_on = enable;
  2291. return rc;
  2292. }
  2293. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  2294. {
  2295. return mwl8k_cmd_radio_control(hw, 0, 0);
  2296. }
  2297. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  2298. {
  2299. return mwl8k_cmd_radio_control(hw, 1, 0);
  2300. }
  2301. static int
  2302. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  2303. {
  2304. struct mwl8k_priv *priv = hw->priv;
  2305. priv->radio_short_preamble = short_preamble;
  2306. return mwl8k_cmd_radio_control(hw, 1, 1);
  2307. }
  2308. /*
  2309. * CMD_RF_TX_POWER.
  2310. */
  2311. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  2312. struct mwl8k_cmd_rf_tx_power {
  2313. struct mwl8k_cmd_pkt header;
  2314. __le16 action;
  2315. __le16 support_level;
  2316. __le16 current_level;
  2317. __le16 reserved;
  2318. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  2319. } __packed;
  2320. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  2321. {
  2322. struct mwl8k_cmd_rf_tx_power *cmd;
  2323. int rc;
  2324. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2325. if (cmd == NULL)
  2326. return -ENOMEM;
  2327. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  2328. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2329. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2330. cmd->support_level = cpu_to_le16(dBm);
  2331. rc = mwl8k_post_cmd(hw, &cmd->header);
  2332. kfree(cmd);
  2333. return rc;
  2334. }
  2335. /*
  2336. * CMD_TX_POWER.
  2337. */
  2338. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  2339. struct mwl8k_cmd_tx_power {
  2340. struct mwl8k_cmd_pkt header;
  2341. __le16 action;
  2342. __le16 band;
  2343. __le16 channel;
  2344. __le16 bw;
  2345. __le16 sub_ch;
  2346. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  2347. } __packed;
  2348. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  2349. struct ieee80211_conf *conf,
  2350. unsigned short pwr)
  2351. {
  2352. struct ieee80211_channel *channel = conf->channel;
  2353. struct mwl8k_cmd_tx_power *cmd;
  2354. int rc;
  2355. int i;
  2356. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2357. if (cmd == NULL)
  2358. return -ENOMEM;
  2359. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  2360. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2361. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  2362. if (channel->band == IEEE80211_BAND_2GHZ)
  2363. cmd->band = cpu_to_le16(0x1);
  2364. else if (channel->band == IEEE80211_BAND_5GHZ)
  2365. cmd->band = cpu_to_le16(0x4);
  2366. cmd->channel = cpu_to_le16(channel->hw_value);
  2367. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2368. conf->channel_type == NL80211_CHAN_HT20) {
  2369. cmd->bw = cpu_to_le16(0x2);
  2370. } else {
  2371. cmd->bw = cpu_to_le16(0x4);
  2372. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2373. cmd->sub_ch = cpu_to_le16(0x3);
  2374. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2375. cmd->sub_ch = cpu_to_le16(0x1);
  2376. }
  2377. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  2378. cmd->power_level_list[i] = cpu_to_le16(pwr);
  2379. rc = mwl8k_post_cmd(hw, &cmd->header);
  2380. kfree(cmd);
  2381. return rc;
  2382. }
  2383. /*
  2384. * CMD_RF_ANTENNA.
  2385. */
  2386. struct mwl8k_cmd_rf_antenna {
  2387. struct mwl8k_cmd_pkt header;
  2388. __le16 antenna;
  2389. __le16 mode;
  2390. } __packed;
  2391. #define MWL8K_RF_ANTENNA_RX 1
  2392. #define MWL8K_RF_ANTENNA_TX 2
  2393. static int
  2394. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  2395. {
  2396. struct mwl8k_cmd_rf_antenna *cmd;
  2397. int rc;
  2398. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2399. if (cmd == NULL)
  2400. return -ENOMEM;
  2401. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  2402. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2403. cmd->antenna = cpu_to_le16(antenna);
  2404. cmd->mode = cpu_to_le16(mask);
  2405. rc = mwl8k_post_cmd(hw, &cmd->header);
  2406. kfree(cmd);
  2407. return rc;
  2408. }
  2409. /*
  2410. * CMD_SET_BEACON.
  2411. */
  2412. struct mwl8k_cmd_set_beacon {
  2413. struct mwl8k_cmd_pkt header;
  2414. __le16 beacon_len;
  2415. __u8 beacon[0];
  2416. };
  2417. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2418. struct ieee80211_vif *vif, u8 *beacon, int len)
  2419. {
  2420. struct mwl8k_cmd_set_beacon *cmd;
  2421. int rc;
  2422. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2423. if (cmd == NULL)
  2424. return -ENOMEM;
  2425. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2426. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2427. cmd->beacon_len = cpu_to_le16(len);
  2428. memcpy(cmd->beacon, beacon, len);
  2429. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2430. kfree(cmd);
  2431. return rc;
  2432. }
  2433. /*
  2434. * CMD_SET_PRE_SCAN.
  2435. */
  2436. struct mwl8k_cmd_set_pre_scan {
  2437. struct mwl8k_cmd_pkt header;
  2438. } __packed;
  2439. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2440. {
  2441. struct mwl8k_cmd_set_pre_scan *cmd;
  2442. int rc;
  2443. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2444. if (cmd == NULL)
  2445. return -ENOMEM;
  2446. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2447. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2448. rc = mwl8k_post_cmd(hw, &cmd->header);
  2449. kfree(cmd);
  2450. return rc;
  2451. }
  2452. /*
  2453. * CMD_SET_POST_SCAN.
  2454. */
  2455. struct mwl8k_cmd_set_post_scan {
  2456. struct mwl8k_cmd_pkt header;
  2457. __le32 isibss;
  2458. __u8 bssid[ETH_ALEN];
  2459. } __packed;
  2460. static int
  2461. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2462. {
  2463. struct mwl8k_cmd_set_post_scan *cmd;
  2464. int rc;
  2465. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2466. if (cmd == NULL)
  2467. return -ENOMEM;
  2468. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2469. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2470. cmd->isibss = 0;
  2471. memcpy(cmd->bssid, mac, ETH_ALEN);
  2472. rc = mwl8k_post_cmd(hw, &cmd->header);
  2473. kfree(cmd);
  2474. return rc;
  2475. }
  2476. /*
  2477. * CMD_SET_RF_CHANNEL.
  2478. */
  2479. struct mwl8k_cmd_set_rf_channel {
  2480. struct mwl8k_cmd_pkt header;
  2481. __le16 action;
  2482. __u8 current_channel;
  2483. __le32 channel_flags;
  2484. } __packed;
  2485. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2486. struct ieee80211_conf *conf)
  2487. {
  2488. struct ieee80211_channel *channel = conf->channel;
  2489. struct mwl8k_cmd_set_rf_channel *cmd;
  2490. int rc;
  2491. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2492. if (cmd == NULL)
  2493. return -ENOMEM;
  2494. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2495. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2496. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2497. cmd->current_channel = channel->hw_value;
  2498. if (channel->band == IEEE80211_BAND_2GHZ)
  2499. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2500. else if (channel->band == IEEE80211_BAND_5GHZ)
  2501. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2502. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2503. conf->channel_type == NL80211_CHAN_HT20)
  2504. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2505. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2506. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2507. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2508. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2509. rc = mwl8k_post_cmd(hw, &cmd->header);
  2510. kfree(cmd);
  2511. return rc;
  2512. }
  2513. /*
  2514. * CMD_SET_AID.
  2515. */
  2516. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2517. #define MWL8K_FRAME_PROT_11G 0x07
  2518. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2519. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2520. struct mwl8k_cmd_update_set_aid {
  2521. struct mwl8k_cmd_pkt header;
  2522. __le16 aid;
  2523. /* AP's MAC address (BSSID) */
  2524. __u8 bssid[ETH_ALEN];
  2525. __le16 protection_mode;
  2526. __u8 supp_rates[14];
  2527. } __packed;
  2528. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2529. {
  2530. int i;
  2531. int j;
  2532. /*
  2533. * Clear nonstandard rates 4 and 13.
  2534. */
  2535. mask &= 0x1fef;
  2536. for (i = 0, j = 0; i < 14; i++) {
  2537. if (mask & (1 << i))
  2538. rates[j++] = mwl8k_rates_24[i].hw_value;
  2539. }
  2540. }
  2541. static int
  2542. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2543. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2544. {
  2545. struct mwl8k_cmd_update_set_aid *cmd;
  2546. u16 prot_mode;
  2547. int rc;
  2548. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2549. if (cmd == NULL)
  2550. return -ENOMEM;
  2551. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2552. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2553. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2554. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2555. if (vif->bss_conf.use_cts_prot) {
  2556. prot_mode = MWL8K_FRAME_PROT_11G;
  2557. } else {
  2558. switch (vif->bss_conf.ht_operation_mode &
  2559. IEEE80211_HT_OP_MODE_PROTECTION) {
  2560. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2561. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2562. break;
  2563. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2564. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2565. break;
  2566. default:
  2567. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2568. break;
  2569. }
  2570. }
  2571. cmd->protection_mode = cpu_to_le16(prot_mode);
  2572. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2573. rc = mwl8k_post_cmd(hw, &cmd->header);
  2574. kfree(cmd);
  2575. return rc;
  2576. }
  2577. /*
  2578. * CMD_SET_RATE.
  2579. */
  2580. struct mwl8k_cmd_set_rate {
  2581. struct mwl8k_cmd_pkt header;
  2582. __u8 legacy_rates[14];
  2583. /* Bitmap for supported MCS codes. */
  2584. __u8 mcs_set[16];
  2585. __u8 reserved[16];
  2586. } __packed;
  2587. static int
  2588. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2589. u32 legacy_rate_mask, u8 *mcs_rates)
  2590. {
  2591. struct mwl8k_cmd_set_rate *cmd;
  2592. int rc;
  2593. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2594. if (cmd == NULL)
  2595. return -ENOMEM;
  2596. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2597. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2598. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2599. memcpy(cmd->mcs_set, mcs_rates, 16);
  2600. rc = mwl8k_post_cmd(hw, &cmd->header);
  2601. kfree(cmd);
  2602. return rc;
  2603. }
  2604. /*
  2605. * CMD_FINALIZE_JOIN.
  2606. */
  2607. #define MWL8K_FJ_BEACON_MAXLEN 128
  2608. struct mwl8k_cmd_finalize_join {
  2609. struct mwl8k_cmd_pkt header;
  2610. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2611. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2612. } __packed;
  2613. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2614. int framelen, int dtim)
  2615. {
  2616. struct mwl8k_cmd_finalize_join *cmd;
  2617. struct ieee80211_mgmt *payload = frame;
  2618. int payload_len;
  2619. int rc;
  2620. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2621. if (cmd == NULL)
  2622. return -ENOMEM;
  2623. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2624. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2625. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2626. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2627. if (payload_len < 0)
  2628. payload_len = 0;
  2629. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2630. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2631. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2632. rc = mwl8k_post_cmd(hw, &cmd->header);
  2633. kfree(cmd);
  2634. return rc;
  2635. }
  2636. /*
  2637. * CMD_SET_RTS_THRESHOLD.
  2638. */
  2639. struct mwl8k_cmd_set_rts_threshold {
  2640. struct mwl8k_cmd_pkt header;
  2641. __le16 action;
  2642. __le16 threshold;
  2643. } __packed;
  2644. static int
  2645. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2646. {
  2647. struct mwl8k_cmd_set_rts_threshold *cmd;
  2648. int rc;
  2649. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2650. if (cmd == NULL)
  2651. return -ENOMEM;
  2652. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2653. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2654. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2655. cmd->threshold = cpu_to_le16(rts_thresh);
  2656. rc = mwl8k_post_cmd(hw, &cmd->header);
  2657. kfree(cmd);
  2658. return rc;
  2659. }
  2660. /*
  2661. * CMD_SET_SLOT.
  2662. */
  2663. struct mwl8k_cmd_set_slot {
  2664. struct mwl8k_cmd_pkt header;
  2665. __le16 action;
  2666. __u8 short_slot;
  2667. } __packed;
  2668. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2669. {
  2670. struct mwl8k_cmd_set_slot *cmd;
  2671. int rc;
  2672. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2673. if (cmd == NULL)
  2674. return -ENOMEM;
  2675. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2676. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2677. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2678. cmd->short_slot = short_slot_time;
  2679. rc = mwl8k_post_cmd(hw, &cmd->header);
  2680. kfree(cmd);
  2681. return rc;
  2682. }
  2683. /*
  2684. * CMD_SET_EDCA_PARAMS.
  2685. */
  2686. struct mwl8k_cmd_set_edca_params {
  2687. struct mwl8k_cmd_pkt header;
  2688. /* See MWL8K_SET_EDCA_XXX below */
  2689. __le16 action;
  2690. /* TX opportunity in units of 32 us */
  2691. __le16 txop;
  2692. union {
  2693. struct {
  2694. /* Log exponent of max contention period: 0...15 */
  2695. __le32 log_cw_max;
  2696. /* Log exponent of min contention period: 0...15 */
  2697. __le32 log_cw_min;
  2698. /* Adaptive interframe spacing in units of 32us */
  2699. __u8 aifs;
  2700. /* TX queue to configure */
  2701. __u8 txq;
  2702. } ap;
  2703. struct {
  2704. /* Log exponent of max contention period: 0...15 */
  2705. __u8 log_cw_max;
  2706. /* Log exponent of min contention period: 0...15 */
  2707. __u8 log_cw_min;
  2708. /* Adaptive interframe spacing in units of 32us */
  2709. __u8 aifs;
  2710. /* TX queue to configure */
  2711. __u8 txq;
  2712. } sta;
  2713. };
  2714. } __packed;
  2715. #define MWL8K_SET_EDCA_CW 0x01
  2716. #define MWL8K_SET_EDCA_TXOP 0x02
  2717. #define MWL8K_SET_EDCA_AIFS 0x04
  2718. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2719. MWL8K_SET_EDCA_TXOP | \
  2720. MWL8K_SET_EDCA_AIFS)
  2721. static int
  2722. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2723. __u16 cw_min, __u16 cw_max,
  2724. __u8 aifs, __u16 txop)
  2725. {
  2726. struct mwl8k_priv *priv = hw->priv;
  2727. struct mwl8k_cmd_set_edca_params *cmd;
  2728. int rc;
  2729. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2730. if (cmd == NULL)
  2731. return -ENOMEM;
  2732. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2733. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2734. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2735. cmd->txop = cpu_to_le16(txop);
  2736. if (priv->ap_fw) {
  2737. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2738. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2739. cmd->ap.aifs = aifs;
  2740. cmd->ap.txq = qnum;
  2741. } else {
  2742. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2743. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2744. cmd->sta.aifs = aifs;
  2745. cmd->sta.txq = qnum;
  2746. }
  2747. rc = mwl8k_post_cmd(hw, &cmd->header);
  2748. kfree(cmd);
  2749. return rc;
  2750. }
  2751. /*
  2752. * CMD_SET_WMM_MODE.
  2753. */
  2754. struct mwl8k_cmd_set_wmm_mode {
  2755. struct mwl8k_cmd_pkt header;
  2756. __le16 action;
  2757. } __packed;
  2758. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2759. {
  2760. struct mwl8k_priv *priv = hw->priv;
  2761. struct mwl8k_cmd_set_wmm_mode *cmd;
  2762. int rc;
  2763. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2764. if (cmd == NULL)
  2765. return -ENOMEM;
  2766. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2767. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2768. cmd->action = cpu_to_le16(!!enable);
  2769. rc = mwl8k_post_cmd(hw, &cmd->header);
  2770. kfree(cmd);
  2771. if (!rc)
  2772. priv->wmm_enabled = enable;
  2773. return rc;
  2774. }
  2775. /*
  2776. * CMD_MIMO_CONFIG.
  2777. */
  2778. struct mwl8k_cmd_mimo_config {
  2779. struct mwl8k_cmd_pkt header;
  2780. __le32 action;
  2781. __u8 rx_antenna_map;
  2782. __u8 tx_antenna_map;
  2783. } __packed;
  2784. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2785. {
  2786. struct mwl8k_cmd_mimo_config *cmd;
  2787. int rc;
  2788. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2789. if (cmd == NULL)
  2790. return -ENOMEM;
  2791. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2792. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2793. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2794. cmd->rx_antenna_map = rx;
  2795. cmd->tx_antenna_map = tx;
  2796. rc = mwl8k_post_cmd(hw, &cmd->header);
  2797. kfree(cmd);
  2798. return rc;
  2799. }
  2800. /*
  2801. * CMD_USE_FIXED_RATE (STA version).
  2802. */
  2803. struct mwl8k_cmd_use_fixed_rate_sta {
  2804. struct mwl8k_cmd_pkt header;
  2805. __le32 action;
  2806. __le32 allow_rate_drop;
  2807. __le32 num_rates;
  2808. struct {
  2809. __le32 is_ht_rate;
  2810. __le32 enable_retry;
  2811. __le32 rate;
  2812. __le32 retry_count;
  2813. } rate_entry[8];
  2814. __le32 rate_type;
  2815. __le32 reserved1;
  2816. __le32 reserved2;
  2817. } __packed;
  2818. #define MWL8K_USE_AUTO_RATE 0x0002
  2819. #define MWL8K_UCAST_RATE 0
  2820. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2821. {
  2822. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2823. int rc;
  2824. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2825. if (cmd == NULL)
  2826. return -ENOMEM;
  2827. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2828. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2829. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2830. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2831. rc = mwl8k_post_cmd(hw, &cmd->header);
  2832. kfree(cmd);
  2833. return rc;
  2834. }
  2835. /*
  2836. * CMD_USE_FIXED_RATE (AP version).
  2837. */
  2838. struct mwl8k_cmd_use_fixed_rate_ap {
  2839. struct mwl8k_cmd_pkt header;
  2840. __le32 action;
  2841. __le32 allow_rate_drop;
  2842. __le32 num_rates;
  2843. struct mwl8k_rate_entry_ap {
  2844. __le32 is_ht_rate;
  2845. __le32 enable_retry;
  2846. __le32 rate;
  2847. __le32 retry_count;
  2848. } rate_entry[4];
  2849. u8 multicast_rate;
  2850. u8 multicast_rate_type;
  2851. u8 management_rate;
  2852. } __packed;
  2853. static int
  2854. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2855. {
  2856. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2857. int rc;
  2858. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2859. if (cmd == NULL)
  2860. return -ENOMEM;
  2861. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2862. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2863. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2864. cmd->multicast_rate = mcast;
  2865. cmd->management_rate = mgmt;
  2866. rc = mwl8k_post_cmd(hw, &cmd->header);
  2867. kfree(cmd);
  2868. return rc;
  2869. }
  2870. /*
  2871. * CMD_ENABLE_SNIFFER.
  2872. */
  2873. struct mwl8k_cmd_enable_sniffer {
  2874. struct mwl8k_cmd_pkt header;
  2875. __le32 action;
  2876. } __packed;
  2877. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2878. {
  2879. struct mwl8k_cmd_enable_sniffer *cmd;
  2880. int rc;
  2881. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2882. if (cmd == NULL)
  2883. return -ENOMEM;
  2884. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2885. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2886. cmd->action = cpu_to_le32(!!enable);
  2887. rc = mwl8k_post_cmd(hw, &cmd->header);
  2888. kfree(cmd);
  2889. return rc;
  2890. }
  2891. struct mwl8k_cmd_update_mac_addr {
  2892. struct mwl8k_cmd_pkt header;
  2893. union {
  2894. struct {
  2895. __le16 mac_type;
  2896. __u8 mac_addr[ETH_ALEN];
  2897. } mbss;
  2898. __u8 mac_addr[ETH_ALEN];
  2899. };
  2900. } __packed;
  2901. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2902. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2903. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2904. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2905. static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
  2906. struct ieee80211_vif *vif, u8 *mac, bool set)
  2907. {
  2908. struct mwl8k_priv *priv = hw->priv;
  2909. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2910. struct mwl8k_cmd_update_mac_addr *cmd;
  2911. int mac_type;
  2912. int rc;
  2913. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2914. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2915. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2916. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2917. else
  2918. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2919. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2920. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2921. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2922. else
  2923. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2924. }
  2925. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2926. if (cmd == NULL)
  2927. return -ENOMEM;
  2928. if (set)
  2929. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2930. else
  2931. cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
  2932. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2933. if (priv->ap_fw) {
  2934. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2935. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2936. } else {
  2937. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2938. }
  2939. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2940. kfree(cmd);
  2941. return rc;
  2942. }
  2943. /*
  2944. * MWL8K_CMD_SET_MAC_ADDR.
  2945. */
  2946. static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2947. struct ieee80211_vif *vif, u8 *mac)
  2948. {
  2949. return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
  2950. }
  2951. /*
  2952. * MWL8K_CMD_DEL_MAC_ADDR.
  2953. */
  2954. static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
  2955. struct ieee80211_vif *vif, u8 *mac)
  2956. {
  2957. return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
  2958. }
  2959. /*
  2960. * CMD_SET_RATEADAPT_MODE.
  2961. */
  2962. struct mwl8k_cmd_set_rate_adapt_mode {
  2963. struct mwl8k_cmd_pkt header;
  2964. __le16 action;
  2965. __le16 mode;
  2966. } __packed;
  2967. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2968. {
  2969. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2970. int rc;
  2971. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2972. if (cmd == NULL)
  2973. return -ENOMEM;
  2974. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2975. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2976. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2977. cmd->mode = cpu_to_le16(mode);
  2978. rc = mwl8k_post_cmd(hw, &cmd->header);
  2979. kfree(cmd);
  2980. return rc;
  2981. }
  2982. /*
  2983. * CMD_GET_WATCHDOG_BITMAP.
  2984. */
  2985. struct mwl8k_cmd_get_watchdog_bitmap {
  2986. struct mwl8k_cmd_pkt header;
  2987. u8 bitmap;
  2988. } __packed;
  2989. static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
  2990. {
  2991. struct mwl8k_cmd_get_watchdog_bitmap *cmd;
  2992. int rc;
  2993. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2994. if (cmd == NULL)
  2995. return -ENOMEM;
  2996. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
  2997. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2998. rc = mwl8k_post_cmd(hw, &cmd->header);
  2999. if (!rc)
  3000. *bitmap = cmd->bitmap;
  3001. kfree(cmd);
  3002. return rc;
  3003. }
  3004. #define MWL8K_WMM_QUEUE_NUMBER 3
  3005. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3006. u8 idx);
  3007. static void mwl8k_watchdog_ba_events(struct work_struct *work)
  3008. {
  3009. int rc;
  3010. u8 bitmap = 0, stream_index;
  3011. struct mwl8k_ampdu_stream *streams;
  3012. struct mwl8k_priv *priv =
  3013. container_of(work, struct mwl8k_priv, watchdog_ba_handle);
  3014. struct ieee80211_hw *hw = priv->hw;
  3015. int i;
  3016. u32 status = 0;
  3017. mwl8k_fw_lock(hw);
  3018. rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
  3019. if (rc)
  3020. goto done;
  3021. spin_lock(&priv->stream_lock);
  3022. /* the bitmap is the hw queue number. Map it to the ampdu queue. */
  3023. for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) {
  3024. if (bitmap & (1 << i)) {
  3025. stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) %
  3026. TOTAL_HW_TX_QUEUES;
  3027. streams = &priv->ampdu[stream_index];
  3028. if (streams->state == AMPDU_STREAM_ACTIVE) {
  3029. ieee80211_stop_tx_ba_session(streams->sta,
  3030. streams->tid);
  3031. spin_unlock(&priv->stream_lock);
  3032. mwl8k_destroy_ba(hw, stream_index);
  3033. spin_lock(&priv->stream_lock);
  3034. }
  3035. }
  3036. }
  3037. spin_unlock(&priv->stream_lock);
  3038. done:
  3039. atomic_dec(&priv->watchdog_event_pending);
  3040. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3041. iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
  3042. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3043. mwl8k_fw_unlock(hw);
  3044. return;
  3045. }
  3046. /*
  3047. * CMD_BSS_START.
  3048. */
  3049. struct mwl8k_cmd_bss_start {
  3050. struct mwl8k_cmd_pkt header;
  3051. __le32 enable;
  3052. } __packed;
  3053. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  3054. struct ieee80211_vif *vif, int enable)
  3055. {
  3056. struct mwl8k_cmd_bss_start *cmd;
  3057. int rc;
  3058. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3059. if (cmd == NULL)
  3060. return -ENOMEM;
  3061. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  3062. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3063. cmd->enable = cpu_to_le32(enable);
  3064. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3065. kfree(cmd);
  3066. return rc;
  3067. }
  3068. /*
  3069. * CMD_BASTREAM.
  3070. */
  3071. /*
  3072. * UPSTREAM is tx direction
  3073. */
  3074. #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
  3075. #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
  3076. enum ba_stream_action_type {
  3077. MWL8K_BA_CREATE,
  3078. MWL8K_BA_UPDATE,
  3079. MWL8K_BA_DESTROY,
  3080. MWL8K_BA_FLUSH,
  3081. MWL8K_BA_CHECK,
  3082. };
  3083. struct mwl8k_create_ba_stream {
  3084. __le32 flags;
  3085. __le32 idle_thrs;
  3086. __le32 bar_thrs;
  3087. __le32 window_size;
  3088. u8 peer_mac_addr[6];
  3089. u8 dialog_token;
  3090. u8 tid;
  3091. u8 queue_id;
  3092. u8 param_info;
  3093. __le32 ba_context;
  3094. u8 reset_seq_no_flag;
  3095. __le16 curr_seq_no;
  3096. u8 sta_src_mac_addr[6];
  3097. } __packed;
  3098. struct mwl8k_destroy_ba_stream {
  3099. __le32 flags;
  3100. __le32 ba_context;
  3101. } __packed;
  3102. struct mwl8k_cmd_bastream {
  3103. struct mwl8k_cmd_pkt header;
  3104. __le32 action;
  3105. union {
  3106. struct mwl8k_create_ba_stream create_params;
  3107. struct mwl8k_destroy_ba_stream destroy_params;
  3108. };
  3109. } __packed;
  3110. static int
  3111. mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3112. struct ieee80211_vif *vif)
  3113. {
  3114. struct mwl8k_cmd_bastream *cmd;
  3115. int rc;
  3116. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3117. if (cmd == NULL)
  3118. return -ENOMEM;
  3119. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3120. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3121. cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
  3122. cmd->create_params.queue_id = stream->idx;
  3123. memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
  3124. ETH_ALEN);
  3125. cmd->create_params.tid = stream->tid;
  3126. cmd->create_params.flags =
  3127. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
  3128. cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3129. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3130. kfree(cmd);
  3131. return rc;
  3132. }
  3133. static int
  3134. mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3135. u8 buf_size, struct ieee80211_vif *vif)
  3136. {
  3137. struct mwl8k_cmd_bastream *cmd;
  3138. int rc;
  3139. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3140. if (cmd == NULL)
  3141. return -ENOMEM;
  3142. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3143. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3144. cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
  3145. cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
  3146. cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
  3147. cmd->create_params.queue_id = stream->idx;
  3148. memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
  3149. cmd->create_params.tid = stream->tid;
  3150. cmd->create_params.curr_seq_no = cpu_to_le16(0);
  3151. cmd->create_params.reset_seq_no_flag = 1;
  3152. cmd->create_params.param_info =
  3153. (stream->sta->ht_cap.ampdu_factor &
  3154. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  3155. ((stream->sta->ht_cap.ampdu_density << 2) &
  3156. IEEE80211_HT_AMPDU_PARM_DENSITY);
  3157. cmd->create_params.flags =
  3158. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
  3159. BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3160. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3161. wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
  3162. stream->sta->addr, stream->tid);
  3163. kfree(cmd);
  3164. return rc;
  3165. }
  3166. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3167. u8 idx)
  3168. {
  3169. struct mwl8k_cmd_bastream *cmd;
  3170. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3171. if (cmd == NULL)
  3172. return;
  3173. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3174. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3175. cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
  3176. cmd->destroy_params.ba_context = cpu_to_le32(idx);
  3177. mwl8k_post_cmd(hw, &cmd->header);
  3178. wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx);
  3179. kfree(cmd);
  3180. }
  3181. /*
  3182. * CMD_SET_NEW_STN.
  3183. */
  3184. struct mwl8k_cmd_set_new_stn {
  3185. struct mwl8k_cmd_pkt header;
  3186. __le16 aid;
  3187. __u8 mac_addr[6];
  3188. __le16 stn_id;
  3189. __le16 action;
  3190. __le16 rsvd;
  3191. __le32 legacy_rates;
  3192. __u8 ht_rates[4];
  3193. __le16 cap_info;
  3194. __le16 ht_capabilities_info;
  3195. __u8 mac_ht_param_info;
  3196. __u8 rev;
  3197. __u8 control_channel;
  3198. __u8 add_channel;
  3199. __le16 op_mode;
  3200. __le16 stbc;
  3201. __u8 add_qos_info;
  3202. __u8 is_qos_sta;
  3203. __le32 fw_sta_ptr;
  3204. } __packed;
  3205. #define MWL8K_STA_ACTION_ADD 0
  3206. #define MWL8K_STA_ACTION_REMOVE 2
  3207. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  3208. struct ieee80211_vif *vif,
  3209. struct ieee80211_sta *sta)
  3210. {
  3211. struct mwl8k_cmd_set_new_stn *cmd;
  3212. u32 rates;
  3213. int rc;
  3214. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3215. if (cmd == NULL)
  3216. return -ENOMEM;
  3217. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3218. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3219. cmd->aid = cpu_to_le16(sta->aid);
  3220. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  3221. cmd->stn_id = cpu_to_le16(sta->aid);
  3222. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  3223. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3224. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3225. else
  3226. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3227. cmd->legacy_rates = cpu_to_le32(rates);
  3228. if (sta->ht_cap.ht_supported) {
  3229. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  3230. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  3231. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  3232. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  3233. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  3234. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  3235. ((sta->ht_cap.ampdu_density & 7) << 2);
  3236. cmd->is_qos_sta = 1;
  3237. }
  3238. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3239. kfree(cmd);
  3240. return rc;
  3241. }
  3242. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  3243. struct ieee80211_vif *vif)
  3244. {
  3245. struct mwl8k_cmd_set_new_stn *cmd;
  3246. int rc;
  3247. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3248. if (cmd == NULL)
  3249. return -ENOMEM;
  3250. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3251. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3252. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  3253. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3254. kfree(cmd);
  3255. return rc;
  3256. }
  3257. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  3258. struct ieee80211_vif *vif, u8 *addr)
  3259. {
  3260. struct mwl8k_cmd_set_new_stn *cmd;
  3261. struct mwl8k_priv *priv = hw->priv;
  3262. int rc, i;
  3263. u8 idx;
  3264. spin_lock(&priv->stream_lock);
  3265. /* Destroy any active ampdu streams for this sta */
  3266. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  3267. struct mwl8k_ampdu_stream *s;
  3268. s = &priv->ampdu[i];
  3269. if (s->state != AMPDU_NO_STREAM) {
  3270. if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) {
  3271. if (s->state == AMPDU_STREAM_ACTIVE) {
  3272. idx = s->idx;
  3273. spin_unlock(&priv->stream_lock);
  3274. mwl8k_destroy_ba(hw, idx);
  3275. spin_lock(&priv->stream_lock);
  3276. } else if (s->state == AMPDU_STREAM_NEW) {
  3277. mwl8k_remove_stream(hw, s);
  3278. }
  3279. }
  3280. }
  3281. }
  3282. spin_unlock(&priv->stream_lock);
  3283. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3284. if (cmd == NULL)
  3285. return -ENOMEM;
  3286. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3287. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3288. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3289. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  3290. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3291. kfree(cmd);
  3292. return rc;
  3293. }
  3294. /*
  3295. * CMD_UPDATE_ENCRYPTION.
  3296. */
  3297. #define MAX_ENCR_KEY_LENGTH 16
  3298. #define MIC_KEY_LENGTH 8
  3299. struct mwl8k_cmd_update_encryption {
  3300. struct mwl8k_cmd_pkt header;
  3301. __le32 action;
  3302. __le32 reserved;
  3303. __u8 mac_addr[6];
  3304. __u8 encr_type;
  3305. } __packed;
  3306. struct mwl8k_cmd_set_key {
  3307. struct mwl8k_cmd_pkt header;
  3308. __le32 action;
  3309. __le32 reserved;
  3310. __le16 length;
  3311. __le16 key_type_id;
  3312. __le32 key_info;
  3313. __le32 key_id;
  3314. __le16 key_len;
  3315. __u8 key_material[MAX_ENCR_KEY_LENGTH];
  3316. __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
  3317. __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
  3318. __le16 tkip_rsc_low;
  3319. __le32 tkip_rsc_high;
  3320. __le16 tkip_tsc_low;
  3321. __le32 tkip_tsc_high;
  3322. __u8 mac_addr[6];
  3323. } __packed;
  3324. enum {
  3325. MWL8K_ENCR_ENABLE,
  3326. MWL8K_ENCR_SET_KEY,
  3327. MWL8K_ENCR_REMOVE_KEY,
  3328. MWL8K_ENCR_SET_GROUP_KEY,
  3329. };
  3330. #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
  3331. #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
  3332. #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
  3333. #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
  3334. #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
  3335. enum {
  3336. MWL8K_ALG_WEP,
  3337. MWL8K_ALG_TKIP,
  3338. MWL8K_ALG_CCMP,
  3339. };
  3340. #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
  3341. #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
  3342. #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
  3343. #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
  3344. #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
  3345. static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
  3346. struct ieee80211_vif *vif,
  3347. u8 *addr,
  3348. u8 encr_type)
  3349. {
  3350. struct mwl8k_cmd_update_encryption *cmd;
  3351. int rc;
  3352. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3353. if (cmd == NULL)
  3354. return -ENOMEM;
  3355. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3356. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3357. cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
  3358. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3359. cmd->encr_type = encr_type;
  3360. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3361. kfree(cmd);
  3362. return rc;
  3363. }
  3364. static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
  3365. u8 *addr,
  3366. struct ieee80211_key_conf *key)
  3367. {
  3368. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3369. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3370. cmd->length = cpu_to_le16(sizeof(*cmd) -
  3371. offsetof(struct mwl8k_cmd_set_key, length));
  3372. cmd->key_id = cpu_to_le32(key->keyidx);
  3373. cmd->key_len = cpu_to_le16(key->keylen);
  3374. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3375. switch (key->cipher) {
  3376. case WLAN_CIPHER_SUITE_WEP40:
  3377. case WLAN_CIPHER_SUITE_WEP104:
  3378. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
  3379. if (key->keyidx == 0)
  3380. cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
  3381. break;
  3382. case WLAN_CIPHER_SUITE_TKIP:
  3383. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
  3384. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3385. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3386. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3387. cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
  3388. | MWL8K_KEY_FLAG_TSC_VALID);
  3389. break;
  3390. case WLAN_CIPHER_SUITE_CCMP:
  3391. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
  3392. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3393. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3394. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3395. break;
  3396. default:
  3397. return -ENOTSUPP;
  3398. }
  3399. return 0;
  3400. }
  3401. static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
  3402. struct ieee80211_vif *vif,
  3403. u8 *addr,
  3404. struct ieee80211_key_conf *key)
  3405. {
  3406. struct mwl8k_cmd_set_key *cmd;
  3407. int rc;
  3408. int keymlen;
  3409. u32 action;
  3410. u8 idx;
  3411. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3412. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3413. if (cmd == NULL)
  3414. return -ENOMEM;
  3415. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3416. if (rc < 0)
  3417. goto done;
  3418. idx = key->keyidx;
  3419. if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3420. action = MWL8K_ENCR_SET_KEY;
  3421. else
  3422. action = MWL8K_ENCR_SET_GROUP_KEY;
  3423. switch (key->cipher) {
  3424. case WLAN_CIPHER_SUITE_WEP40:
  3425. case WLAN_CIPHER_SUITE_WEP104:
  3426. if (!mwl8k_vif->wep_key_conf[idx].enabled) {
  3427. memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
  3428. sizeof(*key) + key->keylen);
  3429. mwl8k_vif->wep_key_conf[idx].enabled = 1;
  3430. }
  3431. keymlen = key->keylen;
  3432. action = MWL8K_ENCR_SET_KEY;
  3433. break;
  3434. case WLAN_CIPHER_SUITE_TKIP:
  3435. keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
  3436. break;
  3437. case WLAN_CIPHER_SUITE_CCMP:
  3438. keymlen = key->keylen;
  3439. break;
  3440. default:
  3441. rc = -ENOTSUPP;
  3442. goto done;
  3443. }
  3444. memcpy(cmd->key_material, key->key, keymlen);
  3445. cmd->action = cpu_to_le32(action);
  3446. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3447. done:
  3448. kfree(cmd);
  3449. return rc;
  3450. }
  3451. static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
  3452. struct ieee80211_vif *vif,
  3453. u8 *addr,
  3454. struct ieee80211_key_conf *key)
  3455. {
  3456. struct mwl8k_cmd_set_key *cmd;
  3457. int rc;
  3458. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3459. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3460. if (cmd == NULL)
  3461. return -ENOMEM;
  3462. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3463. if (rc < 0)
  3464. goto done;
  3465. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  3466. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  3467. mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
  3468. cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
  3469. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3470. done:
  3471. kfree(cmd);
  3472. return rc;
  3473. }
  3474. static int mwl8k_set_key(struct ieee80211_hw *hw,
  3475. enum set_key_cmd cmd_param,
  3476. struct ieee80211_vif *vif,
  3477. struct ieee80211_sta *sta,
  3478. struct ieee80211_key_conf *key)
  3479. {
  3480. int rc = 0;
  3481. u8 encr_type;
  3482. u8 *addr;
  3483. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3484. if (vif->type == NL80211_IFTYPE_STATION)
  3485. return -EOPNOTSUPP;
  3486. if (sta == NULL)
  3487. addr = vif->addr;
  3488. else
  3489. addr = sta->addr;
  3490. if (cmd_param == SET_KEY) {
  3491. rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
  3492. if (rc)
  3493. goto out;
  3494. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
  3495. || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
  3496. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
  3497. else
  3498. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
  3499. rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
  3500. encr_type);
  3501. if (rc)
  3502. goto out;
  3503. mwl8k_vif->is_hw_crypto_enabled = true;
  3504. } else {
  3505. rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
  3506. if (rc)
  3507. goto out;
  3508. }
  3509. out:
  3510. return rc;
  3511. }
  3512. /*
  3513. * CMD_UPDATE_STADB.
  3514. */
  3515. struct ewc_ht_info {
  3516. __le16 control1;
  3517. __le16 control2;
  3518. __le16 control3;
  3519. } __packed;
  3520. struct peer_capability_info {
  3521. /* Peer type - AP vs. STA. */
  3522. __u8 peer_type;
  3523. /* Basic 802.11 capabilities from assoc resp. */
  3524. __le16 basic_caps;
  3525. /* Set if peer supports 802.11n high throughput (HT). */
  3526. __u8 ht_support;
  3527. /* Valid if HT is supported. */
  3528. __le16 ht_caps;
  3529. __u8 extended_ht_caps;
  3530. struct ewc_ht_info ewc_info;
  3531. /* Legacy rate table. Intersection of our rates and peer rates. */
  3532. __u8 legacy_rates[12];
  3533. /* HT rate table. Intersection of our rates and peer rates. */
  3534. __u8 ht_rates[16];
  3535. __u8 pad[16];
  3536. /* If set, interoperability mode, no proprietary extensions. */
  3537. __u8 interop;
  3538. __u8 pad2;
  3539. __u8 station_id;
  3540. __le16 amsdu_enabled;
  3541. } __packed;
  3542. struct mwl8k_cmd_update_stadb {
  3543. struct mwl8k_cmd_pkt header;
  3544. /* See STADB_ACTION_TYPE */
  3545. __le32 action;
  3546. /* Peer MAC address */
  3547. __u8 peer_addr[ETH_ALEN];
  3548. __le32 reserved;
  3549. /* Peer info - valid during add/update. */
  3550. struct peer_capability_info peer_info;
  3551. } __packed;
  3552. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  3553. #define MWL8K_STA_DB_DEL_ENTRY 2
  3554. /* Peer Entry flags - used to define the type of the peer node */
  3555. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  3556. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  3557. struct ieee80211_vif *vif,
  3558. struct ieee80211_sta *sta)
  3559. {
  3560. struct mwl8k_cmd_update_stadb *cmd;
  3561. struct peer_capability_info *p;
  3562. u32 rates;
  3563. int rc;
  3564. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3565. if (cmd == NULL)
  3566. return -ENOMEM;
  3567. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3568. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3569. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  3570. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  3571. p = &cmd->peer_info;
  3572. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  3573. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  3574. p->ht_support = sta->ht_cap.ht_supported;
  3575. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  3576. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  3577. ((sta->ht_cap.ampdu_density & 7) << 2);
  3578. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3579. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3580. else
  3581. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3582. legacy_rate_mask_to_array(p->legacy_rates, rates);
  3583. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  3584. p->interop = 1;
  3585. p->amsdu_enabled = 0;
  3586. rc = mwl8k_post_cmd(hw, &cmd->header);
  3587. if (!rc)
  3588. rc = p->station_id;
  3589. kfree(cmd);
  3590. return rc;
  3591. }
  3592. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  3593. struct ieee80211_vif *vif, u8 *addr)
  3594. {
  3595. struct mwl8k_cmd_update_stadb *cmd;
  3596. int rc;
  3597. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3598. if (cmd == NULL)
  3599. return -ENOMEM;
  3600. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3601. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3602. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  3603. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  3604. rc = mwl8k_post_cmd(hw, &cmd->header);
  3605. kfree(cmd);
  3606. return rc;
  3607. }
  3608. /*
  3609. * Interrupt handling.
  3610. */
  3611. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  3612. {
  3613. struct ieee80211_hw *hw = dev_id;
  3614. struct mwl8k_priv *priv = hw->priv;
  3615. u32 status;
  3616. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3617. if (!status)
  3618. return IRQ_NONE;
  3619. if (status & MWL8K_A2H_INT_TX_DONE) {
  3620. status &= ~MWL8K_A2H_INT_TX_DONE;
  3621. tasklet_schedule(&priv->poll_tx_task);
  3622. }
  3623. if (status & MWL8K_A2H_INT_RX_READY) {
  3624. status &= ~MWL8K_A2H_INT_RX_READY;
  3625. tasklet_schedule(&priv->poll_rx_task);
  3626. }
  3627. if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
  3628. iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG,
  3629. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3630. atomic_inc(&priv->watchdog_event_pending);
  3631. status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
  3632. ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
  3633. }
  3634. if (status)
  3635. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3636. if (status & MWL8K_A2H_INT_OPC_DONE) {
  3637. if (priv->hostcmd_wait != NULL)
  3638. complete(priv->hostcmd_wait);
  3639. }
  3640. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  3641. if (!mutex_is_locked(&priv->fw_mutex) &&
  3642. priv->radio_on && priv->pending_tx_pkts)
  3643. mwl8k_tx_start(priv);
  3644. }
  3645. return IRQ_HANDLED;
  3646. }
  3647. static void mwl8k_tx_poll(unsigned long data)
  3648. {
  3649. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3650. struct mwl8k_priv *priv = hw->priv;
  3651. int limit;
  3652. int i;
  3653. limit = 32;
  3654. spin_lock_bh(&priv->tx_lock);
  3655. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3656. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  3657. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  3658. complete(priv->tx_wait);
  3659. priv->tx_wait = NULL;
  3660. }
  3661. spin_unlock_bh(&priv->tx_lock);
  3662. if (limit) {
  3663. writel(~MWL8K_A2H_INT_TX_DONE,
  3664. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3665. } else {
  3666. tasklet_schedule(&priv->poll_tx_task);
  3667. }
  3668. }
  3669. static void mwl8k_rx_poll(unsigned long data)
  3670. {
  3671. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3672. struct mwl8k_priv *priv = hw->priv;
  3673. int limit;
  3674. limit = 32;
  3675. limit -= rxq_process(hw, 0, limit);
  3676. limit -= rxq_refill(hw, 0, limit);
  3677. if (limit) {
  3678. writel(~MWL8K_A2H_INT_RX_READY,
  3679. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3680. } else {
  3681. tasklet_schedule(&priv->poll_rx_task);
  3682. }
  3683. }
  3684. /*
  3685. * Core driver operations.
  3686. */
  3687. static void mwl8k_tx(struct ieee80211_hw *hw,
  3688. struct ieee80211_tx_control *control,
  3689. struct sk_buff *skb)
  3690. {
  3691. struct mwl8k_priv *priv = hw->priv;
  3692. int index = skb_get_queue_mapping(skb);
  3693. if (!priv->radio_on) {
  3694. wiphy_debug(hw->wiphy,
  3695. "dropped TX frame since radio disabled\n");
  3696. dev_kfree_skb(skb);
  3697. return;
  3698. }
  3699. mwl8k_txq_xmit(hw, index, control->sta, skb);
  3700. }
  3701. static int mwl8k_start(struct ieee80211_hw *hw)
  3702. {
  3703. struct mwl8k_priv *priv = hw->priv;
  3704. int rc;
  3705. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3706. IRQF_SHARED, MWL8K_NAME, hw);
  3707. if (rc) {
  3708. priv->irq = -1;
  3709. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3710. return -EIO;
  3711. }
  3712. priv->irq = priv->pdev->irq;
  3713. /* Enable TX reclaim and RX tasklets. */
  3714. tasklet_enable(&priv->poll_tx_task);
  3715. tasklet_enable(&priv->poll_rx_task);
  3716. /* Enable interrupts */
  3717. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3718. iowrite32(MWL8K_A2H_EVENTS,
  3719. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3720. rc = mwl8k_fw_lock(hw);
  3721. if (!rc) {
  3722. rc = mwl8k_cmd_radio_enable(hw);
  3723. if (!priv->ap_fw) {
  3724. if (!rc)
  3725. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  3726. if (!rc)
  3727. rc = mwl8k_cmd_set_pre_scan(hw);
  3728. if (!rc)
  3729. rc = mwl8k_cmd_set_post_scan(hw,
  3730. "\x00\x00\x00\x00\x00\x00");
  3731. }
  3732. if (!rc)
  3733. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  3734. if (!rc)
  3735. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  3736. mwl8k_fw_unlock(hw);
  3737. }
  3738. if (rc) {
  3739. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3740. free_irq(priv->pdev->irq, hw);
  3741. priv->irq = -1;
  3742. tasklet_disable(&priv->poll_tx_task);
  3743. tasklet_disable(&priv->poll_rx_task);
  3744. } else {
  3745. ieee80211_wake_queues(hw);
  3746. }
  3747. return rc;
  3748. }
  3749. static void mwl8k_stop(struct ieee80211_hw *hw)
  3750. {
  3751. struct mwl8k_priv *priv = hw->priv;
  3752. int i;
  3753. if (!priv->hw_restart_in_progress)
  3754. mwl8k_cmd_radio_disable(hw);
  3755. ieee80211_stop_queues(hw);
  3756. /* Disable interrupts */
  3757. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3758. if (priv->irq != -1) {
  3759. free_irq(priv->pdev->irq, hw);
  3760. priv->irq = -1;
  3761. }
  3762. /* Stop finalize join worker */
  3763. cancel_work_sync(&priv->finalize_join_worker);
  3764. cancel_work_sync(&priv->watchdog_ba_handle);
  3765. if (priv->beacon_skb != NULL)
  3766. dev_kfree_skb(priv->beacon_skb);
  3767. /* Stop TX reclaim and RX tasklets. */
  3768. tasklet_disable(&priv->poll_tx_task);
  3769. tasklet_disable(&priv->poll_rx_task);
  3770. /* Return all skbs to mac80211 */
  3771. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3772. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3773. }
  3774. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  3775. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  3776. struct ieee80211_vif *vif)
  3777. {
  3778. struct mwl8k_priv *priv = hw->priv;
  3779. struct mwl8k_vif *mwl8k_vif;
  3780. u32 macids_supported;
  3781. int macid, rc;
  3782. struct mwl8k_device_info *di;
  3783. /*
  3784. * Reject interface creation if sniffer mode is active, as
  3785. * STA operation is mutually exclusive with hardware sniffer
  3786. * mode. (Sniffer mode is only used on STA firmware.)
  3787. */
  3788. if (priv->sniffer_enabled) {
  3789. wiphy_info(hw->wiphy,
  3790. "unable to create STA interface because sniffer mode is enabled\n");
  3791. return -EINVAL;
  3792. }
  3793. di = priv->device_info;
  3794. switch (vif->type) {
  3795. case NL80211_IFTYPE_AP:
  3796. if (!priv->ap_fw && di->fw_image_ap) {
  3797. /* we must load the ap fw to meet this request */
  3798. if (!list_empty(&priv->vif_list))
  3799. return -EBUSY;
  3800. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3801. if (rc)
  3802. return rc;
  3803. }
  3804. macids_supported = priv->ap_macids_supported;
  3805. break;
  3806. case NL80211_IFTYPE_STATION:
  3807. if (priv->ap_fw && di->fw_image_sta) {
  3808. /* we must load the sta fw to meet this request */
  3809. if (!list_empty(&priv->vif_list))
  3810. return -EBUSY;
  3811. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  3812. if (rc)
  3813. return rc;
  3814. }
  3815. macids_supported = priv->sta_macids_supported;
  3816. break;
  3817. default:
  3818. return -EINVAL;
  3819. }
  3820. macid = ffs(macids_supported & ~priv->macids_used);
  3821. if (!macid--)
  3822. return -EBUSY;
  3823. /* Setup driver private area. */
  3824. mwl8k_vif = MWL8K_VIF(vif);
  3825. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  3826. mwl8k_vif->vif = vif;
  3827. mwl8k_vif->macid = macid;
  3828. mwl8k_vif->seqno = 0;
  3829. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  3830. mwl8k_vif->is_hw_crypto_enabled = false;
  3831. /* Set the mac address. */
  3832. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  3833. if (priv->ap_fw)
  3834. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  3835. priv->macids_used |= 1 << mwl8k_vif->macid;
  3836. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  3837. return 0;
  3838. }
  3839. static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
  3840. {
  3841. /* Has ieee80211_restart_hw re-added the removed interfaces? */
  3842. if (!priv->macids_used)
  3843. return;
  3844. priv->macids_used &= ~(1 << vif->macid);
  3845. list_del(&vif->list);
  3846. }
  3847. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  3848. struct ieee80211_vif *vif)
  3849. {
  3850. struct mwl8k_priv *priv = hw->priv;
  3851. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3852. if (priv->ap_fw)
  3853. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  3854. mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
  3855. mwl8k_remove_vif(priv, mwl8k_vif);
  3856. }
  3857. static void mwl8k_hw_restart_work(struct work_struct *work)
  3858. {
  3859. struct mwl8k_priv *priv =
  3860. container_of(work, struct mwl8k_priv, fw_reload);
  3861. struct ieee80211_hw *hw = priv->hw;
  3862. struct mwl8k_device_info *di;
  3863. int rc;
  3864. /* If some command is waiting for a response, clear it */
  3865. if (priv->hostcmd_wait != NULL) {
  3866. complete(priv->hostcmd_wait);
  3867. priv->hostcmd_wait = NULL;
  3868. }
  3869. priv->hw_restart_owner = current;
  3870. di = priv->device_info;
  3871. mwl8k_fw_lock(hw);
  3872. if (priv->ap_fw)
  3873. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3874. else
  3875. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  3876. if (rc)
  3877. goto fail;
  3878. priv->hw_restart_owner = NULL;
  3879. priv->hw_restart_in_progress = false;
  3880. /*
  3881. * This unlock will wake up the queues and
  3882. * also opens the command path for other
  3883. * commands
  3884. */
  3885. mwl8k_fw_unlock(hw);
  3886. ieee80211_restart_hw(hw);
  3887. wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
  3888. return;
  3889. fail:
  3890. mwl8k_fw_unlock(hw);
  3891. wiphy_err(hw->wiphy, "Firmware restart failed\n");
  3892. }
  3893. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  3894. {
  3895. struct ieee80211_conf *conf = &hw->conf;
  3896. struct mwl8k_priv *priv = hw->priv;
  3897. int rc;
  3898. if (conf->flags & IEEE80211_CONF_IDLE) {
  3899. mwl8k_cmd_radio_disable(hw);
  3900. return 0;
  3901. }
  3902. rc = mwl8k_fw_lock(hw);
  3903. if (rc)
  3904. return rc;
  3905. rc = mwl8k_cmd_radio_enable(hw);
  3906. if (rc)
  3907. goto out;
  3908. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  3909. if (rc)
  3910. goto out;
  3911. if (conf->power_level > 18)
  3912. conf->power_level = 18;
  3913. if (priv->ap_fw) {
  3914. if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
  3915. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  3916. if (rc)
  3917. goto out;
  3918. }
  3919. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
  3920. if (rc)
  3921. wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
  3922. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  3923. if (rc)
  3924. wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
  3925. } else {
  3926. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  3927. if (rc)
  3928. goto out;
  3929. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  3930. }
  3931. out:
  3932. mwl8k_fw_unlock(hw);
  3933. return rc;
  3934. }
  3935. static void
  3936. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3937. struct ieee80211_bss_conf *info, u32 changed)
  3938. {
  3939. struct mwl8k_priv *priv = hw->priv;
  3940. u32 ap_legacy_rates = 0;
  3941. u8 ap_mcs_rates[16];
  3942. int rc;
  3943. if (mwl8k_fw_lock(hw))
  3944. return;
  3945. /*
  3946. * No need to capture a beacon if we're no longer associated.
  3947. */
  3948. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  3949. priv->capture_beacon = false;
  3950. /*
  3951. * Get the AP's legacy and MCS rates.
  3952. */
  3953. if (vif->bss_conf.assoc) {
  3954. struct ieee80211_sta *ap;
  3955. rcu_read_lock();
  3956. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  3957. if (ap == NULL) {
  3958. rcu_read_unlock();
  3959. goto out;
  3960. }
  3961. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  3962. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  3963. } else {
  3964. ap_legacy_rates =
  3965. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3966. }
  3967. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  3968. rcu_read_unlock();
  3969. }
  3970. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  3971. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  3972. if (rc)
  3973. goto out;
  3974. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  3975. if (rc)
  3976. goto out;
  3977. }
  3978. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3979. rc = mwl8k_set_radio_preamble(hw,
  3980. vif->bss_conf.use_short_preamble);
  3981. if (rc)
  3982. goto out;
  3983. }
  3984. if (changed & BSS_CHANGED_ERP_SLOT) {
  3985. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  3986. if (rc)
  3987. goto out;
  3988. }
  3989. if (vif->bss_conf.assoc &&
  3990. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  3991. BSS_CHANGED_HT))) {
  3992. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  3993. if (rc)
  3994. goto out;
  3995. }
  3996. if (vif->bss_conf.assoc &&
  3997. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  3998. /*
  3999. * Finalize the join. Tell rx handler to process
  4000. * next beacon from our BSSID.
  4001. */
  4002. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  4003. priv->capture_beacon = true;
  4004. }
  4005. out:
  4006. mwl8k_fw_unlock(hw);
  4007. }
  4008. static void
  4009. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4010. struct ieee80211_bss_conf *info, u32 changed)
  4011. {
  4012. int rc;
  4013. if (mwl8k_fw_lock(hw))
  4014. return;
  4015. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4016. rc = mwl8k_set_radio_preamble(hw,
  4017. vif->bss_conf.use_short_preamble);
  4018. if (rc)
  4019. goto out;
  4020. }
  4021. if (changed & BSS_CHANGED_BASIC_RATES) {
  4022. int idx;
  4023. int rate;
  4024. /*
  4025. * Use lowest supported basic rate for multicasts
  4026. * and management frames (such as probe responses --
  4027. * beacons will always go out at 1 Mb/s).
  4028. */
  4029. idx = ffs(vif->bss_conf.basic_rates);
  4030. if (idx)
  4031. idx--;
  4032. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  4033. rate = mwl8k_rates_24[idx].hw_value;
  4034. else
  4035. rate = mwl8k_rates_50[idx].hw_value;
  4036. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  4037. }
  4038. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  4039. struct sk_buff *skb;
  4040. skb = ieee80211_beacon_get(hw, vif);
  4041. if (skb != NULL) {
  4042. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  4043. kfree_skb(skb);
  4044. }
  4045. }
  4046. if (changed & BSS_CHANGED_BEACON_ENABLED)
  4047. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  4048. out:
  4049. mwl8k_fw_unlock(hw);
  4050. }
  4051. static void
  4052. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4053. struct ieee80211_bss_conf *info, u32 changed)
  4054. {
  4055. struct mwl8k_priv *priv = hw->priv;
  4056. if (!priv->ap_fw)
  4057. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  4058. else
  4059. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  4060. }
  4061. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  4062. struct netdev_hw_addr_list *mc_list)
  4063. {
  4064. struct mwl8k_cmd_pkt *cmd;
  4065. /*
  4066. * Synthesize and return a command packet that programs the
  4067. * hardware multicast address filter. At this point we don't
  4068. * know whether FIF_ALLMULTI is being requested, but if it is,
  4069. * we'll end up throwing this packet away and creating a new
  4070. * one in mwl8k_configure_filter().
  4071. */
  4072. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  4073. return (unsigned long)cmd;
  4074. }
  4075. static int
  4076. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  4077. unsigned int changed_flags,
  4078. unsigned int *total_flags)
  4079. {
  4080. struct mwl8k_priv *priv = hw->priv;
  4081. /*
  4082. * Hardware sniffer mode is mutually exclusive with STA
  4083. * operation, so refuse to enable sniffer mode if a STA
  4084. * interface is active.
  4085. */
  4086. if (!list_empty(&priv->vif_list)) {
  4087. if (net_ratelimit())
  4088. wiphy_info(hw->wiphy,
  4089. "not enabling sniffer mode because STA interface is active\n");
  4090. return 0;
  4091. }
  4092. if (!priv->sniffer_enabled) {
  4093. if (mwl8k_cmd_enable_sniffer(hw, 1))
  4094. return 0;
  4095. priv->sniffer_enabled = true;
  4096. }
  4097. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  4098. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  4099. FIF_OTHER_BSS;
  4100. return 1;
  4101. }
  4102. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  4103. {
  4104. if (!list_empty(&priv->vif_list))
  4105. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  4106. return NULL;
  4107. }
  4108. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  4109. unsigned int changed_flags,
  4110. unsigned int *total_flags,
  4111. u64 multicast)
  4112. {
  4113. struct mwl8k_priv *priv = hw->priv;
  4114. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  4115. /*
  4116. * AP firmware doesn't allow fine-grained control over
  4117. * the receive filter.
  4118. */
  4119. if (priv->ap_fw) {
  4120. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4121. kfree(cmd);
  4122. return;
  4123. }
  4124. /*
  4125. * Enable hardware sniffer mode if FIF_CONTROL or
  4126. * FIF_OTHER_BSS is requested.
  4127. */
  4128. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  4129. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  4130. kfree(cmd);
  4131. return;
  4132. }
  4133. /* Clear unsupported feature flags */
  4134. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4135. if (mwl8k_fw_lock(hw)) {
  4136. kfree(cmd);
  4137. return;
  4138. }
  4139. if (priv->sniffer_enabled) {
  4140. mwl8k_cmd_enable_sniffer(hw, 0);
  4141. priv->sniffer_enabled = false;
  4142. }
  4143. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4144. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  4145. /*
  4146. * Disable the BSS filter.
  4147. */
  4148. mwl8k_cmd_set_pre_scan(hw);
  4149. } else {
  4150. struct mwl8k_vif *mwl8k_vif;
  4151. const u8 *bssid;
  4152. /*
  4153. * Enable the BSS filter.
  4154. *
  4155. * If there is an active STA interface, use that
  4156. * interface's BSSID, otherwise use a dummy one
  4157. * (where the OUI part needs to be nonzero for
  4158. * the BSSID to be accepted by POST_SCAN).
  4159. */
  4160. mwl8k_vif = mwl8k_first_vif(priv);
  4161. if (mwl8k_vif != NULL)
  4162. bssid = mwl8k_vif->vif->bss_conf.bssid;
  4163. else
  4164. bssid = "\x01\x00\x00\x00\x00\x00";
  4165. mwl8k_cmd_set_post_scan(hw, bssid);
  4166. }
  4167. }
  4168. /*
  4169. * If FIF_ALLMULTI is being requested, throw away the command
  4170. * packet that ->prepare_multicast() built and replace it with
  4171. * a command packet that enables reception of all multicast
  4172. * packets.
  4173. */
  4174. if (*total_flags & FIF_ALLMULTI) {
  4175. kfree(cmd);
  4176. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  4177. }
  4178. if (cmd != NULL) {
  4179. mwl8k_post_cmd(hw, cmd);
  4180. kfree(cmd);
  4181. }
  4182. mwl8k_fw_unlock(hw);
  4183. }
  4184. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  4185. {
  4186. return mwl8k_cmd_set_rts_threshold(hw, value);
  4187. }
  4188. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  4189. struct ieee80211_vif *vif,
  4190. struct ieee80211_sta *sta)
  4191. {
  4192. struct mwl8k_priv *priv = hw->priv;
  4193. if (priv->ap_fw)
  4194. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  4195. else
  4196. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  4197. }
  4198. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  4199. struct ieee80211_vif *vif,
  4200. struct ieee80211_sta *sta)
  4201. {
  4202. struct mwl8k_priv *priv = hw->priv;
  4203. int ret;
  4204. int i;
  4205. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4206. struct ieee80211_key_conf *key;
  4207. if (!priv->ap_fw) {
  4208. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  4209. if (ret >= 0) {
  4210. MWL8K_STA(sta)->peer_id = ret;
  4211. if (sta->ht_cap.ht_supported)
  4212. MWL8K_STA(sta)->is_ampdu_allowed = true;
  4213. ret = 0;
  4214. }
  4215. } else {
  4216. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  4217. }
  4218. for (i = 0; i < NUM_WEP_KEYS; i++) {
  4219. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  4220. if (mwl8k_vif->wep_key_conf[i].enabled)
  4221. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  4222. }
  4223. return ret;
  4224. }
  4225. static int mwl8k_conf_tx(struct ieee80211_hw *hw,
  4226. struct ieee80211_vif *vif, u16 queue,
  4227. const struct ieee80211_tx_queue_params *params)
  4228. {
  4229. struct mwl8k_priv *priv = hw->priv;
  4230. int rc;
  4231. rc = mwl8k_fw_lock(hw);
  4232. if (!rc) {
  4233. BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
  4234. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  4235. if (!priv->wmm_enabled)
  4236. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  4237. if (!rc) {
  4238. int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
  4239. rc = mwl8k_cmd_set_edca_params(hw, q,
  4240. params->cw_min,
  4241. params->cw_max,
  4242. params->aifs,
  4243. params->txop);
  4244. }
  4245. mwl8k_fw_unlock(hw);
  4246. }
  4247. return rc;
  4248. }
  4249. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  4250. struct ieee80211_low_level_stats *stats)
  4251. {
  4252. return mwl8k_cmd_get_stat(hw, stats);
  4253. }
  4254. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  4255. struct survey_info *survey)
  4256. {
  4257. struct mwl8k_priv *priv = hw->priv;
  4258. struct ieee80211_conf *conf = &hw->conf;
  4259. if (idx != 0)
  4260. return -ENOENT;
  4261. survey->channel = conf->channel;
  4262. survey->filled = SURVEY_INFO_NOISE_DBM;
  4263. survey->noise = priv->noise;
  4264. return 0;
  4265. }
  4266. #define MAX_AMPDU_ATTEMPTS 5
  4267. static int
  4268. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4269. enum ieee80211_ampdu_mlme_action action,
  4270. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  4271. u8 buf_size)
  4272. {
  4273. int i, rc = 0;
  4274. struct mwl8k_priv *priv = hw->priv;
  4275. struct mwl8k_ampdu_stream *stream;
  4276. u8 *addr = sta->addr, idx;
  4277. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  4278. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  4279. return -ENOTSUPP;
  4280. spin_lock(&priv->stream_lock);
  4281. stream = mwl8k_lookup_stream(hw, addr, tid);
  4282. switch (action) {
  4283. case IEEE80211_AMPDU_RX_START:
  4284. case IEEE80211_AMPDU_RX_STOP:
  4285. break;
  4286. case IEEE80211_AMPDU_TX_START:
  4287. /* By the time we get here the hw queues may contain outgoing
  4288. * packets for this RA/TID that are not part of this BA
  4289. * session. The hw will assign sequence numbers to these
  4290. * packets as they go out. So if we query the hw for its next
  4291. * sequence number and use that for the SSN here, it may end up
  4292. * being wrong, which will lead to sequence number mismatch at
  4293. * the recipient. To avoid this, we reset the sequence number
  4294. * to O for the first MPDU in this BA stream.
  4295. */
  4296. *ssn = 0;
  4297. if (stream == NULL) {
  4298. /* This means that somebody outside this driver called
  4299. * ieee80211_start_tx_ba_session. This is unexpected
  4300. * because we do our own rate control. Just warn and
  4301. * move on.
  4302. */
  4303. wiphy_warn(hw->wiphy, "Unexpected call to %s. "
  4304. "Proceeding anyway.\n", __func__);
  4305. stream = mwl8k_add_stream(hw, sta, tid);
  4306. }
  4307. if (stream == NULL) {
  4308. wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
  4309. rc = -EBUSY;
  4310. break;
  4311. }
  4312. stream->state = AMPDU_STREAM_IN_PROGRESS;
  4313. /* Release the lock before we do the time consuming stuff */
  4314. spin_unlock(&priv->stream_lock);
  4315. for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
  4316. /* Check if link is still valid */
  4317. if (!sta_info->is_ampdu_allowed) {
  4318. spin_lock(&priv->stream_lock);
  4319. mwl8k_remove_stream(hw, stream);
  4320. spin_unlock(&priv->stream_lock);
  4321. return -EBUSY;
  4322. }
  4323. rc = mwl8k_check_ba(hw, stream, vif);
  4324. /* If HW restart is in progress mwl8k_post_cmd will
  4325. * return -EBUSY. Avoid retrying mwl8k_check_ba in
  4326. * such cases
  4327. */
  4328. if (!rc || rc == -EBUSY)
  4329. break;
  4330. /*
  4331. * HW queues take time to be flushed, give them
  4332. * sufficient time
  4333. */
  4334. msleep(1000);
  4335. }
  4336. spin_lock(&priv->stream_lock);
  4337. if (rc) {
  4338. wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
  4339. " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
  4340. mwl8k_remove_stream(hw, stream);
  4341. rc = -EBUSY;
  4342. break;
  4343. }
  4344. ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
  4345. break;
  4346. case IEEE80211_AMPDU_TX_STOP_CONT:
  4347. case IEEE80211_AMPDU_TX_STOP_FLUSH:
  4348. case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
  4349. if (stream) {
  4350. if (stream->state == AMPDU_STREAM_ACTIVE) {
  4351. idx = stream->idx;
  4352. spin_unlock(&priv->stream_lock);
  4353. mwl8k_destroy_ba(hw, idx);
  4354. spin_lock(&priv->stream_lock);
  4355. }
  4356. mwl8k_remove_stream(hw, stream);
  4357. }
  4358. ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
  4359. break;
  4360. case IEEE80211_AMPDU_TX_OPERATIONAL:
  4361. BUG_ON(stream == NULL);
  4362. BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
  4363. spin_unlock(&priv->stream_lock);
  4364. rc = mwl8k_create_ba(hw, stream, buf_size, vif);
  4365. spin_lock(&priv->stream_lock);
  4366. if (!rc)
  4367. stream->state = AMPDU_STREAM_ACTIVE;
  4368. else {
  4369. idx = stream->idx;
  4370. spin_unlock(&priv->stream_lock);
  4371. mwl8k_destroy_ba(hw, idx);
  4372. spin_lock(&priv->stream_lock);
  4373. wiphy_debug(hw->wiphy,
  4374. "Failed adding stream for sta %pM tid %d\n",
  4375. addr, tid);
  4376. mwl8k_remove_stream(hw, stream);
  4377. }
  4378. break;
  4379. default:
  4380. rc = -ENOTSUPP;
  4381. }
  4382. spin_unlock(&priv->stream_lock);
  4383. return rc;
  4384. }
  4385. static const struct ieee80211_ops mwl8k_ops = {
  4386. .tx = mwl8k_tx,
  4387. .start = mwl8k_start,
  4388. .stop = mwl8k_stop,
  4389. .add_interface = mwl8k_add_interface,
  4390. .remove_interface = mwl8k_remove_interface,
  4391. .config = mwl8k_config,
  4392. .bss_info_changed = mwl8k_bss_info_changed,
  4393. .prepare_multicast = mwl8k_prepare_multicast,
  4394. .configure_filter = mwl8k_configure_filter,
  4395. .set_key = mwl8k_set_key,
  4396. .set_rts_threshold = mwl8k_set_rts_threshold,
  4397. .sta_add = mwl8k_sta_add,
  4398. .sta_remove = mwl8k_sta_remove,
  4399. .conf_tx = mwl8k_conf_tx,
  4400. .get_stats = mwl8k_get_stats,
  4401. .get_survey = mwl8k_get_survey,
  4402. .ampdu_action = mwl8k_ampdu_action,
  4403. };
  4404. static void mwl8k_finalize_join_worker(struct work_struct *work)
  4405. {
  4406. struct mwl8k_priv *priv =
  4407. container_of(work, struct mwl8k_priv, finalize_join_worker);
  4408. struct sk_buff *skb = priv->beacon_skb;
  4409. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  4410. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  4411. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  4412. mgmt->u.beacon.variable, len);
  4413. int dtim_period = 1;
  4414. if (tim && tim[1] >= 2)
  4415. dtim_period = tim[3];
  4416. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  4417. dev_kfree_skb(skb);
  4418. priv->beacon_skb = NULL;
  4419. }
  4420. enum {
  4421. MWL8363 = 0,
  4422. MWL8687,
  4423. MWL8366,
  4424. };
  4425. #define MWL8K_8366_AP_FW_API 3
  4426. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  4427. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  4428. static struct mwl8k_device_info mwl8k_info_tbl[] = {
  4429. [MWL8363] = {
  4430. .part_name = "88w8363",
  4431. .helper_image = "mwl8k/helper_8363.fw",
  4432. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  4433. },
  4434. [MWL8687] = {
  4435. .part_name = "88w8687",
  4436. .helper_image = "mwl8k/helper_8687.fw",
  4437. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  4438. },
  4439. [MWL8366] = {
  4440. .part_name = "88w8366",
  4441. .helper_image = "mwl8k/helper_8366.fw",
  4442. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  4443. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  4444. .fw_api_ap = MWL8K_8366_AP_FW_API,
  4445. .ap_rxd_ops = &rxd_8366_ap_ops,
  4446. },
  4447. };
  4448. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  4449. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  4450. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  4451. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  4452. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  4453. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  4454. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  4455. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  4456. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  4457. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  4458. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  4459. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  4460. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  4461. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  4462. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  4463. { },
  4464. };
  4465. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  4466. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  4467. {
  4468. int rc;
  4469. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  4470. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  4471. priv->fw_pref, priv->fw_alt);
  4472. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  4473. if (rc) {
  4474. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4475. pci_name(priv->pdev), priv->fw_alt);
  4476. return rc;
  4477. }
  4478. return 0;
  4479. }
  4480. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  4481. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  4482. {
  4483. struct mwl8k_priv *priv = context;
  4484. struct mwl8k_device_info *di = priv->device_info;
  4485. int rc;
  4486. switch (priv->fw_state) {
  4487. case FW_STATE_INIT:
  4488. if (!fw) {
  4489. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  4490. pci_name(priv->pdev), di->helper_image);
  4491. goto fail;
  4492. }
  4493. priv->fw_helper = fw;
  4494. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  4495. true);
  4496. if (rc && priv->fw_alt) {
  4497. rc = mwl8k_request_alt_fw(priv);
  4498. if (rc)
  4499. goto fail;
  4500. priv->fw_state = FW_STATE_LOADING_ALT;
  4501. } else if (rc)
  4502. goto fail;
  4503. else
  4504. priv->fw_state = FW_STATE_LOADING_PREF;
  4505. break;
  4506. case FW_STATE_LOADING_PREF:
  4507. if (!fw) {
  4508. if (priv->fw_alt) {
  4509. rc = mwl8k_request_alt_fw(priv);
  4510. if (rc)
  4511. goto fail;
  4512. priv->fw_state = FW_STATE_LOADING_ALT;
  4513. } else
  4514. goto fail;
  4515. } else {
  4516. priv->fw_ucode = fw;
  4517. rc = mwl8k_firmware_load_success(priv);
  4518. if (rc)
  4519. goto fail;
  4520. else
  4521. complete(&priv->firmware_loading_complete);
  4522. }
  4523. break;
  4524. case FW_STATE_LOADING_ALT:
  4525. if (!fw) {
  4526. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4527. pci_name(priv->pdev), di->helper_image);
  4528. goto fail;
  4529. }
  4530. priv->fw_ucode = fw;
  4531. rc = mwl8k_firmware_load_success(priv);
  4532. if (rc)
  4533. goto fail;
  4534. else
  4535. complete(&priv->firmware_loading_complete);
  4536. break;
  4537. default:
  4538. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  4539. MWL8K_NAME, priv->fw_state);
  4540. BUG_ON(1);
  4541. }
  4542. return;
  4543. fail:
  4544. priv->fw_state = FW_STATE_ERROR;
  4545. complete(&priv->firmware_loading_complete);
  4546. device_release_driver(&priv->pdev->dev);
  4547. mwl8k_release_firmware(priv);
  4548. }
  4549. #define MAX_RESTART_ATTEMPTS 1
  4550. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  4551. bool nowait)
  4552. {
  4553. struct mwl8k_priv *priv = hw->priv;
  4554. int rc;
  4555. int count = MAX_RESTART_ATTEMPTS;
  4556. retry:
  4557. /* Reset firmware and hardware */
  4558. mwl8k_hw_reset(priv);
  4559. /* Ask userland hotplug daemon for the device firmware */
  4560. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  4561. if (rc) {
  4562. wiphy_err(hw->wiphy, "Firmware files not found\n");
  4563. return rc;
  4564. }
  4565. if (nowait)
  4566. return rc;
  4567. /* Load firmware into hardware */
  4568. rc = mwl8k_load_firmware(hw);
  4569. if (rc)
  4570. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4571. /* Reclaim memory once firmware is successfully loaded */
  4572. mwl8k_release_firmware(priv);
  4573. if (rc && count) {
  4574. /* FW did not start successfully;
  4575. * lets try one more time
  4576. */
  4577. count--;
  4578. wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
  4579. msleep(20);
  4580. goto retry;
  4581. }
  4582. return rc;
  4583. }
  4584. static int mwl8k_init_txqs(struct ieee80211_hw *hw)
  4585. {
  4586. struct mwl8k_priv *priv = hw->priv;
  4587. int rc = 0;
  4588. int i;
  4589. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  4590. rc = mwl8k_txq_init(hw, i);
  4591. if (rc)
  4592. break;
  4593. if (priv->ap_fw)
  4594. iowrite32(priv->txq[i].txd_dma,
  4595. priv->sram + priv->txq_offset[i]);
  4596. }
  4597. return rc;
  4598. }
  4599. /* initialize hw after successfully loading a firmware image */
  4600. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  4601. {
  4602. struct mwl8k_priv *priv = hw->priv;
  4603. int rc = 0;
  4604. int i;
  4605. if (priv->ap_fw) {
  4606. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  4607. if (priv->rxd_ops == NULL) {
  4608. wiphy_err(hw->wiphy,
  4609. "Driver does not have AP firmware image support for this hardware\n");
  4610. rc = -ENOENT;
  4611. goto err_stop_firmware;
  4612. }
  4613. } else {
  4614. priv->rxd_ops = &rxd_sta_ops;
  4615. }
  4616. priv->sniffer_enabled = false;
  4617. priv->wmm_enabled = false;
  4618. priv->pending_tx_pkts = 0;
  4619. atomic_set(&priv->watchdog_event_pending, 0);
  4620. rc = mwl8k_rxq_init(hw, 0);
  4621. if (rc)
  4622. goto err_stop_firmware;
  4623. rxq_refill(hw, 0, INT_MAX);
  4624. /* For the sta firmware, we need to know the dma addresses of tx queues
  4625. * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
  4626. * prior to issuing this command. But for the AP case, we learn the
  4627. * total number of queues from the result CMD_GET_HW_SPEC, so for this
  4628. * case we must initialize the tx queues after.
  4629. */
  4630. priv->num_ampdu_queues = 0;
  4631. if (!priv->ap_fw) {
  4632. rc = mwl8k_init_txqs(hw);
  4633. if (rc)
  4634. goto err_free_queues;
  4635. }
  4636. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  4637. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4638. iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
  4639. MWL8K_A2H_INT_BA_WATCHDOG,
  4640. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  4641. iowrite32(MWL8K_A2H_INT_OPC_DONE,
  4642. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  4643. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  4644. IRQF_SHARED, MWL8K_NAME, hw);
  4645. if (rc) {
  4646. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  4647. goto err_free_queues;
  4648. }
  4649. /*
  4650. * When hw restart is requested,
  4651. * mac80211 will take care of clearing
  4652. * the ampdu streams, so do not clear
  4653. * the ampdu state here
  4654. */
  4655. if (!priv->hw_restart_in_progress)
  4656. memset(priv->ampdu, 0, sizeof(priv->ampdu));
  4657. /*
  4658. * Temporarily enable interrupts. Initial firmware host
  4659. * commands use interrupts and avoid polling. Disable
  4660. * interrupts when done.
  4661. */
  4662. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4663. /* Get config data, mac addrs etc */
  4664. if (priv->ap_fw) {
  4665. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  4666. if (!rc)
  4667. rc = mwl8k_init_txqs(hw);
  4668. if (!rc)
  4669. rc = mwl8k_cmd_set_hw_spec(hw);
  4670. } else {
  4671. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  4672. }
  4673. if (rc) {
  4674. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  4675. goto err_free_irq;
  4676. }
  4677. /* Turn radio off */
  4678. rc = mwl8k_cmd_radio_disable(hw);
  4679. if (rc) {
  4680. wiphy_err(hw->wiphy, "Cannot disable\n");
  4681. goto err_free_irq;
  4682. }
  4683. /* Clear MAC address */
  4684. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  4685. if (rc) {
  4686. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  4687. goto err_free_irq;
  4688. }
  4689. /* Disable interrupts */
  4690. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4691. free_irq(priv->pdev->irq, hw);
  4692. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  4693. priv->device_info->part_name,
  4694. priv->hw_rev, hw->wiphy->perm_addr,
  4695. priv->ap_fw ? "AP" : "STA",
  4696. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  4697. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  4698. return 0;
  4699. err_free_irq:
  4700. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4701. free_irq(priv->pdev->irq, hw);
  4702. err_free_queues:
  4703. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4704. mwl8k_txq_deinit(hw, i);
  4705. mwl8k_rxq_deinit(hw, 0);
  4706. err_stop_firmware:
  4707. mwl8k_hw_reset(priv);
  4708. return rc;
  4709. }
  4710. /*
  4711. * invoke mwl8k_reload_firmware to change the firmware image after the device
  4712. * has already been registered
  4713. */
  4714. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  4715. {
  4716. int i, rc = 0;
  4717. struct mwl8k_priv *priv = hw->priv;
  4718. struct mwl8k_vif *vif, *tmp_vif;
  4719. mwl8k_stop(hw);
  4720. mwl8k_rxq_deinit(hw, 0);
  4721. /*
  4722. * All the existing interfaces are re-added by the ieee80211_reconfig;
  4723. * which means driver should remove existing interfaces before calling
  4724. * ieee80211_restart_hw
  4725. */
  4726. if (priv->hw_restart_in_progress)
  4727. list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
  4728. mwl8k_remove_vif(priv, vif);
  4729. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4730. mwl8k_txq_deinit(hw, i);
  4731. rc = mwl8k_init_firmware(hw, fw_image, false);
  4732. if (rc)
  4733. goto fail;
  4734. rc = mwl8k_probe_hw(hw);
  4735. if (rc)
  4736. goto fail;
  4737. if (priv->hw_restart_in_progress)
  4738. return rc;
  4739. rc = mwl8k_start(hw);
  4740. if (rc)
  4741. goto fail;
  4742. rc = mwl8k_config(hw, ~0);
  4743. if (rc)
  4744. goto fail;
  4745. for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
  4746. rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
  4747. if (rc)
  4748. goto fail;
  4749. }
  4750. return rc;
  4751. fail:
  4752. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  4753. return rc;
  4754. }
  4755. static const struct ieee80211_iface_limit ap_if_limits[] = {
  4756. { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
  4757. };
  4758. static const struct ieee80211_iface_combination ap_if_comb = {
  4759. .limits = ap_if_limits,
  4760. .n_limits = ARRAY_SIZE(ap_if_limits),
  4761. .max_interfaces = 8,
  4762. .num_different_channels = 1,
  4763. };
  4764. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  4765. {
  4766. struct ieee80211_hw *hw = priv->hw;
  4767. int i, rc;
  4768. rc = mwl8k_load_firmware(hw);
  4769. mwl8k_release_firmware(priv);
  4770. if (rc) {
  4771. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4772. return rc;
  4773. }
  4774. /*
  4775. * Extra headroom is the size of the required DMA header
  4776. * minus the size of the smallest 802.11 frame (CTS frame).
  4777. */
  4778. hw->extra_tx_headroom =
  4779. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  4780. hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
  4781. hw->channel_change_time = 10;
  4782. hw->queues = MWL8K_TX_WMM_QUEUES;
  4783. /* Set rssi values to dBm */
  4784. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
  4785. /*
  4786. * Ask mac80211 to not to trigger PS mode
  4787. * based on PM bit of incoming frames.
  4788. */
  4789. if (priv->ap_fw)
  4790. hw->flags |= IEEE80211_HW_AP_LINK_PS;
  4791. hw->vif_data_size = sizeof(struct mwl8k_vif);
  4792. hw->sta_data_size = sizeof(struct mwl8k_sta);
  4793. priv->macids_used = 0;
  4794. INIT_LIST_HEAD(&priv->vif_list);
  4795. /* Set default radio state and preamble */
  4796. priv->radio_on = false;
  4797. priv->radio_short_preamble = false;
  4798. /* Finalize join worker */
  4799. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  4800. /* Handle watchdog ba events */
  4801. INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
  4802. /* To reload the firmware if it crashes */
  4803. INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
  4804. /* TX reclaim and RX tasklets. */
  4805. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  4806. tasklet_disable(&priv->poll_tx_task);
  4807. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  4808. tasklet_disable(&priv->poll_rx_task);
  4809. /* Power management cookie */
  4810. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  4811. if (priv->cookie == NULL)
  4812. return -ENOMEM;
  4813. mutex_init(&priv->fw_mutex);
  4814. priv->fw_mutex_owner = NULL;
  4815. priv->fw_mutex_depth = 0;
  4816. priv->hostcmd_wait = NULL;
  4817. spin_lock_init(&priv->tx_lock);
  4818. spin_lock_init(&priv->stream_lock);
  4819. priv->tx_wait = NULL;
  4820. rc = mwl8k_probe_hw(hw);
  4821. if (rc)
  4822. goto err_free_cookie;
  4823. hw->wiphy->interface_modes = 0;
  4824. if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
  4825. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  4826. hw->wiphy->iface_combinations = &ap_if_comb;
  4827. hw->wiphy->n_iface_combinations = 1;
  4828. }
  4829. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  4830. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4831. rc = ieee80211_register_hw(hw);
  4832. if (rc) {
  4833. wiphy_err(hw->wiphy, "Cannot register device\n");
  4834. goto err_unprobe_hw;
  4835. }
  4836. return 0;
  4837. err_unprobe_hw:
  4838. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4839. mwl8k_txq_deinit(hw, i);
  4840. mwl8k_rxq_deinit(hw, 0);
  4841. err_free_cookie:
  4842. if (priv->cookie != NULL)
  4843. pci_free_consistent(priv->pdev, 4,
  4844. priv->cookie, priv->cookie_dma);
  4845. return rc;
  4846. }
  4847. static int mwl8k_probe(struct pci_dev *pdev,
  4848. const struct pci_device_id *id)
  4849. {
  4850. static int printed_version;
  4851. struct ieee80211_hw *hw;
  4852. struct mwl8k_priv *priv;
  4853. struct mwl8k_device_info *di;
  4854. int rc;
  4855. if (!printed_version) {
  4856. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  4857. printed_version = 1;
  4858. }
  4859. rc = pci_enable_device(pdev);
  4860. if (rc) {
  4861. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  4862. MWL8K_NAME);
  4863. return rc;
  4864. }
  4865. rc = pci_request_regions(pdev, MWL8K_NAME);
  4866. if (rc) {
  4867. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  4868. MWL8K_NAME);
  4869. goto err_disable_device;
  4870. }
  4871. pci_set_master(pdev);
  4872. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  4873. if (hw == NULL) {
  4874. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  4875. rc = -ENOMEM;
  4876. goto err_free_reg;
  4877. }
  4878. SET_IEEE80211_DEV(hw, &pdev->dev);
  4879. pci_set_drvdata(pdev, hw);
  4880. priv = hw->priv;
  4881. priv->hw = hw;
  4882. priv->pdev = pdev;
  4883. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  4884. priv->sram = pci_iomap(pdev, 0, 0x10000);
  4885. if (priv->sram == NULL) {
  4886. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  4887. rc = -EIO;
  4888. goto err_iounmap;
  4889. }
  4890. /*
  4891. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  4892. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  4893. */
  4894. priv->regs = pci_iomap(pdev, 1, 0x10000);
  4895. if (priv->regs == NULL) {
  4896. priv->regs = pci_iomap(pdev, 2, 0x10000);
  4897. if (priv->regs == NULL) {
  4898. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  4899. rc = -EIO;
  4900. goto err_iounmap;
  4901. }
  4902. }
  4903. /*
  4904. * Choose the initial fw image depending on user input. If a second
  4905. * image is available, make it the alternative image that will be
  4906. * loaded if the first one fails.
  4907. */
  4908. init_completion(&priv->firmware_loading_complete);
  4909. di = priv->device_info;
  4910. if (ap_mode_default && di->fw_image_ap) {
  4911. priv->fw_pref = di->fw_image_ap;
  4912. priv->fw_alt = di->fw_image_sta;
  4913. } else if (!ap_mode_default && di->fw_image_sta) {
  4914. priv->fw_pref = di->fw_image_sta;
  4915. priv->fw_alt = di->fw_image_ap;
  4916. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  4917. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  4918. priv->fw_pref = di->fw_image_sta;
  4919. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  4920. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  4921. priv->fw_pref = di->fw_image_ap;
  4922. }
  4923. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  4924. if (rc)
  4925. goto err_stop_firmware;
  4926. priv->hw_restart_in_progress = false;
  4927. return rc;
  4928. err_stop_firmware:
  4929. mwl8k_hw_reset(priv);
  4930. err_iounmap:
  4931. if (priv->regs != NULL)
  4932. pci_iounmap(pdev, priv->regs);
  4933. if (priv->sram != NULL)
  4934. pci_iounmap(pdev, priv->sram);
  4935. pci_set_drvdata(pdev, NULL);
  4936. ieee80211_free_hw(hw);
  4937. err_free_reg:
  4938. pci_release_regions(pdev);
  4939. err_disable_device:
  4940. pci_disable_device(pdev);
  4941. return rc;
  4942. }
  4943. static void mwl8k_remove(struct pci_dev *pdev)
  4944. {
  4945. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  4946. struct mwl8k_priv *priv;
  4947. int i;
  4948. if (hw == NULL)
  4949. return;
  4950. priv = hw->priv;
  4951. wait_for_completion(&priv->firmware_loading_complete);
  4952. if (priv->fw_state == FW_STATE_ERROR) {
  4953. mwl8k_hw_reset(priv);
  4954. goto unmap;
  4955. }
  4956. ieee80211_stop_queues(hw);
  4957. ieee80211_unregister_hw(hw);
  4958. /* Remove TX reclaim and RX tasklets. */
  4959. tasklet_kill(&priv->poll_tx_task);
  4960. tasklet_kill(&priv->poll_rx_task);
  4961. /* Stop hardware */
  4962. mwl8k_hw_reset(priv);
  4963. /* Return all skbs to mac80211 */
  4964. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4965. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  4966. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4967. mwl8k_txq_deinit(hw, i);
  4968. mwl8k_rxq_deinit(hw, 0);
  4969. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  4970. unmap:
  4971. pci_iounmap(pdev, priv->regs);
  4972. pci_iounmap(pdev, priv->sram);
  4973. pci_set_drvdata(pdev, NULL);
  4974. ieee80211_free_hw(hw);
  4975. pci_release_regions(pdev);
  4976. pci_disable_device(pdev);
  4977. }
  4978. static struct pci_driver mwl8k_driver = {
  4979. .name = MWL8K_NAME,
  4980. .id_table = mwl8k_pci_id_table,
  4981. .probe = mwl8k_probe,
  4982. .remove = mwl8k_remove,
  4983. };
  4984. module_pci_driver(mwl8k_driver);
  4985. MODULE_DESCRIPTION(MWL8K_DESC);
  4986. MODULE_VERSION(MWL8K_VERSION);
  4987. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  4988. MODULE_LICENSE("GPL");