pcie.c 58 KB

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  1. /*
  2. * Marvell Wireless LAN device driver: PCIE specific handling
  3. *
  4. * Copyright (C) 2011, Marvell International Ltd.
  5. *
  6. * This software file (the "File") is distributed by Marvell International
  7. * Ltd. under the terms of the GNU General Public License Version 2, June 1991
  8. * (the "License"). You may use, redistribute and/or modify this File in
  9. * accordance with the terms and conditions of the License, a copy of which
  10. * is available by writing to the Free Software Foundation, Inc.,
  11. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12. * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13. *
  14. * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15. * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16. * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
  17. * this warranty disclaimer.
  18. */
  19. #include <linux/firmware.h>
  20. #include "decl.h"
  21. #include "ioctl.h"
  22. #include "util.h"
  23. #include "fw.h"
  24. #include "main.h"
  25. #include "wmm.h"
  26. #include "11n.h"
  27. #include "pcie.h"
  28. #define PCIE_VERSION "1.0"
  29. #define DRV_NAME "Marvell mwifiex PCIe"
  30. static u8 user_rmmod;
  31. static struct mwifiex_if_ops pcie_ops;
  32. static struct semaphore add_remove_card_sem;
  33. static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter);
  34. static int mwifiex_pcie_resume(struct pci_dev *pdev);
  35. static int
  36. mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
  37. int size, int flags)
  38. {
  39. struct pcie_service_card *card = adapter->card;
  40. dma_addr_t buf_pa;
  41. buf_pa = pci_map_single(card->dev, skb->data, size, flags);
  42. if (pci_dma_mapping_error(card->dev, buf_pa)) {
  43. dev_err(adapter->dev, "failed to map pci memory!\n");
  44. return -1;
  45. }
  46. memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
  47. return 0;
  48. }
  49. /*
  50. * This function reads sleep cookie and checks if FW is ready
  51. */
  52. static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
  53. {
  54. u32 *cookie_addr;
  55. struct pcie_service_card *card = adapter->card;
  56. if (card->sleep_cookie_vbase) {
  57. cookie_addr = (u32 *)card->sleep_cookie_vbase;
  58. dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
  59. *cookie_addr);
  60. if (*cookie_addr == FW_AWAKE_COOKIE)
  61. return true;
  62. }
  63. return false;
  64. }
  65. /*
  66. * This function probes an mwifiex device and registers it. It allocates
  67. * the card structure, enables PCIE function number and initiates the
  68. * device registration and initialization procedure by adding a logical
  69. * interface.
  70. */
  71. static int mwifiex_pcie_probe(struct pci_dev *pdev,
  72. const struct pci_device_id *ent)
  73. {
  74. struct pcie_service_card *card;
  75. pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
  76. pdev->vendor, pdev->device, pdev->revision);
  77. card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
  78. if (!card)
  79. return -ENOMEM;
  80. card->dev = pdev;
  81. if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
  82. MWIFIEX_PCIE)) {
  83. pr_err("%s failed\n", __func__);
  84. kfree(card);
  85. return -1;
  86. }
  87. return 0;
  88. }
  89. /*
  90. * This function removes the interface and frees up the card structure.
  91. */
  92. static void mwifiex_pcie_remove(struct pci_dev *pdev)
  93. {
  94. struct pcie_service_card *card;
  95. struct mwifiex_adapter *adapter;
  96. struct mwifiex_private *priv;
  97. int i;
  98. card = pci_get_drvdata(pdev);
  99. if (!card)
  100. return;
  101. adapter = card->adapter;
  102. if (!adapter || !adapter->priv_num)
  103. return;
  104. /* In case driver is removed when asynchronous FW load is in progress */
  105. wait_for_completion(&adapter->fw_load);
  106. if (user_rmmod) {
  107. #ifdef CONFIG_PM
  108. if (adapter->is_suspended)
  109. mwifiex_pcie_resume(pdev);
  110. #endif
  111. for (i = 0; i < adapter->priv_num; i++)
  112. if ((GET_BSS_ROLE(adapter->priv[i]) ==
  113. MWIFIEX_BSS_ROLE_STA) &&
  114. adapter->priv[i]->media_connected)
  115. mwifiex_deauthenticate(adapter->priv[i], NULL);
  116. priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
  117. mwifiex_disable_auto_ds(priv);
  118. mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
  119. }
  120. mwifiex_remove_card(card->adapter, &add_remove_card_sem);
  121. kfree(card);
  122. }
  123. /*
  124. * Kernel needs to suspend all functions separately. Therefore all
  125. * registered functions must have drivers with suspend and resume
  126. * methods. Failing that the kernel simply removes the whole card.
  127. *
  128. * If already not suspended, this function allocates and sends a host
  129. * sleep activate request to the firmware and turns off the traffic.
  130. */
  131. static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
  132. {
  133. struct mwifiex_adapter *adapter;
  134. struct pcie_service_card *card;
  135. int hs_actived, i;
  136. if (pdev) {
  137. card = (struct pcie_service_card *) pci_get_drvdata(pdev);
  138. if (!card || !card->adapter) {
  139. pr_err("Card or adapter structure is not valid\n");
  140. return 0;
  141. }
  142. } else {
  143. pr_err("PCIE device is not specified\n");
  144. return 0;
  145. }
  146. adapter = card->adapter;
  147. hs_actived = mwifiex_enable_hs(adapter);
  148. /* Indicate device suspended */
  149. adapter->is_suspended = true;
  150. for (i = 0; i < adapter->priv_num; i++)
  151. netif_carrier_off(adapter->priv[i]->netdev);
  152. return 0;
  153. }
  154. /*
  155. * Kernel needs to suspend all functions separately. Therefore all
  156. * registered functions must have drivers with suspend and resume
  157. * methods. Failing that the kernel simply removes the whole card.
  158. *
  159. * If already not resumed, this function turns on the traffic and
  160. * sends a host sleep cancel request to the firmware.
  161. */
  162. static int mwifiex_pcie_resume(struct pci_dev *pdev)
  163. {
  164. struct mwifiex_adapter *adapter;
  165. struct pcie_service_card *card;
  166. int i;
  167. if (pdev) {
  168. card = (struct pcie_service_card *) pci_get_drvdata(pdev);
  169. if (!card || !card->adapter) {
  170. pr_err("Card or adapter structure is not valid\n");
  171. return 0;
  172. }
  173. } else {
  174. pr_err("PCIE device is not specified\n");
  175. return 0;
  176. }
  177. adapter = card->adapter;
  178. if (!adapter->is_suspended) {
  179. dev_warn(adapter->dev, "Device already resumed\n");
  180. return 0;
  181. }
  182. adapter->is_suspended = false;
  183. for (i = 0; i < adapter->priv_num; i++)
  184. if (adapter->priv[i]->media_connected)
  185. netif_carrier_on(adapter->priv[i]->netdev);
  186. mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
  187. MWIFIEX_ASYNC_CMD);
  188. return 0;
  189. }
  190. #define PCIE_VENDOR_ID_MARVELL (0x11ab)
  191. #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30)
  192. static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
  193. {
  194. PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
  195. PCI_ANY_ID, PCI_ANY_ID, 0, 0,
  196. },
  197. {},
  198. };
  199. MODULE_DEVICE_TABLE(pci, mwifiex_ids);
  200. /* PCI Device Driver */
  201. static struct pci_driver __refdata mwifiex_pcie = {
  202. .name = "mwifiex_pcie",
  203. .id_table = mwifiex_ids,
  204. .probe = mwifiex_pcie_probe,
  205. .remove = mwifiex_pcie_remove,
  206. #ifdef CONFIG_PM
  207. /* Power Management Hooks */
  208. .suspend = mwifiex_pcie_suspend,
  209. .resume = mwifiex_pcie_resume,
  210. #endif
  211. };
  212. /*
  213. * This function writes data into PCIE card register.
  214. */
  215. static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
  216. {
  217. struct pcie_service_card *card = adapter->card;
  218. iowrite32(data, card->pci_mmap1 + reg);
  219. return 0;
  220. }
  221. /*
  222. * This function reads data from PCIE card register.
  223. */
  224. static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
  225. {
  226. struct pcie_service_card *card = adapter->card;
  227. *data = ioread32(card->pci_mmap1 + reg);
  228. return 0;
  229. }
  230. /*
  231. * This function wakes up the card.
  232. *
  233. * A host power up command is written to the card configuration
  234. * register to wake up the card.
  235. */
  236. static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
  237. {
  238. int i = 0;
  239. while (mwifiex_pcie_ok_to_access_hw(adapter)) {
  240. i++;
  241. usleep_range(10, 20);
  242. /* 50ms max wait */
  243. if (i == 50000)
  244. break;
  245. }
  246. dev_dbg(adapter->dev, "event: Wakeup device...\n");
  247. /* Enable interrupts or any chip access will wakeup device */
  248. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) {
  249. dev_warn(adapter->dev, "Enable host interrupt failed\n");
  250. return -1;
  251. }
  252. dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
  253. adapter->ps_state = PS_STATE_AWAKE;
  254. return 0;
  255. }
  256. /*
  257. * This function is called after the card has woken up.
  258. *
  259. * The card configuration register is reset.
  260. */
  261. static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
  262. {
  263. dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
  264. return 0;
  265. }
  266. /*
  267. * This function disables the host interrupt.
  268. *
  269. * The host interrupt mask is read, the disable bit is reset and
  270. * written back to the card host interrupt mask register.
  271. */
  272. static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
  273. {
  274. if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  275. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
  276. 0x00000000)) {
  277. dev_warn(adapter->dev, "Disable host interrupt failed\n");
  278. return -1;
  279. }
  280. }
  281. return 0;
  282. }
  283. /*
  284. * This function enables the host interrupt.
  285. *
  286. * The host interrupt enable mask is written to the card
  287. * host interrupt mask register.
  288. */
  289. static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
  290. {
  291. if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  292. /* Simply write the mask to the register */
  293. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
  294. HOST_INTR_MASK)) {
  295. dev_warn(adapter->dev, "Enable host interrupt failed\n");
  296. return -1;
  297. }
  298. }
  299. return 0;
  300. }
  301. /*
  302. * This function creates buffer descriptor ring for TX
  303. */
  304. static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
  305. {
  306. struct pcie_service_card *card = adapter->card;
  307. int i;
  308. /*
  309. * driver maintaines the write pointer and firmware maintaines the read
  310. * pointer. The write pointer starts at 0 (zero) while the read pointer
  311. * starts at zero with rollover bit set
  312. */
  313. card->txbd_wrptr = 0;
  314. card->txbd_rdptr |= MWIFIEX_BD_FLAG_ROLLOVER_IND;
  315. /* allocate shared memory for the BD ring and divide the same in to
  316. several descriptors */
  317. card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
  318. MWIFIEX_MAX_TXRX_BD;
  319. dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
  320. card->txbd_ring_size);
  321. card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
  322. card->txbd_ring_size,
  323. &card->txbd_ring_pbase);
  324. if (!card->txbd_ring_vbase) {
  325. dev_err(adapter->dev,
  326. "allocate consistent memory (%d bytes) failed!\n",
  327. card->txbd_ring_size);
  328. return -ENOMEM;
  329. }
  330. dev_dbg(adapter->dev,
  331. "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
  332. card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
  333. (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
  334. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  335. card->txbd_ring[i] = (struct mwifiex_pcie_buf_desc *)
  336. (card->txbd_ring_vbase +
  337. (sizeof(struct mwifiex_pcie_buf_desc)
  338. * i));
  339. card->tx_buf_list[i] = NULL;
  340. card->txbd_ring[i]->paddr = 0;
  341. card->txbd_ring[i]->len = 0;
  342. card->txbd_ring[i]->flags = 0;
  343. }
  344. return 0;
  345. }
  346. static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
  347. {
  348. struct pcie_service_card *card = adapter->card;
  349. struct sk_buff *skb;
  350. int i;
  351. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  352. if (card->tx_buf_list[i]) {
  353. skb = card->tx_buf_list[i];
  354. pci_unmap_single(card->dev, card->txbd_ring[i]->paddr,
  355. skb->len, PCI_DMA_TODEVICE);
  356. dev_kfree_skb_any(skb);
  357. }
  358. card->tx_buf_list[i] = NULL;
  359. card->txbd_ring[i]->paddr = 0;
  360. card->txbd_ring[i]->len = 0;
  361. card->txbd_ring[i]->flags = 0;
  362. card->txbd_ring[i] = NULL;
  363. }
  364. if (card->txbd_ring_vbase)
  365. pci_free_consistent(card->dev, card->txbd_ring_size,
  366. card->txbd_ring_vbase,
  367. card->txbd_ring_pbase);
  368. card->txbd_ring_size = 0;
  369. card->txbd_wrptr = 0;
  370. card->txbd_rdptr = 0 | MWIFIEX_BD_FLAG_ROLLOVER_IND;
  371. card->txbd_ring_vbase = NULL;
  372. card->txbd_ring_pbase = 0;
  373. return 0;
  374. }
  375. /*
  376. * This function creates buffer descriptor ring for RX
  377. */
  378. static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
  379. {
  380. struct pcie_service_card *card = adapter->card;
  381. struct sk_buff *skb;
  382. int i;
  383. dma_addr_t buf_pa;
  384. /*
  385. * driver maintaines the read pointer and firmware maintaines the write
  386. * pointer. The write pointer starts at 0 (zero) while the read pointer
  387. * starts at zero with rollover bit set
  388. */
  389. card->rxbd_wrptr = 0;
  390. card->rxbd_rdptr |= MWIFIEX_BD_FLAG_ROLLOVER_IND;
  391. card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
  392. MWIFIEX_MAX_TXRX_BD;
  393. dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
  394. card->rxbd_ring_size);
  395. card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
  396. card->rxbd_ring_size,
  397. &card->rxbd_ring_pbase);
  398. if (!card->rxbd_ring_vbase) {
  399. dev_err(adapter->dev,
  400. "allocate consistent memory (%d bytes) failed!\n",
  401. card->rxbd_ring_size);
  402. return -ENOMEM;
  403. }
  404. dev_dbg(adapter->dev,
  405. "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
  406. card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
  407. (u32)((u64)card->rxbd_ring_pbase >> 32),
  408. card->rxbd_ring_size);
  409. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  410. card->rxbd_ring[i] = (struct mwifiex_pcie_buf_desc *)
  411. (card->rxbd_ring_vbase +
  412. (sizeof(struct mwifiex_pcie_buf_desc)
  413. * i));
  414. /* Allocate skb here so that firmware can DMA data from it */
  415. skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
  416. if (!skb) {
  417. dev_err(adapter->dev,
  418. "Unable to allocate skb for RX ring.\n");
  419. kfree(card->rxbd_ring_vbase);
  420. return -ENOMEM;
  421. }
  422. if (mwifiex_map_pci_memory(adapter, skb,
  423. MWIFIEX_RX_DATA_BUF_SIZE,
  424. PCI_DMA_FROMDEVICE))
  425. return -1;
  426. MWIFIEX_SKB_PACB(skb, &buf_pa);
  427. dev_dbg(adapter->dev, "info: RX ring: add new skb base: %p, "
  428. "buf_base: %p, buf_pbase: %#x:%x, buf_len: %#x\n",
  429. skb, skb->data, (u32)buf_pa, (u32)((u64)buf_pa >> 32),
  430. skb->len);
  431. card->rx_buf_list[i] = skb;
  432. card->rxbd_ring[i]->paddr = buf_pa;
  433. card->rxbd_ring[i]->len = (u16)skb->len;
  434. card->rxbd_ring[i]->flags = 0;
  435. }
  436. return 0;
  437. }
  438. /*
  439. * This function deletes Buffer descriptor ring for RX
  440. */
  441. static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
  442. {
  443. struct pcie_service_card *card = adapter->card;
  444. struct sk_buff *skb;
  445. int i;
  446. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  447. if (card->rx_buf_list[i]) {
  448. skb = card->rx_buf_list[i];
  449. pci_unmap_single(card->dev, card->rxbd_ring[i]->paddr ,
  450. MWIFIEX_RX_DATA_BUF_SIZE,
  451. PCI_DMA_FROMDEVICE);
  452. dev_kfree_skb_any(skb);
  453. }
  454. card->rx_buf_list[i] = NULL;
  455. card->rxbd_ring[i]->paddr = 0;
  456. card->rxbd_ring[i]->len = 0;
  457. card->rxbd_ring[i]->flags = 0;
  458. card->rxbd_ring[i] = NULL;
  459. }
  460. if (card->rxbd_ring_vbase)
  461. pci_free_consistent(card->dev, card->rxbd_ring_size,
  462. card->rxbd_ring_vbase,
  463. card->rxbd_ring_pbase);
  464. card->rxbd_ring_size = 0;
  465. card->rxbd_wrptr = 0;
  466. card->rxbd_rdptr = 0 | MWIFIEX_BD_FLAG_ROLLOVER_IND;
  467. card->rxbd_ring_vbase = NULL;
  468. card->rxbd_ring_pbase = 0;
  469. return 0;
  470. }
  471. /*
  472. * This function creates buffer descriptor ring for Events
  473. */
  474. static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
  475. {
  476. struct pcie_service_card *card = adapter->card;
  477. struct sk_buff *skb;
  478. int i;
  479. dma_addr_t buf_pa;
  480. /*
  481. * driver maintaines the read pointer and firmware maintaines the write
  482. * pointer. The write pointer starts at 0 (zero) while the read pointer
  483. * starts at zero with rollover bit set
  484. */
  485. card->evtbd_wrptr = 0;
  486. card->evtbd_rdptr |= MWIFIEX_BD_FLAG_ROLLOVER_IND;
  487. card->evtbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
  488. MWIFIEX_MAX_EVT_BD;
  489. dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
  490. card->evtbd_ring_size);
  491. card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
  492. card->evtbd_ring_size,
  493. &card->evtbd_ring_pbase);
  494. if (!card->evtbd_ring_vbase) {
  495. dev_err(adapter->dev,
  496. "allocate consistent memory (%d bytes) failed!\n",
  497. card->evtbd_ring_size);
  498. return -ENOMEM;
  499. }
  500. dev_dbg(adapter->dev,
  501. "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
  502. card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
  503. (u32)((u64)card->evtbd_ring_pbase >> 32),
  504. card->evtbd_ring_size);
  505. for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
  506. card->evtbd_ring[i] = (struct mwifiex_pcie_buf_desc *)
  507. (card->evtbd_ring_vbase +
  508. (sizeof(struct mwifiex_pcie_buf_desc)
  509. * i));
  510. /* Allocate skb here so that firmware can DMA data from it */
  511. skb = dev_alloc_skb(MAX_EVENT_SIZE);
  512. if (!skb) {
  513. dev_err(adapter->dev,
  514. "Unable to allocate skb for EVENT buf.\n");
  515. kfree(card->evtbd_ring_vbase);
  516. return -ENOMEM;
  517. }
  518. skb_put(skb, MAX_EVENT_SIZE);
  519. if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
  520. PCI_DMA_FROMDEVICE))
  521. return -1;
  522. MWIFIEX_SKB_PACB(skb, &buf_pa);
  523. dev_dbg(adapter->dev, "info: Evt ring: add new skb. base: %p, "
  524. "buf_base: %p, buf_pbase: %#x:%x, buf_len: %#x\n",
  525. skb, skb->data, (u32)buf_pa, (u32)((u64)buf_pa >> 32),
  526. skb->len);
  527. card->evt_buf_list[i] = skb;
  528. card->evtbd_ring[i]->paddr = buf_pa;
  529. card->evtbd_ring[i]->len = (u16)skb->len;
  530. card->evtbd_ring[i]->flags = 0;
  531. }
  532. return 0;
  533. }
  534. /*
  535. * This function deletes Buffer descriptor ring for Events
  536. */
  537. static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
  538. {
  539. struct pcie_service_card *card = adapter->card;
  540. struct sk_buff *skb;
  541. int i;
  542. for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
  543. if (card->evt_buf_list[i]) {
  544. skb = card->evt_buf_list[i];
  545. pci_unmap_single(card->dev, card->evtbd_ring[i]->paddr,
  546. MAX_EVENT_SIZE, PCI_DMA_FROMDEVICE);
  547. dev_kfree_skb_any(skb);
  548. }
  549. card->evt_buf_list[i] = NULL;
  550. card->evtbd_ring[i]->paddr = 0;
  551. card->evtbd_ring[i]->len = 0;
  552. card->evtbd_ring[i]->flags = 0;
  553. card->evtbd_ring[i] = NULL;
  554. }
  555. if (card->evtbd_ring_vbase)
  556. pci_free_consistent(card->dev, card->evtbd_ring_size,
  557. card->evtbd_ring_vbase,
  558. card->evtbd_ring_pbase);
  559. card->evtbd_wrptr = 0;
  560. card->evtbd_rdptr = 0 | MWIFIEX_BD_FLAG_ROLLOVER_IND;
  561. card->evtbd_ring_size = 0;
  562. card->evtbd_ring_vbase = NULL;
  563. card->evtbd_ring_pbase = 0;
  564. return 0;
  565. }
  566. /*
  567. * This function allocates a buffer for CMDRSP
  568. */
  569. static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
  570. {
  571. struct pcie_service_card *card = adapter->card;
  572. struct sk_buff *skb;
  573. /* Allocate memory for receiving command response data */
  574. skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
  575. if (!skb) {
  576. dev_err(adapter->dev,
  577. "Unable to allocate skb for command response data.\n");
  578. return -ENOMEM;
  579. }
  580. skb_put(skb, MWIFIEX_UPLD_SIZE);
  581. if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
  582. PCI_DMA_FROMDEVICE))
  583. return -1;
  584. card->cmdrsp_buf = skb;
  585. return 0;
  586. }
  587. /*
  588. * This function deletes a buffer for CMDRSP
  589. */
  590. static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
  591. {
  592. struct pcie_service_card *card;
  593. dma_addr_t buf_pa;
  594. if (!adapter)
  595. return 0;
  596. card = adapter->card;
  597. if (card && card->cmdrsp_buf) {
  598. MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
  599. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  600. PCI_DMA_FROMDEVICE);
  601. dev_kfree_skb_any(card->cmdrsp_buf);
  602. }
  603. if (card && card->cmd_buf) {
  604. MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
  605. pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER,
  606. PCI_DMA_TODEVICE);
  607. dev_kfree_skb_any(card->cmd_buf);
  608. }
  609. return 0;
  610. }
  611. /*
  612. * This function allocates a buffer for sleep cookie
  613. */
  614. static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
  615. {
  616. struct pcie_service_card *card = adapter->card;
  617. card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
  618. &card->sleep_cookie_pbase);
  619. if (!card->sleep_cookie_vbase) {
  620. dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
  621. return -ENOMEM;
  622. }
  623. /* Init val of Sleep Cookie */
  624. *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
  625. dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
  626. *((u32 *)card->sleep_cookie_vbase));
  627. return 0;
  628. }
  629. /*
  630. * This function deletes buffer for sleep cookie
  631. */
  632. static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
  633. {
  634. struct pcie_service_card *card;
  635. if (!adapter)
  636. return 0;
  637. card = adapter->card;
  638. if (card && card->sleep_cookie_vbase) {
  639. pci_free_consistent(card->dev, sizeof(u32),
  640. card->sleep_cookie_vbase,
  641. card->sleep_cookie_pbase);
  642. card->sleep_cookie_vbase = NULL;
  643. }
  644. return 0;
  645. }
  646. /* This function flushes the TX buffer descriptor ring
  647. * This function defined as handler is also called while cleaning TXRX
  648. * during disconnect/ bss stop.
  649. */
  650. static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
  651. {
  652. struct pcie_service_card *card = adapter->card;
  653. u32 rdptr;
  654. /* Read the TX ring read pointer set by firmware */
  655. if (mwifiex_read_reg(adapter, REG_TXBD_RDPTR, &rdptr)) {
  656. dev_err(adapter->dev,
  657. "Flush TXBD: failed to read REG_TXBD_RDPTR\n");
  658. return -1;
  659. }
  660. if (!mwifiex_pcie_txbd_empty(card, rdptr)) {
  661. card->txbd_flush = 1;
  662. /* write pointer already set at last send
  663. * send dnld-rdy intr again, wait for completion.
  664. */
  665. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  666. CPU_INTR_DNLD_RDY)) {
  667. dev_err(adapter->dev,
  668. "failed to assert dnld-rdy interrupt.\n");
  669. return -1;
  670. }
  671. }
  672. return 0;
  673. }
  674. /*
  675. * This function unmaps and frees downloaded data buffer
  676. */
  677. static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
  678. {
  679. const u32 num_tx_buffs = MWIFIEX_MAX_TXRX_BD;
  680. struct sk_buff *skb;
  681. dma_addr_t buf_pa;
  682. u32 wrdoneidx, rdptr, unmap_count = 0;
  683. struct pcie_service_card *card = adapter->card;
  684. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  685. mwifiex_pm_wakeup_card(adapter);
  686. /* Read the TX ring read pointer set by firmware */
  687. if (mwifiex_read_reg(adapter, REG_TXBD_RDPTR, &rdptr)) {
  688. dev_err(adapter->dev,
  689. "SEND COMP: failed to read REG_TXBD_RDPTR\n");
  690. return -1;
  691. }
  692. dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
  693. card->txbd_rdptr, rdptr);
  694. /* free from previous txbd_rdptr to current txbd_rdptr */
  695. while (((card->txbd_rdptr & MWIFIEX_TXBD_MASK) !=
  696. (rdptr & MWIFIEX_TXBD_MASK)) ||
  697. ((card->txbd_rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) !=
  698. (rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND))) {
  699. wrdoneidx = card->txbd_rdptr & MWIFIEX_TXBD_MASK;
  700. skb = card->tx_buf_list[wrdoneidx];
  701. if (skb) {
  702. dev_dbg(adapter->dev,
  703. "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
  704. skb, wrdoneidx);
  705. MWIFIEX_SKB_PACB(skb, &buf_pa);
  706. pci_unmap_single(card->dev, buf_pa, skb->len,
  707. PCI_DMA_TODEVICE);
  708. unmap_count++;
  709. if (card->txbd_flush)
  710. mwifiex_write_data_complete(adapter, skb, 0,
  711. -1);
  712. else
  713. mwifiex_write_data_complete(adapter, skb, 0, 0);
  714. }
  715. card->tx_buf_list[wrdoneidx] = NULL;
  716. card->txbd_ring[wrdoneidx]->paddr = 0;
  717. card->rxbd_ring[wrdoneidx]->len = 0;
  718. card->rxbd_ring[wrdoneidx]->flags = 0;
  719. card->txbd_rdptr++;
  720. if ((card->txbd_rdptr & MWIFIEX_TXBD_MASK) == num_tx_buffs)
  721. card->txbd_rdptr = ((card->txbd_rdptr &
  722. MWIFIEX_BD_FLAG_ROLLOVER_IND) ^
  723. MWIFIEX_BD_FLAG_ROLLOVER_IND);
  724. }
  725. if (unmap_count)
  726. adapter->data_sent = false;
  727. if (card->txbd_flush) {
  728. if (((card->txbd_wrptr & MWIFIEX_TXBD_MASK) ==
  729. (card->txbd_rdptr & MWIFIEX_TXBD_MASK)) &&
  730. ((card->txbd_wrptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) !=
  731. (card->txbd_rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND)))
  732. card->txbd_flush = 0;
  733. else
  734. mwifiex_clean_pcie_ring_buf(adapter);
  735. }
  736. return 0;
  737. }
  738. /* This function sends data buffer to device. First 4 bytes of payload
  739. * are filled with payload length and payload type. Then this payload
  740. * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
  741. * Download ready interrupt to FW is deffered if Tx ring is not full and
  742. * additional payload can be accomodated.
  743. */
  744. static int
  745. mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
  746. struct mwifiex_tx_param *tx_param)
  747. {
  748. struct pcie_service_card *card = adapter->card;
  749. u32 wrindx;
  750. int ret;
  751. dma_addr_t buf_pa;
  752. __le16 *tmp;
  753. if (!(skb->data && skb->len)) {
  754. dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
  755. __func__, skb->data, skb->len);
  756. return -1;
  757. }
  758. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  759. mwifiex_pm_wakeup_card(adapter);
  760. dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
  761. card->txbd_rdptr, card->txbd_wrptr);
  762. if (mwifiex_pcie_txbd_not_full(card)) {
  763. u8 *payload;
  764. adapter->data_sent = true;
  765. payload = skb->data;
  766. tmp = (__le16 *)&payload[0];
  767. *tmp = cpu_to_le16((u16)skb->len);
  768. tmp = (__le16 *)&payload[2];
  769. *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
  770. if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
  771. PCI_DMA_TODEVICE))
  772. return -1;
  773. wrindx = card->txbd_wrptr & MWIFIEX_TXBD_MASK;
  774. MWIFIEX_SKB_PACB(skb, &buf_pa);
  775. card->tx_buf_list[wrindx] = skb;
  776. card->txbd_ring[wrindx]->paddr = buf_pa;
  777. card->txbd_ring[wrindx]->len = (u16)skb->len;
  778. card->txbd_ring[wrindx]->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
  779. MWIFIEX_BD_FLAG_LAST_DESC;
  780. if ((++card->txbd_wrptr & MWIFIEX_TXBD_MASK) ==
  781. MWIFIEX_MAX_TXRX_BD)
  782. card->txbd_wrptr = ((card->txbd_wrptr &
  783. MWIFIEX_BD_FLAG_ROLLOVER_IND) ^
  784. MWIFIEX_BD_FLAG_ROLLOVER_IND);
  785. /* Write the TX ring write pointer in to REG_TXBD_WRPTR */
  786. if (mwifiex_write_reg(adapter, REG_TXBD_WRPTR,
  787. card->txbd_wrptr)) {
  788. dev_err(adapter->dev,
  789. "SEND DATA: failed to write REG_TXBD_WRPTR\n");
  790. ret = -1;
  791. goto done_unmap;
  792. }
  793. if ((mwifiex_pcie_txbd_not_full(card)) &&
  794. tx_param->next_pkt_len) {
  795. /* have more packets and TxBD still can hold more */
  796. dev_dbg(adapter->dev,
  797. "SEND DATA: delay dnld-rdy interrupt.\n");
  798. adapter->data_sent = false;
  799. } else {
  800. /* Send the TX ready interrupt */
  801. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  802. CPU_INTR_DNLD_RDY)) {
  803. dev_err(adapter->dev,
  804. "SEND DATA: failed to assert dnld-rdy interrupt.\n");
  805. ret = -1;
  806. goto done_unmap;
  807. }
  808. }
  809. dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
  810. "%#x> and sent packet to firmware successfully\n",
  811. card->txbd_rdptr, card->txbd_wrptr);
  812. } else {
  813. dev_dbg(adapter->dev,
  814. "info: TX Ring full, can't send packets to fw\n");
  815. adapter->data_sent = true;
  816. /* Send the TX ready interrupt */
  817. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  818. CPU_INTR_DNLD_RDY))
  819. dev_err(adapter->dev,
  820. "SEND DATA: failed to assert door-bell intr\n");
  821. return -EBUSY;
  822. }
  823. return -EINPROGRESS;
  824. done_unmap:
  825. MWIFIEX_SKB_PACB(skb, &buf_pa);
  826. pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
  827. card->tx_buf_list[wrindx] = NULL;
  828. card->txbd_ring[wrindx]->paddr = 0;
  829. card->txbd_ring[wrindx]->len = 0;
  830. card->txbd_ring[wrindx]->flags = 0;
  831. return ret;
  832. }
  833. /*
  834. * This function handles received buffer ring and
  835. * dispatches packets to upper
  836. */
  837. static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
  838. {
  839. struct pcie_service_card *card = adapter->card;
  840. u32 wrptr, rd_index;
  841. dma_addr_t buf_pa;
  842. int ret = 0;
  843. struct sk_buff *skb_tmp = NULL;
  844. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  845. mwifiex_pm_wakeup_card(adapter);
  846. /* Read the RX ring Write pointer set by firmware */
  847. if (mwifiex_read_reg(adapter, REG_RXBD_WRPTR, &wrptr)) {
  848. dev_err(adapter->dev,
  849. "RECV DATA: failed to read REG_TXBD_RDPTR\n");
  850. ret = -1;
  851. goto done;
  852. }
  853. card->rxbd_wrptr = wrptr;
  854. while (((wrptr & MWIFIEX_RXBD_MASK) !=
  855. (card->rxbd_rdptr & MWIFIEX_RXBD_MASK)) ||
  856. ((wrptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) ==
  857. (card->rxbd_rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND))) {
  858. struct sk_buff *skb_data;
  859. u16 rx_len;
  860. __le16 pkt_len;
  861. rd_index = card->rxbd_rdptr & MWIFIEX_RXBD_MASK;
  862. skb_data = card->rx_buf_list[rd_index];
  863. MWIFIEX_SKB_PACB(skb_data, &buf_pa);
  864. pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
  865. PCI_DMA_FROMDEVICE);
  866. card->rx_buf_list[rd_index] = NULL;
  867. /* Get data length from interface header -
  868. * first 2 bytes for len, next 2 bytes is for type
  869. */
  870. pkt_len = *((__le16 *)skb_data->data);
  871. rx_len = le16_to_cpu(pkt_len);
  872. skb_put(skb_data, rx_len);
  873. dev_dbg(adapter->dev,
  874. "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
  875. card->rxbd_rdptr, wrptr, rx_len);
  876. skb_pull(skb_data, INTF_HEADER_LEN);
  877. mwifiex_handle_rx_packet(adapter, skb_data);
  878. skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
  879. if (!skb_tmp) {
  880. dev_err(adapter->dev,
  881. "Unable to allocate skb.\n");
  882. return -ENOMEM;
  883. }
  884. if (mwifiex_map_pci_memory(adapter, skb_tmp,
  885. MWIFIEX_RX_DATA_BUF_SIZE,
  886. PCI_DMA_FROMDEVICE))
  887. return -1;
  888. MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
  889. dev_dbg(adapter->dev,
  890. "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
  891. skb_tmp, rd_index);
  892. card->rx_buf_list[rd_index] = skb_tmp;
  893. card->rxbd_ring[rd_index]->paddr = buf_pa;
  894. card->rxbd_ring[rd_index]->len = skb_tmp->len;
  895. card->rxbd_ring[rd_index]->flags = 0;
  896. if ((++card->rxbd_rdptr & MWIFIEX_RXBD_MASK) ==
  897. MWIFIEX_MAX_TXRX_BD) {
  898. card->rxbd_rdptr = ((card->rxbd_rdptr &
  899. MWIFIEX_BD_FLAG_ROLLOVER_IND) ^
  900. MWIFIEX_BD_FLAG_ROLLOVER_IND);
  901. }
  902. dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
  903. card->rxbd_rdptr, wrptr);
  904. /* Write the RX ring read pointer in to REG_RXBD_RDPTR */
  905. if (mwifiex_write_reg(adapter, REG_RXBD_RDPTR,
  906. card->rxbd_rdptr)) {
  907. dev_err(adapter->dev,
  908. "RECV DATA: failed to write REG_RXBD_RDPTR\n");
  909. ret = -1;
  910. goto done;
  911. }
  912. /* Read the RX ring Write pointer set by firmware */
  913. if (mwifiex_read_reg(adapter, REG_RXBD_WRPTR, &wrptr)) {
  914. dev_err(adapter->dev,
  915. "RECV DATA: failed to read REG_TXBD_RDPTR\n");
  916. ret = -1;
  917. goto done;
  918. }
  919. dev_dbg(adapter->dev,
  920. "info: RECV DATA: Rcvd packet from fw successfully\n");
  921. card->rxbd_wrptr = wrptr;
  922. }
  923. done:
  924. return ret;
  925. }
  926. /*
  927. * This function downloads the boot command to device
  928. */
  929. static int
  930. mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
  931. {
  932. dma_addr_t buf_pa;
  933. struct pcie_service_card *card = adapter->card;
  934. if (!(skb->data && skb->len)) {
  935. dev_err(adapter->dev,
  936. "Invalid parameter in %s <%p. len %d>\n",
  937. __func__, skb->data, skb->len);
  938. return -1;
  939. }
  940. if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
  941. return -1;
  942. MWIFIEX_SKB_PACB(skb, &buf_pa);
  943. /* Write the lower 32bits of the physical address to scratch
  944. * register 0 */
  945. if (mwifiex_write_reg(adapter, PCIE_SCRATCH_0_REG, (u32)buf_pa)) {
  946. dev_err(adapter->dev,
  947. "%s: failed to write download command to boot code.\n",
  948. __func__);
  949. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  950. PCI_DMA_TODEVICE);
  951. return -1;
  952. }
  953. /* Write the upper 32bits of the physical address to scratch
  954. * register 1 */
  955. if (mwifiex_write_reg(adapter, PCIE_SCRATCH_1_REG,
  956. (u32)((u64)buf_pa >> 32))) {
  957. dev_err(adapter->dev,
  958. "%s: failed to write download command to boot code.\n",
  959. __func__);
  960. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  961. PCI_DMA_TODEVICE);
  962. return -1;
  963. }
  964. /* Write the command length to scratch register 2 */
  965. if (mwifiex_write_reg(adapter, PCIE_SCRATCH_2_REG, skb->len)) {
  966. dev_err(adapter->dev,
  967. "%s: failed to write command len to scratch reg 2\n",
  968. __func__);
  969. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  970. PCI_DMA_TODEVICE);
  971. return -1;
  972. }
  973. /* Ring the door bell */
  974. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  975. CPU_INTR_DOOR_BELL)) {
  976. dev_err(adapter->dev,
  977. "%s: failed to assert door-bell intr\n", __func__);
  978. pci_unmap_single(card->dev, buf_pa,
  979. MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
  980. return -1;
  981. }
  982. return 0;
  983. }
  984. /* This function init rx port in firmware which in turn enables to receive data
  985. * from device before transmitting any packet.
  986. */
  987. static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
  988. {
  989. struct pcie_service_card *card = adapter->card;
  990. /* Write the RX ring read pointer in to REG_RXBD_RDPTR */
  991. if (mwifiex_write_reg(adapter, REG_RXBD_RDPTR, card->rxbd_rdptr | 0)) {
  992. dev_err(adapter->dev,
  993. "RECV DATA: failed to write REG_RXBD_RDPTR\n");
  994. return -1;
  995. }
  996. return 0;
  997. }
  998. /* This function downloads commands to the device
  999. */
  1000. static int
  1001. mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
  1002. {
  1003. struct pcie_service_card *card = adapter->card;
  1004. int ret = 0;
  1005. dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
  1006. u8 *payload = (u8 *)skb->data;
  1007. if (!(skb->data && skb->len)) {
  1008. dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
  1009. __func__, skb->data, skb->len);
  1010. return -1;
  1011. }
  1012. /* Make sure a command response buffer is available */
  1013. if (!card->cmdrsp_buf) {
  1014. dev_err(adapter->dev,
  1015. "No response buffer available, send command failed\n");
  1016. return -EBUSY;
  1017. }
  1018. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  1019. mwifiex_pm_wakeup_card(adapter);
  1020. adapter->cmd_sent = true;
  1021. *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
  1022. *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
  1023. if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
  1024. return -1;
  1025. card->cmd_buf = skb;
  1026. /* To send a command, the driver will:
  1027. 1. Write the 64bit physical address of the data buffer to
  1028. SCRATCH1 + SCRATCH0
  1029. 2. Ring the door bell (i.e. set the door bell interrupt)
  1030. In response to door bell interrupt, the firmware will perform
  1031. the DMA of the command packet (first header to obtain the total
  1032. length and then rest of the command).
  1033. */
  1034. if (card->cmdrsp_buf) {
  1035. MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
  1036. /* Write the lower 32bits of the cmdrsp buffer physical
  1037. address */
  1038. if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_LO,
  1039. (u32)cmdrsp_buf_pa)) {
  1040. dev_err(adapter->dev,
  1041. "Failed to write download cmd to boot code.\n");
  1042. ret = -1;
  1043. goto done;
  1044. }
  1045. /* Write the upper 32bits of the cmdrsp buffer physical
  1046. address */
  1047. if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_HI,
  1048. (u32)((u64)cmdrsp_buf_pa >> 32))) {
  1049. dev_err(adapter->dev,
  1050. "Failed to write download cmd to boot code.\n");
  1051. ret = -1;
  1052. goto done;
  1053. }
  1054. }
  1055. MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
  1056. /* Write the lower 32bits of the physical address to REG_CMD_ADDR_LO */
  1057. if (mwifiex_write_reg(adapter, REG_CMD_ADDR_LO, (u32)cmd_buf_pa)) {
  1058. dev_err(adapter->dev,
  1059. "Failed to write download cmd to boot code.\n");
  1060. ret = -1;
  1061. goto done;
  1062. }
  1063. /* Write the upper 32bits of the physical address to REG_CMD_ADDR_HI */
  1064. if (mwifiex_write_reg(adapter, REG_CMD_ADDR_HI,
  1065. (u32)((u64)cmd_buf_pa >> 32))) {
  1066. dev_err(adapter->dev,
  1067. "Failed to write download cmd to boot code.\n");
  1068. ret = -1;
  1069. goto done;
  1070. }
  1071. /* Write the command length to REG_CMD_SIZE */
  1072. if (mwifiex_write_reg(adapter, REG_CMD_SIZE, card->cmd_buf->len)) {
  1073. dev_err(adapter->dev,
  1074. "Failed to write cmd len to REG_CMD_SIZE\n");
  1075. ret = -1;
  1076. goto done;
  1077. }
  1078. /* Ring the door bell */
  1079. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  1080. CPU_INTR_DOOR_BELL)) {
  1081. dev_err(adapter->dev,
  1082. "Failed to assert door-bell intr\n");
  1083. ret = -1;
  1084. goto done;
  1085. }
  1086. done:
  1087. if (ret)
  1088. adapter->cmd_sent = false;
  1089. return 0;
  1090. }
  1091. /*
  1092. * This function handles command complete interrupt
  1093. */
  1094. static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
  1095. {
  1096. struct pcie_service_card *card = adapter->card;
  1097. struct sk_buff *skb = card->cmdrsp_buf;
  1098. int count = 0;
  1099. u16 rx_len;
  1100. __le16 pkt_len;
  1101. dma_addr_t buf_pa;
  1102. dev_dbg(adapter->dev, "info: Rx CMD Response\n");
  1103. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1104. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1105. PCI_DMA_FROMDEVICE);
  1106. pkt_len = *((__le16 *)skb->data);
  1107. rx_len = le16_to_cpu(pkt_len);
  1108. skb_trim(skb, rx_len);
  1109. skb_pull(skb, INTF_HEADER_LEN);
  1110. if (!adapter->curr_cmd) {
  1111. if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
  1112. mwifiex_process_sleep_confirm_resp(adapter, skb->data,
  1113. skb->len);
  1114. while (mwifiex_pcie_ok_to_access_hw(adapter) &&
  1115. (count++ < 10))
  1116. usleep_range(50, 60);
  1117. } else {
  1118. dev_err(adapter->dev,
  1119. "There is no command but got cmdrsp\n");
  1120. }
  1121. memcpy(adapter->upld_buf, skb->data,
  1122. min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
  1123. if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
  1124. PCI_DMA_FROMDEVICE))
  1125. return -1;
  1126. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1127. } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  1128. adapter->curr_cmd->resp_skb = skb;
  1129. adapter->cmd_resp_received = true;
  1130. /* Take the pointer and set it to CMD node and will
  1131. return in the response complete callback */
  1132. card->cmdrsp_buf = NULL;
  1133. /* Clear the cmd-rsp buffer address in scratch registers. This
  1134. will prevent firmware from writing to the same response
  1135. buffer again. */
  1136. if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_LO, 0)) {
  1137. dev_err(adapter->dev,
  1138. "cmd_done: failed to clear cmd_rsp_addr_lo\n");
  1139. return -1;
  1140. }
  1141. /* Write the upper 32bits of the cmdrsp buffer physical
  1142. address */
  1143. if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_HI, 0)) {
  1144. dev_err(adapter->dev,
  1145. "cmd_done: failed to clear cmd_rsp_addr_hi\n");
  1146. return -1;
  1147. }
  1148. }
  1149. return 0;
  1150. }
  1151. /*
  1152. * Command Response processing complete handler
  1153. */
  1154. static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
  1155. struct sk_buff *skb)
  1156. {
  1157. struct pcie_service_card *card = adapter->card;
  1158. dma_addr_t buf_pa;
  1159. struct sk_buff *skb_tmp;
  1160. if (skb) {
  1161. card->cmdrsp_buf = skb;
  1162. skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
  1163. if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
  1164. PCI_DMA_FROMDEVICE))
  1165. return -1;
  1166. }
  1167. skb_tmp = card->cmd_buf;
  1168. if (skb_tmp) {
  1169. MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
  1170. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1171. PCI_DMA_FROMDEVICE);
  1172. card->cmd_buf = NULL;
  1173. }
  1174. return 0;
  1175. }
  1176. /*
  1177. * This function handles firmware event ready interrupt
  1178. */
  1179. static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
  1180. {
  1181. struct pcie_service_card *card = adapter->card;
  1182. u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
  1183. u32 wrptr, event;
  1184. dma_addr_t buf_pa;
  1185. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  1186. mwifiex_pm_wakeup_card(adapter);
  1187. if (adapter->event_received) {
  1188. dev_dbg(adapter->dev, "info: Event being processed, "
  1189. "do not process this interrupt just yet\n");
  1190. return 0;
  1191. }
  1192. if (rdptr >= MWIFIEX_MAX_EVT_BD) {
  1193. dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
  1194. return -1;
  1195. }
  1196. /* Read the event ring write pointer set by firmware */
  1197. if (mwifiex_read_reg(adapter, REG_EVTBD_WRPTR, &wrptr)) {
  1198. dev_err(adapter->dev,
  1199. "EventReady: failed to read REG_EVTBD_WRPTR\n");
  1200. return -1;
  1201. }
  1202. dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
  1203. card->evtbd_rdptr, wrptr);
  1204. if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
  1205. & MWIFIEX_EVTBD_MASK)) ||
  1206. ((wrptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) ==
  1207. (card->evtbd_rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND))) {
  1208. struct sk_buff *skb_cmd;
  1209. __le16 data_len = 0;
  1210. u16 evt_len;
  1211. dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
  1212. skb_cmd = card->evt_buf_list[rdptr];
  1213. MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
  1214. pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
  1215. PCI_DMA_FROMDEVICE);
  1216. /* Take the pointer and set it to event pointer in adapter
  1217. and will return back after event handling callback */
  1218. card->evt_buf_list[rdptr] = NULL;
  1219. card->evtbd_ring[rdptr]->paddr = 0;
  1220. card->evtbd_ring[rdptr]->len = 0;
  1221. card->evtbd_ring[rdptr]->flags = 0;
  1222. event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
  1223. adapter->event_cause = event;
  1224. /* The first 4bytes will be the event transfer header
  1225. len is 2 bytes followed by type which is 2 bytes */
  1226. memcpy(&data_len, skb_cmd->data, sizeof(__le16));
  1227. evt_len = le16_to_cpu(data_len);
  1228. skb_pull(skb_cmd, INTF_HEADER_LEN);
  1229. dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
  1230. if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
  1231. memcpy(adapter->event_body, skb_cmd->data +
  1232. MWIFIEX_EVENT_HEADER_LEN, evt_len -
  1233. MWIFIEX_EVENT_HEADER_LEN);
  1234. adapter->event_received = true;
  1235. adapter->event_skb = skb_cmd;
  1236. /* Do not update the event read pointer here, wait till the
  1237. buffer is released. This is just to make things simpler,
  1238. we need to find a better method of managing these buffers.
  1239. */
  1240. }
  1241. return 0;
  1242. }
  1243. /*
  1244. * Event processing complete handler
  1245. */
  1246. static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
  1247. struct sk_buff *skb)
  1248. {
  1249. struct pcie_service_card *card = adapter->card;
  1250. int ret = 0;
  1251. u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
  1252. u32 wrptr;
  1253. dma_addr_t buf_pa;
  1254. if (!skb)
  1255. return 0;
  1256. if (rdptr >= MWIFIEX_MAX_EVT_BD) {
  1257. dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
  1258. rdptr);
  1259. return -EINVAL;
  1260. }
  1261. /* Read the event ring write pointer set by firmware */
  1262. if (mwifiex_read_reg(adapter, REG_EVTBD_WRPTR, &wrptr)) {
  1263. dev_err(adapter->dev,
  1264. "event_complete: failed to read REG_EVTBD_WRPTR\n");
  1265. return -1;
  1266. }
  1267. if (!card->evt_buf_list[rdptr]) {
  1268. skb_push(skb, INTF_HEADER_LEN);
  1269. if (mwifiex_map_pci_memory(adapter, skb,
  1270. MAX_EVENT_SIZE,
  1271. PCI_DMA_FROMDEVICE))
  1272. return -1;
  1273. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1274. card->evt_buf_list[rdptr] = skb;
  1275. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1276. card->evtbd_ring[rdptr]->paddr = buf_pa;
  1277. card->evtbd_ring[rdptr]->len = (u16)skb->len;
  1278. card->evtbd_ring[rdptr]->flags = 0;
  1279. skb = NULL;
  1280. } else {
  1281. dev_dbg(adapter->dev,
  1282. "info: ERROR: buf still valid at index %d, <%p, %p>\n",
  1283. rdptr, card->evt_buf_list[rdptr], skb);
  1284. }
  1285. if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
  1286. card->evtbd_rdptr = ((card->evtbd_rdptr &
  1287. MWIFIEX_BD_FLAG_ROLLOVER_IND) ^
  1288. MWIFIEX_BD_FLAG_ROLLOVER_IND);
  1289. }
  1290. dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
  1291. card->evtbd_rdptr, wrptr);
  1292. /* Write the event ring read pointer in to REG_EVTBD_RDPTR */
  1293. if (mwifiex_write_reg(adapter, REG_EVTBD_RDPTR, card->evtbd_rdptr)) {
  1294. dev_err(adapter->dev,
  1295. "event_complete: failed to read REG_EVTBD_RDPTR\n");
  1296. return -1;
  1297. }
  1298. dev_dbg(adapter->dev, "info: Check Events Again\n");
  1299. ret = mwifiex_pcie_process_event_ready(adapter);
  1300. return ret;
  1301. }
  1302. /*
  1303. * This function downloads the firmware to the card.
  1304. *
  1305. * Firmware is downloaded to the card in blocks. Every block download
  1306. * is tested for CRC errors, and retried a number of times before
  1307. * returning failure.
  1308. */
  1309. static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
  1310. struct mwifiex_fw_image *fw)
  1311. {
  1312. int ret;
  1313. u8 *firmware = fw->fw_buf;
  1314. u32 firmware_len = fw->fw_len;
  1315. u32 offset = 0;
  1316. struct sk_buff *skb;
  1317. u32 txlen, tx_blocks = 0, tries, len;
  1318. u32 block_retry_cnt = 0;
  1319. dma_addr_t buf_pa;
  1320. struct pcie_service_card *card = adapter->card;
  1321. if (!firmware || !firmware_len) {
  1322. dev_err(adapter->dev,
  1323. "No firmware image found! Terminating download\n");
  1324. return -1;
  1325. }
  1326. dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
  1327. firmware_len);
  1328. if (mwifiex_pcie_disable_host_int(adapter)) {
  1329. dev_err(adapter->dev,
  1330. "%s: Disabling interrupts failed.\n", __func__);
  1331. return -1;
  1332. }
  1333. skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
  1334. if (!skb) {
  1335. ret = -ENOMEM;
  1336. goto done;
  1337. }
  1338. /* Perform firmware data transfer */
  1339. do {
  1340. u32 ireg_intr = 0;
  1341. /* More data? */
  1342. if (offset >= firmware_len)
  1343. break;
  1344. for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
  1345. ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_2_REG,
  1346. &len);
  1347. if (ret) {
  1348. dev_warn(adapter->dev,
  1349. "Failed reading len from boot code\n");
  1350. goto done;
  1351. }
  1352. if (len)
  1353. break;
  1354. usleep_range(10, 20);
  1355. }
  1356. if (!len) {
  1357. break;
  1358. } else if (len > MWIFIEX_UPLD_SIZE) {
  1359. pr_err("FW download failure @ %d, invalid length %d\n",
  1360. offset, len);
  1361. ret = -1;
  1362. goto done;
  1363. }
  1364. txlen = len;
  1365. if (len & BIT(0)) {
  1366. block_retry_cnt++;
  1367. if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
  1368. pr_err("FW download failure @ %d, over max "
  1369. "retry count\n", offset);
  1370. ret = -1;
  1371. goto done;
  1372. }
  1373. dev_err(adapter->dev, "FW CRC error indicated by the "
  1374. "helper: len = 0x%04X, txlen = %d\n",
  1375. len, txlen);
  1376. len &= ~BIT(0);
  1377. /* Setting this to 0 to resend from same offset */
  1378. txlen = 0;
  1379. } else {
  1380. block_retry_cnt = 0;
  1381. /* Set blocksize to transfer - checking for
  1382. last block */
  1383. if (firmware_len - offset < txlen)
  1384. txlen = firmware_len - offset;
  1385. dev_dbg(adapter->dev, ".");
  1386. tx_blocks = (txlen +
  1387. MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD - 1) /
  1388. MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD;
  1389. /* Copy payload to buffer */
  1390. memmove(skb->data, &firmware[offset], txlen);
  1391. }
  1392. skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
  1393. skb_trim(skb, tx_blocks * MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD);
  1394. /* Send the boot command to device */
  1395. if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
  1396. dev_err(adapter->dev,
  1397. "Failed to send firmware download command\n");
  1398. ret = -1;
  1399. goto done;
  1400. }
  1401. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1402. /* Wait for the command done interrupt */
  1403. do {
  1404. if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
  1405. &ireg_intr)) {
  1406. dev_err(adapter->dev, "%s: Failed to read "
  1407. "interrupt status during fw dnld.\n",
  1408. __func__);
  1409. pci_unmap_single(card->dev, buf_pa, skb->len,
  1410. PCI_DMA_TODEVICE);
  1411. ret = -1;
  1412. goto done;
  1413. }
  1414. } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
  1415. CPU_INTR_DOOR_BELL);
  1416. pci_unmap_single(card->dev, buf_pa, skb->len,
  1417. PCI_DMA_TODEVICE);
  1418. offset += txlen;
  1419. } while (true);
  1420. dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
  1421. offset);
  1422. ret = 0;
  1423. done:
  1424. dev_kfree_skb_any(skb);
  1425. return ret;
  1426. }
  1427. /*
  1428. * This function checks the firmware status in card.
  1429. *
  1430. * The winner interface is also determined by this function.
  1431. */
  1432. static int
  1433. mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
  1434. {
  1435. int ret = 0;
  1436. u32 firmware_stat, winner_status;
  1437. u32 tries;
  1438. /* Mask spurios interrupts */
  1439. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
  1440. HOST_INTR_MASK)) {
  1441. dev_warn(adapter->dev, "Write register failed\n");
  1442. return -1;
  1443. }
  1444. dev_dbg(adapter->dev, "Setting driver ready signature\n");
  1445. if (mwifiex_write_reg(adapter, REG_DRV_READY, FIRMWARE_READY_PCIE)) {
  1446. dev_err(adapter->dev,
  1447. "Failed to write driver ready signature\n");
  1448. return -1;
  1449. }
  1450. /* Wait for firmware initialization event */
  1451. for (tries = 0; tries < poll_num; tries++) {
  1452. if (mwifiex_read_reg(adapter, PCIE_SCRATCH_3_REG,
  1453. &firmware_stat))
  1454. ret = -1;
  1455. else
  1456. ret = 0;
  1457. if (ret)
  1458. continue;
  1459. if (firmware_stat == FIRMWARE_READY_PCIE) {
  1460. ret = 0;
  1461. break;
  1462. } else {
  1463. mdelay(100);
  1464. ret = -1;
  1465. }
  1466. }
  1467. if (ret) {
  1468. if (mwifiex_read_reg(adapter, PCIE_SCRATCH_3_REG,
  1469. &winner_status))
  1470. ret = -1;
  1471. else if (!winner_status) {
  1472. dev_err(adapter->dev, "PCI-E is the winner\n");
  1473. adapter->winner = 1;
  1474. ret = -1;
  1475. } else {
  1476. dev_err(adapter->dev,
  1477. "PCI-E is not the winner <%#x,%d>, exit dnld\n",
  1478. ret, adapter->winner);
  1479. ret = 0;
  1480. }
  1481. }
  1482. return ret;
  1483. }
  1484. /*
  1485. * This function reads the interrupt status from card.
  1486. */
  1487. static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
  1488. {
  1489. u32 pcie_ireg;
  1490. unsigned long flags;
  1491. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  1492. return;
  1493. if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
  1494. dev_warn(adapter->dev, "Read register failed\n");
  1495. return;
  1496. }
  1497. if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
  1498. mwifiex_pcie_disable_host_int(adapter);
  1499. /* Clear the pending interrupts */
  1500. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
  1501. ~pcie_ireg)) {
  1502. dev_warn(adapter->dev, "Write register failed\n");
  1503. return;
  1504. }
  1505. spin_lock_irqsave(&adapter->int_lock, flags);
  1506. adapter->int_status |= pcie_ireg;
  1507. spin_unlock_irqrestore(&adapter->int_lock, flags);
  1508. if (pcie_ireg & HOST_INTR_CMD_DONE) {
  1509. if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
  1510. (adapter->ps_state == PS_STATE_SLEEP)) {
  1511. mwifiex_pcie_enable_host_int(adapter);
  1512. if (mwifiex_write_reg(adapter,
  1513. PCIE_CPU_INT_EVENT,
  1514. CPU_INTR_SLEEP_CFM_DONE)
  1515. ) {
  1516. dev_warn(adapter->dev,
  1517. "Write register failed\n");
  1518. return;
  1519. }
  1520. }
  1521. } else if (!adapter->pps_uapsd_mode &&
  1522. adapter->ps_state == PS_STATE_SLEEP) {
  1523. /* Potentially for PCIe we could get other
  1524. * interrupts like shared. Don't change power
  1525. * state until cookie is set */
  1526. if (mwifiex_pcie_ok_to_access_hw(adapter))
  1527. adapter->ps_state = PS_STATE_AWAKE;
  1528. }
  1529. }
  1530. }
  1531. /*
  1532. * Interrupt handler for PCIe root port
  1533. *
  1534. * This function reads the interrupt status from firmware and assigns
  1535. * the main process in workqueue which will handle the interrupt.
  1536. */
  1537. static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
  1538. {
  1539. struct pci_dev *pdev = (struct pci_dev *)context;
  1540. struct pcie_service_card *card;
  1541. struct mwifiex_adapter *adapter;
  1542. if (!pdev) {
  1543. pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
  1544. goto exit;
  1545. }
  1546. card = (struct pcie_service_card *) pci_get_drvdata(pdev);
  1547. if (!card || !card->adapter) {
  1548. pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
  1549. card ? card->adapter : NULL);
  1550. goto exit;
  1551. }
  1552. adapter = card->adapter;
  1553. if (adapter->surprise_removed)
  1554. goto exit;
  1555. mwifiex_interrupt_status(adapter);
  1556. queue_work(adapter->workqueue, &adapter->main_work);
  1557. exit:
  1558. return IRQ_HANDLED;
  1559. }
  1560. /*
  1561. * This function checks the current interrupt status.
  1562. *
  1563. * The following interrupts are checked and handled by this function -
  1564. * - Data sent
  1565. * - Command sent
  1566. * - Command received
  1567. * - Packets received
  1568. * - Events received
  1569. *
  1570. * In case of Rx packets received, the packets are uploaded from card to
  1571. * host and processed accordingly.
  1572. */
  1573. static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
  1574. {
  1575. int ret;
  1576. u32 pcie_ireg;
  1577. unsigned long flags;
  1578. spin_lock_irqsave(&adapter->int_lock, flags);
  1579. /* Clear out unused interrupts */
  1580. pcie_ireg = adapter->int_status;
  1581. adapter->int_status = 0;
  1582. spin_unlock_irqrestore(&adapter->int_lock, flags);
  1583. while (pcie_ireg & HOST_INTR_MASK) {
  1584. if (pcie_ireg & HOST_INTR_DNLD_DONE) {
  1585. pcie_ireg &= ~HOST_INTR_DNLD_DONE;
  1586. dev_dbg(adapter->dev, "info: TX DNLD Done\n");
  1587. ret = mwifiex_pcie_send_data_complete(adapter);
  1588. if (ret)
  1589. return ret;
  1590. }
  1591. if (pcie_ireg & HOST_INTR_UPLD_RDY) {
  1592. pcie_ireg &= ~HOST_INTR_UPLD_RDY;
  1593. dev_dbg(adapter->dev, "info: Rx DATA\n");
  1594. ret = mwifiex_pcie_process_recv_data(adapter);
  1595. if (ret)
  1596. return ret;
  1597. }
  1598. if (pcie_ireg & HOST_INTR_EVENT_RDY) {
  1599. pcie_ireg &= ~HOST_INTR_EVENT_RDY;
  1600. dev_dbg(adapter->dev, "info: Rx EVENT\n");
  1601. ret = mwifiex_pcie_process_event_ready(adapter);
  1602. if (ret)
  1603. return ret;
  1604. }
  1605. if (pcie_ireg & HOST_INTR_CMD_DONE) {
  1606. pcie_ireg &= ~HOST_INTR_CMD_DONE;
  1607. if (adapter->cmd_sent) {
  1608. dev_dbg(adapter->dev,
  1609. "info: CMD sent Interrupt\n");
  1610. adapter->cmd_sent = false;
  1611. }
  1612. /* Handle command response */
  1613. ret = mwifiex_pcie_process_cmd_complete(adapter);
  1614. if (ret)
  1615. return ret;
  1616. }
  1617. if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  1618. if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
  1619. &pcie_ireg)) {
  1620. dev_warn(adapter->dev,
  1621. "Read register failed\n");
  1622. return -1;
  1623. }
  1624. if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
  1625. if (mwifiex_write_reg(adapter,
  1626. PCIE_HOST_INT_STATUS,
  1627. ~pcie_ireg)) {
  1628. dev_warn(adapter->dev,
  1629. "Write register failed\n");
  1630. return -1;
  1631. }
  1632. }
  1633. }
  1634. }
  1635. dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
  1636. adapter->cmd_sent, adapter->data_sent);
  1637. mwifiex_pcie_enable_host_int(adapter);
  1638. return 0;
  1639. }
  1640. /*
  1641. * This function downloads data from driver to card.
  1642. *
  1643. * Both commands and data packets are transferred to the card by this
  1644. * function.
  1645. *
  1646. * This function adds the PCIE specific header to the front of the buffer
  1647. * before transferring. The header contains the length of the packet and
  1648. * the type. The firmware handles the packets based upon this set type.
  1649. */
  1650. static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
  1651. struct sk_buff *skb,
  1652. struct mwifiex_tx_param *tx_param)
  1653. {
  1654. if (!skb) {
  1655. dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
  1656. return -1;
  1657. }
  1658. if (type == MWIFIEX_TYPE_DATA)
  1659. return mwifiex_pcie_send_data(adapter, skb, tx_param);
  1660. else if (type == MWIFIEX_TYPE_CMD)
  1661. return mwifiex_pcie_send_cmd(adapter, skb);
  1662. return 0;
  1663. }
  1664. /*
  1665. * This function initializes the PCI-E host memory space, WCB rings, etc.
  1666. *
  1667. * The following initializations steps are followed -
  1668. * - Allocate TXBD ring buffers
  1669. * - Allocate RXBD ring buffers
  1670. * - Allocate event BD ring buffers
  1671. * - Allocate command response ring buffer
  1672. * - Allocate sleep cookie buffer
  1673. */
  1674. static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
  1675. {
  1676. struct pcie_service_card *card = adapter->card;
  1677. int ret;
  1678. struct pci_dev *pdev = card->dev;
  1679. pci_set_drvdata(pdev, card);
  1680. ret = pci_enable_device(pdev);
  1681. if (ret)
  1682. goto err_enable_dev;
  1683. pci_set_master(pdev);
  1684. dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
  1685. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1686. if (ret) {
  1687. dev_err(adapter->dev, "set_dma_mask(32) failed\n");
  1688. goto err_set_dma_mask;
  1689. }
  1690. ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1691. if (ret) {
  1692. dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
  1693. goto err_set_dma_mask;
  1694. }
  1695. ret = pci_request_region(pdev, 0, DRV_NAME);
  1696. if (ret) {
  1697. dev_err(adapter->dev, "req_reg(0) error\n");
  1698. goto err_req_region0;
  1699. }
  1700. card->pci_mmap = pci_iomap(pdev, 0, 0);
  1701. if (!card->pci_mmap) {
  1702. dev_err(adapter->dev, "iomap(0) error\n");
  1703. goto err_iomap0;
  1704. }
  1705. ret = pci_request_region(pdev, 2, DRV_NAME);
  1706. if (ret) {
  1707. dev_err(adapter->dev, "req_reg(2) error\n");
  1708. goto err_req_region2;
  1709. }
  1710. card->pci_mmap1 = pci_iomap(pdev, 2, 0);
  1711. if (!card->pci_mmap1) {
  1712. dev_err(adapter->dev, "iomap(2) error\n");
  1713. goto err_iomap2;
  1714. }
  1715. dev_dbg(adapter->dev,
  1716. "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
  1717. card->pci_mmap, card->pci_mmap1);
  1718. card->cmdrsp_buf = NULL;
  1719. ret = mwifiex_pcie_create_txbd_ring(adapter);
  1720. if (ret)
  1721. goto err_cre_txbd;
  1722. ret = mwifiex_pcie_create_rxbd_ring(adapter);
  1723. if (ret)
  1724. goto err_cre_rxbd;
  1725. ret = mwifiex_pcie_create_evtbd_ring(adapter);
  1726. if (ret)
  1727. goto err_cre_evtbd;
  1728. ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
  1729. if (ret)
  1730. goto err_alloc_cmdbuf;
  1731. ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
  1732. if (ret)
  1733. goto err_alloc_cookie;
  1734. return ret;
  1735. err_alloc_cookie:
  1736. mwifiex_pcie_delete_cmdrsp_buf(adapter);
  1737. err_alloc_cmdbuf:
  1738. mwifiex_pcie_delete_evtbd_ring(adapter);
  1739. err_cre_evtbd:
  1740. mwifiex_pcie_delete_rxbd_ring(adapter);
  1741. err_cre_rxbd:
  1742. mwifiex_pcie_delete_txbd_ring(adapter);
  1743. err_cre_txbd:
  1744. pci_iounmap(pdev, card->pci_mmap1);
  1745. err_iomap2:
  1746. pci_release_region(pdev, 2);
  1747. err_req_region2:
  1748. pci_iounmap(pdev, card->pci_mmap);
  1749. err_iomap0:
  1750. pci_release_region(pdev, 0);
  1751. err_req_region0:
  1752. err_set_dma_mask:
  1753. pci_disable_device(pdev);
  1754. err_enable_dev:
  1755. pci_set_drvdata(pdev, NULL);
  1756. return ret;
  1757. }
  1758. /*
  1759. * This function cleans up the allocated card buffers.
  1760. *
  1761. * The following are freed by this function -
  1762. * - TXBD ring buffers
  1763. * - RXBD ring buffers
  1764. * - Event BD ring buffers
  1765. * - Command response ring buffer
  1766. * - Sleep cookie buffer
  1767. */
  1768. static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
  1769. {
  1770. struct pcie_service_card *card = adapter->card;
  1771. struct pci_dev *pdev = card->dev;
  1772. if (user_rmmod) {
  1773. dev_dbg(adapter->dev, "Clearing driver ready signature\n");
  1774. if (mwifiex_write_reg(adapter, REG_DRV_READY, 0x00000000))
  1775. dev_err(adapter->dev,
  1776. "Failed to write driver not-ready signature\n");
  1777. }
  1778. if (pdev) {
  1779. pci_iounmap(pdev, card->pci_mmap);
  1780. pci_iounmap(pdev, card->pci_mmap1);
  1781. pci_release_regions(pdev);
  1782. pci_disable_device(pdev);
  1783. pci_set_drvdata(pdev, NULL);
  1784. }
  1785. }
  1786. /*
  1787. * This function registers the PCIE device.
  1788. *
  1789. * PCIE IRQ is claimed, block size is set and driver data is initialized.
  1790. */
  1791. static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
  1792. {
  1793. int ret;
  1794. struct pcie_service_card *card = adapter->card;
  1795. struct pci_dev *pdev = card->dev;
  1796. /* save adapter pointer in card */
  1797. card->adapter = adapter;
  1798. ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
  1799. "MRVL_PCIE", pdev);
  1800. if (ret) {
  1801. pr_err("request_irq failed: ret=%d\n", ret);
  1802. adapter->card = NULL;
  1803. return -1;
  1804. }
  1805. adapter->dev = &pdev->dev;
  1806. strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
  1807. return 0;
  1808. }
  1809. /*
  1810. * This function unregisters the PCIE device.
  1811. *
  1812. * The PCIE IRQ is released, the function is disabled and driver
  1813. * data is set to null.
  1814. */
  1815. static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
  1816. {
  1817. struct pcie_service_card *card = adapter->card;
  1818. if (card) {
  1819. dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
  1820. free_irq(card->dev->irq, card->dev);
  1821. mwifiex_pcie_delete_sleep_cookie_buf(adapter);
  1822. mwifiex_pcie_delete_cmdrsp_buf(adapter);
  1823. mwifiex_pcie_delete_evtbd_ring(adapter);
  1824. mwifiex_pcie_delete_rxbd_ring(adapter);
  1825. mwifiex_pcie_delete_txbd_ring(adapter);
  1826. card->cmdrsp_buf = NULL;
  1827. }
  1828. }
  1829. static struct mwifiex_if_ops pcie_ops = {
  1830. .init_if = mwifiex_pcie_init,
  1831. .cleanup_if = mwifiex_pcie_cleanup,
  1832. .check_fw_status = mwifiex_check_fw_status,
  1833. .prog_fw = mwifiex_prog_fw_w_helper,
  1834. .register_dev = mwifiex_register_dev,
  1835. .unregister_dev = mwifiex_unregister_dev,
  1836. .enable_int = mwifiex_pcie_enable_host_int,
  1837. .process_int_status = mwifiex_process_int_status,
  1838. .host_to_card = mwifiex_pcie_host_to_card,
  1839. .wakeup = mwifiex_pm_wakeup_card,
  1840. .wakeup_complete = mwifiex_pm_wakeup_card_complete,
  1841. /* PCIE specific */
  1842. .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
  1843. .event_complete = mwifiex_pcie_event_complete,
  1844. .update_mp_end_port = NULL,
  1845. .cleanup_mpa_buf = NULL,
  1846. .init_fw_port = mwifiex_pcie_init_fw_port,
  1847. .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
  1848. };
  1849. /*
  1850. * This function initializes the PCIE driver module.
  1851. *
  1852. * This initiates the semaphore and registers the device with
  1853. * PCIE bus.
  1854. */
  1855. static int mwifiex_pcie_init_module(void)
  1856. {
  1857. int ret;
  1858. pr_debug("Marvell 8766 PCIe Driver\n");
  1859. sema_init(&add_remove_card_sem, 1);
  1860. /* Clear the flag in case user removes the card. */
  1861. user_rmmod = 0;
  1862. ret = pci_register_driver(&mwifiex_pcie);
  1863. if (ret)
  1864. pr_err("Driver register failed!\n");
  1865. else
  1866. pr_debug("info: Driver registered successfully!\n");
  1867. return ret;
  1868. }
  1869. /*
  1870. * This function cleans up the PCIE driver.
  1871. *
  1872. * The following major steps are followed for cleanup -
  1873. * - Resume the device if its suspended
  1874. * - Disconnect the device if connected
  1875. * - Shutdown the firmware
  1876. * - Unregister the device from PCIE bus.
  1877. */
  1878. static void mwifiex_pcie_cleanup_module(void)
  1879. {
  1880. if (!down_interruptible(&add_remove_card_sem))
  1881. up(&add_remove_card_sem);
  1882. /* Set the flag as user is removing this module. */
  1883. user_rmmod = 1;
  1884. pci_unregister_driver(&mwifiex_pcie);
  1885. }
  1886. module_init(mwifiex_pcie_init_module);
  1887. module_exit(mwifiex_pcie_cleanup_module);
  1888. MODULE_AUTHOR("Marvell International Ltd.");
  1889. MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
  1890. MODULE_VERSION(PCIE_VERSION);
  1891. MODULE_LICENSE("GPL v2");
  1892. MODULE_FIRMWARE("mrvl/pcie8766_uapsta.bin");