arizona-core.c 15 KB

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  1. /*
  2. * Arizona core driver
  3. *
  4. * Copyright 2012 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/module.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/mfd/arizona/core.h>
  23. #include <linux/mfd/arizona/registers.h>
  24. #include "arizona.h"
  25. static const char *wm5102_core_supplies[] = {
  26. "AVDD",
  27. "DBVDD1",
  28. };
  29. int arizona_clk32k_enable(struct arizona *arizona)
  30. {
  31. int ret = 0;
  32. mutex_lock(&arizona->clk_lock);
  33. arizona->clk32k_ref++;
  34. if (arizona->clk32k_ref == 1)
  35. ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  36. ARIZONA_CLK_32K_ENA,
  37. ARIZONA_CLK_32K_ENA);
  38. if (ret != 0)
  39. arizona->clk32k_ref--;
  40. mutex_unlock(&arizona->clk_lock);
  41. return ret;
  42. }
  43. EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
  44. int arizona_clk32k_disable(struct arizona *arizona)
  45. {
  46. int ret = 0;
  47. mutex_lock(&arizona->clk_lock);
  48. BUG_ON(arizona->clk32k_ref <= 0);
  49. arizona->clk32k_ref--;
  50. if (arizona->clk32k_ref == 0)
  51. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  52. ARIZONA_CLK_32K_ENA, 0);
  53. mutex_unlock(&arizona->clk_lock);
  54. return ret;
  55. }
  56. EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
  57. static irqreturn_t arizona_clkgen_err(int irq, void *data)
  58. {
  59. struct arizona *arizona = data;
  60. dev_err(arizona->dev, "CLKGEN error\n");
  61. return IRQ_HANDLED;
  62. }
  63. static irqreturn_t arizona_underclocked(int irq, void *data)
  64. {
  65. struct arizona *arizona = data;
  66. unsigned int val;
  67. int ret;
  68. ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
  69. &val);
  70. if (ret != 0) {
  71. dev_err(arizona->dev, "Failed to read underclock status: %d\n",
  72. ret);
  73. return IRQ_NONE;
  74. }
  75. if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
  76. dev_err(arizona->dev, "AIF3 underclocked\n");
  77. if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
  78. dev_err(arizona->dev, "AIF2 underclocked\n");
  79. if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
  80. dev_err(arizona->dev, "AIF1 underclocked\n");
  81. if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
  82. dev_err(arizona->dev, "ISRC2 underclocked\n");
  83. if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
  84. dev_err(arizona->dev, "ISRC1 underclocked\n");
  85. if (val & ARIZONA_FX_UNDERCLOCKED_STS)
  86. dev_err(arizona->dev, "FX underclocked\n");
  87. if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
  88. dev_err(arizona->dev, "ASRC underclocked\n");
  89. if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
  90. dev_err(arizona->dev, "DAC underclocked\n");
  91. if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
  92. dev_err(arizona->dev, "ADC underclocked\n");
  93. if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
  94. dev_err(arizona->dev, "Mixer underclocked\n");
  95. return IRQ_HANDLED;
  96. }
  97. static irqreturn_t arizona_overclocked(int irq, void *data)
  98. {
  99. struct arizona *arizona = data;
  100. unsigned int val[2];
  101. int ret;
  102. ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
  103. &val[0], 2);
  104. if (ret != 0) {
  105. dev_err(arizona->dev, "Failed to read overclock status: %d\n",
  106. ret);
  107. return IRQ_NONE;
  108. }
  109. if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
  110. dev_err(arizona->dev, "PWM overclocked\n");
  111. if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
  112. dev_err(arizona->dev, "FX core overclocked\n");
  113. if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
  114. dev_err(arizona->dev, "DAC SYS overclocked\n");
  115. if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
  116. dev_err(arizona->dev, "DAC WARP overclocked\n");
  117. if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
  118. dev_err(arizona->dev, "ADC overclocked\n");
  119. if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
  120. dev_err(arizona->dev, "Mixer overclocked\n");
  121. if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
  122. dev_err(arizona->dev, "AIF3 overclocked\n");
  123. if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
  124. dev_err(arizona->dev, "AIF2 overclocked\n");
  125. if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
  126. dev_err(arizona->dev, "AIF1 overclocked\n");
  127. if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
  128. dev_err(arizona->dev, "Pad control overclocked\n");
  129. if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
  130. dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
  131. if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
  132. dev_err(arizona->dev, "Slimbus async overclocked\n");
  133. if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
  134. dev_err(arizona->dev, "Slimbus sync overclocked\n");
  135. if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
  136. dev_err(arizona->dev, "ASRC async system overclocked\n");
  137. if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
  138. dev_err(arizona->dev, "ASRC async WARP overclocked\n");
  139. if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
  140. dev_err(arizona->dev, "ASRC sync system overclocked\n");
  141. if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
  142. dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
  143. if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
  144. dev_err(arizona->dev, "DSP1 overclocked\n");
  145. if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
  146. dev_err(arizona->dev, "ISRC2 overclocked\n");
  147. if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
  148. dev_err(arizona->dev, "ISRC1 overclocked\n");
  149. return IRQ_HANDLED;
  150. }
  151. static int arizona_wait_for_boot(struct arizona *arizona)
  152. {
  153. unsigned int reg;
  154. int ret, i;
  155. /*
  156. * We can't use an interrupt as we need to runtime resume to do so,
  157. * we won't race with the interrupt handler as it'll be blocked on
  158. * runtime resume.
  159. */
  160. for (i = 0; i < 5; i++) {
  161. msleep(1);
  162. ret = regmap_read(arizona->regmap,
  163. ARIZONA_INTERRUPT_RAW_STATUS_5, &reg);
  164. if (ret != 0) {
  165. dev_err(arizona->dev, "Failed to read boot state: %d\n",
  166. ret);
  167. continue;
  168. }
  169. if (reg & ARIZONA_BOOT_DONE_STS)
  170. break;
  171. }
  172. if (reg & ARIZONA_BOOT_DONE_STS) {
  173. regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
  174. ARIZONA_BOOT_DONE_STS);
  175. } else {
  176. dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
  177. return -ETIMEDOUT;
  178. }
  179. pm_runtime_mark_last_busy(arizona->dev);
  180. return 0;
  181. }
  182. #ifdef CONFIG_PM_RUNTIME
  183. static int arizona_runtime_resume(struct device *dev)
  184. {
  185. struct arizona *arizona = dev_get_drvdata(dev);
  186. int ret;
  187. dev_dbg(arizona->dev, "Leaving AoD mode\n");
  188. ret = regulator_enable(arizona->dcvdd);
  189. if (ret != 0) {
  190. dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
  191. return ret;
  192. }
  193. regcache_cache_only(arizona->regmap, false);
  194. ret = arizona_wait_for_boot(arizona);
  195. if (ret != 0) {
  196. regulator_disable(arizona->dcvdd);
  197. return ret;
  198. }
  199. ret = regcache_sync(arizona->regmap);
  200. if (ret != 0) {
  201. dev_err(arizona->dev, "Failed to restore register cache\n");
  202. regulator_disable(arizona->dcvdd);
  203. return ret;
  204. }
  205. return 0;
  206. }
  207. static int arizona_runtime_suspend(struct device *dev)
  208. {
  209. struct arizona *arizona = dev_get_drvdata(dev);
  210. dev_dbg(arizona->dev, "Entering AoD mode\n");
  211. regulator_disable(arizona->dcvdd);
  212. regcache_cache_only(arizona->regmap, true);
  213. regcache_mark_dirty(arizona->regmap);
  214. return 0;
  215. }
  216. #endif
  217. const struct dev_pm_ops arizona_pm_ops = {
  218. SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
  219. arizona_runtime_resume,
  220. NULL)
  221. };
  222. EXPORT_SYMBOL_GPL(arizona_pm_ops);
  223. static struct mfd_cell early_devs[] = {
  224. { .name = "arizona-ldo1" },
  225. };
  226. static struct mfd_cell wm5102_devs[] = {
  227. { .name = "arizona-extcon" },
  228. { .name = "arizona-gpio" },
  229. { .name = "arizona-haptics" },
  230. { .name = "arizona-micsupp" },
  231. { .name = "arizona-pwm" },
  232. { .name = "wm5102-codec" },
  233. };
  234. static struct mfd_cell wm5110_devs[] = {
  235. { .name = "arizona-extcon" },
  236. { .name = "arizona-gpio" },
  237. { .name = "arizona-haptics" },
  238. { .name = "arizona-micsupp" },
  239. { .name = "arizona-pwm" },
  240. { .name = "wm5110-codec" },
  241. };
  242. int arizona_dev_init(struct arizona *arizona)
  243. {
  244. struct device *dev = arizona->dev;
  245. const char *type_name;
  246. unsigned int reg, val;
  247. int (*apply_patch)(struct arizona *) = NULL;
  248. int ret, i;
  249. dev_set_drvdata(arizona->dev, arizona);
  250. mutex_init(&arizona->clk_lock);
  251. if (dev_get_platdata(arizona->dev))
  252. memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
  253. sizeof(arizona->pdata));
  254. regcache_cache_only(arizona->regmap, true);
  255. switch (arizona->type) {
  256. case WM5102:
  257. case WM5110:
  258. for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
  259. arizona->core_supplies[i].supply
  260. = wm5102_core_supplies[i];
  261. arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
  262. break;
  263. default:
  264. dev_err(arizona->dev, "Unknown device type %d\n",
  265. arizona->type);
  266. return -EINVAL;
  267. }
  268. ret = mfd_add_devices(arizona->dev, -1, early_devs,
  269. ARRAY_SIZE(early_devs), NULL, 0, NULL);
  270. if (ret != 0) {
  271. dev_err(dev, "Failed to add early children: %d\n", ret);
  272. return ret;
  273. }
  274. ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
  275. arizona->core_supplies);
  276. if (ret != 0) {
  277. dev_err(dev, "Failed to request core supplies: %d\n",
  278. ret);
  279. goto err_early;
  280. }
  281. arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
  282. if (IS_ERR(arizona->dcvdd)) {
  283. ret = PTR_ERR(arizona->dcvdd);
  284. dev_err(dev, "Failed to request DCVDD: %d\n", ret);
  285. goto err_early;
  286. }
  287. ret = regulator_bulk_enable(arizona->num_core_supplies,
  288. arizona->core_supplies);
  289. if (ret != 0) {
  290. dev_err(dev, "Failed to enable core supplies: %d\n",
  291. ret);
  292. goto err_early;
  293. }
  294. ret = regulator_enable(arizona->dcvdd);
  295. if (ret != 0) {
  296. dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
  297. goto err_enable;
  298. }
  299. if (arizona->pdata.reset) {
  300. /* Start out with /RESET low to put the chip into reset */
  301. ret = gpio_request_one(arizona->pdata.reset,
  302. GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  303. "arizona /RESET");
  304. if (ret != 0) {
  305. dev_err(dev, "Failed to request /RESET: %d\n", ret);
  306. goto err_dcvdd;
  307. }
  308. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  309. }
  310. regcache_cache_only(arizona->regmap, false);
  311. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  312. if (ret != 0) {
  313. dev_err(dev, "Failed to read ID register: %d\n", ret);
  314. goto err_reset;
  315. }
  316. ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
  317. &arizona->rev);
  318. if (ret != 0) {
  319. dev_err(dev, "Failed to read revision register: %d\n", ret);
  320. goto err_reset;
  321. }
  322. arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
  323. switch (reg) {
  324. #ifdef CONFIG_MFD_WM5102
  325. case 0x5102:
  326. type_name = "WM5102";
  327. if (arizona->type != WM5102) {
  328. dev_err(arizona->dev, "WM5102 registered as %d\n",
  329. arizona->type);
  330. arizona->type = WM5102;
  331. }
  332. apply_patch = wm5102_patch;
  333. break;
  334. #endif
  335. #ifdef CONFIG_MFD_WM5110
  336. case 0x5110:
  337. type_name = "WM5110";
  338. if (arizona->type != WM5110) {
  339. dev_err(arizona->dev, "WM5110 registered as %d\n",
  340. arizona->type);
  341. arizona->type = WM5110;
  342. }
  343. apply_patch = wm5110_patch;
  344. break;
  345. #endif
  346. default:
  347. dev_err(arizona->dev, "Unknown device ID %x\n", reg);
  348. goto err_reset;
  349. }
  350. dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
  351. /* If we have a /RESET GPIO we'll already be reset */
  352. if (!arizona->pdata.reset) {
  353. regcache_mark_dirty(arizona->regmap);
  354. ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
  355. if (ret != 0) {
  356. dev_err(dev, "Failed to reset device: %d\n", ret);
  357. goto err_reset;
  358. }
  359. ret = regcache_sync(arizona->regmap);
  360. if (ret != 0) {
  361. dev_err(dev, "Failed to sync device: %d\n", ret);
  362. goto err_reset;
  363. }
  364. }
  365. ret = arizona_wait_for_boot(arizona);
  366. if (ret != 0) {
  367. dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
  368. goto err_reset;
  369. }
  370. if (apply_patch) {
  371. ret = apply_patch(arizona);
  372. if (ret != 0) {
  373. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  374. ret);
  375. goto err_reset;
  376. }
  377. }
  378. for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
  379. if (!arizona->pdata.gpio_defaults[i])
  380. continue;
  381. regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
  382. arizona->pdata.gpio_defaults[i]);
  383. }
  384. pm_runtime_set_autosuspend_delay(arizona->dev, 100);
  385. pm_runtime_use_autosuspend(arizona->dev);
  386. pm_runtime_enable(arizona->dev);
  387. /* Chip default */
  388. if (!arizona->pdata.clk32k_src)
  389. arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
  390. switch (arizona->pdata.clk32k_src) {
  391. case ARIZONA_32KZ_MCLK1:
  392. case ARIZONA_32KZ_MCLK2:
  393. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  394. ARIZONA_CLK_32K_SRC_MASK,
  395. arizona->pdata.clk32k_src - 1);
  396. break;
  397. case ARIZONA_32KZ_NONE:
  398. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  399. ARIZONA_CLK_32K_SRC_MASK, 2);
  400. break;
  401. default:
  402. dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
  403. arizona->pdata.clk32k_src);
  404. ret = -EINVAL;
  405. goto err_reset;
  406. }
  407. for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
  408. /* Default for both is 0 so noop with defaults */
  409. val = arizona->pdata.dmic_ref[i]
  410. << ARIZONA_IN1_DMIC_SUP_SHIFT;
  411. val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
  412. regmap_update_bits(arizona->regmap,
  413. ARIZONA_IN1L_CONTROL + (i * 8),
  414. ARIZONA_IN1_DMIC_SUP_MASK |
  415. ARIZONA_IN1_MODE_MASK, val);
  416. }
  417. for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
  418. /* Default is 0 so noop with defaults */
  419. if (arizona->pdata.out_mono[i])
  420. val = ARIZONA_OUT1_MONO;
  421. else
  422. val = 0;
  423. regmap_update_bits(arizona->regmap,
  424. ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
  425. ARIZONA_OUT1_MONO, val);
  426. }
  427. for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
  428. if (arizona->pdata.spk_mute[i])
  429. regmap_update_bits(arizona->regmap,
  430. ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
  431. ARIZONA_SPK1_MUTE_ENDIAN_MASK |
  432. ARIZONA_SPK1_MUTE_SEQ1_MASK,
  433. arizona->pdata.spk_mute[i]);
  434. if (arizona->pdata.spk_fmt[i])
  435. regmap_update_bits(arizona->regmap,
  436. ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
  437. ARIZONA_SPK1_FMT_MASK,
  438. arizona->pdata.spk_fmt[i]);
  439. }
  440. /* Set up for interrupts */
  441. ret = arizona_irq_init(arizona);
  442. if (ret != 0)
  443. goto err_reset;
  444. arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
  445. arizona_clkgen_err, arizona);
  446. arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
  447. arizona_overclocked, arizona);
  448. arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
  449. arizona_underclocked, arizona);
  450. switch (arizona->type) {
  451. case WM5102:
  452. ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
  453. ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
  454. break;
  455. case WM5110:
  456. ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
  457. ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
  458. break;
  459. }
  460. if (ret != 0) {
  461. dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
  462. goto err_irq;
  463. }
  464. #ifdef CONFIG_PM_RUNTIME
  465. regulator_disable(arizona->dcvdd);
  466. #endif
  467. return 0;
  468. err_irq:
  469. arizona_irq_exit(arizona);
  470. err_reset:
  471. if (arizona->pdata.reset) {
  472. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  473. gpio_free(arizona->pdata.reset);
  474. }
  475. err_dcvdd:
  476. regulator_disable(arizona->dcvdd);
  477. err_enable:
  478. regulator_bulk_disable(arizona->num_core_supplies,
  479. arizona->core_supplies);
  480. err_early:
  481. mfd_remove_devices(dev);
  482. return ret;
  483. }
  484. EXPORT_SYMBOL_GPL(arizona_dev_init);
  485. int arizona_dev_exit(struct arizona *arizona)
  486. {
  487. mfd_remove_devices(arizona->dev);
  488. arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
  489. arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
  490. arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
  491. pm_runtime_disable(arizona->dev);
  492. arizona_irq_exit(arizona);
  493. return 0;
  494. }
  495. EXPORT_SYMBOL_GPL(arizona_dev_exit);