nouveau_drm.c 18 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include "nouveau_drm.h"
  34. #include "nouveau_irq.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_pm.h"
  41. #include "nouveau_acpi.h"
  42. #include "nouveau_bios.h"
  43. #include "nouveau_ioctl.h"
  44. #include "nouveau_abi16.h"
  45. #include "nouveau_fbcon.h"
  46. #include "nouveau_fence.h"
  47. MODULE_PARM_DESC(config, "option string to pass to driver core");
  48. static char *nouveau_config;
  49. module_param_named(config, nouveau_config, charp, 0400);
  50. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  51. static char *nouveau_debug;
  52. module_param_named(debug, nouveau_debug, charp, 0400);
  53. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  54. static int nouveau_noaccel = 0;
  55. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  56. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  57. "0 = disabled, 1 = enabled, 2 = headless)");
  58. int nouveau_modeset = -1;
  59. module_param_named(modeset, nouveau_modeset, int, 0400);
  60. static struct drm_driver driver;
  61. static u64
  62. nouveau_name(struct pci_dev *pdev)
  63. {
  64. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  65. name |= pdev->bus->number << 16;
  66. name |= PCI_SLOT(pdev->devfn) << 8;
  67. return name | PCI_FUNC(pdev->devfn);
  68. }
  69. static int
  70. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  71. int size, void **pcli)
  72. {
  73. struct nouveau_cli *cli;
  74. int ret;
  75. *pcli = NULL;
  76. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  77. nouveau_debug, size, pcli);
  78. cli = *pcli;
  79. if (ret) {
  80. if (cli)
  81. nouveau_client_destroy(&cli->base);
  82. *pcli = NULL;
  83. return ret;
  84. }
  85. mutex_init(&cli->mutex);
  86. return 0;
  87. }
  88. static void
  89. nouveau_cli_destroy(struct nouveau_cli *cli)
  90. {
  91. struct nouveau_object *client = nv_object(cli);
  92. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  93. nouveau_client_fini(&cli->base, false);
  94. atomic_set(&client->refcount, 1);
  95. nouveau_object_ref(NULL, &client);
  96. }
  97. static void
  98. nouveau_accel_fini(struct nouveau_drm *drm)
  99. {
  100. nouveau_gpuobj_ref(NULL, &drm->notify);
  101. nouveau_channel_del(&drm->channel);
  102. nouveau_channel_del(&drm->cechan);
  103. if (drm->fence)
  104. nouveau_fence(drm)->dtor(drm);
  105. }
  106. static void
  107. nouveau_accel_init(struct nouveau_drm *drm)
  108. {
  109. struct nouveau_device *device = nv_device(drm->device);
  110. struct nouveau_object *object;
  111. u32 arg0, arg1;
  112. int ret;
  113. if (nouveau_noaccel)
  114. return;
  115. /* initialise synchronisation routines */
  116. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  117. else if (device->card_type < NV_50) ret = nv10_fence_create(drm);
  118. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  119. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  120. else ret = nvc0_fence_create(drm);
  121. if (ret) {
  122. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  123. nouveau_accel_fini(drm);
  124. return;
  125. }
  126. if (device->card_type >= NV_E0) {
  127. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  128. NVDRM_CHAN + 1,
  129. NVE0_CHANNEL_IND_ENGINE_CE0 |
  130. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  131. &drm->cechan);
  132. if (ret)
  133. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  134. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  135. arg1 = 1;
  136. } else {
  137. arg0 = NvDmaFB;
  138. arg1 = NvDmaTT;
  139. }
  140. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  141. arg0, arg1, &drm->channel);
  142. if (ret) {
  143. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  144. nouveau_accel_fini(drm);
  145. return;
  146. }
  147. if (device->card_type < NV_C0) {
  148. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  149. &drm->notify);
  150. if (ret) {
  151. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  152. nouveau_accel_fini(drm);
  153. return;
  154. }
  155. ret = nouveau_object_new(nv_object(drm),
  156. drm->channel->handle, NvNotify0,
  157. 0x003d, &(struct nv_dma_class) {
  158. .flags = NV_DMA_TARGET_VRAM |
  159. NV_DMA_ACCESS_RDWR,
  160. .start = drm->notify->addr,
  161. .limit = drm->notify->addr + 31
  162. }, sizeof(struct nv_dma_class),
  163. &object);
  164. if (ret) {
  165. nouveau_accel_fini(drm);
  166. return;
  167. }
  168. }
  169. nouveau_bo_move_init(drm);
  170. }
  171. static int nouveau_drm_probe(struct pci_dev *pdev,
  172. const struct pci_device_id *pent)
  173. {
  174. struct nouveau_device *device;
  175. struct apertures_struct *aper;
  176. bool boot = false;
  177. int ret;
  178. /* remove conflicting drivers (vesafb, efifb etc) */
  179. aper = alloc_apertures(3);
  180. if (!aper)
  181. return -ENOMEM;
  182. aper->ranges[0].base = pci_resource_start(pdev, 1);
  183. aper->ranges[0].size = pci_resource_len(pdev, 1);
  184. aper->count = 1;
  185. if (pci_resource_len(pdev, 2)) {
  186. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  187. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  188. aper->count++;
  189. }
  190. if (pci_resource_len(pdev, 3)) {
  191. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  192. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  193. aper->count++;
  194. }
  195. #ifdef CONFIG_X86
  196. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  197. #endif
  198. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  199. kfree(aper);
  200. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  201. nouveau_config, nouveau_debug, &device);
  202. if (ret)
  203. return ret;
  204. pci_set_master(pdev);
  205. ret = drm_get_pci_dev(pdev, pent, &driver);
  206. if (ret) {
  207. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  208. return ret;
  209. }
  210. return 0;
  211. }
  212. static int
  213. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  214. {
  215. struct pci_dev *pdev = dev->pdev;
  216. struct nouveau_device *device;
  217. struct nouveau_drm *drm;
  218. int ret;
  219. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  220. if (ret)
  221. return ret;
  222. dev->dev_private = drm;
  223. drm->dev = dev;
  224. INIT_LIST_HEAD(&drm->clients);
  225. spin_lock_init(&drm->tile.lock);
  226. /* make sure AGP controller is in a consistent state before we
  227. * (possibly) execute vbios init tables (see nouveau_agp.h)
  228. */
  229. if (drm_pci_device_is_agp(dev) && dev->agp) {
  230. /* dummy device object, doesn't init anything, but allows
  231. * agp code access to registers
  232. */
  233. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  234. NVDRM_DEVICE, 0x0080,
  235. &(struct nv_device_class) {
  236. .device = ~0,
  237. .disable =
  238. ~(NV_DEVICE_DISABLE_MMIO |
  239. NV_DEVICE_DISABLE_IDENTIFY),
  240. .debug0 = ~0,
  241. }, sizeof(struct nv_device_class),
  242. &drm->device);
  243. if (ret)
  244. goto fail_device;
  245. nouveau_agp_reset(drm);
  246. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  247. }
  248. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  249. 0x0080, &(struct nv_device_class) {
  250. .device = ~0,
  251. .disable = 0,
  252. .debug0 = 0,
  253. }, sizeof(struct nv_device_class),
  254. &drm->device);
  255. if (ret)
  256. goto fail_device;
  257. /* workaround an odd issue on nvc1 by disabling the device's
  258. * nosnoop capability. hopefully won't cause issues until a
  259. * better fix is found - assuming there is one...
  260. */
  261. device = nv_device(drm->device);
  262. if (nv_device(drm->device)->chipset == 0xc1)
  263. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  264. nouveau_vga_init(drm);
  265. nouveau_agp_init(drm);
  266. if (device->card_type >= NV_50) {
  267. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  268. 0x1000, &drm->client.base.vm);
  269. if (ret)
  270. goto fail_device;
  271. }
  272. ret = nouveau_ttm_init(drm);
  273. if (ret)
  274. goto fail_ttm;
  275. ret = nouveau_bios_init(dev);
  276. if (ret)
  277. goto fail_bios;
  278. ret = nouveau_irq_init(dev);
  279. if (ret)
  280. goto fail_irq;
  281. ret = nouveau_display_create(dev);
  282. if (ret)
  283. goto fail_dispctor;
  284. if (dev->mode_config.num_crtc) {
  285. ret = nouveau_display_init(dev);
  286. if (ret)
  287. goto fail_dispinit;
  288. }
  289. nouveau_pm_init(dev);
  290. nouveau_accel_init(drm);
  291. nouveau_fbcon_init(dev);
  292. return 0;
  293. fail_dispinit:
  294. nouveau_display_destroy(dev);
  295. fail_dispctor:
  296. nouveau_irq_fini(dev);
  297. fail_irq:
  298. nouveau_bios_takedown(dev);
  299. fail_bios:
  300. nouveau_ttm_fini(drm);
  301. fail_ttm:
  302. nouveau_agp_fini(drm);
  303. nouveau_vga_fini(drm);
  304. fail_device:
  305. nouveau_cli_destroy(&drm->client);
  306. return ret;
  307. }
  308. static int
  309. nouveau_drm_unload(struct drm_device *dev)
  310. {
  311. struct nouveau_drm *drm = nouveau_drm(dev);
  312. nouveau_fbcon_fini(dev);
  313. nouveau_accel_fini(drm);
  314. nouveau_pm_fini(dev);
  315. if (dev->mode_config.num_crtc)
  316. nouveau_display_fini(dev);
  317. nouveau_display_destroy(dev);
  318. nouveau_irq_fini(dev);
  319. nouveau_bios_takedown(dev);
  320. nouveau_ttm_fini(drm);
  321. nouveau_agp_fini(drm);
  322. nouveau_vga_fini(drm);
  323. nouveau_cli_destroy(&drm->client);
  324. return 0;
  325. }
  326. static void
  327. nouveau_drm_remove(struct pci_dev *pdev)
  328. {
  329. struct drm_device *dev = pci_get_drvdata(pdev);
  330. struct nouveau_drm *drm = nouveau_drm(dev);
  331. struct nouveau_object *device;
  332. device = drm->client.base.device;
  333. drm_put_dev(dev);
  334. nouveau_object_ref(NULL, &device);
  335. nouveau_object_debug();
  336. }
  337. int
  338. nouveau_do_suspend(struct drm_device *dev)
  339. {
  340. struct nouveau_drm *drm = nouveau_drm(dev);
  341. struct nouveau_cli *cli;
  342. int ret;
  343. if (dev->mode_config.num_crtc) {
  344. NV_INFO(drm, "suspending fbcon...\n");
  345. nouveau_fbcon_set_suspend(dev, 1);
  346. NV_INFO(drm, "suspending display...\n");
  347. ret = nouveau_display_suspend(dev);
  348. if (ret)
  349. return ret;
  350. }
  351. NV_INFO(drm, "evicting buffers...\n");
  352. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  353. if (drm->fence && nouveau_fence(drm)->suspend) {
  354. if (!nouveau_fence(drm)->suspend(drm))
  355. return -ENOMEM;
  356. }
  357. NV_INFO(drm, "suspending client object trees...\n");
  358. list_for_each_entry(cli, &drm->clients, head) {
  359. ret = nouveau_client_fini(&cli->base, true);
  360. if (ret)
  361. goto fail_client;
  362. }
  363. ret = nouveau_client_fini(&drm->client.base, true);
  364. if (ret)
  365. goto fail_client;
  366. nouveau_agp_fini(drm);
  367. return 0;
  368. fail_client:
  369. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  370. nouveau_client_init(&cli->base);
  371. }
  372. if (dev->mode_config.num_crtc) {
  373. NV_INFO(drm, "resuming display...\n");
  374. nouveau_display_resume(dev);
  375. }
  376. return ret;
  377. }
  378. int nouveau_pmops_suspend(struct device *dev)
  379. {
  380. struct pci_dev *pdev = to_pci_dev(dev);
  381. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  382. int ret;
  383. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  384. return 0;
  385. ret = nouveau_do_suspend(drm_dev);
  386. if (ret)
  387. return ret;
  388. pci_save_state(pdev);
  389. pci_disable_device(pdev);
  390. pci_set_power_state(pdev, PCI_D3hot);
  391. return 0;
  392. }
  393. int
  394. nouveau_do_resume(struct drm_device *dev)
  395. {
  396. struct nouveau_drm *drm = nouveau_drm(dev);
  397. struct nouveau_cli *cli;
  398. NV_INFO(drm, "re-enabling device...\n");
  399. nouveau_agp_reset(drm);
  400. NV_INFO(drm, "resuming client object trees...\n");
  401. nouveau_client_init(&drm->client.base);
  402. nouveau_agp_init(drm);
  403. list_for_each_entry(cli, &drm->clients, head) {
  404. nouveau_client_init(&cli->base);
  405. }
  406. if (drm->fence && nouveau_fence(drm)->resume)
  407. nouveau_fence(drm)->resume(drm);
  408. nouveau_run_vbios_init(dev);
  409. nouveau_irq_postinstall(dev);
  410. nouveau_pm_resume(dev);
  411. if (dev->mode_config.num_crtc) {
  412. NV_INFO(drm, "resuming display...\n");
  413. nouveau_display_resume(dev);
  414. }
  415. return 0;
  416. }
  417. int nouveau_pmops_resume(struct device *dev)
  418. {
  419. struct pci_dev *pdev = to_pci_dev(dev);
  420. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  421. int ret;
  422. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  423. return 0;
  424. pci_set_power_state(pdev, PCI_D0);
  425. pci_restore_state(pdev);
  426. ret = pci_enable_device(pdev);
  427. if (ret)
  428. return ret;
  429. pci_set_master(pdev);
  430. return nouveau_do_resume(drm_dev);
  431. }
  432. static int nouveau_pmops_freeze(struct device *dev)
  433. {
  434. struct pci_dev *pdev = to_pci_dev(dev);
  435. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  436. return nouveau_do_suspend(drm_dev);
  437. }
  438. static int nouveau_pmops_thaw(struct device *dev)
  439. {
  440. struct pci_dev *pdev = to_pci_dev(dev);
  441. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  442. return nouveau_do_resume(drm_dev);
  443. }
  444. static int
  445. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  446. {
  447. struct pci_dev *pdev = dev->pdev;
  448. struct nouveau_drm *drm = nouveau_drm(dev);
  449. struct nouveau_cli *cli;
  450. char name[16];
  451. int ret;
  452. snprintf(name, sizeof(name), "%d", pid_nr(fpriv->pid));
  453. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  454. if (ret)
  455. return ret;
  456. if (nv_device(drm->device)->card_type >= NV_50) {
  457. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  458. 0x1000, &cli->base.vm);
  459. if (ret) {
  460. nouveau_cli_destroy(cli);
  461. return ret;
  462. }
  463. }
  464. fpriv->driver_priv = cli;
  465. mutex_lock(&drm->client.mutex);
  466. list_add(&cli->head, &drm->clients);
  467. mutex_unlock(&drm->client.mutex);
  468. return 0;
  469. }
  470. static void
  471. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  472. {
  473. struct nouveau_cli *cli = nouveau_cli(fpriv);
  474. struct nouveau_drm *drm = nouveau_drm(dev);
  475. if (cli->abi16)
  476. nouveau_abi16_fini(cli->abi16);
  477. mutex_lock(&drm->client.mutex);
  478. list_del(&cli->head);
  479. mutex_unlock(&drm->client.mutex);
  480. }
  481. static void
  482. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  483. {
  484. struct nouveau_cli *cli = nouveau_cli(fpriv);
  485. nouveau_cli_destroy(cli);
  486. }
  487. static struct drm_ioctl_desc
  488. nouveau_ioctls[] = {
  489. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  490. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  491. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  492. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  493. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  494. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  495. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  496. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  497. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  498. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  499. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  500. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  501. };
  502. static const struct file_operations
  503. nouveau_driver_fops = {
  504. .owner = THIS_MODULE,
  505. .open = drm_open,
  506. .release = drm_release,
  507. .unlocked_ioctl = drm_ioctl,
  508. .mmap = nouveau_ttm_mmap,
  509. .poll = drm_poll,
  510. .fasync = drm_fasync,
  511. .read = drm_read,
  512. #if defined(CONFIG_COMPAT)
  513. .compat_ioctl = nouveau_compat_ioctl,
  514. #endif
  515. .llseek = noop_llseek,
  516. };
  517. static struct drm_driver
  518. driver = {
  519. .driver_features =
  520. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  521. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  522. DRIVER_MODESET | DRIVER_PRIME,
  523. .load = nouveau_drm_load,
  524. .unload = nouveau_drm_unload,
  525. .open = nouveau_drm_open,
  526. .preclose = nouveau_drm_preclose,
  527. .postclose = nouveau_drm_postclose,
  528. .lastclose = nouveau_vga_lastclose,
  529. .irq_preinstall = nouveau_irq_preinstall,
  530. .irq_postinstall = nouveau_irq_postinstall,
  531. .irq_uninstall = nouveau_irq_uninstall,
  532. .irq_handler = nouveau_irq_handler,
  533. .get_vblank_counter = drm_vblank_count,
  534. .enable_vblank = nouveau_vblank_enable,
  535. .disable_vblank = nouveau_vblank_disable,
  536. .ioctls = nouveau_ioctls,
  537. .fops = &nouveau_driver_fops,
  538. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  539. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  540. .gem_prime_export = nouveau_gem_prime_export,
  541. .gem_prime_import = nouveau_gem_prime_import,
  542. .gem_init_object = nouveau_gem_object_new,
  543. .gem_free_object = nouveau_gem_object_del,
  544. .gem_open_object = nouveau_gem_object_open,
  545. .gem_close_object = nouveau_gem_object_close,
  546. .dumb_create = nouveau_display_dumb_create,
  547. .dumb_map_offset = nouveau_display_dumb_map_offset,
  548. .dumb_destroy = nouveau_display_dumb_destroy,
  549. .name = DRIVER_NAME,
  550. .desc = DRIVER_DESC,
  551. #ifdef GIT_REVISION
  552. .date = GIT_REVISION,
  553. #else
  554. .date = DRIVER_DATE,
  555. #endif
  556. .major = DRIVER_MAJOR,
  557. .minor = DRIVER_MINOR,
  558. .patchlevel = DRIVER_PATCHLEVEL,
  559. };
  560. static struct pci_device_id
  561. nouveau_drm_pci_table[] = {
  562. {
  563. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  564. .class = PCI_BASE_CLASS_DISPLAY << 16,
  565. .class_mask = 0xff << 16,
  566. },
  567. {
  568. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  569. .class = PCI_BASE_CLASS_DISPLAY << 16,
  570. .class_mask = 0xff << 16,
  571. },
  572. {}
  573. };
  574. static const struct dev_pm_ops nouveau_pm_ops = {
  575. .suspend = nouveau_pmops_suspend,
  576. .resume = nouveau_pmops_resume,
  577. .freeze = nouveau_pmops_freeze,
  578. .thaw = nouveau_pmops_thaw,
  579. .poweroff = nouveau_pmops_freeze,
  580. .restore = nouveau_pmops_resume,
  581. };
  582. static struct pci_driver
  583. nouveau_drm_pci_driver = {
  584. .name = "nouveau",
  585. .id_table = nouveau_drm_pci_table,
  586. .probe = nouveau_drm_probe,
  587. .remove = nouveau_drm_remove,
  588. .driver.pm = &nouveau_pm_ops,
  589. };
  590. static int __init
  591. nouveau_drm_init(void)
  592. {
  593. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  594. if (nouveau_modeset == -1) {
  595. #ifdef CONFIG_VGA_CONSOLE
  596. if (vgacon_text_force())
  597. nouveau_modeset = 0;
  598. #endif
  599. }
  600. if (!nouveau_modeset)
  601. return 0;
  602. nouveau_register_dsm_handler();
  603. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  604. }
  605. static void __exit
  606. nouveau_drm_exit(void)
  607. {
  608. if (!nouveau_modeset)
  609. return;
  610. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  611. nouveau_unregister_dsm_handler();
  612. }
  613. module_init(nouveau_drm_init);
  614. module_exit(nouveau_drm_exit);
  615. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  616. MODULE_AUTHOR(DRIVER_AUTHOR);
  617. MODULE_DESCRIPTION(DRIVER_DESC);
  618. MODULE_LICENSE("GPL and additional rights");