nouveau_display.c 20 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include "nouveau_fbcon.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_crtc.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_gem.h"
  33. #include "nouveau_connector.h"
  34. #include "nv50_display.h"
  35. #include "nouveau_fence.h"
  36. #include <subdev/bios/gpio.h>
  37. #include <subdev/gpio.h>
  38. #include <engine/disp.h>
  39. static void
  40. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  41. {
  42. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  43. if (fb->nvbo)
  44. drm_gem_object_unreference_unlocked(fb->nvbo->gem);
  45. drm_framebuffer_cleanup(drm_fb);
  46. kfree(fb);
  47. }
  48. static int
  49. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  50. struct drm_file *file_priv,
  51. unsigned int *handle)
  52. {
  53. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  54. return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
  55. }
  56. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  57. .destroy = nouveau_user_framebuffer_destroy,
  58. .create_handle = nouveau_user_framebuffer_create_handle,
  59. };
  60. int
  61. nouveau_framebuffer_init(struct drm_device *dev,
  62. struct nouveau_framebuffer *nv_fb,
  63. struct drm_mode_fb_cmd2 *mode_cmd,
  64. struct nouveau_bo *nvbo)
  65. {
  66. struct nouveau_drm *drm = nouveau_drm(dev);
  67. struct drm_framebuffer *fb = &nv_fb->base;
  68. int ret;
  69. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  70. if (ret) {
  71. return ret;
  72. }
  73. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  74. nv_fb->nvbo = nvbo;
  75. if (nv_device(drm->device)->card_type >= NV_50) {
  76. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  77. if (tile_flags == 0x7a00 ||
  78. tile_flags == 0xfe00)
  79. nv_fb->r_dma = NvEvoFB32;
  80. else
  81. if (tile_flags == 0x7000)
  82. nv_fb->r_dma = NvEvoFB16;
  83. else
  84. nv_fb->r_dma = NvEvoVRAM_LP;
  85. switch (fb->depth) {
  86. case 8: nv_fb->r_format = 0x1e00; break;
  87. case 15: nv_fb->r_format = 0xe900; break;
  88. case 16: nv_fb->r_format = 0xe800; break;
  89. case 24:
  90. case 32: nv_fb->r_format = 0xcf00; break;
  91. case 30: nv_fb->r_format = 0xd100; break;
  92. default:
  93. NV_ERROR(drm, "unknown depth %d\n", fb->depth);
  94. return -EINVAL;
  95. }
  96. if (nv_device(drm->device)->chipset == 0x50)
  97. nv_fb->r_format |= (tile_flags << 8);
  98. if (!tile_flags) {
  99. if (nv_device(drm->device)->card_type < NV_D0)
  100. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  101. else
  102. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  103. } else {
  104. u32 mode = nvbo->tile_mode;
  105. if (nv_device(drm->device)->card_type >= NV_C0)
  106. mode >>= 4;
  107. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  108. }
  109. }
  110. return 0;
  111. }
  112. static struct drm_framebuffer *
  113. nouveau_user_framebuffer_create(struct drm_device *dev,
  114. struct drm_file *file_priv,
  115. struct drm_mode_fb_cmd2 *mode_cmd)
  116. {
  117. struct nouveau_framebuffer *nouveau_fb;
  118. struct drm_gem_object *gem;
  119. int ret;
  120. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  121. if (!gem)
  122. return ERR_PTR(-ENOENT);
  123. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  124. if (!nouveau_fb)
  125. return ERR_PTR(-ENOMEM);
  126. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  127. if (ret) {
  128. drm_gem_object_unreference(gem);
  129. return ERR_PTR(ret);
  130. }
  131. return &nouveau_fb->base;
  132. }
  133. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  134. .fb_create = nouveau_user_framebuffer_create,
  135. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  136. };
  137. struct nouveau_drm_prop_enum_list {
  138. u8 gen_mask;
  139. int type;
  140. char *name;
  141. };
  142. static struct nouveau_drm_prop_enum_list underscan[] = {
  143. { 6, UNDERSCAN_AUTO, "auto" },
  144. { 6, UNDERSCAN_OFF, "off" },
  145. { 6, UNDERSCAN_ON, "on" },
  146. {}
  147. };
  148. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  149. { 7, DITHERING_MODE_AUTO, "auto" },
  150. { 7, DITHERING_MODE_OFF, "off" },
  151. { 1, DITHERING_MODE_ON, "on" },
  152. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  153. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  154. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  155. {}
  156. };
  157. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  158. { 6, DITHERING_DEPTH_AUTO, "auto" },
  159. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  160. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  161. {}
  162. };
  163. #define PROP_ENUM(p,gen,n,list) do { \
  164. struct nouveau_drm_prop_enum_list *l = (list); \
  165. int c = 0; \
  166. while (l->gen_mask) { \
  167. if (l->gen_mask & (1 << (gen))) \
  168. c++; \
  169. l++; \
  170. } \
  171. if (c) { \
  172. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  173. l = (list); \
  174. c = 0; \
  175. while (p && l->gen_mask) { \
  176. if (l->gen_mask & (1 << (gen))) { \
  177. drm_property_add_enum(p, c, l->type, l->name); \
  178. c++; \
  179. } \
  180. l++; \
  181. } \
  182. } \
  183. } while(0)
  184. int
  185. nouveau_display_init(struct drm_device *dev)
  186. {
  187. struct nouveau_drm *drm = nouveau_drm(dev);
  188. struct nouveau_display *disp = nouveau_display(dev);
  189. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  190. struct drm_connector *connector;
  191. int ret;
  192. ret = disp->init(dev);
  193. if (ret)
  194. return ret;
  195. /* enable polling for external displays */
  196. drm_kms_helper_poll_enable(dev);
  197. /* enable hotplug interrupts */
  198. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  199. struct nouveau_connector *conn = nouveau_connector(connector);
  200. if (gpio)
  201. gpio->irq(gpio, 0, conn->hpd, 0xff, true);
  202. }
  203. return ret;
  204. }
  205. void
  206. nouveau_display_fini(struct drm_device *dev)
  207. {
  208. struct nouveau_drm *drm = nouveau_drm(dev);
  209. struct nouveau_display *disp = nouveau_display(dev);
  210. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  211. struct drm_connector *connector;
  212. /* disable hotplug interrupts */
  213. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  214. struct nouveau_connector *conn = nouveau_connector(connector);
  215. if (gpio)
  216. gpio->irq(gpio, 0, conn->hpd, 0xff, false);
  217. }
  218. drm_kms_helper_poll_disable(dev);
  219. disp->fini(dev);
  220. }
  221. static void
  222. nouveau_display_vblank_notify(void *data, int crtc)
  223. {
  224. drm_handle_vblank(data, crtc);
  225. }
  226. static void
  227. nouveau_display_vblank_get(void *data, int crtc)
  228. {
  229. drm_vblank_get(data, crtc);
  230. }
  231. static void
  232. nouveau_display_vblank_put(void *data, int crtc)
  233. {
  234. drm_vblank_put(data, crtc);
  235. }
  236. int
  237. nouveau_display_create(struct drm_device *dev)
  238. {
  239. struct nouveau_drm *drm = nouveau_drm(dev);
  240. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  241. struct nouveau_display *disp;
  242. u32 pclass = dev->pdev->class >> 8;
  243. int ret, gen;
  244. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  245. if (!disp)
  246. return -ENOMEM;
  247. pdisp->vblank.data = dev;
  248. pdisp->vblank.notify = nouveau_display_vblank_notify;
  249. pdisp->vblank.get = nouveau_display_vblank_get;
  250. pdisp->vblank.put = nouveau_display_vblank_put;
  251. drm_mode_config_init(dev);
  252. drm_mode_create_scaling_mode_property(dev);
  253. drm_mode_create_dvi_i_properties(dev);
  254. if (nv_device(drm->device)->card_type < NV_50)
  255. gen = 0;
  256. else
  257. if (nv_device(drm->device)->card_type < NV_D0)
  258. gen = 1;
  259. else
  260. gen = 2;
  261. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  262. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  263. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  264. disp->underscan_hborder_property =
  265. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  266. disp->underscan_vborder_property =
  267. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  268. if (gen >= 1) {
  269. disp->vibrant_hue_property =
  270. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  271. "vibrant hue", 2);
  272. disp->vibrant_hue_property->values[0] = 0;
  273. disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */
  274. disp->color_vibrance_property =
  275. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  276. "color vibrance", 2);
  277. disp->color_vibrance_property->values[0] = 0;
  278. disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
  279. }
  280. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  281. dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  282. dev->mode_config.min_width = 0;
  283. dev->mode_config.min_height = 0;
  284. if (nv_device(drm->device)->card_type < NV_10) {
  285. dev->mode_config.max_width = 2048;
  286. dev->mode_config.max_height = 2048;
  287. } else
  288. if (nv_device(drm->device)->card_type < NV_50) {
  289. dev->mode_config.max_width = 4096;
  290. dev->mode_config.max_height = 4096;
  291. } else {
  292. dev->mode_config.max_width = 8192;
  293. dev->mode_config.max_height = 8192;
  294. }
  295. dev->mode_config.preferred_depth = 24;
  296. dev->mode_config.prefer_shadow = 1;
  297. drm_kms_helper_poll_init(dev);
  298. drm_kms_helper_poll_disable(dev);
  299. if (nouveau_modeset == 1 ||
  300. (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
  301. if (nv_device(drm->device)->card_type < NV_50)
  302. ret = nv04_display_create(dev);
  303. else
  304. ret = nv50_display_create(dev);
  305. if (ret)
  306. goto disp_create_err;
  307. if (dev->mode_config.num_crtc) {
  308. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  309. if (ret)
  310. goto vblank_err;
  311. }
  312. nouveau_backlight_init(dev);
  313. }
  314. return 0;
  315. vblank_err:
  316. disp->dtor(dev);
  317. disp_create_err:
  318. drm_kms_helper_poll_fini(dev);
  319. drm_mode_config_cleanup(dev);
  320. return ret;
  321. }
  322. void
  323. nouveau_display_destroy(struct drm_device *dev)
  324. {
  325. struct nouveau_display *disp = nouveau_display(dev);
  326. nouveau_backlight_exit(dev);
  327. drm_vblank_cleanup(dev);
  328. drm_kms_helper_poll_fini(dev);
  329. drm_mode_config_cleanup(dev);
  330. if (disp->dtor)
  331. disp->dtor(dev);
  332. nouveau_drm(dev)->display = NULL;
  333. kfree(disp);
  334. }
  335. int
  336. nouveau_display_suspend(struct drm_device *dev)
  337. {
  338. struct nouveau_drm *drm = nouveau_drm(dev);
  339. struct drm_crtc *crtc;
  340. nouveau_display_fini(dev);
  341. NV_INFO(drm, "unpinning framebuffer(s)...\n");
  342. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  343. struct nouveau_framebuffer *nouveau_fb;
  344. nouveau_fb = nouveau_framebuffer(crtc->fb);
  345. if (!nouveau_fb || !nouveau_fb->nvbo)
  346. continue;
  347. nouveau_bo_unpin(nouveau_fb->nvbo);
  348. }
  349. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  350. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  351. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  352. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  353. }
  354. return 0;
  355. }
  356. void
  357. nouveau_display_resume(struct drm_device *dev)
  358. {
  359. struct nouveau_drm *drm = nouveau_drm(dev);
  360. struct drm_crtc *crtc;
  361. int ret;
  362. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  363. struct nouveau_framebuffer *nouveau_fb;
  364. nouveau_fb = nouveau_framebuffer(crtc->fb);
  365. if (!nouveau_fb || !nouveau_fb->nvbo)
  366. continue;
  367. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  368. }
  369. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  370. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  371. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  372. if (!ret)
  373. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  374. if (ret)
  375. NV_ERROR(drm, "Could not pin/map cursor.\n");
  376. }
  377. nouveau_fbcon_set_suspend(dev, 0);
  378. nouveau_fbcon_zfill_all(dev);
  379. nouveau_display_init(dev);
  380. /* Force CLUT to get re-loaded during modeset */
  381. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  382. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  383. nv_crtc->lut.depth = 0;
  384. }
  385. drm_helper_resume_force_mode(dev);
  386. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  387. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  388. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  389. nv_crtc->cursor.set_offset(nv_crtc, offset);
  390. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  391. nv_crtc->cursor_saved_y);
  392. }
  393. }
  394. int
  395. nouveau_vblank_enable(struct drm_device *dev, int crtc)
  396. {
  397. struct nouveau_device *device = nouveau_dev(dev);
  398. if (device->card_type >= NV_D0)
  399. nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 1);
  400. else
  401. if (device->card_type >= NV_50)
  402. nv_mask(device, NV50_PDISPLAY_INTR_EN_1, 0,
  403. NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
  404. else
  405. NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
  406. NV_PCRTC_INTR_0_VBLANK);
  407. return 0;
  408. }
  409. void
  410. nouveau_vblank_disable(struct drm_device *dev, int crtc)
  411. {
  412. struct nouveau_device *device = nouveau_dev(dev);
  413. if (device->card_type >= NV_D0)
  414. nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 0);
  415. else
  416. if (device->card_type >= NV_50)
  417. nv_mask(device, NV50_PDISPLAY_INTR_EN_1,
  418. NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
  419. else
  420. NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
  421. }
  422. static int
  423. nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
  424. struct nouveau_bo *new_bo)
  425. {
  426. int ret;
  427. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  428. if (ret)
  429. return ret;
  430. ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
  431. if (ret)
  432. goto fail;
  433. if (likely(old_bo != new_bo)) {
  434. ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
  435. if (ret)
  436. goto fail_unreserve;
  437. }
  438. return 0;
  439. fail_unreserve:
  440. ttm_bo_unreserve(&new_bo->bo);
  441. fail:
  442. nouveau_bo_unpin(new_bo);
  443. return ret;
  444. }
  445. static void
  446. nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
  447. struct nouveau_bo *new_bo,
  448. struct nouveau_fence *fence)
  449. {
  450. nouveau_bo_fence(new_bo, fence);
  451. ttm_bo_unreserve(&new_bo->bo);
  452. if (likely(old_bo != new_bo)) {
  453. nouveau_bo_fence(old_bo, fence);
  454. ttm_bo_unreserve(&old_bo->bo);
  455. }
  456. nouveau_bo_unpin(old_bo);
  457. }
  458. static int
  459. nouveau_page_flip_emit(struct nouveau_channel *chan,
  460. struct nouveau_bo *old_bo,
  461. struct nouveau_bo *new_bo,
  462. struct nouveau_page_flip_state *s,
  463. struct nouveau_fence **pfence)
  464. {
  465. struct nouveau_fence_chan *fctx = chan->fence;
  466. struct nouveau_drm *drm = chan->drm;
  467. struct drm_device *dev = drm->dev;
  468. unsigned long flags;
  469. int ret;
  470. /* Queue it to the pending list */
  471. spin_lock_irqsave(&dev->event_lock, flags);
  472. list_add_tail(&s->head, &fctx->flip);
  473. spin_unlock_irqrestore(&dev->event_lock, flags);
  474. /* Synchronize with the old framebuffer */
  475. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  476. if (ret)
  477. goto fail;
  478. /* Emit the pageflip */
  479. ret = RING_SPACE(chan, 3);
  480. if (ret)
  481. goto fail;
  482. if (nv_device(drm->device)->card_type < NV_C0) {
  483. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  484. OUT_RING (chan, 0x00000000);
  485. OUT_RING (chan, 0x00000000);
  486. } else {
  487. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  488. OUT_RING (chan, 0);
  489. BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
  490. }
  491. FIRE_RING (chan);
  492. ret = nouveau_fence_new(chan, pfence);
  493. if (ret)
  494. goto fail;
  495. return 0;
  496. fail:
  497. spin_lock_irqsave(&dev->event_lock, flags);
  498. list_del(&s->head);
  499. spin_unlock_irqrestore(&dev->event_lock, flags);
  500. return ret;
  501. }
  502. int
  503. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  504. struct drm_pending_vblank_event *event)
  505. {
  506. struct drm_device *dev = crtc->dev;
  507. struct nouveau_drm *drm = nouveau_drm(dev);
  508. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
  509. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  510. struct nouveau_page_flip_state *s;
  511. struct nouveau_channel *chan = NULL;
  512. struct nouveau_fence *fence;
  513. int ret;
  514. if (!drm->channel)
  515. return -ENODEV;
  516. s = kzalloc(sizeof(*s), GFP_KERNEL);
  517. if (!s)
  518. return -ENOMEM;
  519. /* Don't let the buffers go away while we flip */
  520. ret = nouveau_page_flip_reserve(old_bo, new_bo);
  521. if (ret)
  522. goto fail_free;
  523. /* Initialize a page flip struct */
  524. *s = (struct nouveau_page_flip_state)
  525. { { }, event, nouveau_crtc(crtc)->index,
  526. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  527. new_bo->bo.offset };
  528. /* Choose the channel the flip will be handled in */
  529. fence = new_bo->bo.sync_obj;
  530. if (fence)
  531. chan = fence->channel;
  532. if (!chan)
  533. chan = drm->channel;
  534. mutex_lock(&chan->cli->mutex);
  535. /* Emit a page flip */
  536. if (nv_device(drm->device)->card_type >= NV_50) {
  537. ret = nv50_display_flip_next(crtc, fb, chan, 0);
  538. if (ret) {
  539. mutex_unlock(&chan->cli->mutex);
  540. goto fail_unreserve;
  541. }
  542. }
  543. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  544. mutex_unlock(&chan->cli->mutex);
  545. if (ret)
  546. goto fail_unreserve;
  547. /* Update the crtc struct and cleanup */
  548. crtc->fb = fb;
  549. nouveau_page_flip_unreserve(old_bo, new_bo, fence);
  550. nouveau_fence_unref(&fence);
  551. return 0;
  552. fail_unreserve:
  553. nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
  554. fail_free:
  555. kfree(s);
  556. return ret;
  557. }
  558. int
  559. nouveau_finish_page_flip(struct nouveau_channel *chan,
  560. struct nouveau_page_flip_state *ps)
  561. {
  562. struct nouveau_fence_chan *fctx = chan->fence;
  563. struct nouveau_drm *drm = chan->drm;
  564. struct drm_device *dev = drm->dev;
  565. struct nouveau_page_flip_state *s;
  566. unsigned long flags;
  567. spin_lock_irqsave(&dev->event_lock, flags);
  568. if (list_empty(&fctx->flip)) {
  569. NV_ERROR(drm, "unexpected pageflip\n");
  570. spin_unlock_irqrestore(&dev->event_lock, flags);
  571. return -EINVAL;
  572. }
  573. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  574. if (s->event) {
  575. struct drm_pending_vblank_event *e = s->event;
  576. struct timeval now;
  577. do_gettimeofday(&now);
  578. e->event.sequence = 0;
  579. e->event.tv_sec = now.tv_sec;
  580. e->event.tv_usec = now.tv_usec;
  581. list_add_tail(&e->base.link, &e->base.file_priv->event_list);
  582. wake_up_interruptible(&e->base.file_priv->event_wait);
  583. }
  584. list_del(&s->head);
  585. if (ps)
  586. *ps = *s;
  587. kfree(s);
  588. spin_unlock_irqrestore(&dev->event_lock, flags);
  589. return 0;
  590. }
  591. int
  592. nouveau_flip_complete(void *data)
  593. {
  594. struct nouveau_channel *chan = data;
  595. struct nouveau_drm *drm = chan->drm;
  596. struct nouveau_page_flip_state state;
  597. if (!nouveau_finish_page_flip(chan, &state)) {
  598. if (nv_device(drm->device)->card_type < NV_50) {
  599. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  600. state.y * state.pitch +
  601. state.x * state.bpp / 8);
  602. }
  603. }
  604. return 0;
  605. }
  606. int
  607. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  608. struct drm_mode_create_dumb *args)
  609. {
  610. struct nouveau_bo *bo;
  611. int ret;
  612. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  613. args->size = args->pitch * args->height;
  614. args->size = roundup(args->size, PAGE_SIZE);
  615. ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
  616. if (ret)
  617. return ret;
  618. ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
  619. drm_gem_object_unreference_unlocked(bo->gem);
  620. return ret;
  621. }
  622. int
  623. nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
  624. uint32_t handle)
  625. {
  626. return drm_gem_handle_delete(file_priv, handle);
  627. }
  628. int
  629. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  630. struct drm_device *dev,
  631. uint32_t handle, uint64_t *poffset)
  632. {
  633. struct drm_gem_object *gem;
  634. gem = drm_gem_object_lookup(dev, file_priv, handle);
  635. if (gem) {
  636. struct nouveau_bo *bo = gem->driver_private;
  637. *poffset = bo->bo.addr_space_offset;
  638. drm_gem_object_unreference_unlocked(gem);
  639. return 0;
  640. }
  641. return -ENOENT;
  642. }