events.c 36 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  54. /* IRQ <-> VIRQ mapping. */
  55. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  56. /* IRQ <-> IPI mapping */
  57. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  58. /* Interrupt types. */
  59. enum xen_irq_type {
  60. IRQT_UNBOUND = 0,
  61. IRQT_PIRQ,
  62. IRQT_VIRQ,
  63. IRQT_IPI,
  64. IRQT_EVTCHN
  65. };
  66. /*
  67. * Packed IRQ information:
  68. * type - enum xen_irq_type
  69. * event channel - irq->event channel mapping
  70. * cpu - cpu this event channel is bound to
  71. * index - type-specific information:
  72. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  73. * guest, or GSI (real passthrough IRQ) of the device.
  74. * VIRQ - virq number
  75. * IPI - IPI vector
  76. * EVTCHN -
  77. */
  78. struct irq_info
  79. {
  80. enum xen_irq_type type; /* type */
  81. unsigned short evtchn; /* event channel */
  82. unsigned short cpu; /* cpu bound */
  83. union {
  84. unsigned short virq;
  85. enum ipi_vector ipi;
  86. struct {
  87. unsigned short pirq;
  88. unsigned short gsi;
  89. unsigned char vector;
  90. unsigned char flags;
  91. } pirq;
  92. } u;
  93. };
  94. #define PIRQ_NEEDS_EOI (1 << 0)
  95. #define PIRQ_SHAREABLE (1 << 1)
  96. static struct irq_info *irq_info;
  97. static int *pirq_to_irq;
  98. static int *evtchn_to_irq;
  99. struct cpu_evtchn_s {
  100. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  101. };
  102. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  103. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  104. };
  105. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  106. static inline unsigned long *cpu_evtchn_mask(int cpu)
  107. {
  108. return cpu_evtchn_mask_p[cpu].bits;
  109. }
  110. /* Xen will never allocate port zero for any purpose. */
  111. #define VALID_EVTCHN(chn) ((chn) != 0)
  112. static struct irq_chip xen_dynamic_chip;
  113. static struct irq_chip xen_percpu_chip;
  114. static struct irq_chip xen_pirq_chip;
  115. /* Constructor for packed IRQ information. */
  116. static struct irq_info mk_unbound_info(void)
  117. {
  118. return (struct irq_info) { .type = IRQT_UNBOUND };
  119. }
  120. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  121. {
  122. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  123. .cpu = 0 };
  124. }
  125. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  126. {
  127. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  128. .cpu = 0, .u.ipi = ipi };
  129. }
  130. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  131. {
  132. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  133. .cpu = 0, .u.virq = virq };
  134. }
  135. static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
  136. unsigned short gsi, unsigned short vector)
  137. {
  138. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  139. .cpu = 0,
  140. .u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
  141. }
  142. /*
  143. * Accessors for packed IRQ information.
  144. */
  145. static struct irq_info *info_for_irq(unsigned irq)
  146. {
  147. return &irq_info[irq];
  148. }
  149. static unsigned int evtchn_from_irq(unsigned irq)
  150. {
  151. return info_for_irq(irq)->evtchn;
  152. }
  153. unsigned irq_from_evtchn(unsigned int evtchn)
  154. {
  155. return evtchn_to_irq[evtchn];
  156. }
  157. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  158. static enum ipi_vector ipi_from_irq(unsigned irq)
  159. {
  160. struct irq_info *info = info_for_irq(irq);
  161. BUG_ON(info == NULL);
  162. BUG_ON(info->type != IRQT_IPI);
  163. return info->u.ipi;
  164. }
  165. static unsigned virq_from_irq(unsigned irq)
  166. {
  167. struct irq_info *info = info_for_irq(irq);
  168. BUG_ON(info == NULL);
  169. BUG_ON(info->type != IRQT_VIRQ);
  170. return info->u.virq;
  171. }
  172. static unsigned pirq_from_irq(unsigned irq)
  173. {
  174. struct irq_info *info = info_for_irq(irq);
  175. BUG_ON(info == NULL);
  176. BUG_ON(info->type != IRQT_PIRQ);
  177. return info->u.pirq.pirq;
  178. }
  179. static unsigned gsi_from_irq(unsigned irq)
  180. {
  181. struct irq_info *info = info_for_irq(irq);
  182. BUG_ON(info == NULL);
  183. BUG_ON(info->type != IRQT_PIRQ);
  184. return info->u.pirq.gsi;
  185. }
  186. static unsigned vector_from_irq(unsigned irq)
  187. {
  188. struct irq_info *info = info_for_irq(irq);
  189. BUG_ON(info == NULL);
  190. BUG_ON(info->type != IRQT_PIRQ);
  191. return info->u.pirq.vector;
  192. }
  193. static enum xen_irq_type type_from_irq(unsigned irq)
  194. {
  195. return info_for_irq(irq)->type;
  196. }
  197. static unsigned cpu_from_irq(unsigned irq)
  198. {
  199. return info_for_irq(irq)->cpu;
  200. }
  201. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  202. {
  203. int irq = evtchn_to_irq[evtchn];
  204. unsigned ret = 0;
  205. if (irq != -1)
  206. ret = cpu_from_irq(irq);
  207. return ret;
  208. }
  209. static bool pirq_needs_eoi(unsigned irq)
  210. {
  211. struct irq_info *info = info_for_irq(irq);
  212. BUG_ON(info->type != IRQT_PIRQ);
  213. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  214. }
  215. static inline unsigned long active_evtchns(unsigned int cpu,
  216. struct shared_info *sh,
  217. unsigned int idx)
  218. {
  219. return (sh->evtchn_pending[idx] &
  220. cpu_evtchn_mask(cpu)[idx] &
  221. ~sh->evtchn_mask[idx]);
  222. }
  223. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  224. {
  225. int irq = evtchn_to_irq[chn];
  226. BUG_ON(irq == -1);
  227. #ifdef CONFIG_SMP
  228. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  229. #endif
  230. clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  231. set_bit(chn, cpu_evtchn_mask(cpu));
  232. irq_info[irq].cpu = cpu;
  233. }
  234. static void init_evtchn_cpu_bindings(void)
  235. {
  236. int i;
  237. #ifdef CONFIG_SMP
  238. struct irq_desc *desc;
  239. /* By default all event channels notify CPU#0. */
  240. for_each_irq_desc(i, desc) {
  241. cpumask_copy(desc->affinity, cpumask_of(0));
  242. }
  243. #endif
  244. for_each_possible_cpu(i)
  245. memset(cpu_evtchn_mask(i),
  246. (i == 0) ? ~0 : 0, sizeof(struct cpu_evtchn_s));
  247. }
  248. static inline void clear_evtchn(int port)
  249. {
  250. struct shared_info *s = HYPERVISOR_shared_info;
  251. sync_clear_bit(port, &s->evtchn_pending[0]);
  252. }
  253. static inline void set_evtchn(int port)
  254. {
  255. struct shared_info *s = HYPERVISOR_shared_info;
  256. sync_set_bit(port, &s->evtchn_pending[0]);
  257. }
  258. static inline int test_evtchn(int port)
  259. {
  260. struct shared_info *s = HYPERVISOR_shared_info;
  261. return sync_test_bit(port, &s->evtchn_pending[0]);
  262. }
  263. /**
  264. * notify_remote_via_irq - send event to remote end of event channel via irq
  265. * @irq: irq of event channel to send event to
  266. *
  267. * Unlike notify_remote_via_evtchn(), this is safe to use across
  268. * save/restore. Notifications on a broken connection are silently
  269. * dropped.
  270. */
  271. void notify_remote_via_irq(int irq)
  272. {
  273. int evtchn = evtchn_from_irq(irq);
  274. if (VALID_EVTCHN(evtchn))
  275. notify_remote_via_evtchn(evtchn);
  276. }
  277. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  278. static void mask_evtchn(int port)
  279. {
  280. struct shared_info *s = HYPERVISOR_shared_info;
  281. sync_set_bit(port, &s->evtchn_mask[0]);
  282. }
  283. static void unmask_evtchn(int port)
  284. {
  285. struct shared_info *s = HYPERVISOR_shared_info;
  286. unsigned int cpu = get_cpu();
  287. BUG_ON(!irqs_disabled());
  288. /* Slow path (hypercall) if this is a non-local port. */
  289. if (unlikely(cpu != cpu_from_evtchn(port))) {
  290. struct evtchn_unmask unmask = { .port = port };
  291. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  292. } else {
  293. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  294. sync_clear_bit(port, &s->evtchn_mask[0]);
  295. /*
  296. * The following is basically the equivalent of
  297. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  298. * the interrupt edge' if the channel is masked.
  299. */
  300. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  301. !sync_test_and_set_bit(port / BITS_PER_LONG,
  302. &vcpu_info->evtchn_pending_sel))
  303. vcpu_info->evtchn_upcall_pending = 1;
  304. }
  305. put_cpu();
  306. }
  307. static int get_nr_hw_irqs(void)
  308. {
  309. int ret = 1;
  310. #ifdef CONFIG_X86_IO_APIC
  311. ret = get_nr_irqs_gsi();
  312. #endif
  313. return ret;
  314. }
  315. static int find_unbound_pirq(int type)
  316. {
  317. int rc, i;
  318. struct physdev_get_free_pirq op_get_free_pirq;
  319. op_get_free_pirq.type = type;
  320. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  321. if (!rc)
  322. return op_get_free_pirq.pirq;
  323. for (i = 0; i < nr_irqs; i++) {
  324. if (pirq_to_irq[i] < 0)
  325. return i;
  326. }
  327. return -1;
  328. }
  329. static int find_unbound_irq(void)
  330. {
  331. struct irq_data *data;
  332. int irq, res;
  333. int bottom = get_nr_hw_irqs();
  334. int top = nr_irqs-1;
  335. if (bottom == nr_irqs)
  336. goto no_irqs;
  337. /* This loop starts from the top of IRQ space and goes down.
  338. * We need this b/c if we have a PCI device in a Xen PV guest
  339. * we do not have an IO-APIC (though the backend might have them)
  340. * mapped in. To not have a collision of physical IRQs with the Xen
  341. * event channels start at the top of the IRQ space for virtual IRQs.
  342. */
  343. for (irq = top; irq > bottom; irq--) {
  344. data = irq_get_irq_data(irq);
  345. /* only 15->0 have init'd desc; handle irq > 16 */
  346. if (!data)
  347. break;
  348. if (data->chip == &no_irq_chip)
  349. break;
  350. if (data->chip != &xen_dynamic_chip)
  351. continue;
  352. if (irq_info[irq].type == IRQT_UNBOUND)
  353. return irq;
  354. }
  355. if (irq == bottom)
  356. goto no_irqs;
  357. res = irq_alloc_desc_at(irq, -1);
  358. if (WARN_ON(res != irq))
  359. return -1;
  360. return irq;
  361. no_irqs:
  362. panic("No available IRQ to bind to: increase nr_irqs!\n");
  363. }
  364. static bool identity_mapped_irq(unsigned irq)
  365. {
  366. /* identity map all the hardware irqs */
  367. return irq < get_nr_hw_irqs();
  368. }
  369. static void pirq_unmask_notify(int irq)
  370. {
  371. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  372. if (unlikely(pirq_needs_eoi(irq))) {
  373. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  374. WARN_ON(rc);
  375. }
  376. }
  377. static void pirq_query_unmask(int irq)
  378. {
  379. struct physdev_irq_status_query irq_status;
  380. struct irq_info *info = info_for_irq(irq);
  381. BUG_ON(info->type != IRQT_PIRQ);
  382. irq_status.irq = pirq_from_irq(irq);
  383. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  384. irq_status.flags = 0;
  385. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  386. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  387. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  388. }
  389. static bool probing_irq(int irq)
  390. {
  391. struct irq_desc *desc = irq_to_desc(irq);
  392. return desc && desc->action == NULL;
  393. }
  394. static unsigned int startup_pirq(unsigned int irq)
  395. {
  396. struct evtchn_bind_pirq bind_pirq;
  397. struct irq_info *info = info_for_irq(irq);
  398. int evtchn = evtchn_from_irq(irq);
  399. int rc;
  400. BUG_ON(info->type != IRQT_PIRQ);
  401. if (VALID_EVTCHN(evtchn))
  402. goto out;
  403. bind_pirq.pirq = pirq_from_irq(irq);
  404. /* NB. We are happy to share unless we are probing. */
  405. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  406. BIND_PIRQ__WILL_SHARE : 0;
  407. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  408. if (rc != 0) {
  409. if (!probing_irq(irq))
  410. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  411. irq);
  412. return 0;
  413. }
  414. evtchn = bind_pirq.port;
  415. pirq_query_unmask(irq);
  416. evtchn_to_irq[evtchn] = irq;
  417. bind_evtchn_to_cpu(evtchn, 0);
  418. info->evtchn = evtchn;
  419. out:
  420. unmask_evtchn(evtchn);
  421. pirq_unmask_notify(irq);
  422. return 0;
  423. }
  424. static void shutdown_pirq(unsigned int irq)
  425. {
  426. struct evtchn_close close;
  427. struct irq_info *info = info_for_irq(irq);
  428. int evtchn = evtchn_from_irq(irq);
  429. BUG_ON(info->type != IRQT_PIRQ);
  430. if (!VALID_EVTCHN(evtchn))
  431. return;
  432. mask_evtchn(evtchn);
  433. close.port = evtchn;
  434. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  435. BUG();
  436. bind_evtchn_to_cpu(evtchn, 0);
  437. evtchn_to_irq[evtchn] = -1;
  438. info->evtchn = 0;
  439. }
  440. static void enable_pirq(unsigned int irq)
  441. {
  442. startup_pirq(irq);
  443. }
  444. static void disable_pirq(unsigned int irq)
  445. {
  446. }
  447. static void ack_pirq(unsigned int irq)
  448. {
  449. int evtchn = evtchn_from_irq(irq);
  450. move_native_irq(irq);
  451. if (VALID_EVTCHN(evtchn)) {
  452. mask_evtchn(evtchn);
  453. clear_evtchn(evtchn);
  454. }
  455. }
  456. static void end_pirq(unsigned int irq)
  457. {
  458. int evtchn = evtchn_from_irq(irq);
  459. struct irq_desc *desc = irq_to_desc(irq);
  460. if (WARN_ON(!desc))
  461. return;
  462. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  463. (IRQ_DISABLED|IRQ_PENDING)) {
  464. shutdown_pirq(irq);
  465. } else if (VALID_EVTCHN(evtchn)) {
  466. unmask_evtchn(evtchn);
  467. pirq_unmask_notify(irq);
  468. }
  469. }
  470. static int find_irq_by_gsi(unsigned gsi)
  471. {
  472. int irq;
  473. for (irq = 0; irq < nr_irqs; irq++) {
  474. struct irq_info *info = info_for_irq(irq);
  475. if (info == NULL || info->type != IRQT_PIRQ)
  476. continue;
  477. if (gsi_from_irq(irq) == gsi)
  478. return irq;
  479. }
  480. return -1;
  481. }
  482. int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
  483. {
  484. return xen_map_pirq_gsi(gsi, gsi, shareable, name);
  485. }
  486. /* xen_map_pirq_gsi might allocate irqs from the top down, as a
  487. * consequence don't assume that the irq number returned has a low value
  488. * or can be used as a pirq number unless you know otherwise.
  489. *
  490. * One notable exception is when xen_map_pirq_gsi is called passing an
  491. * hardware gsi as argument, in that case the irq number returned
  492. * matches the gsi number passed as second argument.
  493. *
  494. * Note: We don't assign an event channel until the irq actually started
  495. * up. Return an existing irq if we've already got one for the gsi.
  496. */
  497. int xen_map_pirq_gsi(unsigned pirq, unsigned gsi, int shareable, char *name)
  498. {
  499. int irq = 0;
  500. struct physdev_irq irq_op;
  501. spin_lock(&irq_mapping_update_lock);
  502. if ((pirq > nr_irqs) || (gsi > nr_irqs)) {
  503. printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
  504. pirq > nr_irqs ? "pirq" :"",
  505. gsi > nr_irqs ? "gsi" : "");
  506. goto out;
  507. }
  508. irq = find_irq_by_gsi(gsi);
  509. if (irq != -1) {
  510. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  511. irq, gsi);
  512. goto out; /* XXX need refcount? */
  513. }
  514. /* If we are a PV guest, we don't have GSIs (no ACPI passed). Therefore
  515. * we are using the !xen_initial_domain() to drop in the function.*/
  516. if (identity_mapped_irq(gsi) || (!xen_initial_domain() &&
  517. xen_pv_domain())) {
  518. irq = gsi;
  519. irq_alloc_desc_at(irq, -1);
  520. } else
  521. irq = find_unbound_irq();
  522. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  523. handle_level_irq, name);
  524. irq_op.irq = irq;
  525. irq_op.vector = 0;
  526. /* Only the privileged domain can do this. For non-priv, the pcifront
  527. * driver provides a PCI bus that does the call to do exactly
  528. * this in the priv domain. */
  529. if (xen_initial_domain() &&
  530. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  531. irq_free_desc(irq);
  532. irq = -ENOSPC;
  533. goto out;
  534. }
  535. irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
  536. irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
  537. pirq_to_irq[pirq] = irq;
  538. out:
  539. spin_unlock(&irq_mapping_update_lock);
  540. return irq;
  541. }
  542. #ifdef CONFIG_PCI_MSI
  543. #include <linux/msi.h>
  544. #include "../pci/msi.h"
  545. void xen_allocate_pirq_msi(char *name, int *irq, int *pirq, int alloc)
  546. {
  547. spin_lock(&irq_mapping_update_lock);
  548. if (alloc & XEN_ALLOC_IRQ) {
  549. *irq = find_unbound_irq();
  550. if (*irq == -1)
  551. goto out;
  552. }
  553. if (alloc & XEN_ALLOC_PIRQ) {
  554. *pirq = find_unbound_pirq(MAP_PIRQ_TYPE_MSI);
  555. if (*pirq == -1)
  556. goto out;
  557. }
  558. set_irq_chip_and_handler_name(*irq, &xen_pirq_chip,
  559. handle_level_irq, name);
  560. irq_info[*irq] = mk_pirq_info(0, *pirq, 0, 0);
  561. pirq_to_irq[*pirq] = *irq;
  562. out:
  563. spin_unlock(&irq_mapping_update_lock);
  564. }
  565. int xen_create_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int type)
  566. {
  567. int irq = -1;
  568. struct physdev_map_pirq map_irq;
  569. int rc;
  570. int pos;
  571. u32 table_offset, bir;
  572. memset(&map_irq, 0, sizeof(map_irq));
  573. map_irq.domid = DOMID_SELF;
  574. map_irq.type = MAP_PIRQ_TYPE_MSI;
  575. map_irq.index = -1;
  576. map_irq.pirq = -1;
  577. map_irq.bus = dev->bus->number;
  578. map_irq.devfn = dev->devfn;
  579. if (type == PCI_CAP_ID_MSIX) {
  580. pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
  581. pci_read_config_dword(dev, msix_table_offset_reg(pos),
  582. &table_offset);
  583. bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
  584. map_irq.table_base = pci_resource_start(dev, bir);
  585. map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
  586. }
  587. spin_lock(&irq_mapping_update_lock);
  588. irq = find_unbound_irq();
  589. if (irq == -1)
  590. goto out;
  591. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  592. if (rc) {
  593. printk(KERN_WARNING "xen map irq failed %d\n", rc);
  594. irq_free_desc(irq);
  595. irq = -1;
  596. goto out;
  597. }
  598. irq_info[irq] = mk_pirq_info(0, map_irq.pirq, 0, map_irq.index);
  599. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  600. handle_level_irq,
  601. (type == PCI_CAP_ID_MSIX) ? "msi-x":"msi");
  602. out:
  603. spin_unlock(&irq_mapping_update_lock);
  604. return irq;
  605. }
  606. #endif
  607. int xen_destroy_irq(int irq)
  608. {
  609. struct irq_desc *desc;
  610. struct physdev_unmap_pirq unmap_irq;
  611. struct irq_info *info = info_for_irq(irq);
  612. int rc = -ENOENT;
  613. spin_lock(&irq_mapping_update_lock);
  614. desc = irq_to_desc(irq);
  615. if (!desc)
  616. goto out;
  617. if (xen_initial_domain()) {
  618. unmap_irq.pirq = info->u.pirq.pirq;
  619. unmap_irq.domid = DOMID_SELF;
  620. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  621. if (rc) {
  622. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  623. goto out;
  624. }
  625. pirq_to_irq[info->u.pirq.pirq] = -1;
  626. }
  627. irq_info[irq] = mk_unbound_info();
  628. irq_free_desc(irq);
  629. out:
  630. spin_unlock(&irq_mapping_update_lock);
  631. return rc;
  632. }
  633. int xen_vector_from_irq(unsigned irq)
  634. {
  635. return vector_from_irq(irq);
  636. }
  637. int xen_gsi_from_irq(unsigned irq)
  638. {
  639. return gsi_from_irq(irq);
  640. }
  641. int xen_irq_from_pirq(unsigned pirq)
  642. {
  643. return pirq_to_irq[pirq];
  644. }
  645. int bind_evtchn_to_irq(unsigned int evtchn)
  646. {
  647. int irq;
  648. spin_lock(&irq_mapping_update_lock);
  649. irq = evtchn_to_irq[evtchn];
  650. if (irq == -1) {
  651. irq = find_unbound_irq();
  652. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  653. handle_fasteoi_irq, "event");
  654. evtchn_to_irq[evtchn] = irq;
  655. irq_info[irq] = mk_evtchn_info(evtchn);
  656. }
  657. spin_unlock(&irq_mapping_update_lock);
  658. return irq;
  659. }
  660. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  661. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  662. {
  663. struct evtchn_bind_ipi bind_ipi;
  664. int evtchn, irq;
  665. spin_lock(&irq_mapping_update_lock);
  666. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  667. if (irq == -1) {
  668. irq = find_unbound_irq();
  669. if (irq < 0)
  670. goto out;
  671. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  672. handle_percpu_irq, "ipi");
  673. bind_ipi.vcpu = cpu;
  674. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  675. &bind_ipi) != 0)
  676. BUG();
  677. evtchn = bind_ipi.port;
  678. evtchn_to_irq[evtchn] = irq;
  679. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  680. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  681. bind_evtchn_to_cpu(evtchn, cpu);
  682. }
  683. out:
  684. spin_unlock(&irq_mapping_update_lock);
  685. return irq;
  686. }
  687. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  688. {
  689. struct evtchn_bind_virq bind_virq;
  690. int evtchn, irq;
  691. spin_lock(&irq_mapping_update_lock);
  692. irq = per_cpu(virq_to_irq, cpu)[virq];
  693. if (irq == -1) {
  694. irq = find_unbound_irq();
  695. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  696. handle_percpu_irq, "virq");
  697. bind_virq.virq = virq;
  698. bind_virq.vcpu = cpu;
  699. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  700. &bind_virq) != 0)
  701. BUG();
  702. evtchn = bind_virq.port;
  703. evtchn_to_irq[evtchn] = irq;
  704. irq_info[irq] = mk_virq_info(evtchn, virq);
  705. per_cpu(virq_to_irq, cpu)[virq] = irq;
  706. bind_evtchn_to_cpu(evtchn, cpu);
  707. }
  708. spin_unlock(&irq_mapping_update_lock);
  709. return irq;
  710. }
  711. static void unbind_from_irq(unsigned int irq)
  712. {
  713. struct evtchn_close close;
  714. int evtchn = evtchn_from_irq(irq);
  715. spin_lock(&irq_mapping_update_lock);
  716. if (VALID_EVTCHN(evtchn)) {
  717. close.port = evtchn;
  718. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  719. BUG();
  720. switch (type_from_irq(irq)) {
  721. case IRQT_VIRQ:
  722. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  723. [virq_from_irq(irq)] = -1;
  724. break;
  725. case IRQT_IPI:
  726. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  727. [ipi_from_irq(irq)] = -1;
  728. break;
  729. default:
  730. break;
  731. }
  732. /* Closed ports are implicitly re-bound to VCPU0. */
  733. bind_evtchn_to_cpu(evtchn, 0);
  734. evtchn_to_irq[evtchn] = -1;
  735. }
  736. if (irq_info[irq].type != IRQT_UNBOUND) {
  737. irq_info[irq] = mk_unbound_info();
  738. irq_free_desc(irq);
  739. }
  740. spin_unlock(&irq_mapping_update_lock);
  741. }
  742. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  743. irq_handler_t handler,
  744. unsigned long irqflags,
  745. const char *devname, void *dev_id)
  746. {
  747. unsigned int irq;
  748. int retval;
  749. irq = bind_evtchn_to_irq(evtchn);
  750. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  751. if (retval != 0) {
  752. unbind_from_irq(irq);
  753. return retval;
  754. }
  755. return irq;
  756. }
  757. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  758. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  759. irq_handler_t handler,
  760. unsigned long irqflags, const char *devname, void *dev_id)
  761. {
  762. unsigned int irq;
  763. int retval;
  764. irq = bind_virq_to_irq(virq, cpu);
  765. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  766. if (retval != 0) {
  767. unbind_from_irq(irq);
  768. return retval;
  769. }
  770. return irq;
  771. }
  772. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  773. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  774. unsigned int cpu,
  775. irq_handler_t handler,
  776. unsigned long irqflags,
  777. const char *devname,
  778. void *dev_id)
  779. {
  780. int irq, retval;
  781. irq = bind_ipi_to_irq(ipi, cpu);
  782. if (irq < 0)
  783. return irq;
  784. irqflags |= IRQF_NO_SUSPEND;
  785. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  786. if (retval != 0) {
  787. unbind_from_irq(irq);
  788. return retval;
  789. }
  790. return irq;
  791. }
  792. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  793. {
  794. free_irq(irq, dev_id);
  795. unbind_from_irq(irq);
  796. }
  797. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  798. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  799. {
  800. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  801. BUG_ON(irq < 0);
  802. notify_remote_via_irq(irq);
  803. }
  804. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  805. {
  806. struct shared_info *sh = HYPERVISOR_shared_info;
  807. int cpu = smp_processor_id();
  808. unsigned long *cpu_evtchn = cpu_evtchn_mask(cpu);
  809. int i;
  810. unsigned long flags;
  811. static DEFINE_SPINLOCK(debug_lock);
  812. struct vcpu_info *v;
  813. spin_lock_irqsave(&debug_lock, flags);
  814. printk("\nvcpu %d\n ", cpu);
  815. for_each_online_cpu(i) {
  816. int pending;
  817. v = per_cpu(xen_vcpu, i);
  818. pending = (get_irq_regs() && i == cpu)
  819. ? xen_irqs_disabled(get_irq_regs())
  820. : v->evtchn_upcall_mask;
  821. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  822. pending, v->evtchn_upcall_pending,
  823. (int)(sizeof(v->evtchn_pending_sel)*2),
  824. v->evtchn_pending_sel);
  825. }
  826. v = per_cpu(xen_vcpu, cpu);
  827. printk("\npending:\n ");
  828. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  829. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  830. sh->evtchn_pending[i],
  831. i % 8 == 0 ? "\n " : " ");
  832. printk("\nglobal mask:\n ");
  833. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  834. printk("%0*lx%s",
  835. (int)(sizeof(sh->evtchn_mask[0])*2),
  836. sh->evtchn_mask[i],
  837. i % 8 == 0 ? "\n " : " ");
  838. printk("\nglobally unmasked:\n ");
  839. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  840. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  841. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  842. i % 8 == 0 ? "\n " : " ");
  843. printk("\nlocal cpu%d mask:\n ", cpu);
  844. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  845. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  846. cpu_evtchn[i],
  847. i % 8 == 0 ? "\n " : " ");
  848. printk("\nlocally unmasked:\n ");
  849. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  850. unsigned long pending = sh->evtchn_pending[i]
  851. & ~sh->evtchn_mask[i]
  852. & cpu_evtchn[i];
  853. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  854. pending, i % 8 == 0 ? "\n " : " ");
  855. }
  856. printk("\npending list:\n");
  857. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  858. if (sync_test_bit(i, sh->evtchn_pending)) {
  859. int word_idx = i / BITS_PER_LONG;
  860. printk(" %d: event %d -> irq %d%s%s%s\n",
  861. cpu_from_evtchn(i), i,
  862. evtchn_to_irq[i],
  863. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  864. ? "" : " l2-clear",
  865. !sync_test_bit(i, sh->evtchn_mask)
  866. ? "" : " globally-masked",
  867. sync_test_bit(i, cpu_evtchn)
  868. ? "" : " locally-masked");
  869. }
  870. }
  871. spin_unlock_irqrestore(&debug_lock, flags);
  872. return IRQ_HANDLED;
  873. }
  874. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  875. /*
  876. * Search the CPUs pending events bitmasks. For each one found, map
  877. * the event number to an irq, and feed it into do_IRQ() for
  878. * handling.
  879. *
  880. * Xen uses a two-level bitmap to speed searching. The first level is
  881. * a bitset of words which contain pending event bits. The second
  882. * level is a bitset of pending events themselves.
  883. */
  884. static void __xen_evtchn_do_upcall(void)
  885. {
  886. int cpu = get_cpu();
  887. struct shared_info *s = HYPERVISOR_shared_info;
  888. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  889. unsigned count;
  890. do {
  891. unsigned long pending_words;
  892. vcpu_info->evtchn_upcall_pending = 0;
  893. if (__get_cpu_var(xed_nesting_count)++)
  894. goto out;
  895. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  896. /* Clear master flag /before/ clearing selector flag. */
  897. wmb();
  898. #endif
  899. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  900. while (pending_words != 0) {
  901. unsigned long pending_bits;
  902. int word_idx = __ffs(pending_words);
  903. pending_words &= ~(1UL << word_idx);
  904. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  905. int bit_idx = __ffs(pending_bits);
  906. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  907. int irq = evtchn_to_irq[port];
  908. struct irq_desc *desc;
  909. mask_evtchn(port);
  910. clear_evtchn(port);
  911. if (irq != -1) {
  912. desc = irq_to_desc(irq);
  913. if (desc)
  914. generic_handle_irq_desc(irq, desc);
  915. }
  916. }
  917. }
  918. BUG_ON(!irqs_disabled());
  919. count = __get_cpu_var(xed_nesting_count);
  920. __get_cpu_var(xed_nesting_count) = 0;
  921. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  922. out:
  923. put_cpu();
  924. }
  925. void xen_evtchn_do_upcall(struct pt_regs *regs)
  926. {
  927. struct pt_regs *old_regs = set_irq_regs(regs);
  928. exit_idle();
  929. irq_enter();
  930. __xen_evtchn_do_upcall();
  931. irq_exit();
  932. set_irq_regs(old_regs);
  933. }
  934. void xen_hvm_evtchn_do_upcall(void)
  935. {
  936. __xen_evtchn_do_upcall();
  937. }
  938. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  939. /* Rebind a new event channel to an existing irq. */
  940. void rebind_evtchn_irq(int evtchn, int irq)
  941. {
  942. struct irq_info *info = info_for_irq(irq);
  943. /* Make sure the irq is masked, since the new event channel
  944. will also be masked. */
  945. disable_irq(irq);
  946. spin_lock(&irq_mapping_update_lock);
  947. /* After resume the irq<->evtchn mappings are all cleared out */
  948. BUG_ON(evtchn_to_irq[evtchn] != -1);
  949. /* Expect irq to have been bound before,
  950. so there should be a proper type */
  951. BUG_ON(info->type == IRQT_UNBOUND);
  952. evtchn_to_irq[evtchn] = irq;
  953. irq_info[irq] = mk_evtchn_info(evtchn);
  954. spin_unlock(&irq_mapping_update_lock);
  955. /* new event channels are always bound to cpu 0 */
  956. irq_set_affinity(irq, cpumask_of(0));
  957. /* Unmask the event channel. */
  958. enable_irq(irq);
  959. }
  960. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  961. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  962. {
  963. struct evtchn_bind_vcpu bind_vcpu;
  964. int evtchn = evtchn_from_irq(irq);
  965. /* events delivered via platform PCI interrupts are always
  966. * routed to vcpu 0 */
  967. if (!VALID_EVTCHN(evtchn) ||
  968. (xen_hvm_domain() && !xen_have_vector_callback))
  969. return -1;
  970. /* Send future instances of this interrupt to other vcpu. */
  971. bind_vcpu.port = evtchn;
  972. bind_vcpu.vcpu = tcpu;
  973. /*
  974. * If this fails, it usually just indicates that we're dealing with a
  975. * virq or IPI channel, which don't actually need to be rebound. Ignore
  976. * it, but don't do the xenlinux-level rebind in that case.
  977. */
  978. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  979. bind_evtchn_to_cpu(evtchn, tcpu);
  980. return 0;
  981. }
  982. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  983. {
  984. unsigned tcpu = cpumask_first(dest);
  985. return rebind_irq_to_cpu(irq, tcpu);
  986. }
  987. int resend_irq_on_evtchn(unsigned int irq)
  988. {
  989. int masked, evtchn = evtchn_from_irq(irq);
  990. struct shared_info *s = HYPERVISOR_shared_info;
  991. if (!VALID_EVTCHN(evtchn))
  992. return 1;
  993. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  994. sync_set_bit(evtchn, s->evtchn_pending);
  995. if (!masked)
  996. unmask_evtchn(evtchn);
  997. return 1;
  998. }
  999. static void enable_dynirq(unsigned int irq)
  1000. {
  1001. int evtchn = evtchn_from_irq(irq);
  1002. if (VALID_EVTCHN(evtchn))
  1003. unmask_evtchn(evtchn);
  1004. }
  1005. static void disable_dynirq(unsigned int irq)
  1006. {
  1007. int evtchn = evtchn_from_irq(irq);
  1008. if (VALID_EVTCHN(evtchn))
  1009. mask_evtchn(evtchn);
  1010. }
  1011. static void ack_dynirq(unsigned int irq)
  1012. {
  1013. int evtchn = evtchn_from_irq(irq);
  1014. move_masked_irq(irq);
  1015. if (VALID_EVTCHN(evtchn))
  1016. unmask_evtchn(evtchn);
  1017. }
  1018. static int retrigger_dynirq(unsigned int irq)
  1019. {
  1020. int evtchn = evtchn_from_irq(irq);
  1021. struct shared_info *sh = HYPERVISOR_shared_info;
  1022. int ret = 0;
  1023. if (VALID_EVTCHN(evtchn)) {
  1024. int masked;
  1025. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1026. sync_set_bit(evtchn, sh->evtchn_pending);
  1027. if (!masked)
  1028. unmask_evtchn(evtchn);
  1029. ret = 1;
  1030. }
  1031. return ret;
  1032. }
  1033. static void restore_cpu_pirqs(void)
  1034. {
  1035. int pirq, rc, irq, gsi;
  1036. struct physdev_map_pirq map_irq;
  1037. for (pirq = 0; pirq < nr_irqs; pirq++) {
  1038. irq = pirq_to_irq[pirq];
  1039. if (irq == -1)
  1040. continue;
  1041. /* save/restore of PT devices doesn't work, so at this point the
  1042. * only devices present are GSI based emulated devices */
  1043. gsi = gsi_from_irq(irq);
  1044. if (!gsi)
  1045. continue;
  1046. map_irq.domid = DOMID_SELF;
  1047. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1048. map_irq.index = gsi;
  1049. map_irq.pirq = pirq;
  1050. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1051. if (rc) {
  1052. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1053. gsi, irq, pirq, rc);
  1054. irq_info[irq] = mk_unbound_info();
  1055. pirq_to_irq[pirq] = -1;
  1056. continue;
  1057. }
  1058. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1059. startup_pirq(irq);
  1060. }
  1061. }
  1062. static void restore_cpu_virqs(unsigned int cpu)
  1063. {
  1064. struct evtchn_bind_virq bind_virq;
  1065. int virq, irq, evtchn;
  1066. for (virq = 0; virq < NR_VIRQS; virq++) {
  1067. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1068. continue;
  1069. BUG_ON(virq_from_irq(irq) != virq);
  1070. /* Get a new binding from Xen. */
  1071. bind_virq.virq = virq;
  1072. bind_virq.vcpu = cpu;
  1073. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1074. &bind_virq) != 0)
  1075. BUG();
  1076. evtchn = bind_virq.port;
  1077. /* Record the new mapping. */
  1078. evtchn_to_irq[evtchn] = irq;
  1079. irq_info[irq] = mk_virq_info(evtchn, virq);
  1080. bind_evtchn_to_cpu(evtchn, cpu);
  1081. }
  1082. }
  1083. static void restore_cpu_ipis(unsigned int cpu)
  1084. {
  1085. struct evtchn_bind_ipi bind_ipi;
  1086. int ipi, irq, evtchn;
  1087. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1088. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1089. continue;
  1090. BUG_ON(ipi_from_irq(irq) != ipi);
  1091. /* Get a new binding from Xen. */
  1092. bind_ipi.vcpu = cpu;
  1093. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1094. &bind_ipi) != 0)
  1095. BUG();
  1096. evtchn = bind_ipi.port;
  1097. /* Record the new mapping. */
  1098. evtchn_to_irq[evtchn] = irq;
  1099. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  1100. bind_evtchn_to_cpu(evtchn, cpu);
  1101. }
  1102. }
  1103. /* Clear an irq's pending state, in preparation for polling on it */
  1104. void xen_clear_irq_pending(int irq)
  1105. {
  1106. int evtchn = evtchn_from_irq(irq);
  1107. if (VALID_EVTCHN(evtchn))
  1108. clear_evtchn(evtchn);
  1109. }
  1110. EXPORT_SYMBOL(xen_clear_irq_pending);
  1111. void xen_set_irq_pending(int irq)
  1112. {
  1113. int evtchn = evtchn_from_irq(irq);
  1114. if (VALID_EVTCHN(evtchn))
  1115. set_evtchn(evtchn);
  1116. }
  1117. bool xen_test_irq_pending(int irq)
  1118. {
  1119. int evtchn = evtchn_from_irq(irq);
  1120. bool ret = false;
  1121. if (VALID_EVTCHN(evtchn))
  1122. ret = test_evtchn(evtchn);
  1123. return ret;
  1124. }
  1125. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1126. * the irq will be disabled so it won't deliver an interrupt. */
  1127. void xen_poll_irq_timeout(int irq, u64 timeout)
  1128. {
  1129. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1130. if (VALID_EVTCHN(evtchn)) {
  1131. struct sched_poll poll;
  1132. poll.nr_ports = 1;
  1133. poll.timeout = timeout;
  1134. set_xen_guest_handle(poll.ports, &evtchn);
  1135. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1136. BUG();
  1137. }
  1138. }
  1139. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1140. /* Poll waiting for an irq to become pending. In the usual case, the
  1141. * irq will be disabled so it won't deliver an interrupt. */
  1142. void xen_poll_irq(int irq)
  1143. {
  1144. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1145. }
  1146. void xen_irq_resume(void)
  1147. {
  1148. unsigned int cpu, irq, evtchn;
  1149. struct irq_desc *desc;
  1150. init_evtchn_cpu_bindings();
  1151. /* New event-channel space is not 'live' yet. */
  1152. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1153. mask_evtchn(evtchn);
  1154. /* No IRQ <-> event-channel mappings. */
  1155. for (irq = 0; irq < nr_irqs; irq++)
  1156. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  1157. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1158. evtchn_to_irq[evtchn] = -1;
  1159. for_each_possible_cpu(cpu) {
  1160. restore_cpu_virqs(cpu);
  1161. restore_cpu_ipis(cpu);
  1162. }
  1163. /*
  1164. * Unmask any IRQF_NO_SUSPEND IRQs which are enabled. These
  1165. * are not handled by the IRQ core.
  1166. */
  1167. for_each_irq_desc(irq, desc) {
  1168. if (!desc->action || !(desc->action->flags & IRQF_NO_SUSPEND))
  1169. continue;
  1170. if (desc->status & IRQ_DISABLED)
  1171. continue;
  1172. evtchn = evtchn_from_irq(irq);
  1173. if (evtchn == -1)
  1174. continue;
  1175. unmask_evtchn(evtchn);
  1176. }
  1177. restore_cpu_pirqs();
  1178. }
  1179. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1180. .name = "xen-dyn",
  1181. .disable = disable_dynirq,
  1182. .mask = disable_dynirq,
  1183. .unmask = enable_dynirq,
  1184. .eoi = ack_dynirq,
  1185. .set_affinity = set_affinity_irq,
  1186. .retrigger = retrigger_dynirq,
  1187. };
  1188. static struct irq_chip xen_pirq_chip __read_mostly = {
  1189. .name = "xen-pirq",
  1190. .startup = startup_pirq,
  1191. .shutdown = shutdown_pirq,
  1192. .enable = enable_pirq,
  1193. .unmask = enable_pirq,
  1194. .disable = disable_pirq,
  1195. .mask = disable_pirq,
  1196. .ack = ack_pirq,
  1197. .end = end_pirq,
  1198. .set_affinity = set_affinity_irq,
  1199. .retrigger = retrigger_dynirq,
  1200. };
  1201. static struct irq_chip xen_percpu_chip __read_mostly = {
  1202. .name = "xen-percpu",
  1203. .disable = disable_dynirq,
  1204. .mask = disable_dynirq,
  1205. .unmask = enable_dynirq,
  1206. .ack = ack_dynirq,
  1207. };
  1208. int xen_set_callback_via(uint64_t via)
  1209. {
  1210. struct xen_hvm_param a;
  1211. a.domid = DOMID_SELF;
  1212. a.index = HVM_PARAM_CALLBACK_IRQ;
  1213. a.value = via;
  1214. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1215. }
  1216. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1217. #ifdef CONFIG_XEN_PVHVM
  1218. /* Vector callbacks are better than PCI interrupts to receive event
  1219. * channel notifications because we can receive vector callbacks on any
  1220. * vcpu and we don't need PCI support or APIC interactions. */
  1221. void xen_callback_vector(void)
  1222. {
  1223. int rc;
  1224. uint64_t callback_via;
  1225. if (xen_have_vector_callback) {
  1226. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1227. rc = xen_set_callback_via(callback_via);
  1228. if (rc) {
  1229. printk(KERN_ERR "Request for Xen HVM callback vector"
  1230. " failed.\n");
  1231. xen_have_vector_callback = 0;
  1232. return;
  1233. }
  1234. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1235. "enabled\n");
  1236. /* in the restore case the vector has already been allocated */
  1237. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1238. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1239. }
  1240. }
  1241. #else
  1242. void xen_callback_vector(void) {}
  1243. #endif
  1244. void __init xen_init_IRQ(void)
  1245. {
  1246. int i;
  1247. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1248. GFP_KERNEL);
  1249. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1250. /* We are using nr_irqs as the maximum number of pirq available but
  1251. * that number is actually chosen by Xen and we don't know exactly
  1252. * what it is. Be careful choosing high pirq numbers. */
  1253. pirq_to_irq = kcalloc(nr_irqs, sizeof(*pirq_to_irq), GFP_KERNEL);
  1254. for (i = 0; i < nr_irqs; i++)
  1255. pirq_to_irq[i] = -1;
  1256. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1257. GFP_KERNEL);
  1258. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1259. evtchn_to_irq[i] = -1;
  1260. init_evtchn_cpu_bindings();
  1261. /* No event channels are 'live' right now. */
  1262. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1263. mask_evtchn(i);
  1264. if (xen_hvm_domain()) {
  1265. xen_callback_vector();
  1266. native_init_IRQ();
  1267. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1268. * __acpi_register_gsi can point at the right function */
  1269. pci_xen_hvm_init();
  1270. } else {
  1271. irq_ctx_init(smp_processor_id());
  1272. if (xen_initial_domain())
  1273. xen_setup_pirqs();
  1274. }
  1275. }