e1000_main.c 130 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. /* Change Log
  23. * 7.0.33 3-Feb-2006
  24. * o Added another fix for the pass false carrier bit
  25. * 7.0.32 24-Jan-2006
  26. * o Need to rebuild with noew version number for the pass false carrier
  27. * fix in e1000_hw.c
  28. * 7.0.30 18-Jan-2006
  29. * o fixup for tso workaround to disable it for pci-x
  30. * o fix mem leak on 82542
  31. * o fixes for 10 Mb/s connections and incorrect stats
  32. * 7.0.28 01/06/2006
  33. * o hardware workaround to only set "speed mode" bit for 1G link.
  34. * 7.0.26 12/23/2005
  35. * o wake on lan support modified for device ID 10B5
  36. * o fix dhcp + vlan issue not making it to the iAMT firmware
  37. * 7.0.24 12/9/2005
  38. * o New hardware support for the Gigabit NIC embedded in the south bridge
  39. * o Fixes to the recycling logic (skb->tail) from IBM LTC
  40. * 6.3.9 12/16/2005
  41. * o incorporate fix for recycled skbs from IBM LTC
  42. * 6.3.7 11/18/2005
  43. * o Honor eeprom setting for enabling/disabling Wake On Lan
  44. * 6.3.5 11/17/2005
  45. * o Fix memory leak in rx ring handling for PCI Express adapters
  46. * 6.3.4 11/8/05
  47. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  48. * 6.3.2 9/20/05
  49. * o Render logic that sets/resets DRV_LOAD as inline functions to
  50. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  51. * network interface is open.
  52. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  53. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  54. * rx_buffer_len
  55. * 6.3.1 9/19/05
  56. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  57. * (e1000_clean_tx_irq)
  58. * o Support for 8086:10B5 device (Quad Port)
  59. */
  60. char e1000_driver_name[] = "e1000";
  61. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  62. #ifndef CONFIG_E1000_NAPI
  63. #define DRIVERNAPI
  64. #else
  65. #define DRIVERNAPI "-NAPI"
  66. #endif
  67. #define DRV_VERSION "7.0.38-k2"DRIVERNAPI
  68. char e1000_driver_version[] = DRV_VERSION;
  69. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  70. /* e1000_pci_tbl - PCI Device ID Table
  71. *
  72. * Last entry must be all 0s
  73. *
  74. * Macro expands to...
  75. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  76. */
  77. static struct pci_device_id e1000_pci_tbl[] = {
  78. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  79. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  80. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  81. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  83. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  84. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  85. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  86. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  90. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  91. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  92. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  93. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  94. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  95. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  96. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  97. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  98. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  99. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  100. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  101. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  102. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  103. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  104. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  105. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  106. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  111. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  112. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  113. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  114. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  115. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  116. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  117. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  118. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  119. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  123. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  124. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  125. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  126. /* required last entry */
  127. {0,}
  128. };
  129. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  130. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  131. struct e1000_tx_ring *txdr);
  132. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  133. struct e1000_rx_ring *rxdr);
  134. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  135. struct e1000_tx_ring *tx_ring);
  136. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  137. struct e1000_rx_ring *rx_ring);
  138. /* Local Function Prototypes */
  139. static int e1000_init_module(void);
  140. static void e1000_exit_module(void);
  141. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  142. static void __devexit e1000_remove(struct pci_dev *pdev);
  143. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  144. static int e1000_sw_init(struct e1000_adapter *adapter);
  145. static int e1000_open(struct net_device *netdev);
  146. static int e1000_close(struct net_device *netdev);
  147. static void e1000_configure_tx(struct e1000_adapter *adapter);
  148. static void e1000_configure_rx(struct e1000_adapter *adapter);
  149. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  150. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  151. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  152. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  153. struct e1000_tx_ring *tx_ring);
  154. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. static void e1000_set_multi(struct net_device *netdev);
  157. static void e1000_update_phy_info(unsigned long data);
  158. static void e1000_watchdog(unsigned long data);
  159. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  160. static void e1000_82547_tx_fifo_stall(unsigned long data);
  161. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  162. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  163. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  164. static int e1000_set_mac(struct net_device *netdev, void *p);
  165. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  166. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  167. struct e1000_tx_ring *tx_ring);
  168. #ifdef CONFIG_E1000_NAPI
  169. static int e1000_clean(struct net_device *poll_dev, int *budget);
  170. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  171. struct e1000_rx_ring *rx_ring,
  172. int *work_done, int work_to_do);
  173. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  174. struct e1000_rx_ring *rx_ring,
  175. int *work_done, int work_to_do);
  176. #else
  177. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  178. struct e1000_rx_ring *rx_ring);
  179. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  180. struct e1000_rx_ring *rx_ring);
  181. #endif
  182. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  183. struct e1000_rx_ring *rx_ring,
  184. int cleaned_count);
  185. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  186. struct e1000_rx_ring *rx_ring,
  187. int cleaned_count);
  188. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  189. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  190. int cmd);
  191. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  192. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  193. static void e1000_tx_timeout(struct net_device *dev);
  194. static void e1000_reset_task(struct net_device *dev);
  195. static void e1000_smartspeed(struct e1000_adapter *adapter);
  196. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  197. struct sk_buff *skb);
  198. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  199. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  200. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  201. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  202. #ifdef CONFIG_PM
  203. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  204. static int e1000_resume(struct pci_dev *pdev);
  205. #endif
  206. #ifdef CONFIG_NET_POLL_CONTROLLER
  207. /* for netdump / net console */
  208. static void e1000_netpoll (struct net_device *netdev);
  209. #endif
  210. static struct pci_driver e1000_driver = {
  211. .name = e1000_driver_name,
  212. .id_table = e1000_pci_tbl,
  213. .probe = e1000_probe,
  214. .remove = __devexit_p(e1000_remove),
  215. /* Power Managment Hooks */
  216. #ifdef CONFIG_PM
  217. .suspend = e1000_suspend,
  218. .resume = e1000_resume
  219. #endif
  220. };
  221. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  222. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  223. MODULE_LICENSE("GPL");
  224. MODULE_VERSION(DRV_VERSION);
  225. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  226. module_param(debug, int, 0);
  227. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  228. /**
  229. * e1000_init_module - Driver Registration Routine
  230. *
  231. * e1000_init_module is the first routine called when the driver is
  232. * loaded. All it does is register with the PCI subsystem.
  233. **/
  234. static int __init
  235. e1000_init_module(void)
  236. {
  237. int ret;
  238. printk(KERN_INFO "%s - version %s\n",
  239. e1000_driver_string, e1000_driver_version);
  240. printk(KERN_INFO "%s\n", e1000_copyright);
  241. ret = pci_module_init(&e1000_driver);
  242. return ret;
  243. }
  244. module_init(e1000_init_module);
  245. /**
  246. * e1000_exit_module - Driver Exit Cleanup Routine
  247. *
  248. * e1000_exit_module is called just before the driver is removed
  249. * from memory.
  250. **/
  251. static void __exit
  252. e1000_exit_module(void)
  253. {
  254. pci_unregister_driver(&e1000_driver);
  255. }
  256. module_exit(e1000_exit_module);
  257. /**
  258. * e1000_irq_disable - Mask off interrupt generation on the NIC
  259. * @adapter: board private structure
  260. **/
  261. static void
  262. e1000_irq_disable(struct e1000_adapter *adapter)
  263. {
  264. atomic_inc(&adapter->irq_sem);
  265. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  266. E1000_WRITE_FLUSH(&adapter->hw);
  267. synchronize_irq(adapter->pdev->irq);
  268. }
  269. /**
  270. * e1000_irq_enable - Enable default interrupt generation settings
  271. * @adapter: board private structure
  272. **/
  273. static void
  274. e1000_irq_enable(struct e1000_adapter *adapter)
  275. {
  276. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  277. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  278. E1000_WRITE_FLUSH(&adapter->hw);
  279. }
  280. }
  281. static void
  282. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  283. {
  284. struct net_device *netdev = adapter->netdev;
  285. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  286. uint16_t old_vid = adapter->mng_vlan_id;
  287. if (adapter->vlgrp) {
  288. if (!adapter->vlgrp->vlan_devices[vid]) {
  289. if (adapter->hw.mng_cookie.status &
  290. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  291. e1000_vlan_rx_add_vid(netdev, vid);
  292. adapter->mng_vlan_id = vid;
  293. } else
  294. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  295. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  296. (vid != old_vid) &&
  297. !adapter->vlgrp->vlan_devices[old_vid])
  298. e1000_vlan_rx_kill_vid(netdev, old_vid);
  299. } else
  300. adapter->mng_vlan_id = vid;
  301. }
  302. }
  303. /**
  304. * e1000_release_hw_control - release control of the h/w to f/w
  305. * @adapter: address of board private structure
  306. *
  307. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  308. * For ASF and Pass Through versions of f/w this means that the
  309. * driver is no longer loaded. For AMT version (only with 82573) i
  310. * of the f/w this means that the netowrk i/f is closed.
  311. *
  312. **/
  313. static void
  314. e1000_release_hw_control(struct e1000_adapter *adapter)
  315. {
  316. uint32_t ctrl_ext;
  317. uint32_t swsm;
  318. /* Let firmware taken over control of h/w */
  319. switch (adapter->hw.mac_type) {
  320. case e1000_82571:
  321. case e1000_82572:
  322. case e1000_80003es2lan:
  323. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  324. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  325. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  326. break;
  327. case e1000_82573:
  328. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  329. E1000_WRITE_REG(&adapter->hw, SWSM,
  330. swsm & ~E1000_SWSM_DRV_LOAD);
  331. default:
  332. break;
  333. }
  334. }
  335. /**
  336. * e1000_get_hw_control - get control of the h/w from f/w
  337. * @adapter: address of board private structure
  338. *
  339. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  340. * For ASF and Pass Through versions of f/w this means that
  341. * the driver is loaded. For AMT version (only with 82573)
  342. * of the f/w this means that the netowrk i/f is open.
  343. *
  344. **/
  345. static void
  346. e1000_get_hw_control(struct e1000_adapter *adapter)
  347. {
  348. uint32_t ctrl_ext;
  349. uint32_t swsm;
  350. /* Let firmware know the driver has taken over */
  351. switch (adapter->hw.mac_type) {
  352. case e1000_82571:
  353. case e1000_82572:
  354. case e1000_80003es2lan:
  355. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  356. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  357. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  358. break;
  359. case e1000_82573:
  360. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  361. E1000_WRITE_REG(&adapter->hw, SWSM,
  362. swsm | E1000_SWSM_DRV_LOAD);
  363. break;
  364. default:
  365. break;
  366. }
  367. }
  368. int
  369. e1000_up(struct e1000_adapter *adapter)
  370. {
  371. struct net_device *netdev = adapter->netdev;
  372. int i, err;
  373. /* hardware has been reset, we need to reload some things */
  374. /* Reset the PHY if it was previously powered down */
  375. if (adapter->hw.media_type == e1000_media_type_copper) {
  376. uint16_t mii_reg;
  377. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  378. if (mii_reg & MII_CR_POWER_DOWN)
  379. e1000_phy_hw_reset(&adapter->hw);
  380. }
  381. e1000_set_multi(netdev);
  382. e1000_restore_vlan(adapter);
  383. e1000_configure_tx(adapter);
  384. e1000_setup_rctl(adapter);
  385. e1000_configure_rx(adapter);
  386. /* call E1000_DESC_UNUSED which always leaves
  387. * at least 1 descriptor unused to make sure
  388. * next_to_use != next_to_clean */
  389. for (i = 0; i < adapter->num_rx_queues; i++) {
  390. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  391. adapter->alloc_rx_buf(adapter, ring,
  392. E1000_DESC_UNUSED(ring));
  393. }
  394. #ifdef CONFIG_PCI_MSI
  395. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  396. adapter->have_msi = TRUE;
  397. if ((err = pci_enable_msi(adapter->pdev))) {
  398. DPRINTK(PROBE, ERR,
  399. "Unable to allocate MSI interrupt Error: %d\n", err);
  400. adapter->have_msi = FALSE;
  401. }
  402. }
  403. #endif
  404. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  405. SA_SHIRQ | SA_SAMPLE_RANDOM,
  406. netdev->name, netdev))) {
  407. DPRINTK(PROBE, ERR,
  408. "Unable to allocate interrupt Error: %d\n", err);
  409. return err;
  410. }
  411. adapter->tx_queue_len = netdev->tx_queue_len;
  412. mod_timer(&adapter->watchdog_timer, jiffies);
  413. #ifdef CONFIG_E1000_NAPI
  414. netif_poll_enable(netdev);
  415. #endif
  416. e1000_irq_enable(adapter);
  417. return 0;
  418. }
  419. void
  420. e1000_down(struct e1000_adapter *adapter)
  421. {
  422. struct net_device *netdev = adapter->netdev;
  423. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  424. e1000_check_mng_mode(&adapter->hw);
  425. e1000_irq_disable(adapter);
  426. free_irq(adapter->pdev->irq, netdev);
  427. #ifdef CONFIG_PCI_MSI
  428. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  429. adapter->have_msi == TRUE)
  430. pci_disable_msi(adapter->pdev);
  431. #endif
  432. del_timer_sync(&adapter->tx_fifo_stall_timer);
  433. del_timer_sync(&adapter->watchdog_timer);
  434. del_timer_sync(&adapter->phy_info_timer);
  435. #ifdef CONFIG_E1000_NAPI
  436. netif_poll_disable(netdev);
  437. #endif
  438. netdev->tx_queue_len = adapter->tx_queue_len;
  439. adapter->link_speed = 0;
  440. adapter->link_duplex = 0;
  441. netif_carrier_off(netdev);
  442. netif_stop_queue(netdev);
  443. e1000_reset(adapter);
  444. e1000_clean_all_tx_rings(adapter);
  445. e1000_clean_all_rx_rings(adapter);
  446. /* Power down the PHY so no link is implied when interface is down *
  447. * The PHY cannot be powered down if any of the following is TRUE *
  448. * (a) WoL is enabled
  449. * (b) AMT is active
  450. * (c) SoL/IDER session is active */
  451. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  452. adapter->hw.media_type == e1000_media_type_copper &&
  453. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  454. !mng_mode_enabled &&
  455. !e1000_check_phy_reset_block(&adapter->hw)) {
  456. uint16_t mii_reg;
  457. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  458. mii_reg |= MII_CR_POWER_DOWN;
  459. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  460. mdelay(1);
  461. }
  462. }
  463. void
  464. e1000_reset(struct e1000_adapter *adapter)
  465. {
  466. uint32_t pba, manc;
  467. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  468. /* Repartition Pba for greater than 9k mtu
  469. * To take effect CTRL.RST is required.
  470. */
  471. switch (adapter->hw.mac_type) {
  472. case e1000_82547:
  473. case e1000_82547_rev_2:
  474. pba = E1000_PBA_30K;
  475. break;
  476. case e1000_82571:
  477. case e1000_82572:
  478. case e1000_80003es2lan:
  479. pba = E1000_PBA_38K;
  480. break;
  481. case e1000_82573:
  482. pba = E1000_PBA_12K;
  483. break;
  484. default:
  485. pba = E1000_PBA_48K;
  486. break;
  487. }
  488. if ((adapter->hw.mac_type != e1000_82573) &&
  489. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  490. pba -= 8; /* allocate more FIFO for Tx */
  491. if (adapter->hw.mac_type == e1000_82547) {
  492. adapter->tx_fifo_head = 0;
  493. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  494. adapter->tx_fifo_size =
  495. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  496. atomic_set(&adapter->tx_fifo_stall, 0);
  497. }
  498. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  499. /* flow control settings */
  500. /* Set the FC high water mark to 90% of the FIFO size.
  501. * Required to clear last 3 LSB */
  502. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  503. adapter->hw.fc_high_water = fc_high_water_mark;
  504. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  505. if (adapter->hw.mac_type == e1000_80003es2lan)
  506. adapter->hw.fc_pause_time = 0xFFFF;
  507. else
  508. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  509. adapter->hw.fc_send_xon = 1;
  510. adapter->hw.fc = adapter->hw.original_fc;
  511. /* Allow time for pending master requests to run */
  512. e1000_reset_hw(&adapter->hw);
  513. if (adapter->hw.mac_type >= e1000_82544)
  514. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  515. if (e1000_init_hw(&adapter->hw))
  516. DPRINTK(PROBE, ERR, "Hardware Error\n");
  517. e1000_update_mng_vlan(adapter);
  518. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  519. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  520. e1000_reset_adaptive(&adapter->hw);
  521. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  522. if (adapter->en_mng_pt) {
  523. manc = E1000_READ_REG(&adapter->hw, MANC);
  524. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  525. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  526. }
  527. }
  528. /**
  529. * e1000_probe - Device Initialization Routine
  530. * @pdev: PCI device information struct
  531. * @ent: entry in e1000_pci_tbl
  532. *
  533. * Returns 0 on success, negative on failure
  534. *
  535. * e1000_probe initializes an adapter identified by a pci_dev structure.
  536. * The OS initialization, configuring of the adapter private structure,
  537. * and a hardware reset occur.
  538. **/
  539. static int __devinit
  540. e1000_probe(struct pci_dev *pdev,
  541. const struct pci_device_id *ent)
  542. {
  543. struct net_device *netdev;
  544. struct e1000_adapter *adapter;
  545. unsigned long mmio_start, mmio_len;
  546. static int cards_found = 0;
  547. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  548. int i, err, pci_using_dac;
  549. uint16_t eeprom_data;
  550. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  551. if ((err = pci_enable_device(pdev)))
  552. return err;
  553. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  554. pci_using_dac = 1;
  555. } else {
  556. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  557. E1000_ERR("No usable DMA configuration, aborting\n");
  558. return err;
  559. }
  560. pci_using_dac = 0;
  561. }
  562. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  563. return err;
  564. pci_set_master(pdev);
  565. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  566. if (!netdev) {
  567. err = -ENOMEM;
  568. goto err_alloc_etherdev;
  569. }
  570. SET_MODULE_OWNER(netdev);
  571. SET_NETDEV_DEV(netdev, &pdev->dev);
  572. pci_set_drvdata(pdev, netdev);
  573. adapter = netdev_priv(netdev);
  574. adapter->netdev = netdev;
  575. adapter->pdev = pdev;
  576. adapter->hw.back = adapter;
  577. adapter->msg_enable = (1 << debug) - 1;
  578. mmio_start = pci_resource_start(pdev, BAR_0);
  579. mmio_len = pci_resource_len(pdev, BAR_0);
  580. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  581. if (!adapter->hw.hw_addr) {
  582. err = -EIO;
  583. goto err_ioremap;
  584. }
  585. for (i = BAR_1; i <= BAR_5; i++) {
  586. if (pci_resource_len(pdev, i) == 0)
  587. continue;
  588. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  589. adapter->hw.io_base = pci_resource_start(pdev, i);
  590. break;
  591. }
  592. }
  593. netdev->open = &e1000_open;
  594. netdev->stop = &e1000_close;
  595. netdev->hard_start_xmit = &e1000_xmit_frame;
  596. netdev->get_stats = &e1000_get_stats;
  597. netdev->set_multicast_list = &e1000_set_multi;
  598. netdev->set_mac_address = &e1000_set_mac;
  599. netdev->change_mtu = &e1000_change_mtu;
  600. netdev->do_ioctl = &e1000_ioctl;
  601. e1000_set_ethtool_ops(netdev);
  602. netdev->tx_timeout = &e1000_tx_timeout;
  603. netdev->watchdog_timeo = 5 * HZ;
  604. #ifdef CONFIG_E1000_NAPI
  605. netdev->poll = &e1000_clean;
  606. netdev->weight = 64;
  607. #endif
  608. netdev->vlan_rx_register = e1000_vlan_rx_register;
  609. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  610. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  611. #ifdef CONFIG_NET_POLL_CONTROLLER
  612. netdev->poll_controller = e1000_netpoll;
  613. #endif
  614. strcpy(netdev->name, pci_name(pdev));
  615. netdev->mem_start = mmio_start;
  616. netdev->mem_end = mmio_start + mmio_len;
  617. netdev->base_addr = adapter->hw.io_base;
  618. adapter->bd_number = cards_found;
  619. /* setup the private structure */
  620. if ((err = e1000_sw_init(adapter)))
  621. goto err_sw_init;
  622. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  623. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  624. /* if ksp3, indicate if it's port a being setup */
  625. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  626. e1000_ksp3_port_a == 0)
  627. adapter->ksp3_port_a = 1;
  628. e1000_ksp3_port_a++;
  629. /* Reset for multiple KP3 adapters */
  630. if (e1000_ksp3_port_a == 4)
  631. e1000_ksp3_port_a = 0;
  632. if (adapter->hw.mac_type >= e1000_82543) {
  633. netdev->features = NETIF_F_SG |
  634. NETIF_F_HW_CSUM |
  635. NETIF_F_HW_VLAN_TX |
  636. NETIF_F_HW_VLAN_RX |
  637. NETIF_F_HW_VLAN_FILTER;
  638. }
  639. #ifdef NETIF_F_TSO
  640. if ((adapter->hw.mac_type >= e1000_82544) &&
  641. (adapter->hw.mac_type != e1000_82547))
  642. netdev->features |= NETIF_F_TSO;
  643. #ifdef NETIF_F_TSO_IPV6
  644. if (adapter->hw.mac_type > e1000_82547_rev_2)
  645. netdev->features |= NETIF_F_TSO_IPV6;
  646. #endif
  647. #endif
  648. if (pci_using_dac)
  649. netdev->features |= NETIF_F_HIGHDMA;
  650. /* hard_start_xmit is safe against parallel locking */
  651. netdev->features |= NETIF_F_LLTX;
  652. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  653. /* before reading the EEPROM, reset the controller to
  654. * put the device in a known good starting state */
  655. e1000_reset_hw(&adapter->hw);
  656. /* make sure the EEPROM is good */
  657. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  658. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  659. err = -EIO;
  660. goto err_eeprom;
  661. }
  662. /* copy the MAC address out of the EEPROM */
  663. if (e1000_read_mac_addr(&adapter->hw))
  664. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  665. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  666. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  667. if (!is_valid_ether_addr(netdev->perm_addr)) {
  668. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  669. err = -EIO;
  670. goto err_eeprom;
  671. }
  672. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  673. e1000_get_bus_info(&adapter->hw);
  674. init_timer(&adapter->tx_fifo_stall_timer);
  675. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  676. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  677. init_timer(&adapter->watchdog_timer);
  678. adapter->watchdog_timer.function = &e1000_watchdog;
  679. adapter->watchdog_timer.data = (unsigned long) adapter;
  680. INIT_WORK(&adapter->watchdog_task,
  681. (void (*)(void *))e1000_watchdog_task, adapter);
  682. init_timer(&adapter->phy_info_timer);
  683. adapter->phy_info_timer.function = &e1000_update_phy_info;
  684. adapter->phy_info_timer.data = (unsigned long) adapter;
  685. INIT_WORK(&adapter->reset_task,
  686. (void (*)(void *))e1000_reset_task, netdev);
  687. /* we're going to reset, so assume we have no link for now */
  688. netif_carrier_off(netdev);
  689. netif_stop_queue(netdev);
  690. e1000_check_options(adapter);
  691. /* Initial Wake on LAN setting
  692. * If APM wake is enabled in the EEPROM,
  693. * enable the ACPI Magic Packet filter
  694. */
  695. switch (adapter->hw.mac_type) {
  696. case e1000_82542_rev2_0:
  697. case e1000_82542_rev2_1:
  698. case e1000_82543:
  699. break;
  700. case e1000_82544:
  701. e1000_read_eeprom(&adapter->hw,
  702. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  703. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  704. break;
  705. case e1000_82546:
  706. case e1000_82546_rev_3:
  707. case e1000_82571:
  708. case e1000_80003es2lan:
  709. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  710. e1000_read_eeprom(&adapter->hw,
  711. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  712. break;
  713. }
  714. /* Fall Through */
  715. default:
  716. e1000_read_eeprom(&adapter->hw,
  717. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  718. break;
  719. }
  720. if (eeprom_data & eeprom_apme_mask)
  721. adapter->wol |= E1000_WUFC_MAG;
  722. /* print bus type/speed/width info */
  723. {
  724. struct e1000_hw *hw = &adapter->hw;
  725. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  726. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  727. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  728. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  729. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  730. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  731. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  732. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  733. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  734. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  735. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  736. "32-bit"));
  737. }
  738. for (i = 0; i < 6; i++)
  739. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  740. /* reset the hardware with the new settings */
  741. e1000_reset(adapter);
  742. /* If the controller is 82573 and f/w is AMT, do not set
  743. * DRV_LOAD until the interface is up. For all other cases,
  744. * let the f/w know that the h/w is now under the control
  745. * of the driver. */
  746. if (adapter->hw.mac_type != e1000_82573 ||
  747. !e1000_check_mng_mode(&adapter->hw))
  748. e1000_get_hw_control(adapter);
  749. strcpy(netdev->name, "eth%d");
  750. if ((err = register_netdev(netdev)))
  751. goto err_register;
  752. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  753. cards_found++;
  754. return 0;
  755. err_register:
  756. err_sw_init:
  757. err_eeprom:
  758. iounmap(adapter->hw.hw_addr);
  759. err_ioremap:
  760. free_netdev(netdev);
  761. err_alloc_etherdev:
  762. pci_release_regions(pdev);
  763. return err;
  764. }
  765. /**
  766. * e1000_remove - Device Removal Routine
  767. * @pdev: PCI device information struct
  768. *
  769. * e1000_remove is called by the PCI subsystem to alert the driver
  770. * that it should release a PCI device. The could be caused by a
  771. * Hot-Plug event, or because the driver is going to be removed from
  772. * memory.
  773. **/
  774. static void __devexit
  775. e1000_remove(struct pci_dev *pdev)
  776. {
  777. struct net_device *netdev = pci_get_drvdata(pdev);
  778. struct e1000_adapter *adapter = netdev_priv(netdev);
  779. uint32_t manc;
  780. #ifdef CONFIG_E1000_NAPI
  781. int i;
  782. #endif
  783. flush_scheduled_work();
  784. if (adapter->hw.mac_type >= e1000_82540 &&
  785. adapter->hw.media_type == e1000_media_type_copper) {
  786. manc = E1000_READ_REG(&adapter->hw, MANC);
  787. if (manc & E1000_MANC_SMBUS_EN) {
  788. manc |= E1000_MANC_ARP_EN;
  789. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  790. }
  791. }
  792. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  793. * would have already happened in close and is redundant. */
  794. e1000_release_hw_control(adapter);
  795. unregister_netdev(netdev);
  796. #ifdef CONFIG_E1000_NAPI
  797. for (i = 0; i < adapter->num_rx_queues; i++)
  798. dev_put(&adapter->polling_netdev[i]);
  799. #endif
  800. if (!e1000_check_phy_reset_block(&adapter->hw))
  801. e1000_phy_hw_reset(&adapter->hw);
  802. kfree(adapter->tx_ring);
  803. kfree(adapter->rx_ring);
  804. #ifdef CONFIG_E1000_NAPI
  805. kfree(adapter->polling_netdev);
  806. #endif
  807. iounmap(adapter->hw.hw_addr);
  808. pci_release_regions(pdev);
  809. free_netdev(netdev);
  810. pci_disable_device(pdev);
  811. }
  812. /**
  813. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  814. * @adapter: board private structure to initialize
  815. *
  816. * e1000_sw_init initializes the Adapter private data structure.
  817. * Fields are initialized based on PCI device information and
  818. * OS network device settings (MTU size).
  819. **/
  820. static int __devinit
  821. e1000_sw_init(struct e1000_adapter *adapter)
  822. {
  823. struct e1000_hw *hw = &adapter->hw;
  824. struct net_device *netdev = adapter->netdev;
  825. struct pci_dev *pdev = adapter->pdev;
  826. #ifdef CONFIG_E1000_NAPI
  827. int i;
  828. #endif
  829. /* PCI config space info */
  830. hw->vendor_id = pdev->vendor;
  831. hw->device_id = pdev->device;
  832. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  833. hw->subsystem_id = pdev->subsystem_device;
  834. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  835. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  836. adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
  837. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  838. hw->max_frame_size = netdev->mtu +
  839. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  840. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  841. /* identify the MAC */
  842. if (e1000_set_mac_type(hw)) {
  843. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  844. return -EIO;
  845. }
  846. /* initialize eeprom parameters */
  847. if (e1000_init_eeprom_params(hw)) {
  848. E1000_ERR("EEPROM initialization failed\n");
  849. return -EIO;
  850. }
  851. switch (hw->mac_type) {
  852. default:
  853. break;
  854. case e1000_82541:
  855. case e1000_82547:
  856. case e1000_82541_rev_2:
  857. case e1000_82547_rev_2:
  858. hw->phy_init_script = 1;
  859. break;
  860. }
  861. e1000_set_media_type(hw);
  862. hw->wait_autoneg_complete = FALSE;
  863. hw->tbi_compatibility_en = TRUE;
  864. hw->adaptive_ifs = TRUE;
  865. /* Copper options */
  866. if (hw->media_type == e1000_media_type_copper) {
  867. hw->mdix = AUTO_ALL_MODES;
  868. hw->disable_polarity_correction = FALSE;
  869. hw->master_slave = E1000_MASTER_SLAVE;
  870. }
  871. adapter->num_tx_queues = 1;
  872. adapter->num_rx_queues = 1;
  873. if (e1000_alloc_queues(adapter)) {
  874. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  875. return -ENOMEM;
  876. }
  877. #ifdef CONFIG_E1000_NAPI
  878. for (i = 0; i < adapter->num_rx_queues; i++) {
  879. adapter->polling_netdev[i].priv = adapter;
  880. adapter->polling_netdev[i].poll = &e1000_clean;
  881. adapter->polling_netdev[i].weight = 64;
  882. dev_hold(&adapter->polling_netdev[i]);
  883. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  884. }
  885. spin_lock_init(&adapter->tx_queue_lock);
  886. #endif
  887. atomic_set(&adapter->irq_sem, 1);
  888. spin_lock_init(&adapter->stats_lock);
  889. return 0;
  890. }
  891. /**
  892. * e1000_alloc_queues - Allocate memory for all rings
  893. * @adapter: board private structure to initialize
  894. *
  895. * We allocate one ring per queue at run-time since we don't know the
  896. * number of queues at compile-time. The polling_netdev array is
  897. * intended for Multiqueue, but should work fine with a single queue.
  898. **/
  899. static int __devinit
  900. e1000_alloc_queues(struct e1000_adapter *adapter)
  901. {
  902. int size;
  903. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  904. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  905. if (!adapter->tx_ring)
  906. return -ENOMEM;
  907. memset(adapter->tx_ring, 0, size);
  908. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  909. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  910. if (!adapter->rx_ring) {
  911. kfree(adapter->tx_ring);
  912. return -ENOMEM;
  913. }
  914. memset(adapter->rx_ring, 0, size);
  915. #ifdef CONFIG_E1000_NAPI
  916. size = sizeof(struct net_device) * adapter->num_rx_queues;
  917. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  918. if (!adapter->polling_netdev) {
  919. kfree(adapter->tx_ring);
  920. kfree(adapter->rx_ring);
  921. return -ENOMEM;
  922. }
  923. memset(adapter->polling_netdev, 0, size);
  924. #endif
  925. return E1000_SUCCESS;
  926. }
  927. /**
  928. * e1000_open - Called when a network interface is made active
  929. * @netdev: network interface device structure
  930. *
  931. * Returns 0 on success, negative value on failure
  932. *
  933. * The open entry point is called when a network interface is made
  934. * active by the system (IFF_UP). At this point all resources needed
  935. * for transmit and receive operations are allocated, the interrupt
  936. * handler is registered with the OS, the watchdog timer is started,
  937. * and the stack is notified that the interface is ready.
  938. **/
  939. static int
  940. e1000_open(struct net_device *netdev)
  941. {
  942. struct e1000_adapter *adapter = netdev_priv(netdev);
  943. int err;
  944. /* allocate transmit descriptors */
  945. if ((err = e1000_setup_all_tx_resources(adapter)))
  946. goto err_setup_tx;
  947. /* allocate receive descriptors */
  948. if ((err = e1000_setup_all_rx_resources(adapter)))
  949. goto err_setup_rx;
  950. if ((err = e1000_up(adapter)))
  951. goto err_up;
  952. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  953. if ((adapter->hw.mng_cookie.status &
  954. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  955. e1000_update_mng_vlan(adapter);
  956. }
  957. /* If AMT is enabled, let the firmware know that the network
  958. * interface is now open */
  959. if (adapter->hw.mac_type == e1000_82573 &&
  960. e1000_check_mng_mode(&adapter->hw))
  961. e1000_get_hw_control(adapter);
  962. return E1000_SUCCESS;
  963. err_up:
  964. e1000_free_all_rx_resources(adapter);
  965. err_setup_rx:
  966. e1000_free_all_tx_resources(adapter);
  967. err_setup_tx:
  968. e1000_reset(adapter);
  969. return err;
  970. }
  971. /**
  972. * e1000_close - Disables a network interface
  973. * @netdev: network interface device structure
  974. *
  975. * Returns 0, this is not allowed to fail
  976. *
  977. * The close entry point is called when an interface is de-activated
  978. * by the OS. The hardware is still under the drivers control, but
  979. * needs to be disabled. A global MAC reset is issued to stop the
  980. * hardware, and all transmit and receive resources are freed.
  981. **/
  982. static int
  983. e1000_close(struct net_device *netdev)
  984. {
  985. struct e1000_adapter *adapter = netdev_priv(netdev);
  986. e1000_down(adapter);
  987. e1000_free_all_tx_resources(adapter);
  988. e1000_free_all_rx_resources(adapter);
  989. if ((adapter->hw.mng_cookie.status &
  990. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  991. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  992. }
  993. /* If AMT is enabled, let the firmware know that the network
  994. * interface is now closed */
  995. if (adapter->hw.mac_type == e1000_82573 &&
  996. e1000_check_mng_mode(&adapter->hw))
  997. e1000_release_hw_control(adapter);
  998. return 0;
  999. }
  1000. /**
  1001. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1002. * @adapter: address of board private structure
  1003. * @start: address of beginning of memory
  1004. * @len: length of memory
  1005. **/
  1006. static boolean_t
  1007. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1008. void *start, unsigned long len)
  1009. {
  1010. unsigned long begin = (unsigned long) start;
  1011. unsigned long end = begin + len;
  1012. /* First rev 82545 and 82546 need to not allow any memory
  1013. * write location to cross 64k boundary due to errata 23 */
  1014. if (adapter->hw.mac_type == e1000_82545 ||
  1015. adapter->hw.mac_type == e1000_82546) {
  1016. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1017. }
  1018. return TRUE;
  1019. }
  1020. /**
  1021. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1022. * @adapter: board private structure
  1023. * @txdr: tx descriptor ring (for a specific queue) to setup
  1024. *
  1025. * Return 0 on success, negative on failure
  1026. **/
  1027. static int
  1028. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1029. struct e1000_tx_ring *txdr)
  1030. {
  1031. struct pci_dev *pdev = adapter->pdev;
  1032. int size;
  1033. size = sizeof(struct e1000_buffer) * txdr->count;
  1034. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1035. if (!txdr->buffer_info) {
  1036. DPRINTK(PROBE, ERR,
  1037. "Unable to allocate memory for the transmit descriptor ring\n");
  1038. return -ENOMEM;
  1039. }
  1040. memset(txdr->buffer_info, 0, size);
  1041. /* round up to nearest 4K */
  1042. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1043. E1000_ROUNDUP(txdr->size, 4096);
  1044. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1045. if (!txdr->desc) {
  1046. setup_tx_desc_die:
  1047. vfree(txdr->buffer_info);
  1048. DPRINTK(PROBE, ERR,
  1049. "Unable to allocate memory for the transmit descriptor ring\n");
  1050. return -ENOMEM;
  1051. }
  1052. /* Fix for errata 23, can't cross 64kB boundary */
  1053. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1054. void *olddesc = txdr->desc;
  1055. dma_addr_t olddma = txdr->dma;
  1056. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1057. "at %p\n", txdr->size, txdr->desc);
  1058. /* Try again, without freeing the previous */
  1059. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1060. /* Failed allocation, critical failure */
  1061. if (!txdr->desc) {
  1062. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1063. goto setup_tx_desc_die;
  1064. }
  1065. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1066. /* give up */
  1067. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1068. txdr->dma);
  1069. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1070. DPRINTK(PROBE, ERR,
  1071. "Unable to allocate aligned memory "
  1072. "for the transmit descriptor ring\n");
  1073. vfree(txdr->buffer_info);
  1074. return -ENOMEM;
  1075. } else {
  1076. /* Free old allocation, new allocation was successful */
  1077. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1078. }
  1079. }
  1080. memset(txdr->desc, 0, txdr->size);
  1081. txdr->next_to_use = 0;
  1082. txdr->next_to_clean = 0;
  1083. spin_lock_init(&txdr->tx_lock);
  1084. return 0;
  1085. }
  1086. /**
  1087. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1088. * (Descriptors) for all queues
  1089. * @adapter: board private structure
  1090. *
  1091. * If this function returns with an error, then it's possible one or
  1092. * more of the rings is populated (while the rest are not). It is the
  1093. * callers duty to clean those orphaned rings.
  1094. *
  1095. * Return 0 on success, negative on failure
  1096. **/
  1097. int
  1098. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1099. {
  1100. int i, err = 0;
  1101. for (i = 0; i < adapter->num_tx_queues; i++) {
  1102. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1103. if (err) {
  1104. DPRINTK(PROBE, ERR,
  1105. "Allocation for Tx Queue %u failed\n", i);
  1106. break;
  1107. }
  1108. }
  1109. return err;
  1110. }
  1111. /**
  1112. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1113. * @adapter: board private structure
  1114. *
  1115. * Configure the Tx unit of the MAC after a reset.
  1116. **/
  1117. static void
  1118. e1000_configure_tx(struct e1000_adapter *adapter)
  1119. {
  1120. uint64_t tdba;
  1121. struct e1000_hw *hw = &adapter->hw;
  1122. uint32_t tdlen, tctl, tipg, tarc;
  1123. uint32_t ipgr1, ipgr2;
  1124. /* Setup the HW Tx Head and Tail descriptor pointers */
  1125. switch (adapter->num_tx_queues) {
  1126. case 1:
  1127. default:
  1128. tdba = adapter->tx_ring[0].dma;
  1129. tdlen = adapter->tx_ring[0].count *
  1130. sizeof(struct e1000_tx_desc);
  1131. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1132. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1133. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1134. E1000_WRITE_REG(hw, TDH, 0);
  1135. E1000_WRITE_REG(hw, TDT, 0);
  1136. adapter->tx_ring[0].tdh = E1000_TDH;
  1137. adapter->tx_ring[0].tdt = E1000_TDT;
  1138. break;
  1139. }
  1140. /* Set the default values for the Tx Inter Packet Gap timer */
  1141. if (hw->media_type == e1000_media_type_fiber ||
  1142. hw->media_type == e1000_media_type_internal_serdes)
  1143. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1144. else
  1145. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1146. switch (hw->mac_type) {
  1147. case e1000_82542_rev2_0:
  1148. case e1000_82542_rev2_1:
  1149. tipg = DEFAULT_82542_TIPG_IPGT;
  1150. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1151. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1152. break;
  1153. case e1000_80003es2lan:
  1154. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1155. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1156. break;
  1157. default:
  1158. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1159. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1160. break;
  1161. }
  1162. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1163. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1164. E1000_WRITE_REG(hw, TIPG, tipg);
  1165. /* Set the Tx Interrupt Delay register */
  1166. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1167. if (hw->mac_type >= e1000_82540)
  1168. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1169. /* Program the Transmit Control Register */
  1170. tctl = E1000_READ_REG(hw, TCTL);
  1171. tctl &= ~E1000_TCTL_CT;
  1172. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1173. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1174. #ifdef DISABLE_MULR
  1175. /* disable Multiple Reads for debugging */
  1176. tctl &= ~E1000_TCTL_MULR;
  1177. #endif
  1178. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1179. tarc = E1000_READ_REG(hw, TARC0);
  1180. tarc |= ((1 << 25) | (1 << 21));
  1181. E1000_WRITE_REG(hw, TARC0, tarc);
  1182. tarc = E1000_READ_REG(hw, TARC1);
  1183. tarc |= (1 << 25);
  1184. if (tctl & E1000_TCTL_MULR)
  1185. tarc &= ~(1 << 28);
  1186. else
  1187. tarc |= (1 << 28);
  1188. E1000_WRITE_REG(hw, TARC1, tarc);
  1189. } else if (hw->mac_type == e1000_80003es2lan) {
  1190. tarc = E1000_READ_REG(hw, TARC0);
  1191. tarc |= 1;
  1192. if (hw->media_type == e1000_media_type_internal_serdes)
  1193. tarc |= (1 << 20);
  1194. E1000_WRITE_REG(hw, TARC0, tarc);
  1195. tarc = E1000_READ_REG(hw, TARC1);
  1196. tarc |= 1;
  1197. E1000_WRITE_REG(hw, TARC1, tarc);
  1198. }
  1199. e1000_config_collision_dist(hw);
  1200. /* Setup Transmit Descriptor Settings for eop descriptor */
  1201. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1202. E1000_TXD_CMD_IFCS;
  1203. if (hw->mac_type < e1000_82543)
  1204. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1205. else
  1206. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1207. /* Cache if we're 82544 running in PCI-X because we'll
  1208. * need this to apply a workaround later in the send path. */
  1209. if (hw->mac_type == e1000_82544 &&
  1210. hw->bus_type == e1000_bus_type_pcix)
  1211. adapter->pcix_82544 = 1;
  1212. E1000_WRITE_REG(hw, TCTL, tctl);
  1213. }
  1214. /**
  1215. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1216. * @adapter: board private structure
  1217. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1218. *
  1219. * Returns 0 on success, negative on failure
  1220. **/
  1221. static int
  1222. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1223. struct e1000_rx_ring *rxdr)
  1224. {
  1225. struct pci_dev *pdev = adapter->pdev;
  1226. int size, desc_len;
  1227. size = sizeof(struct e1000_buffer) * rxdr->count;
  1228. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1229. if (!rxdr->buffer_info) {
  1230. DPRINTK(PROBE, ERR,
  1231. "Unable to allocate memory for the receive descriptor ring\n");
  1232. return -ENOMEM;
  1233. }
  1234. memset(rxdr->buffer_info, 0, size);
  1235. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1236. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1237. if (!rxdr->ps_page) {
  1238. vfree(rxdr->buffer_info);
  1239. DPRINTK(PROBE, ERR,
  1240. "Unable to allocate memory for the receive descriptor ring\n");
  1241. return -ENOMEM;
  1242. }
  1243. memset(rxdr->ps_page, 0, size);
  1244. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1245. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1246. if (!rxdr->ps_page_dma) {
  1247. vfree(rxdr->buffer_info);
  1248. kfree(rxdr->ps_page);
  1249. DPRINTK(PROBE, ERR,
  1250. "Unable to allocate memory for the receive descriptor ring\n");
  1251. return -ENOMEM;
  1252. }
  1253. memset(rxdr->ps_page_dma, 0, size);
  1254. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1255. desc_len = sizeof(struct e1000_rx_desc);
  1256. else
  1257. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1258. /* Round up to nearest 4K */
  1259. rxdr->size = rxdr->count * desc_len;
  1260. E1000_ROUNDUP(rxdr->size, 4096);
  1261. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1262. if (!rxdr->desc) {
  1263. DPRINTK(PROBE, ERR,
  1264. "Unable to allocate memory for the receive descriptor ring\n");
  1265. setup_rx_desc_die:
  1266. vfree(rxdr->buffer_info);
  1267. kfree(rxdr->ps_page);
  1268. kfree(rxdr->ps_page_dma);
  1269. return -ENOMEM;
  1270. }
  1271. /* Fix for errata 23, can't cross 64kB boundary */
  1272. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1273. void *olddesc = rxdr->desc;
  1274. dma_addr_t olddma = rxdr->dma;
  1275. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1276. "at %p\n", rxdr->size, rxdr->desc);
  1277. /* Try again, without freeing the previous */
  1278. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1279. /* Failed allocation, critical failure */
  1280. if (!rxdr->desc) {
  1281. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1282. DPRINTK(PROBE, ERR,
  1283. "Unable to allocate memory "
  1284. "for the receive descriptor ring\n");
  1285. goto setup_rx_desc_die;
  1286. }
  1287. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1288. /* give up */
  1289. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1290. rxdr->dma);
  1291. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1292. DPRINTK(PROBE, ERR,
  1293. "Unable to allocate aligned memory "
  1294. "for the receive descriptor ring\n");
  1295. goto setup_rx_desc_die;
  1296. } else {
  1297. /* Free old allocation, new allocation was successful */
  1298. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1299. }
  1300. }
  1301. memset(rxdr->desc, 0, rxdr->size);
  1302. rxdr->next_to_clean = 0;
  1303. rxdr->next_to_use = 0;
  1304. return 0;
  1305. }
  1306. /**
  1307. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1308. * (Descriptors) for all queues
  1309. * @adapter: board private structure
  1310. *
  1311. * If this function returns with an error, then it's possible one or
  1312. * more of the rings is populated (while the rest are not). It is the
  1313. * callers duty to clean those orphaned rings.
  1314. *
  1315. * Return 0 on success, negative on failure
  1316. **/
  1317. int
  1318. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1319. {
  1320. int i, err = 0;
  1321. for (i = 0; i < adapter->num_rx_queues; i++) {
  1322. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1323. if (err) {
  1324. DPRINTK(PROBE, ERR,
  1325. "Allocation for Rx Queue %u failed\n", i);
  1326. break;
  1327. }
  1328. }
  1329. return err;
  1330. }
  1331. /**
  1332. * e1000_setup_rctl - configure the receive control registers
  1333. * @adapter: Board private structure
  1334. **/
  1335. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1336. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1337. static void
  1338. e1000_setup_rctl(struct e1000_adapter *adapter)
  1339. {
  1340. uint32_t rctl, rfctl;
  1341. uint32_t psrctl = 0;
  1342. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1343. uint32_t pages = 0;
  1344. #endif
  1345. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1346. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1347. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1348. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1349. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1350. if (adapter->hw.mac_type > e1000_82543)
  1351. rctl |= E1000_RCTL_SECRC;
  1352. if (adapter->hw.tbi_compatibility_on == 1)
  1353. rctl |= E1000_RCTL_SBP;
  1354. else
  1355. rctl &= ~E1000_RCTL_SBP;
  1356. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1357. rctl &= ~E1000_RCTL_LPE;
  1358. else
  1359. rctl |= E1000_RCTL_LPE;
  1360. /* Setup buffer sizes */
  1361. rctl &= ~E1000_RCTL_SZ_4096;
  1362. rctl |= E1000_RCTL_BSEX;
  1363. switch (adapter->rx_buffer_len) {
  1364. case E1000_RXBUFFER_256:
  1365. rctl |= E1000_RCTL_SZ_256;
  1366. rctl &= ~E1000_RCTL_BSEX;
  1367. break;
  1368. case E1000_RXBUFFER_512:
  1369. rctl |= E1000_RCTL_SZ_512;
  1370. rctl &= ~E1000_RCTL_BSEX;
  1371. break;
  1372. case E1000_RXBUFFER_1024:
  1373. rctl |= E1000_RCTL_SZ_1024;
  1374. rctl &= ~E1000_RCTL_BSEX;
  1375. break;
  1376. case E1000_RXBUFFER_2048:
  1377. default:
  1378. rctl |= E1000_RCTL_SZ_2048;
  1379. rctl &= ~E1000_RCTL_BSEX;
  1380. break;
  1381. case E1000_RXBUFFER_4096:
  1382. rctl |= E1000_RCTL_SZ_4096;
  1383. break;
  1384. case E1000_RXBUFFER_8192:
  1385. rctl |= E1000_RCTL_SZ_8192;
  1386. break;
  1387. case E1000_RXBUFFER_16384:
  1388. rctl |= E1000_RCTL_SZ_16384;
  1389. break;
  1390. }
  1391. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1392. /* 82571 and greater support packet-split where the protocol
  1393. * header is placed in skb->data and the packet data is
  1394. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1395. * In the case of a non-split, skb->data is linearly filled,
  1396. * followed by the page buffers. Therefore, skb->data is
  1397. * sized to hold the largest protocol header.
  1398. */
  1399. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1400. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1401. PAGE_SIZE <= 16384)
  1402. adapter->rx_ps_pages = pages;
  1403. else
  1404. adapter->rx_ps_pages = 0;
  1405. #endif
  1406. if (adapter->rx_ps_pages) {
  1407. /* Configure extra packet-split registers */
  1408. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1409. rfctl |= E1000_RFCTL_EXTEN;
  1410. /* disable IPv6 packet split support */
  1411. rfctl |= E1000_RFCTL_IPV6_DIS;
  1412. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1413. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1414. psrctl |= adapter->rx_ps_bsize0 >>
  1415. E1000_PSRCTL_BSIZE0_SHIFT;
  1416. switch (adapter->rx_ps_pages) {
  1417. case 3:
  1418. psrctl |= PAGE_SIZE <<
  1419. E1000_PSRCTL_BSIZE3_SHIFT;
  1420. case 2:
  1421. psrctl |= PAGE_SIZE <<
  1422. E1000_PSRCTL_BSIZE2_SHIFT;
  1423. case 1:
  1424. psrctl |= PAGE_SIZE >>
  1425. E1000_PSRCTL_BSIZE1_SHIFT;
  1426. break;
  1427. }
  1428. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1429. }
  1430. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1431. }
  1432. /**
  1433. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1434. * @adapter: board private structure
  1435. *
  1436. * Configure the Rx unit of the MAC after a reset.
  1437. **/
  1438. static void
  1439. e1000_configure_rx(struct e1000_adapter *adapter)
  1440. {
  1441. uint64_t rdba;
  1442. struct e1000_hw *hw = &adapter->hw;
  1443. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1444. if (adapter->rx_ps_pages) {
  1445. /* this is a 32 byte descriptor */
  1446. rdlen = adapter->rx_ring[0].count *
  1447. sizeof(union e1000_rx_desc_packet_split);
  1448. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1449. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1450. } else {
  1451. rdlen = adapter->rx_ring[0].count *
  1452. sizeof(struct e1000_rx_desc);
  1453. adapter->clean_rx = e1000_clean_rx_irq;
  1454. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1455. }
  1456. /* disable receives while setting up the descriptors */
  1457. rctl = E1000_READ_REG(hw, RCTL);
  1458. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1459. /* set the Receive Delay Timer Register */
  1460. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1461. if (hw->mac_type >= e1000_82540) {
  1462. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1463. if (adapter->itr > 1)
  1464. E1000_WRITE_REG(hw, ITR,
  1465. 1000000000 / (adapter->itr * 256));
  1466. }
  1467. if (hw->mac_type >= e1000_82571) {
  1468. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1469. /* Reset delay timers after every interrupt */
  1470. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1471. #ifdef CONFIG_E1000_NAPI
  1472. /* Auto-Mask interrupts upon ICR read. */
  1473. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1474. #endif
  1475. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1476. E1000_WRITE_REG(hw, IAM, ~0);
  1477. E1000_WRITE_FLUSH(hw);
  1478. }
  1479. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1480. * the Base and Length of the Rx Descriptor Ring */
  1481. switch (adapter->num_rx_queues) {
  1482. case 1:
  1483. default:
  1484. rdba = adapter->rx_ring[0].dma;
  1485. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1486. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1487. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1488. E1000_WRITE_REG(hw, RDH, 0);
  1489. E1000_WRITE_REG(hw, RDT, 0);
  1490. adapter->rx_ring[0].rdh = E1000_RDH;
  1491. adapter->rx_ring[0].rdt = E1000_RDT;
  1492. break;
  1493. }
  1494. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1495. if (hw->mac_type >= e1000_82543) {
  1496. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1497. if (adapter->rx_csum == TRUE) {
  1498. rxcsum |= E1000_RXCSUM_TUOFL;
  1499. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1500. * Must be used in conjunction with packet-split. */
  1501. if ((hw->mac_type >= e1000_82571) &&
  1502. (adapter->rx_ps_pages)) {
  1503. rxcsum |= E1000_RXCSUM_IPPCSE;
  1504. }
  1505. } else {
  1506. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1507. /* don't need to clear IPPCSE as it defaults to 0 */
  1508. }
  1509. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1510. }
  1511. if (hw->mac_type == e1000_82573)
  1512. E1000_WRITE_REG(hw, ERT, 0x0100);
  1513. /* Enable Receives */
  1514. E1000_WRITE_REG(hw, RCTL, rctl);
  1515. }
  1516. /**
  1517. * e1000_free_tx_resources - Free Tx Resources per Queue
  1518. * @adapter: board private structure
  1519. * @tx_ring: Tx descriptor ring for a specific queue
  1520. *
  1521. * Free all transmit software resources
  1522. **/
  1523. static void
  1524. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1525. struct e1000_tx_ring *tx_ring)
  1526. {
  1527. struct pci_dev *pdev = adapter->pdev;
  1528. e1000_clean_tx_ring(adapter, tx_ring);
  1529. vfree(tx_ring->buffer_info);
  1530. tx_ring->buffer_info = NULL;
  1531. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1532. tx_ring->desc = NULL;
  1533. }
  1534. /**
  1535. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1536. * @adapter: board private structure
  1537. *
  1538. * Free all transmit software resources
  1539. **/
  1540. void
  1541. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1542. {
  1543. int i;
  1544. for (i = 0; i < adapter->num_tx_queues; i++)
  1545. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1546. }
  1547. static void
  1548. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1549. struct e1000_buffer *buffer_info)
  1550. {
  1551. if (buffer_info->dma) {
  1552. pci_unmap_page(adapter->pdev,
  1553. buffer_info->dma,
  1554. buffer_info->length,
  1555. PCI_DMA_TODEVICE);
  1556. }
  1557. if (buffer_info->skb)
  1558. dev_kfree_skb_any(buffer_info->skb);
  1559. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1560. }
  1561. /**
  1562. * e1000_clean_tx_ring - Free Tx Buffers
  1563. * @adapter: board private structure
  1564. * @tx_ring: ring to be cleaned
  1565. **/
  1566. static void
  1567. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1568. struct e1000_tx_ring *tx_ring)
  1569. {
  1570. struct e1000_buffer *buffer_info;
  1571. unsigned long size;
  1572. unsigned int i;
  1573. /* Free all the Tx ring sk_buffs */
  1574. for (i = 0; i < tx_ring->count; i++) {
  1575. buffer_info = &tx_ring->buffer_info[i];
  1576. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1577. }
  1578. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1579. memset(tx_ring->buffer_info, 0, size);
  1580. /* Zero out the descriptor ring */
  1581. memset(tx_ring->desc, 0, tx_ring->size);
  1582. tx_ring->next_to_use = 0;
  1583. tx_ring->next_to_clean = 0;
  1584. tx_ring->last_tx_tso = 0;
  1585. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1586. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1587. }
  1588. /**
  1589. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1590. * @adapter: board private structure
  1591. **/
  1592. static void
  1593. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1594. {
  1595. int i;
  1596. for (i = 0; i < adapter->num_tx_queues; i++)
  1597. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1598. }
  1599. /**
  1600. * e1000_free_rx_resources - Free Rx Resources
  1601. * @adapter: board private structure
  1602. * @rx_ring: ring to clean the resources from
  1603. *
  1604. * Free all receive software resources
  1605. **/
  1606. static void
  1607. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1608. struct e1000_rx_ring *rx_ring)
  1609. {
  1610. struct pci_dev *pdev = adapter->pdev;
  1611. e1000_clean_rx_ring(adapter, rx_ring);
  1612. vfree(rx_ring->buffer_info);
  1613. rx_ring->buffer_info = NULL;
  1614. kfree(rx_ring->ps_page);
  1615. rx_ring->ps_page = NULL;
  1616. kfree(rx_ring->ps_page_dma);
  1617. rx_ring->ps_page_dma = NULL;
  1618. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1619. rx_ring->desc = NULL;
  1620. }
  1621. /**
  1622. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1623. * @adapter: board private structure
  1624. *
  1625. * Free all receive software resources
  1626. **/
  1627. void
  1628. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1629. {
  1630. int i;
  1631. for (i = 0; i < adapter->num_rx_queues; i++)
  1632. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1633. }
  1634. /**
  1635. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1636. * @adapter: board private structure
  1637. * @rx_ring: ring to free buffers from
  1638. **/
  1639. static void
  1640. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1641. struct e1000_rx_ring *rx_ring)
  1642. {
  1643. struct e1000_buffer *buffer_info;
  1644. struct e1000_ps_page *ps_page;
  1645. struct e1000_ps_page_dma *ps_page_dma;
  1646. struct pci_dev *pdev = adapter->pdev;
  1647. unsigned long size;
  1648. unsigned int i, j;
  1649. /* Free all the Rx ring sk_buffs */
  1650. for (i = 0; i < rx_ring->count; i++) {
  1651. buffer_info = &rx_ring->buffer_info[i];
  1652. if (buffer_info->skb) {
  1653. pci_unmap_single(pdev,
  1654. buffer_info->dma,
  1655. buffer_info->length,
  1656. PCI_DMA_FROMDEVICE);
  1657. dev_kfree_skb(buffer_info->skb);
  1658. buffer_info->skb = NULL;
  1659. }
  1660. ps_page = &rx_ring->ps_page[i];
  1661. ps_page_dma = &rx_ring->ps_page_dma[i];
  1662. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1663. if (!ps_page->ps_page[j]) break;
  1664. pci_unmap_page(pdev,
  1665. ps_page_dma->ps_page_dma[j],
  1666. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1667. ps_page_dma->ps_page_dma[j] = 0;
  1668. put_page(ps_page->ps_page[j]);
  1669. ps_page->ps_page[j] = NULL;
  1670. }
  1671. }
  1672. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1673. memset(rx_ring->buffer_info, 0, size);
  1674. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1675. memset(rx_ring->ps_page, 0, size);
  1676. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1677. memset(rx_ring->ps_page_dma, 0, size);
  1678. /* Zero out the descriptor ring */
  1679. memset(rx_ring->desc, 0, rx_ring->size);
  1680. rx_ring->next_to_clean = 0;
  1681. rx_ring->next_to_use = 0;
  1682. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1683. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1684. }
  1685. /**
  1686. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1687. * @adapter: board private structure
  1688. **/
  1689. static void
  1690. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1691. {
  1692. int i;
  1693. for (i = 0; i < adapter->num_rx_queues; i++)
  1694. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1695. }
  1696. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1697. * and memory write and invalidate disabled for certain operations
  1698. */
  1699. static void
  1700. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1701. {
  1702. struct net_device *netdev = adapter->netdev;
  1703. uint32_t rctl;
  1704. e1000_pci_clear_mwi(&adapter->hw);
  1705. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1706. rctl |= E1000_RCTL_RST;
  1707. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1708. E1000_WRITE_FLUSH(&adapter->hw);
  1709. mdelay(5);
  1710. if (netif_running(netdev))
  1711. e1000_clean_all_rx_rings(adapter);
  1712. }
  1713. static void
  1714. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1715. {
  1716. struct net_device *netdev = adapter->netdev;
  1717. uint32_t rctl;
  1718. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1719. rctl &= ~E1000_RCTL_RST;
  1720. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1721. E1000_WRITE_FLUSH(&adapter->hw);
  1722. mdelay(5);
  1723. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1724. e1000_pci_set_mwi(&adapter->hw);
  1725. if (netif_running(netdev)) {
  1726. /* No need to loop, because 82542 supports only 1 queue */
  1727. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1728. e1000_configure_rx(adapter);
  1729. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1730. }
  1731. }
  1732. /**
  1733. * e1000_set_mac - Change the Ethernet Address of the NIC
  1734. * @netdev: network interface device structure
  1735. * @p: pointer to an address structure
  1736. *
  1737. * Returns 0 on success, negative on failure
  1738. **/
  1739. static int
  1740. e1000_set_mac(struct net_device *netdev, void *p)
  1741. {
  1742. struct e1000_adapter *adapter = netdev_priv(netdev);
  1743. struct sockaddr *addr = p;
  1744. if (!is_valid_ether_addr(addr->sa_data))
  1745. return -EADDRNOTAVAIL;
  1746. /* 82542 2.0 needs to be in reset to write receive address registers */
  1747. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1748. e1000_enter_82542_rst(adapter);
  1749. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1750. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1751. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1752. /* With 82571 controllers, LAA may be overwritten (with the default)
  1753. * due to controller reset from the other port. */
  1754. if (adapter->hw.mac_type == e1000_82571) {
  1755. /* activate the work around */
  1756. adapter->hw.laa_is_present = 1;
  1757. /* Hold a copy of the LAA in RAR[14] This is done so that
  1758. * between the time RAR[0] gets clobbered and the time it
  1759. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1760. * of the RARs and no incoming packets directed to this port
  1761. * are dropped. Eventaully the LAA will be in RAR[0] and
  1762. * RAR[14] */
  1763. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1764. E1000_RAR_ENTRIES - 1);
  1765. }
  1766. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1767. e1000_leave_82542_rst(adapter);
  1768. return 0;
  1769. }
  1770. /**
  1771. * e1000_set_multi - Multicast and Promiscuous mode set
  1772. * @netdev: network interface device structure
  1773. *
  1774. * The set_multi entry point is called whenever the multicast address
  1775. * list or the network interface flags are updated. This routine is
  1776. * responsible for configuring the hardware for proper multicast,
  1777. * promiscuous mode, and all-multi behavior.
  1778. **/
  1779. static void
  1780. e1000_set_multi(struct net_device *netdev)
  1781. {
  1782. struct e1000_adapter *adapter = netdev_priv(netdev);
  1783. struct e1000_hw *hw = &adapter->hw;
  1784. struct dev_mc_list *mc_ptr;
  1785. uint32_t rctl;
  1786. uint32_t hash_value;
  1787. int i, rar_entries = E1000_RAR_ENTRIES;
  1788. /* reserve RAR[14] for LAA over-write work-around */
  1789. if (adapter->hw.mac_type == e1000_82571)
  1790. rar_entries--;
  1791. /* Check for Promiscuous and All Multicast modes */
  1792. rctl = E1000_READ_REG(hw, RCTL);
  1793. if (netdev->flags & IFF_PROMISC) {
  1794. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1795. } else if (netdev->flags & IFF_ALLMULTI) {
  1796. rctl |= E1000_RCTL_MPE;
  1797. rctl &= ~E1000_RCTL_UPE;
  1798. } else {
  1799. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1800. }
  1801. E1000_WRITE_REG(hw, RCTL, rctl);
  1802. /* 82542 2.0 needs to be in reset to write receive address registers */
  1803. if (hw->mac_type == e1000_82542_rev2_0)
  1804. e1000_enter_82542_rst(adapter);
  1805. /* load the first 14 multicast address into the exact filters 1-14
  1806. * RAR 0 is used for the station MAC adddress
  1807. * if there are not 14 addresses, go ahead and clear the filters
  1808. * -- with 82571 controllers only 0-13 entries are filled here
  1809. */
  1810. mc_ptr = netdev->mc_list;
  1811. for (i = 1; i < rar_entries; i++) {
  1812. if (mc_ptr) {
  1813. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1814. mc_ptr = mc_ptr->next;
  1815. } else {
  1816. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1817. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1818. }
  1819. }
  1820. /* clear the old settings from the multicast hash table */
  1821. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1822. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1823. /* load any remaining addresses into the hash table */
  1824. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1825. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1826. e1000_mta_set(hw, hash_value);
  1827. }
  1828. if (hw->mac_type == e1000_82542_rev2_0)
  1829. e1000_leave_82542_rst(adapter);
  1830. }
  1831. /* Need to wait a few seconds after link up to get diagnostic information from
  1832. * the phy */
  1833. static void
  1834. e1000_update_phy_info(unsigned long data)
  1835. {
  1836. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1837. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1838. }
  1839. /**
  1840. * e1000_82547_tx_fifo_stall - Timer Call-back
  1841. * @data: pointer to adapter cast into an unsigned long
  1842. **/
  1843. static void
  1844. e1000_82547_tx_fifo_stall(unsigned long data)
  1845. {
  1846. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1847. struct net_device *netdev = adapter->netdev;
  1848. uint32_t tctl;
  1849. if (atomic_read(&adapter->tx_fifo_stall)) {
  1850. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1851. E1000_READ_REG(&adapter->hw, TDH)) &&
  1852. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1853. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1854. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1855. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1856. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1857. E1000_WRITE_REG(&adapter->hw, TCTL,
  1858. tctl & ~E1000_TCTL_EN);
  1859. E1000_WRITE_REG(&adapter->hw, TDFT,
  1860. adapter->tx_head_addr);
  1861. E1000_WRITE_REG(&adapter->hw, TDFH,
  1862. adapter->tx_head_addr);
  1863. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1864. adapter->tx_head_addr);
  1865. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1866. adapter->tx_head_addr);
  1867. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1868. E1000_WRITE_FLUSH(&adapter->hw);
  1869. adapter->tx_fifo_head = 0;
  1870. atomic_set(&adapter->tx_fifo_stall, 0);
  1871. netif_wake_queue(netdev);
  1872. } else {
  1873. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1874. }
  1875. }
  1876. }
  1877. /**
  1878. * e1000_watchdog - Timer Call-back
  1879. * @data: pointer to adapter cast into an unsigned long
  1880. **/
  1881. static void
  1882. e1000_watchdog(unsigned long data)
  1883. {
  1884. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1885. /* Do the rest outside of interrupt context */
  1886. schedule_work(&adapter->watchdog_task);
  1887. }
  1888. static void
  1889. e1000_watchdog_task(struct e1000_adapter *adapter)
  1890. {
  1891. struct net_device *netdev = adapter->netdev;
  1892. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1893. uint32_t link, tctl;
  1894. e1000_check_for_link(&adapter->hw);
  1895. if (adapter->hw.mac_type == e1000_82573) {
  1896. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1897. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1898. e1000_update_mng_vlan(adapter);
  1899. }
  1900. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1901. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1902. link = !adapter->hw.serdes_link_down;
  1903. else
  1904. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1905. if (link) {
  1906. if (!netif_carrier_ok(netdev)) {
  1907. boolean_t txb2b = 1;
  1908. e1000_get_speed_and_duplex(&adapter->hw,
  1909. &adapter->link_speed,
  1910. &adapter->link_duplex);
  1911. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1912. adapter->link_speed,
  1913. adapter->link_duplex == FULL_DUPLEX ?
  1914. "Full Duplex" : "Half Duplex");
  1915. /* tweak tx_queue_len according to speed/duplex
  1916. * and adjust the timeout factor */
  1917. netdev->tx_queue_len = adapter->tx_queue_len;
  1918. adapter->tx_timeout_factor = 1;
  1919. switch (adapter->link_speed) {
  1920. case SPEED_10:
  1921. txb2b = 0;
  1922. netdev->tx_queue_len = 10;
  1923. adapter->tx_timeout_factor = 8;
  1924. break;
  1925. case SPEED_100:
  1926. txb2b = 0;
  1927. netdev->tx_queue_len = 100;
  1928. /* maybe add some timeout factor ? */
  1929. break;
  1930. }
  1931. if ((adapter->hw.mac_type == e1000_82571 ||
  1932. adapter->hw.mac_type == e1000_82572) &&
  1933. txb2b == 0) {
  1934. #define SPEED_MODE_BIT (1 << 21)
  1935. uint32_t tarc0;
  1936. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1937. tarc0 &= ~SPEED_MODE_BIT;
  1938. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1939. }
  1940. #ifdef NETIF_F_TSO
  1941. /* disable TSO for pcie and 10/100 speeds, to avoid
  1942. * some hardware issues */
  1943. if (!adapter->tso_force &&
  1944. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1945. switch (adapter->link_speed) {
  1946. case SPEED_10:
  1947. case SPEED_100:
  1948. DPRINTK(PROBE,INFO,
  1949. "10/100 speed: disabling TSO\n");
  1950. netdev->features &= ~NETIF_F_TSO;
  1951. break;
  1952. case SPEED_1000:
  1953. netdev->features |= NETIF_F_TSO;
  1954. break;
  1955. default:
  1956. /* oops */
  1957. break;
  1958. }
  1959. }
  1960. #endif
  1961. /* enable transmits in the hardware, need to do this
  1962. * after setting TARC0 */
  1963. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1964. tctl |= E1000_TCTL_EN;
  1965. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1966. netif_carrier_on(netdev);
  1967. netif_wake_queue(netdev);
  1968. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1969. adapter->smartspeed = 0;
  1970. }
  1971. } else {
  1972. if (netif_carrier_ok(netdev)) {
  1973. adapter->link_speed = 0;
  1974. adapter->link_duplex = 0;
  1975. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1976. netif_carrier_off(netdev);
  1977. netif_stop_queue(netdev);
  1978. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1979. /* 80003ES2LAN workaround--
  1980. * For packet buffer work-around on link down event;
  1981. * disable receives in the ISR and
  1982. * reset device here in the watchdog
  1983. */
  1984. if (adapter->hw.mac_type == e1000_80003es2lan) {
  1985. /* reset device */
  1986. schedule_work(&adapter->reset_task);
  1987. }
  1988. }
  1989. e1000_smartspeed(adapter);
  1990. }
  1991. e1000_update_stats(adapter);
  1992. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1993. adapter->tpt_old = adapter->stats.tpt;
  1994. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1995. adapter->colc_old = adapter->stats.colc;
  1996. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1997. adapter->gorcl_old = adapter->stats.gorcl;
  1998. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1999. adapter->gotcl_old = adapter->stats.gotcl;
  2000. e1000_update_adaptive(&adapter->hw);
  2001. if (!netif_carrier_ok(netdev)) {
  2002. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2003. /* We've lost link, so the controller stops DMA,
  2004. * but we've got queued Tx work that's never going
  2005. * to get done, so reset controller to flush Tx.
  2006. * (Do the reset outside of interrupt context). */
  2007. adapter->tx_timeout_count++;
  2008. schedule_work(&adapter->reset_task);
  2009. }
  2010. }
  2011. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2012. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2013. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2014. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2015. * else is between 2000-8000. */
  2016. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2017. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2018. adapter->gotcl - adapter->gorcl :
  2019. adapter->gorcl - adapter->gotcl) / 10000;
  2020. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2021. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2022. }
  2023. /* Cause software interrupt to ensure rx ring is cleaned */
  2024. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2025. /* Force detection of hung controller every watchdog period */
  2026. adapter->detect_tx_hung = TRUE;
  2027. /* With 82571 controllers, LAA may be overwritten due to controller
  2028. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2029. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2030. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2031. /* Reset the timer */
  2032. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2033. }
  2034. #define E1000_TX_FLAGS_CSUM 0x00000001
  2035. #define E1000_TX_FLAGS_VLAN 0x00000002
  2036. #define E1000_TX_FLAGS_TSO 0x00000004
  2037. #define E1000_TX_FLAGS_IPV4 0x00000008
  2038. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2039. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2040. static int
  2041. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2042. struct sk_buff *skb)
  2043. {
  2044. #ifdef NETIF_F_TSO
  2045. struct e1000_context_desc *context_desc;
  2046. struct e1000_buffer *buffer_info;
  2047. unsigned int i;
  2048. uint32_t cmd_length = 0;
  2049. uint16_t ipcse = 0, tucse, mss;
  2050. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2051. int err;
  2052. if (skb_shinfo(skb)->tso_size) {
  2053. if (skb_header_cloned(skb)) {
  2054. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2055. if (err)
  2056. return err;
  2057. }
  2058. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2059. mss = skb_shinfo(skb)->tso_size;
  2060. if (skb->protocol == ntohs(ETH_P_IP)) {
  2061. skb->nh.iph->tot_len = 0;
  2062. skb->nh.iph->check = 0;
  2063. skb->h.th->check =
  2064. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2065. skb->nh.iph->daddr,
  2066. 0,
  2067. IPPROTO_TCP,
  2068. 0);
  2069. cmd_length = E1000_TXD_CMD_IP;
  2070. ipcse = skb->h.raw - skb->data - 1;
  2071. #ifdef NETIF_F_TSO_IPV6
  2072. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2073. skb->nh.ipv6h->payload_len = 0;
  2074. skb->h.th->check =
  2075. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2076. &skb->nh.ipv6h->daddr,
  2077. 0,
  2078. IPPROTO_TCP,
  2079. 0);
  2080. ipcse = 0;
  2081. #endif
  2082. }
  2083. ipcss = skb->nh.raw - skb->data;
  2084. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2085. tucss = skb->h.raw - skb->data;
  2086. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2087. tucse = 0;
  2088. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2089. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2090. i = tx_ring->next_to_use;
  2091. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2092. buffer_info = &tx_ring->buffer_info[i];
  2093. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2094. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2095. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2096. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2097. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2098. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2099. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2100. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2101. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2102. buffer_info->time_stamp = jiffies;
  2103. if (++i == tx_ring->count) i = 0;
  2104. tx_ring->next_to_use = i;
  2105. return TRUE;
  2106. }
  2107. #endif
  2108. return FALSE;
  2109. }
  2110. static boolean_t
  2111. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2112. struct sk_buff *skb)
  2113. {
  2114. struct e1000_context_desc *context_desc;
  2115. struct e1000_buffer *buffer_info;
  2116. unsigned int i;
  2117. uint8_t css;
  2118. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2119. css = skb->h.raw - skb->data;
  2120. i = tx_ring->next_to_use;
  2121. buffer_info = &tx_ring->buffer_info[i];
  2122. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2123. context_desc->upper_setup.tcp_fields.tucss = css;
  2124. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2125. context_desc->upper_setup.tcp_fields.tucse = 0;
  2126. context_desc->tcp_seg_setup.data = 0;
  2127. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2128. buffer_info->time_stamp = jiffies;
  2129. if (unlikely(++i == tx_ring->count)) i = 0;
  2130. tx_ring->next_to_use = i;
  2131. return TRUE;
  2132. }
  2133. return FALSE;
  2134. }
  2135. #define E1000_MAX_TXD_PWR 12
  2136. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2137. static int
  2138. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2139. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2140. unsigned int nr_frags, unsigned int mss)
  2141. {
  2142. struct e1000_buffer *buffer_info;
  2143. unsigned int len = skb->len;
  2144. unsigned int offset = 0, size, count = 0, i;
  2145. unsigned int f;
  2146. len -= skb->data_len;
  2147. i = tx_ring->next_to_use;
  2148. while (len) {
  2149. buffer_info = &tx_ring->buffer_info[i];
  2150. size = min(len, max_per_txd);
  2151. #ifdef NETIF_F_TSO
  2152. /* Workaround for Controller erratum --
  2153. * descriptor for non-tso packet in a linear SKB that follows a
  2154. * tso gets written back prematurely before the data is fully
  2155. * DMA'd to the controller */
  2156. if (!skb->data_len && tx_ring->last_tx_tso &&
  2157. !skb_shinfo(skb)->tso_size) {
  2158. tx_ring->last_tx_tso = 0;
  2159. size -= 4;
  2160. }
  2161. /* Workaround for premature desc write-backs
  2162. * in TSO mode. Append 4-byte sentinel desc */
  2163. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2164. size -= 4;
  2165. #endif
  2166. /* work-around for errata 10 and it applies
  2167. * to all controllers in PCI-X mode
  2168. * The fix is to make sure that the first descriptor of a
  2169. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2170. */
  2171. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2172. (size > 2015) && count == 0))
  2173. size = 2015;
  2174. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2175. * terminating buffers within evenly-aligned dwords. */
  2176. if (unlikely(adapter->pcix_82544 &&
  2177. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2178. size > 4))
  2179. size -= 4;
  2180. buffer_info->length = size;
  2181. buffer_info->dma =
  2182. pci_map_single(adapter->pdev,
  2183. skb->data + offset,
  2184. size,
  2185. PCI_DMA_TODEVICE);
  2186. buffer_info->time_stamp = jiffies;
  2187. len -= size;
  2188. offset += size;
  2189. count++;
  2190. if (unlikely(++i == tx_ring->count)) i = 0;
  2191. }
  2192. for (f = 0; f < nr_frags; f++) {
  2193. struct skb_frag_struct *frag;
  2194. frag = &skb_shinfo(skb)->frags[f];
  2195. len = frag->size;
  2196. offset = frag->page_offset;
  2197. while (len) {
  2198. buffer_info = &tx_ring->buffer_info[i];
  2199. size = min(len, max_per_txd);
  2200. #ifdef NETIF_F_TSO
  2201. /* Workaround for premature desc write-backs
  2202. * in TSO mode. Append 4-byte sentinel desc */
  2203. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2204. size -= 4;
  2205. #endif
  2206. /* Workaround for potential 82544 hang in PCI-X.
  2207. * Avoid terminating buffers within evenly-aligned
  2208. * dwords. */
  2209. if (unlikely(adapter->pcix_82544 &&
  2210. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2211. size > 4))
  2212. size -= 4;
  2213. buffer_info->length = size;
  2214. buffer_info->dma =
  2215. pci_map_page(adapter->pdev,
  2216. frag->page,
  2217. offset,
  2218. size,
  2219. PCI_DMA_TODEVICE);
  2220. buffer_info->time_stamp = jiffies;
  2221. len -= size;
  2222. offset += size;
  2223. count++;
  2224. if (unlikely(++i == tx_ring->count)) i = 0;
  2225. }
  2226. }
  2227. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2228. tx_ring->buffer_info[i].skb = skb;
  2229. tx_ring->buffer_info[first].next_to_watch = i;
  2230. return count;
  2231. }
  2232. static void
  2233. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2234. int tx_flags, int count)
  2235. {
  2236. struct e1000_tx_desc *tx_desc = NULL;
  2237. struct e1000_buffer *buffer_info;
  2238. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2239. unsigned int i;
  2240. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2241. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2242. E1000_TXD_CMD_TSE;
  2243. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2244. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2245. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2246. }
  2247. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2248. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2249. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2250. }
  2251. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2252. txd_lower |= E1000_TXD_CMD_VLE;
  2253. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2254. }
  2255. i = tx_ring->next_to_use;
  2256. while (count--) {
  2257. buffer_info = &tx_ring->buffer_info[i];
  2258. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2259. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2260. tx_desc->lower.data =
  2261. cpu_to_le32(txd_lower | buffer_info->length);
  2262. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2263. if (unlikely(++i == tx_ring->count)) i = 0;
  2264. }
  2265. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2266. /* Force memory writes to complete before letting h/w
  2267. * know there are new descriptors to fetch. (Only
  2268. * applicable for weak-ordered memory model archs,
  2269. * such as IA-64). */
  2270. wmb();
  2271. tx_ring->next_to_use = i;
  2272. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2273. }
  2274. /**
  2275. * 82547 workaround to avoid controller hang in half-duplex environment.
  2276. * The workaround is to avoid queuing a large packet that would span
  2277. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2278. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2279. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2280. * to the beginning of the Tx FIFO.
  2281. **/
  2282. #define E1000_FIFO_HDR 0x10
  2283. #define E1000_82547_PAD_LEN 0x3E0
  2284. static int
  2285. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2286. {
  2287. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2288. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2289. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2290. if (adapter->link_duplex != HALF_DUPLEX)
  2291. goto no_fifo_stall_required;
  2292. if (atomic_read(&adapter->tx_fifo_stall))
  2293. return 1;
  2294. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2295. atomic_set(&adapter->tx_fifo_stall, 1);
  2296. return 1;
  2297. }
  2298. no_fifo_stall_required:
  2299. adapter->tx_fifo_head += skb_fifo_len;
  2300. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2301. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2302. return 0;
  2303. }
  2304. #define MINIMUM_DHCP_PACKET_SIZE 282
  2305. static int
  2306. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2307. {
  2308. struct e1000_hw *hw = &adapter->hw;
  2309. uint16_t length, offset;
  2310. if (vlan_tx_tag_present(skb)) {
  2311. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2312. ( adapter->hw.mng_cookie.status &
  2313. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2314. return 0;
  2315. }
  2316. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2317. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2318. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2319. const struct iphdr *ip =
  2320. (struct iphdr *)((uint8_t *)skb->data+14);
  2321. if (IPPROTO_UDP == ip->protocol) {
  2322. struct udphdr *udp =
  2323. (struct udphdr *)((uint8_t *)ip +
  2324. (ip->ihl << 2));
  2325. if (ntohs(udp->dest) == 67) {
  2326. offset = (uint8_t *)udp + 8 - skb->data;
  2327. length = skb->len - offset;
  2328. return e1000_mng_write_dhcp_info(hw,
  2329. (uint8_t *)udp + 8,
  2330. length);
  2331. }
  2332. }
  2333. }
  2334. }
  2335. return 0;
  2336. }
  2337. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2338. static int
  2339. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2340. {
  2341. struct e1000_adapter *adapter = netdev_priv(netdev);
  2342. struct e1000_tx_ring *tx_ring;
  2343. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2344. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2345. unsigned int tx_flags = 0;
  2346. unsigned int len = skb->len;
  2347. unsigned long flags;
  2348. unsigned int nr_frags = 0;
  2349. unsigned int mss = 0;
  2350. int count = 0;
  2351. int tso;
  2352. unsigned int f;
  2353. len -= skb->data_len;
  2354. tx_ring = adapter->tx_ring;
  2355. if (unlikely(skb->len <= 0)) {
  2356. dev_kfree_skb_any(skb);
  2357. return NETDEV_TX_OK;
  2358. }
  2359. #ifdef NETIF_F_TSO
  2360. mss = skb_shinfo(skb)->tso_size;
  2361. /* The controller does a simple calculation to
  2362. * make sure there is enough room in the FIFO before
  2363. * initiating the DMA for each buffer. The calc is:
  2364. * 4 = ceil(buffer len/mss). To make sure we don't
  2365. * overrun the FIFO, adjust the max buffer len if mss
  2366. * drops. */
  2367. if (mss) {
  2368. uint8_t hdr_len;
  2369. max_per_txd = min(mss << 2, max_per_txd);
  2370. max_txd_pwr = fls(max_per_txd) - 1;
  2371. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2372. * points to just header, pull a few bytes of payload from
  2373. * frags into skb->data */
  2374. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2375. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2376. switch (adapter->hw.mac_type) {
  2377. unsigned int pull_size;
  2378. case e1000_82571:
  2379. case e1000_82572:
  2380. case e1000_82573:
  2381. pull_size = min((unsigned int)4, skb->data_len);
  2382. if (!__pskb_pull_tail(skb, pull_size)) {
  2383. printk(KERN_ERR
  2384. "__pskb_pull_tail failed.\n");
  2385. dev_kfree_skb_any(skb);
  2386. return NETDEV_TX_OK;
  2387. }
  2388. len = skb->len - skb->data_len;
  2389. break;
  2390. default:
  2391. /* do nothing */
  2392. break;
  2393. }
  2394. }
  2395. }
  2396. /* reserve a descriptor for the offload context */
  2397. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2398. count++;
  2399. count++;
  2400. #else
  2401. if (skb->ip_summed == CHECKSUM_HW)
  2402. count++;
  2403. #endif
  2404. #ifdef NETIF_F_TSO
  2405. /* Controller Erratum workaround */
  2406. if (!skb->data_len && tx_ring->last_tx_tso &&
  2407. !skb_shinfo(skb)->tso_size)
  2408. count++;
  2409. #endif
  2410. count += TXD_USE_COUNT(len, max_txd_pwr);
  2411. if (adapter->pcix_82544)
  2412. count++;
  2413. /* work-around for errata 10 and it applies to all controllers
  2414. * in PCI-X mode, so add one more descriptor to the count
  2415. */
  2416. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2417. (len > 2015)))
  2418. count++;
  2419. nr_frags = skb_shinfo(skb)->nr_frags;
  2420. for (f = 0; f < nr_frags; f++)
  2421. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2422. max_txd_pwr);
  2423. if (adapter->pcix_82544)
  2424. count += nr_frags;
  2425. if (adapter->hw.tx_pkt_filtering &&
  2426. (adapter->hw.mac_type == e1000_82573))
  2427. e1000_transfer_dhcp_info(adapter, skb);
  2428. local_irq_save(flags);
  2429. if (!spin_trylock(&tx_ring->tx_lock)) {
  2430. /* Collision - tell upper layer to requeue */
  2431. local_irq_restore(flags);
  2432. return NETDEV_TX_LOCKED;
  2433. }
  2434. /* need: count + 2 desc gap to keep tail from touching
  2435. * head, otherwise try next time */
  2436. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2437. netif_stop_queue(netdev);
  2438. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2439. return NETDEV_TX_BUSY;
  2440. }
  2441. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2442. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2443. netif_stop_queue(netdev);
  2444. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2445. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2446. return NETDEV_TX_BUSY;
  2447. }
  2448. }
  2449. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2450. tx_flags |= E1000_TX_FLAGS_VLAN;
  2451. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2452. }
  2453. first = tx_ring->next_to_use;
  2454. tso = e1000_tso(adapter, tx_ring, skb);
  2455. if (tso < 0) {
  2456. dev_kfree_skb_any(skb);
  2457. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2458. return NETDEV_TX_OK;
  2459. }
  2460. if (likely(tso)) {
  2461. tx_ring->last_tx_tso = 1;
  2462. tx_flags |= E1000_TX_FLAGS_TSO;
  2463. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2464. tx_flags |= E1000_TX_FLAGS_CSUM;
  2465. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2466. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2467. * no longer assume, we must. */
  2468. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2469. tx_flags |= E1000_TX_FLAGS_IPV4;
  2470. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2471. e1000_tx_map(adapter, tx_ring, skb, first,
  2472. max_per_txd, nr_frags, mss));
  2473. netdev->trans_start = jiffies;
  2474. /* Make sure there is space in the ring for the next send. */
  2475. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2476. netif_stop_queue(netdev);
  2477. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2478. return NETDEV_TX_OK;
  2479. }
  2480. /**
  2481. * e1000_tx_timeout - Respond to a Tx Hang
  2482. * @netdev: network interface device structure
  2483. **/
  2484. static void
  2485. e1000_tx_timeout(struct net_device *netdev)
  2486. {
  2487. struct e1000_adapter *adapter = netdev_priv(netdev);
  2488. /* Do the reset outside of interrupt context */
  2489. adapter->tx_timeout_count++;
  2490. schedule_work(&adapter->reset_task);
  2491. }
  2492. static void
  2493. e1000_reset_task(struct net_device *netdev)
  2494. {
  2495. struct e1000_adapter *adapter = netdev_priv(netdev);
  2496. e1000_down(adapter);
  2497. e1000_up(adapter);
  2498. }
  2499. /**
  2500. * e1000_get_stats - Get System Network Statistics
  2501. * @netdev: network interface device structure
  2502. *
  2503. * Returns the address of the device statistics structure.
  2504. * The statistics are actually updated from the timer callback.
  2505. **/
  2506. static struct net_device_stats *
  2507. e1000_get_stats(struct net_device *netdev)
  2508. {
  2509. struct e1000_adapter *adapter = netdev_priv(netdev);
  2510. /* only return the current stats */
  2511. return &adapter->net_stats;
  2512. }
  2513. /**
  2514. * e1000_change_mtu - Change the Maximum Transfer Unit
  2515. * @netdev: network interface device structure
  2516. * @new_mtu: new value for maximum frame size
  2517. *
  2518. * Returns 0 on success, negative on failure
  2519. **/
  2520. static int
  2521. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2522. {
  2523. struct e1000_adapter *adapter = netdev_priv(netdev);
  2524. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2525. uint16_t eeprom_data = 0;
  2526. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2527. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2528. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2529. return -EINVAL;
  2530. }
  2531. /* Adapter-specific max frame size limits. */
  2532. switch (adapter->hw.mac_type) {
  2533. case e1000_undefined ... e1000_82542_rev2_1:
  2534. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2535. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2536. return -EINVAL;
  2537. }
  2538. break;
  2539. case e1000_82573:
  2540. /* only enable jumbo frames if ASPM is disabled completely
  2541. * this means both bits must be zero in 0x1A bits 3:2 */
  2542. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2543. &eeprom_data);
  2544. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2545. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2546. DPRINTK(PROBE, ERR,
  2547. "Jumbo Frames not supported.\n");
  2548. return -EINVAL;
  2549. }
  2550. break;
  2551. }
  2552. /* fall through to get support */
  2553. case e1000_82571:
  2554. case e1000_82572:
  2555. case e1000_80003es2lan:
  2556. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2557. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2558. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2559. return -EINVAL;
  2560. }
  2561. break;
  2562. default:
  2563. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2564. break;
  2565. }
  2566. /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2567. * means we reserve 2 more, this pushes us to allocate from the next
  2568. * larger slab size
  2569. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2570. if (max_frame <= E1000_RXBUFFER_256)
  2571. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2572. else if (max_frame <= E1000_RXBUFFER_512)
  2573. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2574. else if (max_frame <= E1000_RXBUFFER_1024)
  2575. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2576. else if (max_frame <= E1000_RXBUFFER_2048)
  2577. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2578. else if (max_frame <= E1000_RXBUFFER_4096)
  2579. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2580. else if (max_frame <= E1000_RXBUFFER_8192)
  2581. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2582. else if (max_frame <= E1000_RXBUFFER_16384)
  2583. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2584. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2585. #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
  2586. if (!adapter->hw.tbi_compatibility_on &&
  2587. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2588. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2589. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2590. netdev->mtu = new_mtu;
  2591. if (netif_running(netdev)) {
  2592. e1000_down(adapter);
  2593. e1000_up(adapter);
  2594. }
  2595. adapter->hw.max_frame_size = max_frame;
  2596. return 0;
  2597. }
  2598. /**
  2599. * e1000_update_stats - Update the board statistics counters
  2600. * @adapter: board private structure
  2601. **/
  2602. void
  2603. e1000_update_stats(struct e1000_adapter *adapter)
  2604. {
  2605. struct e1000_hw *hw = &adapter->hw;
  2606. unsigned long flags;
  2607. uint16_t phy_tmp;
  2608. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2609. spin_lock_irqsave(&adapter->stats_lock, flags);
  2610. /* these counters are modified from e1000_adjust_tbi_stats,
  2611. * called from the interrupt context, so they must only
  2612. * be written while holding adapter->stats_lock
  2613. */
  2614. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2615. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2616. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2617. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2618. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2619. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2620. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2621. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2622. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2623. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2624. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2625. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2626. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2627. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2628. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2629. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2630. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2631. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2632. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2633. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2634. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2635. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2636. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2637. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2638. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2639. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2640. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2641. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2642. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2643. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2644. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2645. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2646. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2647. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2648. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2649. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2650. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2651. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2652. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2653. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2654. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2655. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2656. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2657. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2658. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2659. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2660. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2661. /* used for adaptive IFS */
  2662. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2663. adapter->stats.tpt += hw->tx_packet_delta;
  2664. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2665. adapter->stats.colc += hw->collision_delta;
  2666. if (hw->mac_type >= e1000_82543) {
  2667. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2668. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2669. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2670. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2671. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2672. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2673. }
  2674. if (hw->mac_type > e1000_82547_rev_2) {
  2675. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2676. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2677. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2678. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2679. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2680. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2681. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2682. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2683. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2684. }
  2685. /* Fill out the OS statistics structure */
  2686. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2687. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2688. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2689. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2690. adapter->net_stats.multicast = adapter->stats.mprc;
  2691. adapter->net_stats.collisions = adapter->stats.colc;
  2692. /* Rx Errors */
  2693. /* RLEC on some newer hardware can be incorrect so build
  2694. * our own version based on RUC and ROC */
  2695. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2696. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2697. adapter->stats.ruc + adapter->stats.roc +
  2698. adapter->stats.cexterr;
  2699. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2700. adapter->stats.roc;
  2701. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2702. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2703. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2704. /* Tx Errors */
  2705. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2706. adapter->stats.latecol;
  2707. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2708. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2709. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2710. /* Tx Dropped needs to be maintained elsewhere */
  2711. /* Phy Stats */
  2712. if (hw->media_type == e1000_media_type_copper) {
  2713. if ((adapter->link_speed == SPEED_1000) &&
  2714. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2715. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2716. adapter->phy_stats.idle_errors += phy_tmp;
  2717. }
  2718. if ((hw->mac_type <= e1000_82546) &&
  2719. (hw->phy_type == e1000_phy_m88) &&
  2720. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2721. adapter->phy_stats.receive_errors += phy_tmp;
  2722. }
  2723. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2724. }
  2725. /**
  2726. * e1000_intr - Interrupt Handler
  2727. * @irq: interrupt number
  2728. * @data: pointer to a network interface device structure
  2729. * @pt_regs: CPU registers structure
  2730. **/
  2731. static irqreturn_t
  2732. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2733. {
  2734. struct net_device *netdev = data;
  2735. struct e1000_adapter *adapter = netdev_priv(netdev);
  2736. struct e1000_hw *hw = &adapter->hw;
  2737. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2738. #ifndef CONFIG_E1000_NAPI
  2739. int i;
  2740. #else
  2741. /* Interrupt Auto-Mask...upon reading ICR,
  2742. * interrupts are masked. No need for the
  2743. * IMC write, but it does mean we should
  2744. * account for it ASAP. */
  2745. if (likely(hw->mac_type >= e1000_82571))
  2746. atomic_inc(&adapter->irq_sem);
  2747. #endif
  2748. if (unlikely(!icr)) {
  2749. #ifdef CONFIG_E1000_NAPI
  2750. if (hw->mac_type >= e1000_82571)
  2751. e1000_irq_enable(adapter);
  2752. #endif
  2753. return IRQ_NONE; /* Not our interrupt */
  2754. }
  2755. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2756. hw->get_link_status = 1;
  2757. /* 80003ES2LAN workaround--
  2758. * For packet buffer work-around on link down event;
  2759. * disable receives here in the ISR and
  2760. * reset adapter in watchdog
  2761. */
  2762. if (netif_carrier_ok(netdev) &&
  2763. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2764. /* disable receives */
  2765. rctl = E1000_READ_REG(hw, RCTL);
  2766. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2767. }
  2768. mod_timer(&adapter->watchdog_timer, jiffies);
  2769. }
  2770. #ifdef CONFIG_E1000_NAPI
  2771. if (unlikely(hw->mac_type < e1000_82571)) {
  2772. atomic_inc(&adapter->irq_sem);
  2773. E1000_WRITE_REG(hw, IMC, ~0);
  2774. E1000_WRITE_FLUSH(hw);
  2775. }
  2776. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2777. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2778. else
  2779. e1000_irq_enable(adapter);
  2780. #else
  2781. /* Writing IMC and IMS is needed for 82547.
  2782. * Due to Hub Link bus being occupied, an interrupt
  2783. * de-assertion message is not able to be sent.
  2784. * When an interrupt assertion message is generated later,
  2785. * two messages are re-ordered and sent out.
  2786. * That causes APIC to think 82547 is in de-assertion
  2787. * state, while 82547 is in assertion state, resulting
  2788. * in dead lock. Writing IMC forces 82547 into
  2789. * de-assertion state.
  2790. */
  2791. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2792. atomic_inc(&adapter->irq_sem);
  2793. E1000_WRITE_REG(hw, IMC, ~0);
  2794. }
  2795. for (i = 0; i < E1000_MAX_INTR; i++)
  2796. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2797. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2798. break;
  2799. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2800. e1000_irq_enable(adapter);
  2801. #endif
  2802. return IRQ_HANDLED;
  2803. }
  2804. #ifdef CONFIG_E1000_NAPI
  2805. /**
  2806. * e1000_clean - NAPI Rx polling callback
  2807. * @adapter: board private structure
  2808. **/
  2809. static int
  2810. e1000_clean(struct net_device *poll_dev, int *budget)
  2811. {
  2812. struct e1000_adapter *adapter;
  2813. int work_to_do = min(*budget, poll_dev->quota);
  2814. int tx_cleaned = 0, i = 0, work_done = 0;
  2815. /* Must NOT use netdev_priv macro here. */
  2816. adapter = poll_dev->priv;
  2817. /* Keep link state information with original netdev */
  2818. if (!netif_carrier_ok(adapter->netdev))
  2819. goto quit_polling;
  2820. while (poll_dev != &adapter->polling_netdev[i]) {
  2821. i++;
  2822. BUG_ON(i == adapter->num_rx_queues);
  2823. }
  2824. if (likely(adapter->num_tx_queues == 1)) {
  2825. /* e1000_clean is called per-cpu. This lock protects
  2826. * tx_ring[0] from being cleaned by multiple cpus
  2827. * simultaneously. A failure obtaining the lock means
  2828. * tx_ring[0] is currently being cleaned anyway. */
  2829. if (spin_trylock(&adapter->tx_queue_lock)) {
  2830. tx_cleaned = e1000_clean_tx_irq(adapter,
  2831. &adapter->tx_ring[0]);
  2832. spin_unlock(&adapter->tx_queue_lock);
  2833. }
  2834. } else
  2835. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2836. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2837. &work_done, work_to_do);
  2838. *budget -= work_done;
  2839. poll_dev->quota -= work_done;
  2840. /* If no Tx and not enough Rx work done, exit the polling mode */
  2841. if ((!tx_cleaned && (work_done == 0)) ||
  2842. !netif_running(adapter->netdev)) {
  2843. quit_polling:
  2844. netif_rx_complete(poll_dev);
  2845. e1000_irq_enable(adapter);
  2846. return 0;
  2847. }
  2848. return 1;
  2849. }
  2850. #endif
  2851. /**
  2852. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2853. * @adapter: board private structure
  2854. **/
  2855. static boolean_t
  2856. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2857. struct e1000_tx_ring *tx_ring)
  2858. {
  2859. struct net_device *netdev = adapter->netdev;
  2860. struct e1000_tx_desc *tx_desc, *eop_desc;
  2861. struct e1000_buffer *buffer_info;
  2862. unsigned int i, eop;
  2863. #ifdef CONFIG_E1000_NAPI
  2864. unsigned int count = 0;
  2865. #endif
  2866. boolean_t cleaned = FALSE;
  2867. i = tx_ring->next_to_clean;
  2868. eop = tx_ring->buffer_info[i].next_to_watch;
  2869. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2870. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2871. for (cleaned = FALSE; !cleaned; ) {
  2872. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2873. buffer_info = &tx_ring->buffer_info[i];
  2874. cleaned = (i == eop);
  2875. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2876. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2877. if (unlikely(++i == tx_ring->count)) i = 0;
  2878. }
  2879. eop = tx_ring->buffer_info[i].next_to_watch;
  2880. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2881. #ifdef CONFIG_E1000_NAPI
  2882. #define E1000_TX_WEIGHT 64
  2883. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2884. if (count++ == E1000_TX_WEIGHT) break;
  2885. #endif
  2886. }
  2887. tx_ring->next_to_clean = i;
  2888. #define TX_WAKE_THRESHOLD 32
  2889. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2890. netif_carrier_ok(netdev))) {
  2891. spin_lock(&tx_ring->tx_lock);
  2892. if (netif_queue_stopped(netdev) &&
  2893. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2894. netif_wake_queue(netdev);
  2895. spin_unlock(&tx_ring->tx_lock);
  2896. }
  2897. if (adapter->detect_tx_hung) {
  2898. /* Detect a transmit hang in hardware, this serializes the
  2899. * check with the clearing of time_stamp and movement of i */
  2900. adapter->detect_tx_hung = FALSE;
  2901. if (tx_ring->buffer_info[eop].dma &&
  2902. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2903. (adapter->tx_timeout_factor * HZ))
  2904. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2905. E1000_STATUS_TXOFF)) {
  2906. /* detected Tx unit hang */
  2907. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2908. " Tx Queue <%lu>\n"
  2909. " TDH <%x>\n"
  2910. " TDT <%x>\n"
  2911. " next_to_use <%x>\n"
  2912. " next_to_clean <%x>\n"
  2913. "buffer_info[next_to_clean]\n"
  2914. " time_stamp <%lx>\n"
  2915. " next_to_watch <%x>\n"
  2916. " jiffies <%lx>\n"
  2917. " next_to_watch.status <%x>\n",
  2918. (unsigned long)((tx_ring - adapter->tx_ring) /
  2919. sizeof(struct e1000_tx_ring)),
  2920. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2921. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2922. tx_ring->next_to_use,
  2923. tx_ring->next_to_clean,
  2924. tx_ring->buffer_info[eop].time_stamp,
  2925. eop,
  2926. jiffies,
  2927. eop_desc->upper.fields.status);
  2928. netif_stop_queue(netdev);
  2929. }
  2930. }
  2931. return cleaned;
  2932. }
  2933. /**
  2934. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2935. * @adapter: board private structure
  2936. * @status_err: receive descriptor status and error fields
  2937. * @csum: receive descriptor csum field
  2938. * @sk_buff: socket buffer with received data
  2939. **/
  2940. static void
  2941. e1000_rx_checksum(struct e1000_adapter *adapter,
  2942. uint32_t status_err, uint32_t csum,
  2943. struct sk_buff *skb)
  2944. {
  2945. uint16_t status = (uint16_t)status_err;
  2946. uint8_t errors = (uint8_t)(status_err >> 24);
  2947. skb->ip_summed = CHECKSUM_NONE;
  2948. /* 82543 or newer only */
  2949. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2950. /* Ignore Checksum bit is set */
  2951. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2952. /* TCP/UDP checksum error bit is set */
  2953. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2954. /* let the stack verify checksum errors */
  2955. adapter->hw_csum_err++;
  2956. return;
  2957. }
  2958. /* TCP/UDP Checksum has not been calculated */
  2959. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2960. if (!(status & E1000_RXD_STAT_TCPCS))
  2961. return;
  2962. } else {
  2963. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2964. return;
  2965. }
  2966. /* It must be a TCP or UDP packet with a valid checksum */
  2967. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2968. /* TCP checksum is good */
  2969. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2970. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2971. /* IP fragment with UDP payload */
  2972. /* Hardware complements the payload checksum, so we undo it
  2973. * and then put the value in host order for further stack use.
  2974. */
  2975. csum = ntohl(csum ^ 0xFFFF);
  2976. skb->csum = csum;
  2977. skb->ip_summed = CHECKSUM_HW;
  2978. }
  2979. adapter->hw_csum_good++;
  2980. }
  2981. /**
  2982. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2983. * @adapter: board private structure
  2984. **/
  2985. static boolean_t
  2986. #ifdef CONFIG_E1000_NAPI
  2987. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2988. struct e1000_rx_ring *rx_ring,
  2989. int *work_done, int work_to_do)
  2990. #else
  2991. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2992. struct e1000_rx_ring *rx_ring)
  2993. #endif
  2994. {
  2995. struct net_device *netdev = adapter->netdev;
  2996. struct pci_dev *pdev = adapter->pdev;
  2997. struct e1000_rx_desc *rx_desc, *next_rxd;
  2998. struct e1000_buffer *buffer_info, *next_buffer;
  2999. unsigned long flags;
  3000. uint32_t length;
  3001. uint8_t last_byte;
  3002. unsigned int i;
  3003. int cleaned_count = 0;
  3004. boolean_t cleaned = FALSE;
  3005. i = rx_ring->next_to_clean;
  3006. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3007. buffer_info = &rx_ring->buffer_info[i];
  3008. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3009. struct sk_buff *skb, *next_skb;
  3010. u8 status;
  3011. #ifdef CONFIG_E1000_NAPI
  3012. if (*work_done >= work_to_do)
  3013. break;
  3014. (*work_done)++;
  3015. #endif
  3016. status = rx_desc->status;
  3017. skb = buffer_info->skb;
  3018. buffer_info->skb = NULL;
  3019. prefetch(skb->data - NET_IP_ALIGN);
  3020. if (++i == rx_ring->count) i = 0;
  3021. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3022. prefetch(next_rxd);
  3023. next_buffer = &rx_ring->buffer_info[i];
  3024. next_skb = next_buffer->skb;
  3025. prefetch(next_skb->data - NET_IP_ALIGN);
  3026. cleaned = TRUE;
  3027. cleaned_count++;
  3028. pci_unmap_single(pdev,
  3029. buffer_info->dma,
  3030. buffer_info->length,
  3031. PCI_DMA_FROMDEVICE);
  3032. length = le16_to_cpu(rx_desc->length);
  3033. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3034. /* All receives must fit into a single buffer */
  3035. E1000_DBG("%s: Receive packet consumed multiple"
  3036. " buffers\n", netdev->name);
  3037. dev_kfree_skb_irq(skb);
  3038. goto next_desc;
  3039. }
  3040. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3041. last_byte = *(skb->data + length - 1);
  3042. if (TBI_ACCEPT(&adapter->hw, status,
  3043. rx_desc->errors, length, last_byte)) {
  3044. spin_lock_irqsave(&adapter->stats_lock, flags);
  3045. e1000_tbi_adjust_stats(&adapter->hw,
  3046. &adapter->stats,
  3047. length, skb->data);
  3048. spin_unlock_irqrestore(&adapter->stats_lock,
  3049. flags);
  3050. length--;
  3051. } else {
  3052. /* recycle */
  3053. buffer_info->skb = skb;
  3054. goto next_desc;
  3055. }
  3056. }
  3057. /* code added for copybreak, this should improve
  3058. * performance for small packets with large amounts
  3059. * of reassembly being done in the stack */
  3060. #define E1000_CB_LENGTH 256
  3061. if (length < E1000_CB_LENGTH) {
  3062. struct sk_buff *new_skb =
  3063. dev_alloc_skb(length + NET_IP_ALIGN);
  3064. if (new_skb) {
  3065. skb_reserve(new_skb, NET_IP_ALIGN);
  3066. new_skb->dev = netdev;
  3067. memcpy(new_skb->data - NET_IP_ALIGN,
  3068. skb->data - NET_IP_ALIGN,
  3069. length + NET_IP_ALIGN);
  3070. /* save the skb in buffer_info as good */
  3071. buffer_info->skb = skb;
  3072. skb = new_skb;
  3073. skb_put(skb, length);
  3074. }
  3075. } else
  3076. skb_put(skb, length);
  3077. /* end copybreak code */
  3078. /* Receive Checksum Offload */
  3079. e1000_rx_checksum(adapter,
  3080. (uint32_t)(status) |
  3081. ((uint32_t)(rx_desc->errors) << 24),
  3082. le16_to_cpu(rx_desc->csum), skb);
  3083. skb->protocol = eth_type_trans(skb, netdev);
  3084. #ifdef CONFIG_E1000_NAPI
  3085. if (unlikely(adapter->vlgrp &&
  3086. (status & E1000_RXD_STAT_VP))) {
  3087. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3088. le16_to_cpu(rx_desc->special) &
  3089. E1000_RXD_SPC_VLAN_MASK);
  3090. } else {
  3091. netif_receive_skb(skb);
  3092. }
  3093. #else /* CONFIG_E1000_NAPI */
  3094. if (unlikely(adapter->vlgrp &&
  3095. (status & E1000_RXD_STAT_VP))) {
  3096. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3097. le16_to_cpu(rx_desc->special) &
  3098. E1000_RXD_SPC_VLAN_MASK);
  3099. } else {
  3100. netif_rx(skb);
  3101. }
  3102. #endif /* CONFIG_E1000_NAPI */
  3103. netdev->last_rx = jiffies;
  3104. next_desc:
  3105. rx_desc->status = 0;
  3106. /* return some buffers to hardware, one at a time is too slow */
  3107. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3108. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3109. cleaned_count = 0;
  3110. }
  3111. /* use prefetched values */
  3112. rx_desc = next_rxd;
  3113. buffer_info = next_buffer;
  3114. }
  3115. rx_ring->next_to_clean = i;
  3116. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3117. if (cleaned_count)
  3118. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3119. return cleaned;
  3120. }
  3121. /**
  3122. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3123. * @adapter: board private structure
  3124. **/
  3125. static boolean_t
  3126. #ifdef CONFIG_E1000_NAPI
  3127. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3128. struct e1000_rx_ring *rx_ring,
  3129. int *work_done, int work_to_do)
  3130. #else
  3131. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3132. struct e1000_rx_ring *rx_ring)
  3133. #endif
  3134. {
  3135. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3136. struct net_device *netdev = adapter->netdev;
  3137. struct pci_dev *pdev = adapter->pdev;
  3138. struct e1000_buffer *buffer_info, *next_buffer;
  3139. struct e1000_ps_page *ps_page;
  3140. struct e1000_ps_page_dma *ps_page_dma;
  3141. struct sk_buff *skb, *next_skb;
  3142. unsigned int i, j;
  3143. uint32_t length, staterr;
  3144. int cleaned_count = 0;
  3145. boolean_t cleaned = FALSE;
  3146. i = rx_ring->next_to_clean;
  3147. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3148. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3149. buffer_info = &rx_ring->buffer_info[i];
  3150. while (staterr & E1000_RXD_STAT_DD) {
  3151. buffer_info = &rx_ring->buffer_info[i];
  3152. ps_page = &rx_ring->ps_page[i];
  3153. ps_page_dma = &rx_ring->ps_page_dma[i];
  3154. #ifdef CONFIG_E1000_NAPI
  3155. if (unlikely(*work_done >= work_to_do))
  3156. break;
  3157. (*work_done)++;
  3158. #endif
  3159. skb = buffer_info->skb;
  3160. /* in the packet split case this is header only */
  3161. prefetch(skb->data - NET_IP_ALIGN);
  3162. if (++i == rx_ring->count) i = 0;
  3163. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3164. prefetch(next_rxd);
  3165. next_buffer = &rx_ring->buffer_info[i];
  3166. next_skb = next_buffer->skb;
  3167. prefetch(next_skb->data - NET_IP_ALIGN);
  3168. cleaned = TRUE;
  3169. cleaned_count++;
  3170. pci_unmap_single(pdev, buffer_info->dma,
  3171. buffer_info->length,
  3172. PCI_DMA_FROMDEVICE);
  3173. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3174. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3175. " the full packet\n", netdev->name);
  3176. dev_kfree_skb_irq(skb);
  3177. goto next_desc;
  3178. }
  3179. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3180. dev_kfree_skb_irq(skb);
  3181. goto next_desc;
  3182. }
  3183. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3184. if (unlikely(!length)) {
  3185. E1000_DBG("%s: Last part of the packet spanning"
  3186. " multiple descriptors\n", netdev->name);
  3187. dev_kfree_skb_irq(skb);
  3188. goto next_desc;
  3189. }
  3190. /* Good Receive */
  3191. skb_put(skb, length);
  3192. {
  3193. /* this looks ugly, but it seems compiler issues make it
  3194. more efficient than reusing j */
  3195. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3196. /* page alloc/put takes too long and effects small packet
  3197. * throughput, so unsplit small packets and save the alloc/put*/
  3198. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3199. u8 *vaddr;
  3200. /* there is no documentation about how to call
  3201. * kmap_atomic, so we can't hold the mapping
  3202. * very long */
  3203. pci_dma_sync_single_for_cpu(pdev,
  3204. ps_page_dma->ps_page_dma[0],
  3205. PAGE_SIZE,
  3206. PCI_DMA_FROMDEVICE);
  3207. vaddr = kmap_atomic(ps_page->ps_page[0],
  3208. KM_SKB_DATA_SOFTIRQ);
  3209. memcpy(skb->tail, vaddr, l1);
  3210. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3211. pci_dma_sync_single_for_device(pdev,
  3212. ps_page_dma->ps_page_dma[0],
  3213. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3214. skb_put(skb, l1);
  3215. length += l1;
  3216. goto copydone;
  3217. } /* if */
  3218. }
  3219. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3220. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3221. break;
  3222. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3223. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3224. ps_page_dma->ps_page_dma[j] = 0;
  3225. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3226. length);
  3227. ps_page->ps_page[j] = NULL;
  3228. skb->len += length;
  3229. skb->data_len += length;
  3230. skb->truesize += length;
  3231. }
  3232. copydone:
  3233. e1000_rx_checksum(adapter, staterr,
  3234. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3235. skb->protocol = eth_type_trans(skb, netdev);
  3236. if (likely(rx_desc->wb.upper.header_status &
  3237. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3238. adapter->rx_hdr_split++;
  3239. #ifdef CONFIG_E1000_NAPI
  3240. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3241. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3242. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3243. E1000_RXD_SPC_VLAN_MASK);
  3244. } else {
  3245. netif_receive_skb(skb);
  3246. }
  3247. #else /* CONFIG_E1000_NAPI */
  3248. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3249. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3250. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3251. E1000_RXD_SPC_VLAN_MASK);
  3252. } else {
  3253. netif_rx(skb);
  3254. }
  3255. #endif /* CONFIG_E1000_NAPI */
  3256. netdev->last_rx = jiffies;
  3257. next_desc:
  3258. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3259. buffer_info->skb = NULL;
  3260. /* return some buffers to hardware, one at a time is too slow */
  3261. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3262. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3263. cleaned_count = 0;
  3264. }
  3265. /* use prefetched values */
  3266. rx_desc = next_rxd;
  3267. buffer_info = next_buffer;
  3268. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3269. }
  3270. rx_ring->next_to_clean = i;
  3271. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3272. if (cleaned_count)
  3273. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3274. return cleaned;
  3275. }
  3276. /**
  3277. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3278. * @adapter: address of board private structure
  3279. **/
  3280. static void
  3281. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3282. struct e1000_rx_ring *rx_ring,
  3283. int cleaned_count)
  3284. {
  3285. struct net_device *netdev = adapter->netdev;
  3286. struct pci_dev *pdev = adapter->pdev;
  3287. struct e1000_rx_desc *rx_desc;
  3288. struct e1000_buffer *buffer_info;
  3289. struct sk_buff *skb;
  3290. unsigned int i;
  3291. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3292. i = rx_ring->next_to_use;
  3293. buffer_info = &rx_ring->buffer_info[i];
  3294. while (cleaned_count--) {
  3295. if (!(skb = buffer_info->skb))
  3296. skb = dev_alloc_skb(bufsz);
  3297. else {
  3298. skb_trim(skb, 0);
  3299. goto map_skb;
  3300. }
  3301. if (unlikely(!skb)) {
  3302. /* Better luck next round */
  3303. adapter->alloc_rx_buff_failed++;
  3304. break;
  3305. }
  3306. /* Fix for errata 23, can't cross 64kB boundary */
  3307. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3308. struct sk_buff *oldskb = skb;
  3309. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3310. "at %p\n", bufsz, skb->data);
  3311. /* Try again, without freeing the previous */
  3312. skb = dev_alloc_skb(bufsz);
  3313. /* Failed allocation, critical failure */
  3314. if (!skb) {
  3315. dev_kfree_skb(oldskb);
  3316. break;
  3317. }
  3318. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3319. /* give up */
  3320. dev_kfree_skb(skb);
  3321. dev_kfree_skb(oldskb);
  3322. break; /* while !buffer_info->skb */
  3323. } else {
  3324. /* Use new allocation */
  3325. dev_kfree_skb(oldskb);
  3326. }
  3327. }
  3328. /* Make buffer alignment 2 beyond a 16 byte boundary
  3329. * this will result in a 16 byte aligned IP header after
  3330. * the 14 byte MAC header is removed
  3331. */
  3332. skb_reserve(skb, NET_IP_ALIGN);
  3333. skb->dev = netdev;
  3334. buffer_info->skb = skb;
  3335. buffer_info->length = adapter->rx_buffer_len;
  3336. map_skb:
  3337. buffer_info->dma = pci_map_single(pdev,
  3338. skb->data,
  3339. adapter->rx_buffer_len,
  3340. PCI_DMA_FROMDEVICE);
  3341. /* Fix for errata 23, can't cross 64kB boundary */
  3342. if (!e1000_check_64k_bound(adapter,
  3343. (void *)(unsigned long)buffer_info->dma,
  3344. adapter->rx_buffer_len)) {
  3345. DPRINTK(RX_ERR, ERR,
  3346. "dma align check failed: %u bytes at %p\n",
  3347. adapter->rx_buffer_len,
  3348. (void *)(unsigned long)buffer_info->dma);
  3349. dev_kfree_skb(skb);
  3350. buffer_info->skb = NULL;
  3351. pci_unmap_single(pdev, buffer_info->dma,
  3352. adapter->rx_buffer_len,
  3353. PCI_DMA_FROMDEVICE);
  3354. break; /* while !buffer_info->skb */
  3355. }
  3356. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3357. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3358. if (unlikely(++i == rx_ring->count))
  3359. i = 0;
  3360. buffer_info = &rx_ring->buffer_info[i];
  3361. }
  3362. if (likely(rx_ring->next_to_use != i)) {
  3363. rx_ring->next_to_use = i;
  3364. if (unlikely(i-- == 0))
  3365. i = (rx_ring->count - 1);
  3366. /* Force memory writes to complete before letting h/w
  3367. * know there are new descriptors to fetch. (Only
  3368. * applicable for weak-ordered memory model archs,
  3369. * such as IA-64). */
  3370. wmb();
  3371. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3372. }
  3373. }
  3374. /**
  3375. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3376. * @adapter: address of board private structure
  3377. **/
  3378. static void
  3379. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3380. struct e1000_rx_ring *rx_ring,
  3381. int cleaned_count)
  3382. {
  3383. struct net_device *netdev = adapter->netdev;
  3384. struct pci_dev *pdev = adapter->pdev;
  3385. union e1000_rx_desc_packet_split *rx_desc;
  3386. struct e1000_buffer *buffer_info;
  3387. struct e1000_ps_page *ps_page;
  3388. struct e1000_ps_page_dma *ps_page_dma;
  3389. struct sk_buff *skb;
  3390. unsigned int i, j;
  3391. i = rx_ring->next_to_use;
  3392. buffer_info = &rx_ring->buffer_info[i];
  3393. ps_page = &rx_ring->ps_page[i];
  3394. ps_page_dma = &rx_ring->ps_page_dma[i];
  3395. while (cleaned_count--) {
  3396. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3397. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3398. if (j < adapter->rx_ps_pages) {
  3399. if (likely(!ps_page->ps_page[j])) {
  3400. ps_page->ps_page[j] =
  3401. alloc_page(GFP_ATOMIC);
  3402. if (unlikely(!ps_page->ps_page[j])) {
  3403. adapter->alloc_rx_buff_failed++;
  3404. goto no_buffers;
  3405. }
  3406. ps_page_dma->ps_page_dma[j] =
  3407. pci_map_page(pdev,
  3408. ps_page->ps_page[j],
  3409. 0, PAGE_SIZE,
  3410. PCI_DMA_FROMDEVICE);
  3411. }
  3412. /* Refresh the desc even if buffer_addrs didn't
  3413. * change because each write-back erases
  3414. * this info.
  3415. */
  3416. rx_desc->read.buffer_addr[j+1] =
  3417. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3418. } else
  3419. rx_desc->read.buffer_addr[j+1] = ~0;
  3420. }
  3421. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3422. if (unlikely(!skb)) {
  3423. adapter->alloc_rx_buff_failed++;
  3424. break;
  3425. }
  3426. /* Make buffer alignment 2 beyond a 16 byte boundary
  3427. * this will result in a 16 byte aligned IP header after
  3428. * the 14 byte MAC header is removed
  3429. */
  3430. skb_reserve(skb, NET_IP_ALIGN);
  3431. skb->dev = netdev;
  3432. buffer_info->skb = skb;
  3433. buffer_info->length = adapter->rx_ps_bsize0;
  3434. buffer_info->dma = pci_map_single(pdev, skb->data,
  3435. adapter->rx_ps_bsize0,
  3436. PCI_DMA_FROMDEVICE);
  3437. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3438. if (unlikely(++i == rx_ring->count)) i = 0;
  3439. buffer_info = &rx_ring->buffer_info[i];
  3440. ps_page = &rx_ring->ps_page[i];
  3441. ps_page_dma = &rx_ring->ps_page_dma[i];
  3442. }
  3443. no_buffers:
  3444. if (likely(rx_ring->next_to_use != i)) {
  3445. rx_ring->next_to_use = i;
  3446. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3447. /* Force memory writes to complete before letting h/w
  3448. * know there are new descriptors to fetch. (Only
  3449. * applicable for weak-ordered memory model archs,
  3450. * such as IA-64). */
  3451. wmb();
  3452. /* Hardware increments by 16 bytes, but packet split
  3453. * descriptors are 32 bytes...so we increment tail
  3454. * twice as much.
  3455. */
  3456. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3457. }
  3458. }
  3459. /**
  3460. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3461. * @adapter:
  3462. **/
  3463. static void
  3464. e1000_smartspeed(struct e1000_adapter *adapter)
  3465. {
  3466. uint16_t phy_status;
  3467. uint16_t phy_ctrl;
  3468. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3469. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3470. return;
  3471. if (adapter->smartspeed == 0) {
  3472. /* If Master/Slave config fault is asserted twice,
  3473. * we assume back-to-back */
  3474. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3475. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3476. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3477. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3478. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3479. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3480. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3481. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3482. phy_ctrl);
  3483. adapter->smartspeed++;
  3484. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3485. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3486. &phy_ctrl)) {
  3487. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3488. MII_CR_RESTART_AUTO_NEG);
  3489. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3490. phy_ctrl);
  3491. }
  3492. }
  3493. return;
  3494. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3495. /* If still no link, perhaps using 2/3 pair cable */
  3496. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3497. phy_ctrl |= CR_1000T_MS_ENABLE;
  3498. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3499. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3500. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3501. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3502. MII_CR_RESTART_AUTO_NEG);
  3503. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3504. }
  3505. }
  3506. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3507. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3508. adapter->smartspeed = 0;
  3509. }
  3510. /**
  3511. * e1000_ioctl -
  3512. * @netdev:
  3513. * @ifreq:
  3514. * @cmd:
  3515. **/
  3516. static int
  3517. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3518. {
  3519. switch (cmd) {
  3520. case SIOCGMIIPHY:
  3521. case SIOCGMIIREG:
  3522. case SIOCSMIIREG:
  3523. return e1000_mii_ioctl(netdev, ifr, cmd);
  3524. default:
  3525. return -EOPNOTSUPP;
  3526. }
  3527. }
  3528. /**
  3529. * e1000_mii_ioctl -
  3530. * @netdev:
  3531. * @ifreq:
  3532. * @cmd:
  3533. **/
  3534. static int
  3535. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3536. {
  3537. struct e1000_adapter *adapter = netdev_priv(netdev);
  3538. struct mii_ioctl_data *data = if_mii(ifr);
  3539. int retval;
  3540. uint16_t mii_reg;
  3541. uint16_t spddplx;
  3542. unsigned long flags;
  3543. if (adapter->hw.media_type != e1000_media_type_copper)
  3544. return -EOPNOTSUPP;
  3545. switch (cmd) {
  3546. case SIOCGMIIPHY:
  3547. data->phy_id = adapter->hw.phy_addr;
  3548. break;
  3549. case SIOCGMIIREG:
  3550. if (!capable(CAP_NET_ADMIN))
  3551. return -EPERM;
  3552. spin_lock_irqsave(&adapter->stats_lock, flags);
  3553. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3554. &data->val_out)) {
  3555. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3556. return -EIO;
  3557. }
  3558. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3559. break;
  3560. case SIOCSMIIREG:
  3561. if (!capable(CAP_NET_ADMIN))
  3562. return -EPERM;
  3563. if (data->reg_num & ~(0x1F))
  3564. return -EFAULT;
  3565. mii_reg = data->val_in;
  3566. spin_lock_irqsave(&adapter->stats_lock, flags);
  3567. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3568. mii_reg)) {
  3569. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3570. return -EIO;
  3571. }
  3572. if (adapter->hw.media_type == e1000_media_type_copper) {
  3573. switch (data->reg_num) {
  3574. case PHY_CTRL:
  3575. if (mii_reg & MII_CR_POWER_DOWN)
  3576. break;
  3577. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3578. adapter->hw.autoneg = 1;
  3579. adapter->hw.autoneg_advertised = 0x2F;
  3580. } else {
  3581. if (mii_reg & 0x40)
  3582. spddplx = SPEED_1000;
  3583. else if (mii_reg & 0x2000)
  3584. spddplx = SPEED_100;
  3585. else
  3586. spddplx = SPEED_10;
  3587. spddplx += (mii_reg & 0x100)
  3588. ? DUPLEX_FULL :
  3589. DUPLEX_HALF;
  3590. retval = e1000_set_spd_dplx(adapter,
  3591. spddplx);
  3592. if (retval) {
  3593. spin_unlock_irqrestore(
  3594. &adapter->stats_lock,
  3595. flags);
  3596. return retval;
  3597. }
  3598. }
  3599. if (netif_running(adapter->netdev)) {
  3600. e1000_down(adapter);
  3601. e1000_up(adapter);
  3602. } else
  3603. e1000_reset(adapter);
  3604. break;
  3605. case M88E1000_PHY_SPEC_CTRL:
  3606. case M88E1000_EXT_PHY_SPEC_CTRL:
  3607. if (e1000_phy_reset(&adapter->hw)) {
  3608. spin_unlock_irqrestore(
  3609. &adapter->stats_lock, flags);
  3610. return -EIO;
  3611. }
  3612. break;
  3613. }
  3614. } else {
  3615. switch (data->reg_num) {
  3616. case PHY_CTRL:
  3617. if (mii_reg & MII_CR_POWER_DOWN)
  3618. break;
  3619. if (netif_running(adapter->netdev)) {
  3620. e1000_down(adapter);
  3621. e1000_up(adapter);
  3622. } else
  3623. e1000_reset(adapter);
  3624. break;
  3625. }
  3626. }
  3627. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3628. break;
  3629. default:
  3630. return -EOPNOTSUPP;
  3631. }
  3632. return E1000_SUCCESS;
  3633. }
  3634. void
  3635. e1000_pci_set_mwi(struct e1000_hw *hw)
  3636. {
  3637. struct e1000_adapter *adapter = hw->back;
  3638. int ret_val = pci_set_mwi(adapter->pdev);
  3639. if (ret_val)
  3640. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3641. }
  3642. void
  3643. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3644. {
  3645. struct e1000_adapter *adapter = hw->back;
  3646. pci_clear_mwi(adapter->pdev);
  3647. }
  3648. void
  3649. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3650. {
  3651. struct e1000_adapter *adapter = hw->back;
  3652. pci_read_config_word(adapter->pdev, reg, value);
  3653. }
  3654. void
  3655. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3656. {
  3657. struct e1000_adapter *adapter = hw->back;
  3658. pci_write_config_word(adapter->pdev, reg, *value);
  3659. }
  3660. uint32_t
  3661. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3662. {
  3663. return inl(port);
  3664. }
  3665. void
  3666. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3667. {
  3668. outl(value, port);
  3669. }
  3670. static void
  3671. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3672. {
  3673. struct e1000_adapter *adapter = netdev_priv(netdev);
  3674. uint32_t ctrl, rctl;
  3675. e1000_irq_disable(adapter);
  3676. adapter->vlgrp = grp;
  3677. if (grp) {
  3678. /* enable VLAN tag insert/strip */
  3679. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3680. ctrl |= E1000_CTRL_VME;
  3681. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3682. /* enable VLAN receive filtering */
  3683. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3684. rctl |= E1000_RCTL_VFE;
  3685. rctl &= ~E1000_RCTL_CFIEN;
  3686. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3687. e1000_update_mng_vlan(adapter);
  3688. } else {
  3689. /* disable VLAN tag insert/strip */
  3690. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3691. ctrl &= ~E1000_CTRL_VME;
  3692. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3693. /* disable VLAN filtering */
  3694. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3695. rctl &= ~E1000_RCTL_VFE;
  3696. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3697. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3698. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3699. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3700. }
  3701. }
  3702. e1000_irq_enable(adapter);
  3703. }
  3704. static void
  3705. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3706. {
  3707. struct e1000_adapter *adapter = netdev_priv(netdev);
  3708. uint32_t vfta, index;
  3709. if ((adapter->hw.mng_cookie.status &
  3710. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3711. (vid == adapter->mng_vlan_id))
  3712. return;
  3713. /* add VID to filter table */
  3714. index = (vid >> 5) & 0x7F;
  3715. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3716. vfta |= (1 << (vid & 0x1F));
  3717. e1000_write_vfta(&adapter->hw, index, vfta);
  3718. }
  3719. static void
  3720. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3721. {
  3722. struct e1000_adapter *adapter = netdev_priv(netdev);
  3723. uint32_t vfta, index;
  3724. e1000_irq_disable(adapter);
  3725. if (adapter->vlgrp)
  3726. adapter->vlgrp->vlan_devices[vid] = NULL;
  3727. e1000_irq_enable(adapter);
  3728. if ((adapter->hw.mng_cookie.status &
  3729. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3730. (vid == adapter->mng_vlan_id)) {
  3731. /* release control to f/w */
  3732. e1000_release_hw_control(adapter);
  3733. return;
  3734. }
  3735. /* remove VID from filter table */
  3736. index = (vid >> 5) & 0x7F;
  3737. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3738. vfta &= ~(1 << (vid & 0x1F));
  3739. e1000_write_vfta(&adapter->hw, index, vfta);
  3740. }
  3741. static void
  3742. e1000_restore_vlan(struct e1000_adapter *adapter)
  3743. {
  3744. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3745. if (adapter->vlgrp) {
  3746. uint16_t vid;
  3747. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3748. if (!adapter->vlgrp->vlan_devices[vid])
  3749. continue;
  3750. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3751. }
  3752. }
  3753. }
  3754. int
  3755. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3756. {
  3757. adapter->hw.autoneg = 0;
  3758. /* Fiber NICs only allow 1000 gbps Full duplex */
  3759. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3760. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3761. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3762. return -EINVAL;
  3763. }
  3764. switch (spddplx) {
  3765. case SPEED_10 + DUPLEX_HALF:
  3766. adapter->hw.forced_speed_duplex = e1000_10_half;
  3767. break;
  3768. case SPEED_10 + DUPLEX_FULL:
  3769. adapter->hw.forced_speed_duplex = e1000_10_full;
  3770. break;
  3771. case SPEED_100 + DUPLEX_HALF:
  3772. adapter->hw.forced_speed_duplex = e1000_100_half;
  3773. break;
  3774. case SPEED_100 + DUPLEX_FULL:
  3775. adapter->hw.forced_speed_duplex = e1000_100_full;
  3776. break;
  3777. case SPEED_1000 + DUPLEX_FULL:
  3778. adapter->hw.autoneg = 1;
  3779. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3780. break;
  3781. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3782. default:
  3783. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3784. return -EINVAL;
  3785. }
  3786. return 0;
  3787. }
  3788. #ifdef CONFIG_PM
  3789. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3790. * bus we're on (PCI(X) vs. PCI-E)
  3791. */
  3792. #define PCIE_CONFIG_SPACE_LEN 256
  3793. #define PCI_CONFIG_SPACE_LEN 64
  3794. static int
  3795. e1000_pci_save_state(struct e1000_adapter *adapter)
  3796. {
  3797. struct pci_dev *dev = adapter->pdev;
  3798. int size;
  3799. int i;
  3800. if (adapter->hw.mac_type >= e1000_82571)
  3801. size = PCIE_CONFIG_SPACE_LEN;
  3802. else
  3803. size = PCI_CONFIG_SPACE_LEN;
  3804. WARN_ON(adapter->config_space != NULL);
  3805. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3806. if (!adapter->config_space) {
  3807. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3808. return -ENOMEM;
  3809. }
  3810. for (i = 0; i < (size / 4); i++)
  3811. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3812. return 0;
  3813. }
  3814. static void
  3815. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3816. {
  3817. struct pci_dev *dev = adapter->pdev;
  3818. int size;
  3819. int i;
  3820. if (adapter->config_space == NULL)
  3821. return;
  3822. if (adapter->hw.mac_type >= e1000_82571)
  3823. size = PCIE_CONFIG_SPACE_LEN;
  3824. else
  3825. size = PCI_CONFIG_SPACE_LEN;
  3826. for (i = 0; i < (size / 4); i++)
  3827. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3828. kfree(adapter->config_space);
  3829. adapter->config_space = NULL;
  3830. return;
  3831. }
  3832. #endif /* CONFIG_PM */
  3833. static int
  3834. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3835. {
  3836. struct net_device *netdev = pci_get_drvdata(pdev);
  3837. struct e1000_adapter *adapter = netdev_priv(netdev);
  3838. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3839. uint32_t wufc = adapter->wol;
  3840. int retval = 0;
  3841. netif_device_detach(netdev);
  3842. if (netif_running(netdev))
  3843. e1000_down(adapter);
  3844. #ifdef CONFIG_PM
  3845. /* Implement our own version of pci_save_state(pdev) because pci-
  3846. * express adapters have 256-byte config spaces. */
  3847. retval = e1000_pci_save_state(adapter);
  3848. if (retval)
  3849. return retval;
  3850. #endif
  3851. status = E1000_READ_REG(&adapter->hw, STATUS);
  3852. if (status & E1000_STATUS_LU)
  3853. wufc &= ~E1000_WUFC_LNKC;
  3854. if (wufc) {
  3855. e1000_setup_rctl(adapter);
  3856. e1000_set_multi(netdev);
  3857. /* turn on all-multi mode if wake on multicast is enabled */
  3858. if (adapter->wol & E1000_WUFC_MC) {
  3859. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3860. rctl |= E1000_RCTL_MPE;
  3861. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3862. }
  3863. if (adapter->hw.mac_type >= e1000_82540) {
  3864. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3865. /* advertise wake from D3Cold */
  3866. #define E1000_CTRL_ADVD3WUC 0x00100000
  3867. /* phy power management enable */
  3868. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3869. ctrl |= E1000_CTRL_ADVD3WUC |
  3870. E1000_CTRL_EN_PHY_PWR_MGMT;
  3871. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3872. }
  3873. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3874. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3875. /* keep the laser running in D3 */
  3876. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3877. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3878. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3879. }
  3880. /* Allow time for pending master requests to run */
  3881. e1000_disable_pciex_master(&adapter->hw);
  3882. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3883. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3884. pci_enable_wake(pdev, PCI_D3hot, 1);
  3885. pci_enable_wake(pdev, PCI_D3cold, 1);
  3886. } else {
  3887. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3888. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3889. pci_enable_wake(pdev, PCI_D3hot, 0);
  3890. pci_enable_wake(pdev, PCI_D3cold, 0);
  3891. }
  3892. if (adapter->hw.mac_type >= e1000_82540 &&
  3893. adapter->hw.media_type == e1000_media_type_copper) {
  3894. manc = E1000_READ_REG(&adapter->hw, MANC);
  3895. if (manc & E1000_MANC_SMBUS_EN) {
  3896. manc |= E1000_MANC_ARP_EN;
  3897. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3898. pci_enable_wake(pdev, PCI_D3hot, 1);
  3899. pci_enable_wake(pdev, PCI_D3cold, 1);
  3900. }
  3901. }
  3902. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3903. * would have already happened in close and is redundant. */
  3904. e1000_release_hw_control(adapter);
  3905. pci_disable_device(pdev);
  3906. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3907. return 0;
  3908. }
  3909. #ifdef CONFIG_PM
  3910. static int
  3911. e1000_resume(struct pci_dev *pdev)
  3912. {
  3913. struct net_device *netdev = pci_get_drvdata(pdev);
  3914. struct e1000_adapter *adapter = netdev_priv(netdev);
  3915. uint32_t manc, ret_val;
  3916. pci_set_power_state(pdev, PCI_D0);
  3917. e1000_pci_restore_state(adapter);
  3918. ret_val = pci_enable_device(pdev);
  3919. pci_set_master(pdev);
  3920. pci_enable_wake(pdev, PCI_D3hot, 0);
  3921. pci_enable_wake(pdev, PCI_D3cold, 0);
  3922. e1000_reset(adapter);
  3923. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3924. if (netif_running(netdev))
  3925. e1000_up(adapter);
  3926. netif_device_attach(netdev);
  3927. if (adapter->hw.mac_type >= e1000_82540 &&
  3928. adapter->hw.media_type == e1000_media_type_copper) {
  3929. manc = E1000_READ_REG(&adapter->hw, MANC);
  3930. manc &= ~(E1000_MANC_ARP_EN);
  3931. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3932. }
  3933. /* If the controller is 82573 and f/w is AMT, do not set
  3934. * DRV_LOAD until the interface is up. For all other cases,
  3935. * let the f/w know that the h/w is now under the control
  3936. * of the driver. */
  3937. if (adapter->hw.mac_type != e1000_82573 ||
  3938. !e1000_check_mng_mode(&adapter->hw))
  3939. e1000_get_hw_control(adapter);
  3940. return 0;
  3941. }
  3942. #endif
  3943. #ifdef CONFIG_NET_POLL_CONTROLLER
  3944. /*
  3945. * Polling 'interrupt' - used by things like netconsole to send skbs
  3946. * without having to re-enable interrupts. It's not called while
  3947. * the interrupt routine is executing.
  3948. */
  3949. static void
  3950. e1000_netpoll(struct net_device *netdev)
  3951. {
  3952. struct e1000_adapter *adapter = netdev_priv(netdev);
  3953. disable_irq(adapter->pdev->irq);
  3954. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3955. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3956. #ifndef CONFIG_E1000_NAPI
  3957. adapter->clean_rx(adapter, adapter->rx_ring);
  3958. #endif
  3959. enable_irq(adapter->pdev->irq);
  3960. }
  3961. #endif
  3962. /* e1000_main.c */