mthca_provider.c 27 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  37. */
  38. #include <ib_smi.h>
  39. #include <linux/mm.h>
  40. #include "mthca_dev.h"
  41. #include "mthca_cmd.h"
  42. #include "mthca_user.h"
  43. #include "mthca_memfree.h"
  44. static int mthca_query_device(struct ib_device *ibdev,
  45. struct ib_device_attr *props)
  46. {
  47. struct ib_smp *in_mad = NULL;
  48. struct ib_smp *out_mad = NULL;
  49. int err = -ENOMEM;
  50. struct mthca_dev* mdev = to_mdev(ibdev);
  51. u8 status;
  52. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  53. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  54. if (!in_mad || !out_mad)
  55. goto out;
  56. memset(props, 0, sizeof *props);
  57. props->fw_ver = mdev->fw_ver;
  58. memset(in_mad, 0, sizeof *in_mad);
  59. in_mad->base_version = 1;
  60. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  61. in_mad->class_version = 1;
  62. in_mad->method = IB_MGMT_METHOD_GET;
  63. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  64. err = mthca_MAD_IFC(mdev, 1, 1,
  65. 1, NULL, NULL, in_mad, out_mad,
  66. &status);
  67. if (err)
  68. goto out;
  69. if (status) {
  70. err = -EINVAL;
  71. goto out;
  72. }
  73. props->device_cap_flags = mdev->device_cap_flags;
  74. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  75. 0xffffff;
  76. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  77. props->hw_ver = be16_to_cpup((__be16 *) (out_mad->data + 32));
  78. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  79. memcpy(&props->node_guid, out_mad->data + 12, 8);
  80. props->max_mr_size = ~0ull;
  81. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  82. props->max_qp_wr = 0xffff;
  83. props->max_sge = mdev->limits.max_sg;
  84. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  85. props->max_cqe = 0xffff;
  86. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  87. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  88. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  89. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  90. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  91. err = 0;
  92. out:
  93. kfree(in_mad);
  94. kfree(out_mad);
  95. return err;
  96. }
  97. static int mthca_query_port(struct ib_device *ibdev,
  98. u8 port, struct ib_port_attr *props)
  99. {
  100. struct ib_smp *in_mad = NULL;
  101. struct ib_smp *out_mad = NULL;
  102. int err = -ENOMEM;
  103. u8 status;
  104. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  105. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  106. if (!in_mad || !out_mad)
  107. goto out;
  108. memset(props, 0, sizeof *props);
  109. memset(in_mad, 0, sizeof *in_mad);
  110. in_mad->base_version = 1;
  111. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  112. in_mad->class_version = 1;
  113. in_mad->method = IB_MGMT_METHOD_GET;
  114. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  115. in_mad->attr_mod = cpu_to_be32(port);
  116. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  117. port, NULL, NULL, in_mad, out_mad,
  118. &status);
  119. if (err)
  120. goto out;
  121. if (status) {
  122. err = -EINVAL;
  123. goto out;
  124. }
  125. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  126. props->lmc = out_mad->data[34] & 0x7;
  127. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  128. props->sm_sl = out_mad->data[36] & 0xf;
  129. props->state = out_mad->data[32] & 0xf;
  130. props->phys_state = out_mad->data[33] >> 4;
  131. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  132. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  133. props->max_msg_sz = 0x80000000;
  134. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  135. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  136. props->active_width = out_mad->data[31] & 0xf;
  137. props->active_speed = out_mad->data[35] >> 4;
  138. out:
  139. kfree(in_mad);
  140. kfree(out_mad);
  141. return err;
  142. }
  143. static int mthca_modify_port(struct ib_device *ibdev,
  144. u8 port, int port_modify_mask,
  145. struct ib_port_modify *props)
  146. {
  147. struct mthca_set_ib_param set_ib;
  148. struct ib_port_attr attr;
  149. int err;
  150. u8 status;
  151. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  152. return -ERESTARTSYS;
  153. err = mthca_query_port(ibdev, port, &attr);
  154. if (err)
  155. goto out;
  156. set_ib.set_si_guid = 0;
  157. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  158. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  159. ~props->clr_port_cap_mask;
  160. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  161. if (err)
  162. goto out;
  163. if (status) {
  164. err = -EINVAL;
  165. goto out;
  166. }
  167. out:
  168. up(&to_mdev(ibdev)->cap_mask_mutex);
  169. return err;
  170. }
  171. static int mthca_query_pkey(struct ib_device *ibdev,
  172. u8 port, u16 index, u16 *pkey)
  173. {
  174. struct ib_smp *in_mad = NULL;
  175. struct ib_smp *out_mad = NULL;
  176. int err = -ENOMEM;
  177. u8 status;
  178. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  179. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  180. if (!in_mad || !out_mad)
  181. goto out;
  182. memset(in_mad, 0, sizeof *in_mad);
  183. in_mad->base_version = 1;
  184. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  185. in_mad->class_version = 1;
  186. in_mad->method = IB_MGMT_METHOD_GET;
  187. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  188. in_mad->attr_mod = cpu_to_be32(index / 32);
  189. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  190. port, NULL, NULL, in_mad, out_mad,
  191. &status);
  192. if (err)
  193. goto out;
  194. if (status) {
  195. err = -EINVAL;
  196. goto out;
  197. }
  198. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  199. out:
  200. kfree(in_mad);
  201. kfree(out_mad);
  202. return err;
  203. }
  204. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  205. int index, union ib_gid *gid)
  206. {
  207. struct ib_smp *in_mad = NULL;
  208. struct ib_smp *out_mad = NULL;
  209. int err = -ENOMEM;
  210. u8 status;
  211. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  212. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  213. if (!in_mad || !out_mad)
  214. goto out;
  215. memset(in_mad, 0, sizeof *in_mad);
  216. in_mad->base_version = 1;
  217. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  218. in_mad->class_version = 1;
  219. in_mad->method = IB_MGMT_METHOD_GET;
  220. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  221. in_mad->attr_mod = cpu_to_be32(port);
  222. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  223. port, NULL, NULL, in_mad, out_mad,
  224. &status);
  225. if (err)
  226. goto out;
  227. if (status) {
  228. err = -EINVAL;
  229. goto out;
  230. }
  231. memcpy(gid->raw, out_mad->data + 8, 8);
  232. memset(in_mad, 0, sizeof *in_mad);
  233. in_mad->base_version = 1;
  234. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  235. in_mad->class_version = 1;
  236. in_mad->method = IB_MGMT_METHOD_GET;
  237. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  238. in_mad->attr_mod = cpu_to_be32(index / 8);
  239. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  240. port, NULL, NULL, in_mad, out_mad,
  241. &status);
  242. if (err)
  243. goto out;
  244. if (status) {
  245. err = -EINVAL;
  246. goto out;
  247. }
  248. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  249. out:
  250. kfree(in_mad);
  251. kfree(out_mad);
  252. return err;
  253. }
  254. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  255. struct ib_udata *udata)
  256. {
  257. struct mthca_alloc_ucontext_resp uresp;
  258. struct mthca_ucontext *context;
  259. int err;
  260. memset(&uresp, 0, sizeof uresp);
  261. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  262. if (mthca_is_memfree(to_mdev(ibdev)))
  263. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  264. else
  265. uresp.uarc_size = 0;
  266. context = kmalloc(sizeof *context, GFP_KERNEL);
  267. if (!context)
  268. return ERR_PTR(-ENOMEM);
  269. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  270. if (err) {
  271. kfree(context);
  272. return ERR_PTR(err);
  273. }
  274. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  275. if (IS_ERR(context->db_tab)) {
  276. err = PTR_ERR(context->db_tab);
  277. mthca_uar_free(to_mdev(ibdev), &context->uar);
  278. kfree(context);
  279. return ERR_PTR(err);
  280. }
  281. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  282. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  283. mthca_uar_free(to_mdev(ibdev), &context->uar);
  284. kfree(context);
  285. return ERR_PTR(-EFAULT);
  286. }
  287. return &context->ibucontext;
  288. }
  289. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  290. {
  291. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  292. to_mucontext(context)->db_tab);
  293. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  294. kfree(to_mucontext(context));
  295. return 0;
  296. }
  297. static int mthca_mmap_uar(struct ib_ucontext *context,
  298. struct vm_area_struct *vma)
  299. {
  300. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  301. return -EINVAL;
  302. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  303. if (io_remap_pfn_range(vma, vma->vm_start,
  304. to_mucontext(context)->uar.pfn,
  305. PAGE_SIZE, vma->vm_page_prot))
  306. return -EAGAIN;
  307. return 0;
  308. }
  309. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  310. struct ib_ucontext *context,
  311. struct ib_udata *udata)
  312. {
  313. struct mthca_pd *pd;
  314. int err;
  315. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  316. if (!pd)
  317. return ERR_PTR(-ENOMEM);
  318. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  319. if (err) {
  320. kfree(pd);
  321. return ERR_PTR(err);
  322. }
  323. if (context) {
  324. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  325. mthca_pd_free(to_mdev(ibdev), pd);
  326. kfree(pd);
  327. return ERR_PTR(-EFAULT);
  328. }
  329. }
  330. return &pd->ibpd;
  331. }
  332. static int mthca_dealloc_pd(struct ib_pd *pd)
  333. {
  334. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  335. kfree(pd);
  336. return 0;
  337. }
  338. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  339. struct ib_ah_attr *ah_attr)
  340. {
  341. int err;
  342. struct mthca_ah *ah;
  343. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  344. if (!ah)
  345. return ERR_PTR(-ENOMEM);
  346. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  347. if (err) {
  348. kfree(ah);
  349. return ERR_PTR(err);
  350. }
  351. return &ah->ibah;
  352. }
  353. static int mthca_ah_destroy(struct ib_ah *ah)
  354. {
  355. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  356. kfree(ah);
  357. return 0;
  358. }
  359. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  360. struct ib_qp_init_attr *init_attr,
  361. struct ib_udata *udata)
  362. {
  363. struct mthca_create_qp ucmd;
  364. struct mthca_qp *qp;
  365. int err;
  366. switch (init_attr->qp_type) {
  367. case IB_QPT_RC:
  368. case IB_QPT_UC:
  369. case IB_QPT_UD:
  370. {
  371. struct mthca_ucontext *context;
  372. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  373. if (!qp)
  374. return ERR_PTR(-ENOMEM);
  375. if (pd->uobject) {
  376. context = to_mucontext(pd->uobject->context);
  377. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  378. return ERR_PTR(-EFAULT);
  379. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  380. context->db_tab,
  381. ucmd.sq_db_index, ucmd.sq_db_page);
  382. if (err) {
  383. kfree(qp);
  384. return ERR_PTR(err);
  385. }
  386. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  387. context->db_tab,
  388. ucmd.rq_db_index, ucmd.rq_db_page);
  389. if (err) {
  390. mthca_unmap_user_db(to_mdev(pd->device),
  391. &context->uar,
  392. context->db_tab,
  393. ucmd.sq_db_index);
  394. kfree(qp);
  395. return ERR_PTR(err);
  396. }
  397. qp->mr.ibmr.lkey = ucmd.lkey;
  398. qp->sq.db_index = ucmd.sq_db_index;
  399. qp->rq.db_index = ucmd.rq_db_index;
  400. }
  401. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  402. to_mcq(init_attr->send_cq),
  403. to_mcq(init_attr->recv_cq),
  404. init_attr->qp_type, init_attr->sq_sig_type,
  405. &init_attr->cap, qp);
  406. if (err && pd->uobject) {
  407. context = to_mucontext(pd->uobject->context);
  408. mthca_unmap_user_db(to_mdev(pd->device),
  409. &context->uar,
  410. context->db_tab,
  411. ucmd.sq_db_index);
  412. mthca_unmap_user_db(to_mdev(pd->device),
  413. &context->uar,
  414. context->db_tab,
  415. ucmd.rq_db_index);
  416. }
  417. qp->ibqp.qp_num = qp->qpn;
  418. break;
  419. }
  420. case IB_QPT_SMI:
  421. case IB_QPT_GSI:
  422. {
  423. /* Don't allow userspace to create special QPs */
  424. if (pd->uobject)
  425. return ERR_PTR(-EINVAL);
  426. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  427. if (!qp)
  428. return ERR_PTR(-ENOMEM);
  429. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  430. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  431. to_mcq(init_attr->send_cq),
  432. to_mcq(init_attr->recv_cq),
  433. init_attr->sq_sig_type, &init_attr->cap,
  434. qp->ibqp.qp_num, init_attr->port_num,
  435. to_msqp(qp));
  436. break;
  437. }
  438. default:
  439. /* Don't support raw QPs */
  440. return ERR_PTR(-ENOSYS);
  441. }
  442. if (err) {
  443. kfree(qp);
  444. return ERR_PTR(err);
  445. }
  446. init_attr->cap.max_inline_data = 0;
  447. init_attr->cap.max_send_wr = qp->sq.max;
  448. init_attr->cap.max_recv_wr = qp->rq.max;
  449. init_attr->cap.max_send_sge = qp->sq.max_gs;
  450. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  451. return &qp->ibqp;
  452. }
  453. static int mthca_destroy_qp(struct ib_qp *qp)
  454. {
  455. if (qp->uobject) {
  456. mthca_unmap_user_db(to_mdev(qp->device),
  457. &to_mucontext(qp->uobject->context)->uar,
  458. to_mucontext(qp->uobject->context)->db_tab,
  459. to_mqp(qp)->sq.db_index);
  460. mthca_unmap_user_db(to_mdev(qp->device),
  461. &to_mucontext(qp->uobject->context)->uar,
  462. to_mucontext(qp->uobject->context)->db_tab,
  463. to_mqp(qp)->rq.db_index);
  464. }
  465. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  466. kfree(qp);
  467. return 0;
  468. }
  469. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  470. struct ib_ucontext *context,
  471. struct ib_udata *udata)
  472. {
  473. struct mthca_create_cq ucmd;
  474. struct mthca_cq *cq;
  475. int nent;
  476. int err;
  477. if (context) {
  478. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  479. return ERR_PTR(-EFAULT);
  480. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  481. to_mucontext(context)->db_tab,
  482. ucmd.set_db_index, ucmd.set_db_page);
  483. if (err)
  484. return ERR_PTR(err);
  485. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  486. to_mucontext(context)->db_tab,
  487. ucmd.arm_db_index, ucmd.arm_db_page);
  488. if (err)
  489. goto err_unmap_set;
  490. }
  491. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  492. if (!cq) {
  493. err = -ENOMEM;
  494. goto err_unmap_arm;
  495. }
  496. if (context) {
  497. cq->mr.ibmr.lkey = ucmd.lkey;
  498. cq->set_ci_db_index = ucmd.set_db_index;
  499. cq->arm_db_index = ucmd.arm_db_index;
  500. }
  501. for (nent = 1; nent <= entries; nent <<= 1)
  502. ; /* nothing */
  503. err = mthca_init_cq(to_mdev(ibdev), nent,
  504. context ? to_mucontext(context) : NULL,
  505. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  506. cq);
  507. if (err)
  508. goto err_free;
  509. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  510. mthca_free_cq(to_mdev(ibdev), cq);
  511. goto err_free;
  512. }
  513. return &cq->ibcq;
  514. err_free:
  515. kfree(cq);
  516. err_unmap_arm:
  517. if (context)
  518. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  519. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  520. err_unmap_set:
  521. if (context)
  522. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  523. to_mucontext(context)->db_tab, ucmd.set_db_index);
  524. return ERR_PTR(err);
  525. }
  526. static int mthca_destroy_cq(struct ib_cq *cq)
  527. {
  528. if (cq->uobject) {
  529. mthca_unmap_user_db(to_mdev(cq->device),
  530. &to_mucontext(cq->uobject->context)->uar,
  531. to_mucontext(cq->uobject->context)->db_tab,
  532. to_mcq(cq)->arm_db_index);
  533. mthca_unmap_user_db(to_mdev(cq->device),
  534. &to_mucontext(cq->uobject->context)->uar,
  535. to_mucontext(cq->uobject->context)->db_tab,
  536. to_mcq(cq)->set_ci_db_index);
  537. }
  538. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  539. kfree(cq);
  540. return 0;
  541. }
  542. static inline u32 convert_access(int acc)
  543. {
  544. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  545. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  546. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  547. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  548. MTHCA_MPT_FLAG_LOCAL_READ;
  549. }
  550. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  551. {
  552. struct mthca_mr *mr;
  553. int err;
  554. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  555. if (!mr)
  556. return ERR_PTR(-ENOMEM);
  557. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  558. to_mpd(pd)->pd_num,
  559. convert_access(acc), mr);
  560. if (err) {
  561. kfree(mr);
  562. return ERR_PTR(err);
  563. }
  564. return &mr->ibmr;
  565. }
  566. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  567. struct ib_phys_buf *buffer_list,
  568. int num_phys_buf,
  569. int acc,
  570. u64 *iova_start)
  571. {
  572. struct mthca_mr *mr;
  573. u64 *page_list;
  574. u64 total_size;
  575. u64 mask;
  576. int shift;
  577. int npages;
  578. int err;
  579. int i, j, n;
  580. /* First check that we have enough alignment */
  581. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  582. return ERR_PTR(-EINVAL);
  583. if (num_phys_buf > 1 &&
  584. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  585. return ERR_PTR(-EINVAL);
  586. mask = 0;
  587. total_size = 0;
  588. for (i = 0; i < num_phys_buf; ++i) {
  589. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  590. return ERR_PTR(-EINVAL);
  591. if (i != 0 && i != num_phys_buf - 1 &&
  592. (buffer_list[i].size & ~PAGE_MASK))
  593. return ERR_PTR(-EINVAL);
  594. total_size += buffer_list[i].size;
  595. if (i > 0)
  596. mask |= buffer_list[i].addr;
  597. }
  598. /* Find largest page shift we can use to cover buffers */
  599. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  600. if (num_phys_buf > 1) {
  601. if ((1ULL << shift) & mask)
  602. break;
  603. } else {
  604. if (1ULL << shift >=
  605. buffer_list[0].size +
  606. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  607. break;
  608. }
  609. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  610. buffer_list[0].addr &= ~0ull << shift;
  611. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  612. if (!mr)
  613. return ERR_PTR(-ENOMEM);
  614. npages = 0;
  615. for (i = 0; i < num_phys_buf; ++i)
  616. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  617. if (!npages)
  618. return &mr->ibmr;
  619. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  620. if (!page_list) {
  621. kfree(mr);
  622. return ERR_PTR(-ENOMEM);
  623. }
  624. n = 0;
  625. for (i = 0; i < num_phys_buf; ++i)
  626. for (j = 0;
  627. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  628. ++j)
  629. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  630. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  631. "in PD %x; shift %d, npages %d.\n",
  632. (unsigned long long) buffer_list[0].addr,
  633. (unsigned long long) *iova_start,
  634. to_mpd(pd)->pd_num,
  635. shift, npages);
  636. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  637. to_mpd(pd)->pd_num,
  638. page_list, shift, npages,
  639. *iova_start, total_size,
  640. convert_access(acc), mr);
  641. if (err) {
  642. kfree(page_list);
  643. kfree(mr);
  644. return ERR_PTR(err);
  645. }
  646. kfree(page_list);
  647. return &mr->ibmr;
  648. }
  649. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  650. int acc, struct ib_udata *udata)
  651. {
  652. struct mthca_dev *dev = to_mdev(pd->device);
  653. struct ib_umem_chunk *chunk;
  654. struct mthca_mr *mr;
  655. u64 *pages;
  656. int shift, n, len;
  657. int i, j, k;
  658. int err = 0;
  659. shift = ffs(region->page_size) - 1;
  660. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  661. if (!mr)
  662. return ERR_PTR(-ENOMEM);
  663. n = 0;
  664. list_for_each_entry(chunk, &region->chunk_list, list)
  665. n += chunk->nents;
  666. mr->mtt = mthca_alloc_mtt(dev, n);
  667. if (IS_ERR(mr->mtt)) {
  668. err = PTR_ERR(mr->mtt);
  669. goto err;
  670. }
  671. pages = (u64 *) __get_free_page(GFP_KERNEL);
  672. if (!pages) {
  673. err = -ENOMEM;
  674. goto err_mtt;
  675. }
  676. i = n = 0;
  677. list_for_each_entry(chunk, &region->chunk_list, list)
  678. for (j = 0; j < chunk->nmap; ++j) {
  679. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  680. for (k = 0; k < len; ++k) {
  681. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  682. region->page_size * k;
  683. /*
  684. * Be friendly to WRITE_MTT command
  685. * and leave two empty slots for the
  686. * index and reserved fields of the
  687. * mailbox.
  688. */
  689. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  690. err = mthca_write_mtt(dev, mr->mtt,
  691. n, pages, i);
  692. if (err)
  693. goto mtt_done;
  694. n += i;
  695. i = 0;
  696. }
  697. }
  698. }
  699. if (i)
  700. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  701. mtt_done:
  702. free_page((unsigned long) pages);
  703. if (err)
  704. goto err_mtt;
  705. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  706. region->length, convert_access(acc), mr);
  707. if (err)
  708. goto err_mtt;
  709. return &mr->ibmr;
  710. err_mtt:
  711. mthca_free_mtt(dev, mr->mtt);
  712. err:
  713. kfree(mr);
  714. return ERR_PTR(err);
  715. }
  716. static int mthca_dereg_mr(struct ib_mr *mr)
  717. {
  718. struct mthca_mr *mmr = to_mmr(mr);
  719. mthca_free_mr(to_mdev(mr->device), mmr);
  720. kfree(mmr);
  721. return 0;
  722. }
  723. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  724. struct ib_fmr_attr *fmr_attr)
  725. {
  726. struct mthca_fmr *fmr;
  727. int err;
  728. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  729. if (!fmr)
  730. return ERR_PTR(-ENOMEM);
  731. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  732. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  733. convert_access(mr_access_flags), fmr);
  734. if (err) {
  735. kfree(fmr);
  736. return ERR_PTR(err);
  737. }
  738. return &fmr->ibmr;
  739. }
  740. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  741. {
  742. struct mthca_fmr *mfmr = to_mfmr(fmr);
  743. int err;
  744. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  745. if (err)
  746. return err;
  747. kfree(mfmr);
  748. return 0;
  749. }
  750. static int mthca_unmap_fmr(struct list_head *fmr_list)
  751. {
  752. struct ib_fmr *fmr;
  753. int err;
  754. u8 status;
  755. struct mthca_dev *mdev = NULL;
  756. list_for_each_entry(fmr, fmr_list, list) {
  757. if (mdev && to_mdev(fmr->device) != mdev)
  758. return -EINVAL;
  759. mdev = to_mdev(fmr->device);
  760. }
  761. if (!mdev)
  762. return 0;
  763. if (mthca_is_memfree(mdev)) {
  764. list_for_each_entry(fmr, fmr_list, list)
  765. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  766. wmb();
  767. } else
  768. list_for_each_entry(fmr, fmr_list, list)
  769. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  770. err = mthca_SYNC_TPT(mdev, &status);
  771. if (err)
  772. return err;
  773. if (status)
  774. return -EINVAL;
  775. return 0;
  776. }
  777. static ssize_t show_rev(struct class_device *cdev, char *buf)
  778. {
  779. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  780. return sprintf(buf, "%x\n", dev->rev_id);
  781. }
  782. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  783. {
  784. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  785. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  786. (int) (dev->fw_ver >> 16) & 0xffff,
  787. (int) dev->fw_ver & 0xffff);
  788. }
  789. static ssize_t show_hca(struct class_device *cdev, char *buf)
  790. {
  791. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  792. switch (dev->pdev->device) {
  793. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  794. return sprintf(buf, "MT23108\n");
  795. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  796. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  797. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  798. return sprintf(buf, "MT25208\n");
  799. case PCI_DEVICE_ID_MELLANOX_SINAI:
  800. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  801. return sprintf(buf, "MT25204\n");
  802. default:
  803. return sprintf(buf, "unknown\n");
  804. }
  805. }
  806. static ssize_t show_board(struct class_device *cdev, char *buf)
  807. {
  808. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  809. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  810. }
  811. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  812. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  813. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  814. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  815. static struct class_device_attribute *mthca_class_attributes[] = {
  816. &class_device_attr_hw_rev,
  817. &class_device_attr_fw_ver,
  818. &class_device_attr_hca_type,
  819. &class_device_attr_board_id
  820. };
  821. int mthca_register_device(struct mthca_dev *dev)
  822. {
  823. int ret;
  824. int i;
  825. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  826. dev->ib_dev.owner = THIS_MODULE;
  827. dev->ib_dev.node_type = IB_NODE_CA;
  828. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  829. dev->ib_dev.dma_device = &dev->pdev->dev;
  830. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  831. dev->ib_dev.query_device = mthca_query_device;
  832. dev->ib_dev.query_port = mthca_query_port;
  833. dev->ib_dev.modify_port = mthca_modify_port;
  834. dev->ib_dev.query_pkey = mthca_query_pkey;
  835. dev->ib_dev.query_gid = mthca_query_gid;
  836. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  837. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  838. dev->ib_dev.mmap = mthca_mmap_uar;
  839. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  840. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  841. dev->ib_dev.create_ah = mthca_ah_create;
  842. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  843. dev->ib_dev.create_qp = mthca_create_qp;
  844. dev->ib_dev.modify_qp = mthca_modify_qp;
  845. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  846. dev->ib_dev.create_cq = mthca_create_cq;
  847. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  848. dev->ib_dev.poll_cq = mthca_poll_cq;
  849. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  850. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  851. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  852. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  853. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  854. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  855. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  856. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  857. if (mthca_is_memfree(dev))
  858. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  859. else
  860. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  861. }
  862. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  863. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  864. dev->ib_dev.process_mad = mthca_process_mad;
  865. if (mthca_is_memfree(dev)) {
  866. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  867. dev->ib_dev.post_send = mthca_arbel_post_send;
  868. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  869. } else {
  870. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  871. dev->ib_dev.post_send = mthca_tavor_post_send;
  872. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  873. }
  874. init_MUTEX(&dev->cap_mask_mutex);
  875. ret = ib_register_device(&dev->ib_dev);
  876. if (ret)
  877. return ret;
  878. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  879. ret = class_device_create_file(&dev->ib_dev.class_dev,
  880. mthca_class_attributes[i]);
  881. if (ret) {
  882. ib_unregister_device(&dev->ib_dev);
  883. return ret;
  884. }
  885. }
  886. return 0;
  887. }
  888. void mthca_unregister_device(struct mthca_dev *dev)
  889. {
  890. ib_unregister_device(&dev->ib_dev);
  891. }