tegra20.dtsi 4.1 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "nvidia,tegra20";
  4. interrupt-parent = <&intc>;
  5. pmc@7000f400 {
  6. compatible = "nvidia,tegra20-pmc";
  7. reg = <0x7000e400 0x400>;
  8. };
  9. intc: interrupt-controller@50041000 {
  10. compatible = "arm,cortex-a9-gic";
  11. interrupt-controller;
  12. #interrupt-cells = <3>;
  13. reg = < 0x50041000 0x1000 >,
  14. < 0x50040100 0x0100 >;
  15. };
  16. apbdma: dma@6000a000 {
  17. compatible = "nvidia,tegra20-apbdma";
  18. reg = <0x6000a000 0x1200>;
  19. interrupts = < 0 104 0x04
  20. 0 105 0x04
  21. 0 106 0x04
  22. 0 107 0x04
  23. 0 108 0x04
  24. 0 109 0x04
  25. 0 110 0x04
  26. 0 111 0x04
  27. 0 112 0x04
  28. 0 113 0x04
  29. 0 114 0x04
  30. 0 115 0x04
  31. 0 116 0x04
  32. 0 117 0x04
  33. 0 118 0x04
  34. 0 119 0x04 >;
  35. };
  36. i2c@7000c000 {
  37. #address-cells = <1>;
  38. #size-cells = <0>;
  39. compatible = "nvidia,tegra20-i2c";
  40. reg = <0x7000C000 0x100>;
  41. interrupts = < 0 38 0x04 >;
  42. };
  43. i2c@7000c400 {
  44. #address-cells = <1>;
  45. #size-cells = <0>;
  46. compatible = "nvidia,tegra20-i2c";
  47. reg = <0x7000C400 0x100>;
  48. interrupts = < 0 84 0x04 >;
  49. };
  50. i2c@7000c500 {
  51. #address-cells = <1>;
  52. #size-cells = <0>;
  53. compatible = "nvidia,tegra20-i2c";
  54. reg = <0x7000C500 0x100>;
  55. interrupts = < 0 92 0x04 >;
  56. };
  57. i2c@7000d000 {
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. compatible = "nvidia,tegra20-i2c-dvc";
  61. reg = <0x7000D000 0x200>;
  62. interrupts = < 0 53 0x04 >;
  63. };
  64. tegra_i2s1: i2s@70002800 {
  65. compatible = "nvidia,tegra20-i2s";
  66. reg = <0x70002800 0x200>;
  67. interrupts = < 0 13 0x04 >;
  68. nvidia,dma-request-selector = < &apbdma 2 >;
  69. };
  70. tegra_i2s2: i2s@70002a00 {
  71. compatible = "nvidia,tegra20-i2s";
  72. reg = <0x70002a00 0x200>;
  73. interrupts = < 0 3 0x04 >;
  74. nvidia,dma-request-selector = < &apbdma 1 >;
  75. };
  76. das@70000c00 {
  77. compatible = "nvidia,tegra20-das";
  78. reg = <0x70000c00 0x80>;
  79. };
  80. gpio: gpio@6000d000 {
  81. compatible = "nvidia,tegra20-gpio";
  82. reg = < 0x6000d000 0x1000 >;
  83. interrupts = < 0 32 0x04
  84. 0 33 0x04
  85. 0 34 0x04
  86. 0 35 0x04
  87. 0 55 0x04
  88. 0 87 0x04
  89. 0 89 0x04 >;
  90. #gpio-cells = <2>;
  91. gpio-controller;
  92. };
  93. pinmux: pinmux@70000000 {
  94. compatible = "nvidia,tegra20-pinmux";
  95. reg = < 0x70000014 0x10 /* Tri-state registers */
  96. 0x70000080 0x20 /* Mux registers */
  97. 0x700000a0 0x14 /* Pull-up/down registers */
  98. 0x70000868 0xa8 >; /* Pad control registers */
  99. };
  100. serial@70006000 {
  101. compatible = "nvidia,tegra20-uart";
  102. reg = <0x70006000 0x40>;
  103. reg-shift = <2>;
  104. interrupts = < 0 36 0x04 >;
  105. };
  106. serial@70006040 {
  107. compatible = "nvidia,tegra20-uart";
  108. reg = <0x70006040 0x40>;
  109. reg-shift = <2>;
  110. interrupts = < 0 37 0x04 >;
  111. };
  112. serial@70006200 {
  113. compatible = "nvidia,tegra20-uart";
  114. reg = <0x70006200 0x100>;
  115. reg-shift = <2>;
  116. interrupts = < 0 46 0x04 >;
  117. };
  118. serial@70006300 {
  119. compatible = "nvidia,tegra20-uart";
  120. reg = <0x70006300 0x100>;
  121. reg-shift = <2>;
  122. interrupts = < 0 90 0x04 >;
  123. };
  124. serial@70006400 {
  125. compatible = "nvidia,tegra20-uart";
  126. reg = <0x70006400 0x100>;
  127. reg-shift = <2>;
  128. interrupts = < 0 91 0x04 >;
  129. };
  130. emc@7000f400 {
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. compatible = "nvidia,tegra20-emc";
  134. reg = <0x7000f400 0x200>;
  135. };
  136. sdhci@c8000000 {
  137. compatible = "nvidia,tegra20-sdhci";
  138. reg = <0xc8000000 0x200>;
  139. interrupts = < 0 14 0x04 >;
  140. };
  141. sdhci@c8000200 {
  142. compatible = "nvidia,tegra20-sdhci";
  143. reg = <0xc8000200 0x200>;
  144. interrupts = < 0 15 0x04 >;
  145. };
  146. sdhci@c8000400 {
  147. compatible = "nvidia,tegra20-sdhci";
  148. reg = <0xc8000400 0x200>;
  149. interrupts = < 0 19 0x04 >;
  150. };
  151. sdhci@c8000600 {
  152. compatible = "nvidia,tegra20-sdhci";
  153. reg = <0xc8000600 0x200>;
  154. interrupts = < 0 31 0x04 >;
  155. };
  156. usb@c5000000 {
  157. compatible = "nvidia,tegra20-ehci", "usb-ehci";
  158. reg = <0xc5000000 0x4000>;
  159. interrupts = < 0 20 0x04 >;
  160. phy_type = "utmi";
  161. };
  162. usb@c5004000 {
  163. compatible = "nvidia,tegra20-ehci", "usb-ehci";
  164. reg = <0xc5004000 0x4000>;
  165. interrupts = < 0 21 0x04 >;
  166. phy_type = "ulpi";
  167. };
  168. usb@c5008000 {
  169. compatible = "nvidia,tegra20-ehci", "usb-ehci";
  170. reg = <0xc5008000 0x4000>;
  171. interrupts = < 0 97 0x04 >;
  172. phy_type = "utmi";
  173. };
  174. };