bfin_gpio.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245
  1. /*
  2. * File: arch/blackfin/kernel/bfin_gpio.c
  3. * Based on:
  4. * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
  5. *
  6. * Created:
  7. * Description: GPIO Abstraction Layer
  8. *
  9. * Modified:
  10. * Copyright 2008 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. /*
  30. * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
  31. *
  32. * GPIO_0 PF0 PF0 PF0 PA0...PJ13
  33. * GPIO_1 PF1 PF1 PF1
  34. * GPIO_2 PF2 PF2 PF2
  35. * GPIO_3 PF3 PF3 PF3
  36. * GPIO_4 PF4 PF4 PF4
  37. * GPIO_5 PF5 PF5 PF5
  38. * GPIO_6 PF6 PF6 PF6
  39. * GPIO_7 PF7 PF7 PF7
  40. * GPIO_8 PF8 PF8 PF8
  41. * GPIO_9 PF9 PF9 PF9
  42. * GPIO_10 PF10 PF10 PF10
  43. * GPIO_11 PF11 PF11 PF11
  44. * GPIO_12 PF12 PF12 PF12
  45. * GPIO_13 PF13 PF13 PF13
  46. * GPIO_14 PF14 PF14 PF14
  47. * GPIO_15 PF15 PF15 PF15
  48. * GPIO_16 PG0 PF16
  49. * GPIO_17 PG1 PF17
  50. * GPIO_18 PG2 PF18
  51. * GPIO_19 PG3 PF19
  52. * GPIO_20 PG4 PF20
  53. * GPIO_21 PG5 PF21
  54. * GPIO_22 PG6 PF22
  55. * GPIO_23 PG7 PF23
  56. * GPIO_24 PG8 PF24
  57. * GPIO_25 PG9 PF25
  58. * GPIO_26 PG10 PF26
  59. * GPIO_27 PG11 PF27
  60. * GPIO_28 PG12 PF28
  61. * GPIO_29 PG13 PF29
  62. * GPIO_30 PG14 PF30
  63. * GPIO_31 PG15 PF31
  64. * GPIO_32 PH0 PF32
  65. * GPIO_33 PH1 PF33
  66. * GPIO_34 PH2 PF34
  67. * GPIO_35 PH3 PF35
  68. * GPIO_36 PH4 PF36
  69. * GPIO_37 PH5 PF37
  70. * GPIO_38 PH6 PF38
  71. * GPIO_39 PH7 PF39
  72. * GPIO_40 PH8 PF40
  73. * GPIO_41 PH9 PF41
  74. * GPIO_42 PH10 PF42
  75. * GPIO_43 PH11 PF43
  76. * GPIO_44 PH12 PF44
  77. * GPIO_45 PH13 PF45
  78. * GPIO_46 PH14 PF46
  79. * GPIO_47 PH15 PF47
  80. */
  81. #include <linux/delay.h>
  82. #include <linux/module.h>
  83. #include <linux/err.h>
  84. #include <linux/proc_fs.h>
  85. #include <asm/blackfin.h>
  86. #include <asm/gpio.h>
  87. #include <asm/portmux.h>
  88. #include <linux/irq.h>
  89. #if ANOMALY_05000311 || ANOMALY_05000323
  90. enum {
  91. AWA_data = SYSCR,
  92. AWA_data_clear = SYSCR,
  93. AWA_data_set = SYSCR,
  94. AWA_toggle = SYSCR,
  95. AWA_maska = UART_SCR,
  96. AWA_maska_clear = UART_SCR,
  97. AWA_maska_set = UART_SCR,
  98. AWA_maska_toggle = UART_SCR,
  99. AWA_maskb = UART_GCTL,
  100. AWA_maskb_clear = UART_GCTL,
  101. AWA_maskb_set = UART_GCTL,
  102. AWA_maskb_toggle = UART_GCTL,
  103. AWA_dir = SPORT1_STAT,
  104. AWA_polar = SPORT1_STAT,
  105. AWA_edge = SPORT1_STAT,
  106. AWA_both = SPORT1_STAT,
  107. #if ANOMALY_05000311
  108. AWA_inen = TIMER_ENABLE,
  109. #elif ANOMALY_05000323
  110. AWA_inen = DMA1_1_CONFIG,
  111. #endif
  112. };
  113. /* Anomaly Workaround */
  114. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  115. #else
  116. #define AWA_DUMMY_READ(...) do { } while (0)
  117. #endif
  118. #ifdef BF533_FAMILY
  119. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  120. (struct gpio_port_t *) FIO_FLAG_D,
  121. };
  122. #endif
  123. #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
  124. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  125. (struct gpio_port_t *) PORTFIO,
  126. (struct gpio_port_t *) PORTGIO,
  127. (struct gpio_port_t *) PORTHIO,
  128. };
  129. static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  130. (unsigned short *) PORTF_FER,
  131. (unsigned short *) PORTG_FER,
  132. (unsigned short *) PORTH_FER,
  133. };
  134. #endif
  135. #ifdef BF527_FAMILY
  136. static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  137. (unsigned short *) PORTF_MUX,
  138. (unsigned short *) PORTG_MUX,
  139. (unsigned short *) PORTH_MUX,
  140. };
  141. static const
  142. u8 pmux_offset[][16] =
  143. {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  144. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  145. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  146. };
  147. #endif
  148. #ifdef BF561_FAMILY
  149. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  150. (struct gpio_port_t *) FIO0_FLAG_D,
  151. (struct gpio_port_t *) FIO1_FLAG_D,
  152. (struct gpio_port_t *) FIO2_FLAG_D,
  153. };
  154. #endif
  155. #ifdef BF548_FAMILY
  156. static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  157. (struct gpio_port_t *)PORTA_FER,
  158. (struct gpio_port_t *)PORTB_FER,
  159. (struct gpio_port_t *)PORTC_FER,
  160. (struct gpio_port_t *)PORTD_FER,
  161. (struct gpio_port_t *)PORTE_FER,
  162. (struct gpio_port_t *)PORTF_FER,
  163. (struct gpio_port_t *)PORTG_FER,
  164. (struct gpio_port_t *)PORTH_FER,
  165. (struct gpio_port_t *)PORTI_FER,
  166. (struct gpio_port_t *)PORTJ_FER,
  167. };
  168. #endif
  169. static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  170. static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
  171. #define RESOURCE_LABEL_SIZE 16
  172. static struct str_ident {
  173. char name[RESOURCE_LABEL_SIZE];
  174. } str_ident[MAX_RESOURCES];
  175. #if defined(CONFIG_PM) && !defined(CONFIG_BF54x)
  176. static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  177. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  178. static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
  179. #ifdef BF533_FAMILY
  180. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
  181. #endif
  182. #ifdef BF537_FAMILY
  183. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
  184. #endif
  185. #ifdef BF527_FAMILY
  186. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
  187. #endif
  188. #ifdef BF561_FAMILY
  189. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
  190. #endif
  191. #endif /* CONFIG_PM */
  192. #if defined(BF548_FAMILY)
  193. inline int check_gpio(unsigned gpio)
  194. {
  195. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  196. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  197. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
  198. || gpio > MAX_BLACKFIN_GPIOS)
  199. return -EINVAL;
  200. return 0;
  201. }
  202. #else
  203. inline int check_gpio(unsigned gpio)
  204. {
  205. if (gpio >= MAX_BLACKFIN_GPIOS)
  206. return -EINVAL;
  207. return 0;
  208. }
  209. #endif
  210. void gpio_error(unsigned gpio)
  211. {
  212. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  213. }
  214. static void set_label(unsigned short ident, const char *label)
  215. {
  216. if (label && str_ident) {
  217. strncpy(str_ident[ident].name, label,
  218. RESOURCE_LABEL_SIZE);
  219. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  220. }
  221. }
  222. static char *get_label(unsigned short ident)
  223. {
  224. if (!str_ident)
  225. return "UNKNOWN";
  226. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  227. }
  228. static int cmp_label(unsigned short ident, const char *label)
  229. {
  230. if (label == NULL) {
  231. dump_stack();
  232. printk(KERN_ERR "Please provide none-null label\n");
  233. }
  234. if (label && str_ident)
  235. return strncmp(str_ident[ident].name,
  236. label, strlen(label));
  237. else
  238. return -EINVAL;
  239. }
  240. #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
  241. static void port_setup(unsigned gpio, unsigned short usage)
  242. {
  243. if (!check_gpio(gpio)) {
  244. if (usage == GPIO_USAGE)
  245. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  246. else
  247. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  248. SSYNC();
  249. }
  250. }
  251. #elif defined(BF548_FAMILY)
  252. static void port_setup(unsigned gpio, unsigned short usage)
  253. {
  254. if (usage == GPIO_USAGE)
  255. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  256. else
  257. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  258. SSYNC();
  259. }
  260. #else
  261. # define port_setup(...) do { } while (0)
  262. #endif
  263. #ifdef BF537_FAMILY
  264. static struct {
  265. unsigned short res;
  266. unsigned short offset;
  267. } port_mux_lut[] = {
  268. {.res = P_PPI0_D13, .offset = 11},
  269. {.res = P_PPI0_D14, .offset = 11},
  270. {.res = P_PPI0_D15, .offset = 11},
  271. {.res = P_SPORT1_TFS, .offset = 11},
  272. {.res = P_SPORT1_TSCLK, .offset = 11},
  273. {.res = P_SPORT1_DTPRI, .offset = 11},
  274. {.res = P_PPI0_D10, .offset = 10},
  275. {.res = P_PPI0_D11, .offset = 10},
  276. {.res = P_PPI0_D12, .offset = 10},
  277. {.res = P_SPORT1_RSCLK, .offset = 10},
  278. {.res = P_SPORT1_RFS, .offset = 10},
  279. {.res = P_SPORT1_DRPRI, .offset = 10},
  280. {.res = P_PPI0_D8, .offset = 9},
  281. {.res = P_PPI0_D9, .offset = 9},
  282. {.res = P_SPORT1_DRSEC, .offset = 9},
  283. {.res = P_SPORT1_DTSEC, .offset = 9},
  284. {.res = P_TMR2, .offset = 8},
  285. {.res = P_PPI0_FS3, .offset = 8},
  286. {.res = P_TMR3, .offset = 7},
  287. {.res = P_SPI0_SSEL4, .offset = 7},
  288. {.res = P_TMR4, .offset = 6},
  289. {.res = P_SPI0_SSEL5, .offset = 6},
  290. {.res = P_TMR5, .offset = 5},
  291. {.res = P_SPI0_SSEL6, .offset = 5},
  292. {.res = P_UART1_RX, .offset = 4},
  293. {.res = P_UART1_TX, .offset = 4},
  294. {.res = P_TMR6, .offset = 4},
  295. {.res = P_TMR7, .offset = 4},
  296. {.res = P_UART0_RX, .offset = 3},
  297. {.res = P_UART0_TX, .offset = 3},
  298. {.res = P_DMAR0, .offset = 3},
  299. {.res = P_DMAR1, .offset = 3},
  300. {.res = P_SPORT0_DTSEC, .offset = 1},
  301. {.res = P_SPORT0_DRSEC, .offset = 1},
  302. {.res = P_CAN0_RX, .offset = 1},
  303. {.res = P_CAN0_TX, .offset = 1},
  304. {.res = P_SPI0_SSEL7, .offset = 1},
  305. {.res = P_SPORT0_TFS, .offset = 0},
  306. {.res = P_SPORT0_DTPRI, .offset = 0},
  307. {.res = P_SPI0_SSEL2, .offset = 0},
  308. {.res = P_SPI0_SSEL3, .offset = 0},
  309. };
  310. static void portmux_setup(unsigned short per, unsigned short function)
  311. {
  312. u16 y, offset, muxreg;
  313. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  314. if (port_mux_lut[y].res == per) {
  315. /* SET PORTMUX REG */
  316. offset = port_mux_lut[y].offset;
  317. muxreg = bfin_read_PORT_MUX();
  318. if (offset != 1)
  319. muxreg &= ~(1 << offset);
  320. else
  321. muxreg &= ~(3 << 1);
  322. muxreg |= (function << offset);
  323. bfin_write_PORT_MUX(muxreg);
  324. }
  325. }
  326. }
  327. #elif defined(BF548_FAMILY)
  328. inline void portmux_setup(unsigned short portno, unsigned short function)
  329. {
  330. u32 pmux;
  331. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  332. pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
  333. pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
  334. gpio_array[gpio_bank(portno)]->port_mux = pmux;
  335. }
  336. inline u16 get_portmux(unsigned short portno)
  337. {
  338. u32 pmux;
  339. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  340. return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
  341. }
  342. #elif defined(BF527_FAMILY)
  343. inline void portmux_setup(unsigned short portno, unsigned short function)
  344. {
  345. u16 pmux, ident = P_IDENT(portno);
  346. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  347. pmux = *port_mux[gpio_bank(ident)];
  348. pmux &= ~(3 << offset);
  349. pmux |= (function & 3) << offset;
  350. *port_mux[gpio_bank(ident)] = pmux;
  351. SSYNC();
  352. }
  353. #else
  354. # define portmux_setup(...) do { } while (0)
  355. #endif
  356. #ifndef BF548_FAMILY
  357. static void default_gpio(unsigned gpio)
  358. {
  359. unsigned short bank, bitmask;
  360. unsigned long flags;
  361. bank = gpio_bank(gpio);
  362. bitmask = gpio_bit(gpio);
  363. local_irq_save(flags);
  364. gpio_bankb[bank]->maska_clear = bitmask;
  365. gpio_bankb[bank]->maskb_clear = bitmask;
  366. SSYNC();
  367. gpio_bankb[bank]->inen &= ~bitmask;
  368. gpio_bankb[bank]->dir &= ~bitmask;
  369. gpio_bankb[bank]->polar &= ~bitmask;
  370. gpio_bankb[bank]->both &= ~bitmask;
  371. gpio_bankb[bank]->edge &= ~bitmask;
  372. AWA_DUMMY_READ(edge);
  373. local_irq_restore(flags);
  374. }
  375. #else
  376. # define default_gpio(...) do { } while (0)
  377. #endif
  378. static int __init bfin_gpio_init(void)
  379. {
  380. printk(KERN_INFO "Blackfin GPIO Controller\n");
  381. return 0;
  382. }
  383. arch_initcall(bfin_gpio_init);
  384. #ifndef BF548_FAMILY
  385. /***********************************************************
  386. *
  387. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  388. *
  389. * INPUTS/OUTPUTS:
  390. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  391. *
  392. *
  393. * DESCRIPTION: These functions abstract direct register access
  394. * to Blackfin processor General Purpose
  395. * Ports Regsiters
  396. *
  397. * CAUTION: These functions do not belong to the GPIO Driver API
  398. *************************************************************
  399. * MODIFICATION HISTORY :
  400. **************************************************************/
  401. /* Set a specific bit */
  402. #define SET_GPIO(name) \
  403. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  404. { \
  405. unsigned long flags; \
  406. local_irq_save(flags); \
  407. if (arg) \
  408. gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  409. else \
  410. gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  411. AWA_DUMMY_READ(name); \
  412. local_irq_restore(flags); \
  413. } \
  414. EXPORT_SYMBOL(set_gpio_ ## name);
  415. SET_GPIO(dir)
  416. SET_GPIO(inen)
  417. SET_GPIO(polar)
  418. SET_GPIO(edge)
  419. SET_GPIO(both)
  420. #if ANOMALY_05000311 || ANOMALY_05000323
  421. #define SET_GPIO_SC(name) \
  422. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  423. { \
  424. unsigned long flags; \
  425. local_irq_save(flags); \
  426. if (arg) \
  427. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  428. else \
  429. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  430. AWA_DUMMY_READ(name); \
  431. local_irq_restore(flags); \
  432. } \
  433. EXPORT_SYMBOL(set_gpio_ ## name);
  434. #else
  435. #define SET_GPIO_SC(name) \
  436. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  437. { \
  438. if (arg) \
  439. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  440. else \
  441. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  442. } \
  443. EXPORT_SYMBOL(set_gpio_ ## name);
  444. #endif
  445. SET_GPIO_SC(maska)
  446. SET_GPIO_SC(maskb)
  447. SET_GPIO_SC(data)
  448. #if ANOMALY_05000311 || ANOMALY_05000323
  449. void set_gpio_toggle(unsigned gpio)
  450. {
  451. unsigned long flags;
  452. local_irq_save(flags);
  453. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  454. AWA_DUMMY_READ(toggle);
  455. local_irq_restore(flags);
  456. }
  457. #else
  458. void set_gpio_toggle(unsigned gpio)
  459. {
  460. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  461. }
  462. #endif
  463. EXPORT_SYMBOL(set_gpio_toggle);
  464. /*Set current PORT date (16-bit word)*/
  465. #if ANOMALY_05000311 || ANOMALY_05000323
  466. #define SET_GPIO_P(name) \
  467. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  468. { \
  469. unsigned long flags; \
  470. local_irq_save(flags); \
  471. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  472. AWA_DUMMY_READ(name); \
  473. local_irq_restore(flags); \
  474. } \
  475. EXPORT_SYMBOL(set_gpiop_ ## name);
  476. #else
  477. #define SET_GPIO_P(name) \
  478. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  479. { \
  480. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  481. } \
  482. EXPORT_SYMBOL(set_gpiop_ ## name);
  483. #endif
  484. SET_GPIO_P(data)
  485. SET_GPIO_P(dir)
  486. SET_GPIO_P(inen)
  487. SET_GPIO_P(polar)
  488. SET_GPIO_P(edge)
  489. SET_GPIO_P(both)
  490. SET_GPIO_P(maska)
  491. SET_GPIO_P(maskb)
  492. /* Get a specific bit */
  493. #if ANOMALY_05000311 || ANOMALY_05000323
  494. #define GET_GPIO(name) \
  495. unsigned short get_gpio_ ## name(unsigned gpio) \
  496. { \
  497. unsigned long flags; \
  498. unsigned short ret; \
  499. local_irq_save(flags); \
  500. ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  501. AWA_DUMMY_READ(name); \
  502. local_irq_restore(flags); \
  503. return ret; \
  504. } \
  505. EXPORT_SYMBOL(get_gpio_ ## name);
  506. #else
  507. #define GET_GPIO(name) \
  508. unsigned short get_gpio_ ## name(unsigned gpio) \
  509. { \
  510. return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
  511. } \
  512. EXPORT_SYMBOL(get_gpio_ ## name);
  513. #endif
  514. GET_GPIO(data)
  515. GET_GPIO(dir)
  516. GET_GPIO(inen)
  517. GET_GPIO(polar)
  518. GET_GPIO(edge)
  519. GET_GPIO(both)
  520. GET_GPIO(maska)
  521. GET_GPIO(maskb)
  522. /*Get current PORT date (16-bit word)*/
  523. #if ANOMALY_05000311 || ANOMALY_05000323
  524. #define GET_GPIO_P(name) \
  525. unsigned short get_gpiop_ ## name(unsigned gpio) \
  526. { \
  527. unsigned long flags; \
  528. unsigned short ret; \
  529. local_irq_save(flags); \
  530. ret = (gpio_bankb[gpio_bank(gpio)]->name); \
  531. AWA_DUMMY_READ(name); \
  532. local_irq_restore(flags); \
  533. return ret; \
  534. } \
  535. EXPORT_SYMBOL(get_gpiop_ ## name);
  536. #else
  537. #define GET_GPIO_P(name) \
  538. unsigned short get_gpiop_ ## name(unsigned gpio) \
  539. { \
  540. return (gpio_bankb[gpio_bank(gpio)]->name);\
  541. } \
  542. EXPORT_SYMBOL(get_gpiop_ ## name);
  543. #endif
  544. GET_GPIO_P(data)
  545. GET_GPIO_P(dir)
  546. GET_GPIO_P(inen)
  547. GET_GPIO_P(polar)
  548. GET_GPIO_P(edge)
  549. GET_GPIO_P(both)
  550. GET_GPIO_P(maska)
  551. GET_GPIO_P(maskb)
  552. #ifdef CONFIG_PM
  553. /***********************************************************
  554. *
  555. * FUNCTIONS: Blackfin PM Setup API
  556. *
  557. * INPUTS/OUTPUTS:
  558. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  559. * type -
  560. * PM_WAKE_RISING
  561. * PM_WAKE_FALLING
  562. * PM_WAKE_HIGH
  563. * PM_WAKE_LOW
  564. * PM_WAKE_BOTH_EDGES
  565. *
  566. * DESCRIPTION: Blackfin PM Driver API
  567. *
  568. * CAUTION:
  569. *************************************************************
  570. * MODIFICATION HISTORY :
  571. **************************************************************/
  572. int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
  573. {
  574. unsigned long flags;
  575. if ((check_gpio(gpio) < 0) || !type)
  576. return -EINVAL;
  577. local_irq_save(flags);
  578. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  579. wakeup_flags_map[gpio] = type;
  580. local_irq_restore(flags);
  581. return 0;
  582. }
  583. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  584. void gpio_pm_wakeup_free(unsigned gpio)
  585. {
  586. unsigned long flags;
  587. if (check_gpio(gpio) < 0)
  588. return;
  589. local_irq_save(flags);
  590. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  591. local_irq_restore(flags);
  592. }
  593. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  594. static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
  595. {
  596. port_setup(gpio, GPIO_USAGE);
  597. set_gpio_dir(gpio, 0);
  598. set_gpio_inen(gpio, 1);
  599. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  600. set_gpio_edge(gpio, 1);
  601. else
  602. set_gpio_edge(gpio, 0);
  603. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  604. set_gpio_both(gpio, 1);
  605. else
  606. set_gpio_both(gpio, 0);
  607. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  608. set_gpio_polar(gpio, 1);
  609. else
  610. set_gpio_polar(gpio, 0);
  611. SSYNC();
  612. return 0;
  613. }
  614. u32 bfin_pm_setup(void)
  615. {
  616. u16 bank, mask, i, gpio;
  617. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  618. mask = wakeup_map[gpio_bank(i)];
  619. bank = gpio_bank(i);
  620. gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
  621. gpio_bankb[bank]->maskb = 0;
  622. if (mask) {
  623. #ifdef BF537_FAMILY
  624. gpio_bank_saved[bank].fer = *port_fer[bank];
  625. #endif
  626. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  627. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  628. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  629. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  630. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  631. gpio_bank_saved[bank].reserved =
  632. reserved_gpio_map[bank];
  633. gpio = i;
  634. while (mask) {
  635. if ((mask & 1) && (wakeup_flags_map[gpio] !=
  636. PM_WAKE_IGNORE)) {
  637. reserved_gpio_map[gpio_bank(gpio)] |=
  638. gpio_bit(gpio);
  639. bfin_gpio_wakeup_type(gpio,
  640. wakeup_flags_map[gpio]);
  641. set_gpio_data(gpio, 0); /*Clear*/
  642. }
  643. gpio++;
  644. mask >>= 1;
  645. }
  646. bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
  647. gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  648. }
  649. }
  650. AWA_DUMMY_READ(maskb_set);
  651. return 0;
  652. }
  653. void bfin_pm_restore(void)
  654. {
  655. u16 bank, mask, i;
  656. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  657. mask = wakeup_map[gpio_bank(i)];
  658. bank = gpio_bank(i);
  659. if (mask) {
  660. #ifdef BF537_FAMILY
  661. *port_fer[bank] = gpio_bank_saved[bank].fer;
  662. #endif
  663. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  664. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  665. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  666. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  667. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  668. reserved_gpio_map[bank] =
  669. gpio_bank_saved[bank].reserved;
  670. bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
  671. }
  672. gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
  673. }
  674. AWA_DUMMY_READ(maskb);
  675. }
  676. #endif
  677. #else /* BF548_FAMILY */
  678. unsigned short get_gpio_dir(unsigned gpio)
  679. {
  680. return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
  681. }
  682. EXPORT_SYMBOL(get_gpio_dir);
  683. #endif /* BF548_FAMILY */
  684. /***********************************************************
  685. *
  686. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  687. * and PortMux Setup
  688. *
  689. * INPUTS/OUTPUTS:
  690. * per Peripheral Identifier
  691. * label String
  692. *
  693. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  694. *
  695. * CAUTION:
  696. *************************************************************
  697. * MODIFICATION HISTORY :
  698. **************************************************************/
  699. #ifdef BF548_FAMILY
  700. int peripheral_request(unsigned short per, const char *label)
  701. {
  702. unsigned long flags;
  703. unsigned short ident = P_IDENT(per);
  704. /*
  705. * Don't cares are pins with only one dedicated function
  706. */
  707. if (per & P_DONTCARE)
  708. return 0;
  709. if (!(per & P_DEFINED))
  710. return -ENODEV;
  711. if (check_gpio(ident) < 0)
  712. return -EINVAL;
  713. local_irq_save(flags);
  714. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  715. dump_stack();
  716. printk(KERN_ERR
  717. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  718. __FUNCTION__, ident, get_label(ident));
  719. local_irq_restore(flags);
  720. return -EBUSY;
  721. }
  722. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  723. u16 funct = get_portmux(ident);
  724. /*
  725. * Pin functions like AMC address strobes my
  726. * be requested and used by several drivers
  727. */
  728. if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
  729. /*
  730. * Allow that the identical pin function can
  731. * be requested from the same driver twice
  732. */
  733. if (cmp_label(ident, label) == 0)
  734. goto anyway;
  735. dump_stack();
  736. printk(KERN_ERR
  737. "%s: Peripheral %d function %d is already reserved by %s !\n",
  738. __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
  739. local_irq_restore(flags);
  740. return -EBUSY;
  741. }
  742. }
  743. anyway:
  744. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  745. portmux_setup(ident, P_FUNCT2MUX(per));
  746. port_setup(ident, PERIPHERAL_USAGE);
  747. local_irq_restore(flags);
  748. set_label(ident, label);
  749. return 0;
  750. }
  751. EXPORT_SYMBOL(peripheral_request);
  752. #else
  753. int peripheral_request(unsigned short per, const char *label)
  754. {
  755. unsigned long flags;
  756. unsigned short ident = P_IDENT(per);
  757. /*
  758. * Don't cares are pins with only one dedicated function
  759. */
  760. if (per & P_DONTCARE)
  761. return 0;
  762. if (!(per & P_DEFINED))
  763. return -ENODEV;
  764. local_irq_save(flags);
  765. if (!check_gpio(ident)) {
  766. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  767. dump_stack();
  768. printk(KERN_ERR
  769. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  770. __FUNCTION__, ident, get_label(ident));
  771. local_irq_restore(flags);
  772. return -EBUSY;
  773. }
  774. }
  775. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  776. /*
  777. * Pin functions like AMC address strobes my
  778. * be requested and used by several drivers
  779. */
  780. if (!(per & P_MAYSHARE)) {
  781. /*
  782. * Allow that the identical pin function can
  783. * be requested from the same driver twice
  784. */
  785. if (cmp_label(ident, label) == 0)
  786. goto anyway;
  787. dump_stack();
  788. printk(KERN_ERR
  789. "%s: Peripheral %d function %d is already"
  790. " reserved by %s !\n",
  791. __FUNCTION__, ident, P_FUNCT2MUX(per),
  792. get_label(ident));
  793. local_irq_restore(flags);
  794. return -EBUSY;
  795. }
  796. }
  797. anyway:
  798. portmux_setup(per, P_FUNCT2MUX(per));
  799. port_setup(ident, PERIPHERAL_USAGE);
  800. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  801. local_irq_restore(flags);
  802. set_label(ident, label);
  803. return 0;
  804. }
  805. EXPORT_SYMBOL(peripheral_request);
  806. #endif
  807. int peripheral_request_list(unsigned short per[], const char *label)
  808. {
  809. u16 cnt;
  810. int ret;
  811. for (cnt = 0; per[cnt] != 0; cnt++) {
  812. ret = peripheral_request(per[cnt], label);
  813. if (ret < 0) {
  814. for ( ; cnt > 0; cnt--)
  815. peripheral_free(per[cnt - 1]);
  816. return ret;
  817. }
  818. }
  819. return 0;
  820. }
  821. EXPORT_SYMBOL(peripheral_request_list);
  822. void peripheral_free(unsigned short per)
  823. {
  824. unsigned long flags;
  825. unsigned short ident = P_IDENT(per);
  826. if (per & P_DONTCARE)
  827. return;
  828. if (!(per & P_DEFINED))
  829. return;
  830. if (check_gpio(ident) < 0)
  831. return;
  832. local_irq_save(flags);
  833. if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
  834. local_irq_restore(flags);
  835. return;
  836. }
  837. if (!(per & P_MAYSHARE))
  838. port_setup(ident, GPIO_USAGE);
  839. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  840. set_label(ident, "free");
  841. local_irq_restore(flags);
  842. }
  843. EXPORT_SYMBOL(peripheral_free);
  844. void peripheral_free_list(unsigned short per[])
  845. {
  846. u16 cnt;
  847. for (cnt = 0; per[cnt] != 0; cnt++)
  848. peripheral_free(per[cnt]);
  849. }
  850. EXPORT_SYMBOL(peripheral_free_list);
  851. /***********************************************************
  852. *
  853. * FUNCTIONS: Blackfin GPIO Driver
  854. *
  855. * INPUTS/OUTPUTS:
  856. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  857. * label String
  858. *
  859. * DESCRIPTION: Blackfin GPIO Driver API
  860. *
  861. * CAUTION:
  862. *************************************************************
  863. * MODIFICATION HISTORY :
  864. **************************************************************/
  865. int gpio_request(unsigned gpio, const char *label)
  866. {
  867. unsigned long flags;
  868. if (check_gpio(gpio) < 0)
  869. return -EINVAL;
  870. local_irq_save(flags);
  871. /*
  872. * Allow that the identical GPIO can
  873. * be requested from the same driver twice
  874. * Do nothing and return -
  875. */
  876. if (cmp_label(gpio, label) == 0) {
  877. local_irq_restore(flags);
  878. return 0;
  879. }
  880. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  881. dump_stack();
  882. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  883. gpio, get_label(gpio));
  884. local_irq_restore(flags);
  885. return -EBUSY;
  886. }
  887. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  888. dump_stack();
  889. printk(KERN_ERR
  890. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  891. gpio, get_label(gpio));
  892. local_irq_restore(flags);
  893. return -EBUSY;
  894. }
  895. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  896. local_irq_restore(flags);
  897. port_setup(gpio, GPIO_USAGE);
  898. set_label(gpio, label);
  899. return 0;
  900. }
  901. EXPORT_SYMBOL(gpio_request);
  902. void gpio_free(unsigned gpio)
  903. {
  904. unsigned long flags;
  905. if (check_gpio(gpio) < 0)
  906. return;
  907. local_irq_save(flags);
  908. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  909. dump_stack();
  910. gpio_error(gpio);
  911. local_irq_restore(flags);
  912. return;
  913. }
  914. default_gpio(gpio);
  915. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  916. set_label(gpio, "free");
  917. local_irq_restore(flags);
  918. }
  919. EXPORT_SYMBOL(gpio_free);
  920. #ifdef BF548_FAMILY
  921. int gpio_direction_input(unsigned gpio)
  922. {
  923. unsigned long flags;
  924. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  925. gpio_error(gpio);
  926. return -EINVAL;
  927. }
  928. local_irq_save(flags);
  929. gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
  930. gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
  931. local_irq_restore(flags);
  932. return 0;
  933. }
  934. EXPORT_SYMBOL(gpio_direction_input);
  935. int gpio_direction_output(unsigned gpio, int value)
  936. {
  937. unsigned long flags;
  938. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  939. gpio_error(gpio);
  940. return -EINVAL;
  941. }
  942. local_irq_save(flags);
  943. gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
  944. gpio_set_value(gpio, value);
  945. gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
  946. local_irq_restore(flags);
  947. return 0;
  948. }
  949. EXPORT_SYMBOL(gpio_direction_output);
  950. void gpio_set_value(unsigned gpio, int arg)
  951. {
  952. if (arg)
  953. gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
  954. else
  955. gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
  956. }
  957. EXPORT_SYMBOL(gpio_set_value);
  958. int gpio_get_value(unsigned gpio)
  959. {
  960. return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
  961. }
  962. EXPORT_SYMBOL(gpio_get_value);
  963. #else
  964. int gpio_direction_input(unsigned gpio)
  965. {
  966. unsigned long flags;
  967. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  968. gpio_error(gpio);
  969. return -EINVAL;
  970. }
  971. local_irq_save(flags);
  972. gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  973. gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  974. AWA_DUMMY_READ(inen);
  975. local_irq_restore(flags);
  976. return 0;
  977. }
  978. EXPORT_SYMBOL(gpio_direction_input);
  979. int gpio_direction_output(unsigned gpio, int value)
  980. {
  981. unsigned long flags;
  982. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  983. gpio_error(gpio);
  984. return -EINVAL;
  985. }
  986. local_irq_save(flags);
  987. gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  988. if (value)
  989. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  990. else
  991. gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  992. gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  993. AWA_DUMMY_READ(dir);
  994. local_irq_restore(flags);
  995. return 0;
  996. }
  997. EXPORT_SYMBOL(gpio_direction_output);
  998. /* If we are booting from SPI and our board lacks a strong enough pull up,
  999. * the core can reset and execute the bootrom faster than the resistor can
  1000. * pull the signal logically high. To work around this (common) error in
  1001. * board design, we explicitly set the pin back to GPIO mode, force /CS
  1002. * high, and wait for the electrons to do their thing.
  1003. *
  1004. * This function only makes sense to be called from reset code, but it
  1005. * lives here as we need to force all the GPIO states w/out going through
  1006. * BUG() checks and such.
  1007. */
  1008. void bfin_gpio_reset_spi0_ssel1(void)
  1009. {
  1010. u16 gpio = P_IDENT(P_SPI0_SSEL1);
  1011. port_setup(gpio, GPIO_USAGE);
  1012. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  1013. AWA_DUMMY_READ(data_set);
  1014. udelay(1);
  1015. }
  1016. #endif /*BF548_FAMILY */
  1017. #if defined(CONFIG_PROC_FS)
  1018. static int gpio_proc_read(char *buf, char **start, off_t offset,
  1019. int len, int *unused_i, void *unused_v)
  1020. {
  1021. int c, outlen = 0;
  1022. for (c = 0; c < MAX_RESOURCES; c++) {
  1023. if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
  1024. len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
  1025. get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  1026. else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
  1027. len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
  1028. else
  1029. continue;
  1030. buf += len;
  1031. outlen += len;
  1032. }
  1033. return outlen;
  1034. }
  1035. static __init int gpio_register_proc(void)
  1036. {
  1037. struct proc_dir_entry *proc_gpio;
  1038. proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
  1039. if (proc_gpio)
  1040. proc_gpio->read_proc = gpio_proc_read;
  1041. return proc_gpio != NULL;
  1042. }
  1043. __initcall(gpio_register_proc);
  1044. #endif