nphy.c 6.2 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. IEEE 802.11n PHY support
  4. Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "nphy.h"
  20. #include "tables_nphy.h"
  21. void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
  22. {//TODO
  23. }
  24. void b43_nphy_xmitpower(struct b43_wldev *dev)
  25. {//TODO
  26. }
  27. static void b43_chantab_radio_upload(struct b43_wldev *dev,
  28. const struct b43_nphy_channeltab_entry *e)
  29. {
  30. b43_radio_write16(dev, B2055_PLL_REF, e->radio_pll_ref);
  31. b43_radio_write16(dev, B2055_RF_PLLMOD0, e->radio_rf_pllmod0);
  32. b43_radio_write16(dev, B2055_RF_PLLMOD1, e->radio_rf_pllmod1);
  33. b43_radio_write16(dev, B2055_VCO_CAPTAIL, e->radio_vco_captail);
  34. b43_radio_write16(dev, B2055_VCO_CAL1, e->radio_vco_cal1);
  35. b43_radio_write16(dev, B2055_VCO_CAL2, e->radio_vco_cal2);
  36. b43_radio_write16(dev, B2055_PLL_LFC1, e->radio_pll_lfc1);
  37. b43_radio_write16(dev, B2055_PLL_LFR1, e->radio_pll_lfr1);
  38. b43_radio_write16(dev, B2055_PLL_LFC2, e->radio_pll_lfc2);
  39. b43_radio_write16(dev, B2055_LGBUF_CENBUF, e->radio_lgbuf_cenbuf);
  40. b43_radio_write16(dev, B2055_LGEN_TUNE1, e->radio_lgen_tune1);
  41. b43_radio_write16(dev, B2055_LGEN_TUNE2, e->radio_lgen_tune2);
  42. b43_radio_write16(dev, B2055_C1_LGBUF_ATUNE, e->radio_c1_lgbuf_atune);
  43. b43_radio_write16(dev, B2055_C1_LGBUF_GTUNE, e->radio_c1_lgbuf_gtune);
  44. b43_radio_write16(dev, B2055_C1_RX_RFR1, e->radio_c1_rx_rfr1);
  45. b43_radio_write16(dev, B2055_C1_TX_PGAPADTN, e->radio_c1_tx_pgapadtn);
  46. b43_radio_write16(dev, B2055_C1_TX_MXBGTRIM, e->radio_c1_tx_mxbgtrim);
  47. b43_radio_write16(dev, B2055_C2_LGBUF_ATUNE, e->radio_c2_lgbuf_atune);
  48. b43_radio_write16(dev, B2055_C2_LGBUF_GTUNE, e->radio_c2_lgbuf_gtune);
  49. b43_radio_write16(dev, B2055_C2_RX_RFR1, e->radio_c2_rx_rfr1);
  50. b43_radio_write16(dev, B2055_C2_TX_PGAPADTN, e->radio_c2_tx_pgapadtn);
  51. b43_radio_write16(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim);
  52. }
  53. static void b43_chantab_phy_upload(struct b43_wldev *dev,
  54. const struct b43_nphy_channeltab_entry *e)
  55. {
  56. b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
  57. b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
  58. b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
  59. b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
  60. b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
  61. b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
  62. }
  63. static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
  64. {
  65. //TODO
  66. }
  67. /* Tune the hardware to a new channel. Don't call this directly.
  68. * Use b43_radio_selectchannel() */
  69. int b43_nphy_selectchannel(struct b43_wldev *dev, u8 channel)
  70. {
  71. const struct b43_nphy_channeltab_entry *tabent;
  72. tabent = b43_nphy_get_chantabent(dev, channel);
  73. if (!tabent)
  74. return -ESRCH;
  75. //FIXME enable/disable band select upper20 in RXCTL
  76. if (0 /*FIXME 5Ghz*/)
  77. b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, 0x20);
  78. else
  79. b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, 0x50);
  80. b43_chantab_radio_upload(dev, tabent);
  81. udelay(50);
  82. b43_radio_write16(dev, B2055_VCO_CAL10, 5);
  83. b43_radio_write16(dev, B2055_VCO_CAL10, 45);
  84. b43_radio_write16(dev, B2055_VCO_CAL10, 65);
  85. udelay(300);
  86. if (0 /*FIXME 5Ghz*/)
  87. b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
  88. else
  89. b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
  90. b43_chantab_phy_upload(dev, tabent);
  91. b43_nphy_tx_power_fix(dev);
  92. return 0;
  93. }
  94. static void b43_radio_init2055_pre(struct b43_wldev *dev)
  95. {
  96. b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
  97. ~B43_NPHY_RFCTL_CMD_PORFORCE);
  98. b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
  99. B43_NPHY_RFCTL_CMD_CHIP0PU |
  100. B43_NPHY_RFCTL_CMD_OEPORFORCE);
  101. b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
  102. B43_NPHY_RFCTL_CMD_PORFORCE);
  103. }
  104. static void b43_radio_init2055_post(struct b43_wldev *dev)
  105. {
  106. struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
  107. struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
  108. int i;
  109. u16 val;
  110. b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
  111. msleep(1);
  112. if ((sprom->revision != 4) || !(sprom->boardflags_hi & 0x0002)) {
  113. if ((binfo->vendor != PCI_VENDOR_ID_BROADCOM) ||
  114. (binfo->type != 0x46D) ||
  115. (binfo->rev < 0x41)) {
  116. b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
  117. b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
  118. msleep(1);
  119. }
  120. }
  121. b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0x3F, 0x2C);
  122. msleep(1);
  123. b43_radio_write16(dev, B2055_CAL_MISC, 0x3C);
  124. msleep(1);
  125. b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE);
  126. msleep(1);
  127. b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80);
  128. msleep(1);
  129. b43_radio_set(dev, B2055_CAL_MISC, 0x1);
  130. msleep(1);
  131. b43_radio_set(dev, B2055_CAL_MISC, 0x40);
  132. msleep(1);
  133. for (i = 0; i < 100; i++) {
  134. val = b43_radio_read16(dev, B2055_CAL_COUT2);
  135. if (val & 0x80)
  136. break;
  137. udelay(10);
  138. }
  139. msleep(1);
  140. b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
  141. msleep(1);
  142. b43_radio_selectchannel(dev, dev->phy.channel, 0);
  143. b43_radio_write16(dev, B2055_C1_RX_BB_LPF, 0x9);
  144. b43_radio_write16(dev, B2055_C2_RX_BB_LPF, 0x9);
  145. b43_radio_write16(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
  146. b43_radio_write16(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
  147. }
  148. /* Initialize a Broadcom 2055 N-radio */
  149. static void b43_radio_init2055(struct b43_wldev *dev)
  150. {
  151. b43_radio_init2055_pre(dev);
  152. if (b43_status(dev) < B43_STAT_INITIALIZED)
  153. b2055_upload_inittab(dev, 0, 1);
  154. else
  155. b2055_upload_inittab(dev, 0/*FIXME on 5ghz band*/, 0);
  156. b43_radio_init2055_post(dev);
  157. }
  158. void b43_nphy_radio_turn_on(struct b43_wldev *dev)
  159. {
  160. b43_radio_init2055(dev);
  161. }
  162. void b43_nphy_radio_turn_off(struct b43_wldev *dev)
  163. {
  164. b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
  165. ~B43_NPHY_RFCTL_CMD_EN);
  166. }
  167. int b43_phy_initn(struct b43_wldev *dev)
  168. {
  169. b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
  170. return 0;
  171. }