board-da830-evm.c 15 KB

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  1. /*
  2. * TI DA830/OMAP L137 EVM board
  3. *
  4. * Author: Mark A. Greer <mgreer@mvista.com>
  5. * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
  6. *
  7. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  8. * the terms of the GNU General Public License version 2. This program
  9. * is licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/console.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/i2c/pcf857x.h>
  20. #include <linux/i2c/at24.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/arch.h>
  25. #include <mach/cp_intc.h>
  26. #include <mach/mux.h>
  27. #include <mach/nand.h>
  28. #include <mach/da8xx.h>
  29. #include <mach/usb.h>
  30. #define DA830_EVM_PHY_MASK 0x0
  31. #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  32. #define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
  33. #define DA830_EMIF25_CONTROL_BASE 0x68000000
  34. /*
  35. * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
  36. */
  37. #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
  38. #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
  39. static const short da830_evm_usb11_pins[] = {
  40. DA830_GPIO1_15, DA830_GPIO2_4,
  41. -1
  42. };
  43. static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
  44. static int da830_evm_usb_set_power(unsigned port, int on)
  45. {
  46. gpio_set_value(ON_BD_USB_DRV, on);
  47. return 0;
  48. }
  49. static int da830_evm_usb_get_power(unsigned port)
  50. {
  51. return gpio_get_value(ON_BD_USB_DRV);
  52. }
  53. static int da830_evm_usb_get_oci(unsigned port)
  54. {
  55. return !gpio_get_value(ON_BD_USB_OVC);
  56. }
  57. static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
  58. static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
  59. {
  60. int irq = gpio_to_irq(ON_BD_USB_OVC);
  61. int error = 0;
  62. if (handler != NULL) {
  63. da830_evm_usb_ocic_handler = handler;
  64. error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
  65. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  66. "OHCI over-current indicator", NULL);
  67. if (error)
  68. printk(KERN_ERR "%s: could not request IRQ to watch "
  69. "over-current indicator changes\n", __func__);
  70. } else
  71. free_irq(irq, NULL);
  72. return error;
  73. }
  74. static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
  75. .set_power = da830_evm_usb_set_power,
  76. .get_power = da830_evm_usb_get_power,
  77. .get_oci = da830_evm_usb_get_oci,
  78. .ocic_notify = da830_evm_usb_ocic_notify,
  79. /* TPS2065 switch @ 5V */
  80. .potpgt = (3 + 1) / 2, /* 3 ms max */
  81. };
  82. static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
  83. {
  84. da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
  85. return IRQ_HANDLED;
  86. }
  87. static __init void da830_evm_usb_init(void)
  88. {
  89. u32 cfgchip2;
  90. int ret;
  91. /*
  92. * Set up USB clock/mode in the CFGCHIP2 register.
  93. * FYI: CFGCHIP2 is 0x0000ef00 initially.
  94. */
  95. cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
  96. /* USB2.0 PHY reference clock is 24 MHz */
  97. cfgchip2 &= ~CFGCHIP2_REFFREQ;
  98. cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
  99. /*
  100. * Select internal reference clock for USB 2.0 PHY
  101. * and use it as a clock source for USB 1.1 PHY
  102. * (this is the default setting anyway).
  103. */
  104. cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
  105. cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
  106. /*
  107. * We have to override VBUS/ID signals when MUSB is configured into the
  108. * host-only mode -- ID pin will float if no cable is connected, so the
  109. * controller won't be able to drive VBUS thinking that it's a B-device.
  110. * Otherwise, we want to use the OTG mode and enable VBUS comparators.
  111. */
  112. cfgchip2 &= ~CFGCHIP2_OTGMODE;
  113. #ifdef CONFIG_USB_MUSB_HOST
  114. cfgchip2 |= CFGCHIP2_FORCE_HOST;
  115. #else
  116. cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
  117. #endif
  118. __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
  119. /* USB_REFCLKIN is not used. */
  120. ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  121. if (ret)
  122. pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
  123. __func__, ret);
  124. else {
  125. /*
  126. * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
  127. * with the power on to power good time of 3 ms.
  128. */
  129. ret = da8xx_register_usb20(1000, 3);
  130. if (ret)
  131. pr_warning("%s: USB 2.0 registration failed: %d\n",
  132. __func__, ret);
  133. }
  134. ret = da8xx_pinmux_setup(da830_evm_usb11_pins);
  135. if (ret) {
  136. pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
  137. __func__, ret);
  138. return;
  139. }
  140. ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
  141. if (ret) {
  142. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  143. "power control: %d\n", __func__, ret);
  144. return;
  145. }
  146. gpio_direction_output(ON_BD_USB_DRV, 0);
  147. ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
  148. if (ret) {
  149. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  150. "over-current indicator: %d\n", __func__, ret);
  151. return;
  152. }
  153. gpio_direction_input(ON_BD_USB_OVC);
  154. ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
  155. if (ret)
  156. pr_warning("%s: USB 1.1 registration failed: %d\n",
  157. __func__, ret);
  158. }
  159. static struct davinci_uart_config da830_evm_uart_config __initdata = {
  160. .enabled_uarts = 0x7,
  161. };
  162. static const short da830_evm_mcasp1_pins[] = {
  163. DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
  164. DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
  165. DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
  166. DA830_AXR1_11,
  167. -1
  168. };
  169. static u8 da830_iis_serializer_direction[] = {
  170. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  171. INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
  172. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  173. };
  174. static struct snd_platform_data da830_evm_snd_data = {
  175. .tx_dma_offset = 0x2000,
  176. .rx_dma_offset = 0x2000,
  177. .op_mode = DAVINCI_MCASP_IIS_MODE,
  178. .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
  179. .tdm_slots = 2,
  180. .serial_dir = da830_iis_serializer_direction,
  181. .eventq_no = EVENTQ_0,
  182. .version = MCASP_VERSION_2,
  183. .txnumevt = 1,
  184. .rxnumevt = 1,
  185. };
  186. /*
  187. * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
  188. */
  189. static const short da830_evm_mmc_sd_pins[] = {
  190. DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
  191. DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
  192. DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
  193. DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
  194. -1
  195. };
  196. #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
  197. #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
  198. static int da830_evm_mmc_get_ro(int index)
  199. {
  200. return gpio_get_value(DA830_MMCSD_WP_PIN);
  201. }
  202. static int da830_evm_mmc_get_cd(int index)
  203. {
  204. return !gpio_get_value(DA830_MMCSD_CD_PIN);
  205. }
  206. static struct davinci_mmc_config da830_evm_mmc_config = {
  207. .get_ro = da830_evm_mmc_get_ro,
  208. .get_cd = da830_evm_mmc_get_cd,
  209. .wires = 8,
  210. .max_freq = 50000000,
  211. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  212. .version = MMC_CTLR_VERSION_2,
  213. };
  214. static inline void da830_evm_init_mmc(void)
  215. {
  216. int ret;
  217. ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins);
  218. if (ret) {
  219. pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
  220. ret);
  221. return;
  222. }
  223. ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
  224. if (ret) {
  225. pr_warning("da830_evm_init: can not open GPIO %d\n",
  226. DA830_MMCSD_WP_PIN);
  227. return;
  228. }
  229. gpio_direction_input(DA830_MMCSD_WP_PIN);
  230. ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
  231. if (ret) {
  232. pr_warning("da830_evm_init: can not open GPIO %d\n",
  233. DA830_MMCSD_CD_PIN);
  234. return;
  235. }
  236. gpio_direction_input(DA830_MMCSD_CD_PIN);
  237. ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
  238. if (ret) {
  239. pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
  240. ret);
  241. gpio_free(DA830_MMCSD_WP_PIN);
  242. }
  243. }
  244. /*
  245. * UI board NAND/NOR flashes only use 8-bit data bus.
  246. */
  247. static const short da830_evm_emif25_pins[] = {
  248. DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
  249. DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
  250. DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
  251. DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
  252. DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
  253. DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
  254. DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
  255. -1
  256. };
  257. #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
  258. #define HAS_MMC 1
  259. #else
  260. #define HAS_MMC 0
  261. #endif
  262. #ifdef CONFIG_DA830_UI_NAND
  263. static struct mtd_partition da830_evm_nand_partitions[] = {
  264. /* bootloader (U-Boot, etc) in first sector */
  265. [0] = {
  266. .name = "bootloader",
  267. .offset = 0,
  268. .size = SZ_128K,
  269. .mask_flags = MTD_WRITEABLE, /* force read-only */
  270. },
  271. /* bootloader params in the next sector */
  272. [1] = {
  273. .name = "params",
  274. .offset = MTDPART_OFS_APPEND,
  275. .size = SZ_128K,
  276. .mask_flags = MTD_WRITEABLE, /* force read-only */
  277. },
  278. /* kernel */
  279. [2] = {
  280. .name = "kernel",
  281. .offset = MTDPART_OFS_APPEND,
  282. .size = SZ_2M,
  283. .mask_flags = 0,
  284. },
  285. /* file system */
  286. [3] = {
  287. .name = "filesystem",
  288. .offset = MTDPART_OFS_APPEND,
  289. .size = MTDPART_SIZ_FULL,
  290. .mask_flags = 0,
  291. }
  292. };
  293. /* flash bbt decriptors */
  294. static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
  295. static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
  296. static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
  297. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  298. NAND_BBT_WRITE | NAND_BBT_2BIT |
  299. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  300. .offs = 2,
  301. .len = 4,
  302. .veroffs = 16,
  303. .maxblocks = 4,
  304. .pattern = da830_evm_nand_bbt_pattern
  305. };
  306. static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
  307. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  308. NAND_BBT_WRITE | NAND_BBT_2BIT |
  309. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  310. .offs = 2,
  311. .len = 4,
  312. .veroffs = 16,
  313. .maxblocks = 4,
  314. .pattern = da830_evm_nand_mirror_pattern
  315. };
  316. static struct davinci_nand_pdata da830_evm_nand_pdata = {
  317. .parts = da830_evm_nand_partitions,
  318. .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
  319. .ecc_mode = NAND_ECC_HW,
  320. .ecc_bits = 4,
  321. .options = NAND_USE_FLASH_BBT,
  322. .bbt_td = &da830_evm_nand_bbt_main_descr,
  323. .bbt_md = &da830_evm_nand_bbt_mirror_descr,
  324. };
  325. static struct resource da830_evm_nand_resources[] = {
  326. [0] = { /* First memory resource is NAND I/O window */
  327. .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE,
  328. .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1,
  329. .flags = IORESOURCE_MEM,
  330. },
  331. [1] = { /* Second memory resource is AEMIF control registers */
  332. .start = DA830_EMIF25_CONTROL_BASE,
  333. .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1,
  334. .flags = IORESOURCE_MEM,
  335. },
  336. };
  337. static struct platform_device da830_evm_nand_device = {
  338. .name = "davinci_nand",
  339. .id = 1,
  340. .dev = {
  341. .platform_data = &da830_evm_nand_pdata,
  342. },
  343. .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
  344. .resource = da830_evm_nand_resources,
  345. };
  346. static inline void da830_evm_init_nand(int mux_mode)
  347. {
  348. int ret;
  349. if (HAS_MMC) {
  350. pr_warning("WARNING: both MMC/SD and NAND are "
  351. "enabled, but they share AEMIF pins.\n"
  352. "\tDisable MMC/SD for NAND support.\n");
  353. return;
  354. }
  355. ret = da8xx_pinmux_setup(da830_evm_emif25_pins);
  356. if (ret)
  357. pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
  358. ret);
  359. ret = platform_device_register(&da830_evm_nand_device);
  360. if (ret)
  361. pr_warning("da830_evm_init: NAND device not registered.\n");
  362. gpio_direction_output(mux_mode, 1);
  363. }
  364. #else
  365. static inline void da830_evm_init_nand(int mux_mode) { }
  366. #endif
  367. #ifdef CONFIG_DA830_UI_LCD
  368. static inline void da830_evm_init_lcdc(int mux_mode)
  369. {
  370. int ret;
  371. ret = da8xx_pinmux_setup(da830_lcdcntl_pins);
  372. if (ret)
  373. pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
  374. ret);
  375. ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
  376. if (ret)
  377. pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
  378. gpio_direction_output(mux_mode, 0);
  379. }
  380. #else
  381. static inline void da830_evm_init_lcdc(int mux_mode) { }
  382. #endif
  383. static struct at24_platform_data da830_evm_i2c_eeprom_info = {
  384. .byte_len = SZ_256K / 8,
  385. .page_size = 64,
  386. .flags = AT24_FLAG_ADDR16,
  387. .setup = davinci_get_mac_addr,
  388. .context = (void *)0x7f00,
  389. };
  390. static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
  391. int gpio, unsigned ngpio, void *context)
  392. {
  393. gpio_request(gpio + 6, "UI MUX_MODE");
  394. /* Drive mux mode low to match the default without UI card */
  395. gpio_direction_output(gpio + 6, 0);
  396. da830_evm_init_lcdc(gpio + 6);
  397. da830_evm_init_nand(gpio + 6);
  398. return 0;
  399. }
  400. static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
  401. unsigned ngpio, void *context)
  402. {
  403. gpio_free(gpio + 6);
  404. return 0;
  405. }
  406. static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
  407. .gpio_base = DAVINCI_N_GPIO,
  408. .setup = da830_evm_ui_expander_setup,
  409. .teardown = da830_evm_ui_expander_teardown,
  410. };
  411. static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
  412. {
  413. I2C_BOARD_INFO("24c256", 0x50),
  414. .platform_data = &da830_evm_i2c_eeprom_info,
  415. },
  416. {
  417. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  418. },
  419. {
  420. I2C_BOARD_INFO("pcf8574", 0x3f),
  421. .platform_data = &da830_evm_ui_expander_info,
  422. },
  423. };
  424. static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
  425. .bus_freq = 100, /* kHz */
  426. .bus_delay = 0, /* usec */
  427. };
  428. static __init void da830_evm_init(void)
  429. {
  430. struct davinci_soc_info *soc_info = &davinci_soc_info;
  431. int ret;
  432. ret = da8xx_register_edma();
  433. if (ret)
  434. pr_warning("da830_evm_init: edma registration failed: %d\n",
  435. ret);
  436. ret = da8xx_pinmux_setup(da830_i2c0_pins);
  437. if (ret)
  438. pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
  439. ret);
  440. ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
  441. if (ret)
  442. pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
  443. ret);
  444. da830_evm_usb_init();
  445. soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
  446. soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
  447. soc_info->emac_pdata->rmii_en = 1;
  448. ret = da8xx_pinmux_setup(da830_cpgmac_pins);
  449. if (ret)
  450. pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
  451. ret);
  452. ret = da8xx_register_emac();
  453. if (ret)
  454. pr_warning("da830_evm_init: emac registration failed: %d\n",
  455. ret);
  456. ret = da8xx_register_watchdog();
  457. if (ret)
  458. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  459. ret);
  460. davinci_serial_init(&da830_evm_uart_config);
  461. i2c_register_board_info(1, da830_evm_i2c_devices,
  462. ARRAY_SIZE(da830_evm_i2c_devices));
  463. ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins);
  464. if (ret)
  465. pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
  466. ret);
  467. da8xx_register_mcasp(1, &da830_evm_snd_data);
  468. da830_evm_init_mmc();
  469. ret = da8xx_register_rtc();
  470. if (ret)
  471. pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
  472. }
  473. #ifdef CONFIG_SERIAL_8250_CONSOLE
  474. static int __init da830_evm_console_init(void)
  475. {
  476. return add_preferred_console("ttyS", 2, "115200");
  477. }
  478. console_initcall(da830_evm_console_init);
  479. #endif
  480. static __init void da830_evm_irq_init(void)
  481. {
  482. struct davinci_soc_info *soc_info = &davinci_soc_info;
  483. cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
  484. soc_info->intc_irq_prios);
  485. }
  486. static void __init da830_evm_map_io(void)
  487. {
  488. da830_init();
  489. }
  490. MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
  491. .phys_io = IO_PHYS,
  492. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  493. .boot_params = (DA8XX_DDR_BASE + 0x100),
  494. .map_io = da830_evm_map_io,
  495. .init_irq = da830_evm_irq_init,
  496. .timer = &davinci_timer,
  497. .init_machine = da830_evm_init,
  498. MACHINE_END