dm1105.c 23 KB

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  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/proc_fs.h>
  26. #include <linux/pci.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/input.h>
  29. #include <media/ir-common.h>
  30. #include "demux.h"
  31. #include "dmxdev.h"
  32. #include "dvb_demux.h"
  33. #include "dvb_frontend.h"
  34. #include "dvb_net.h"
  35. #include "dvbdev.h"
  36. #include "dvb-pll.h"
  37. #include "stv0299.h"
  38. #include "stv0288.h"
  39. #include "stb6000.h"
  40. #include "si21xx.h"
  41. #include "cx24116.h"
  42. #include "z0194a.h"
  43. /* ----------------------------------------------- */
  44. /*
  45. * PCI ID's
  46. */
  47. #ifndef PCI_VENDOR_ID_TRIGEM
  48. #define PCI_VENDOR_ID_TRIGEM 0x109f
  49. #endif
  50. #ifndef PCI_DEVICE_ID_DM1105
  51. #define PCI_DEVICE_ID_DM1105 0x036f
  52. #endif
  53. #ifndef PCI_DEVICE_ID_DW2002
  54. #define PCI_DEVICE_ID_DW2002 0x2002
  55. #endif
  56. #ifndef PCI_DEVICE_ID_DW2004
  57. #define PCI_DEVICE_ID_DW2004 0x2004
  58. #endif
  59. /* ----------------------------------------------- */
  60. /* sdmc dm1105 registers */
  61. /* TS Control */
  62. #define DM1105_TSCTR 0x00
  63. #define DM1105_DTALENTH 0x04
  64. /* GPIO Interface */
  65. #define DM1105_GPIOVAL 0x08
  66. #define DM1105_GPIOCTR 0x0c
  67. /* PID serial number */
  68. #define DM1105_PIDN 0x10
  69. /* Odd-even secret key select */
  70. #define DM1105_CWSEL 0x14
  71. /* Host Command Interface */
  72. #define DM1105_HOST_CTR 0x18
  73. #define DM1105_HOST_AD 0x1c
  74. /* PCI Interface */
  75. #define DM1105_CR 0x30
  76. #define DM1105_RST 0x34
  77. #define DM1105_STADR 0x38
  78. #define DM1105_RLEN 0x3c
  79. #define DM1105_WRP 0x40
  80. #define DM1105_INTCNT 0x44
  81. #define DM1105_INTMAK 0x48
  82. #define DM1105_INTSTS 0x4c
  83. /* CW Value */
  84. #define DM1105_ODD 0x50
  85. #define DM1105_EVEN 0x58
  86. /* PID Value */
  87. #define DM1105_PID 0x60
  88. /* IR Control */
  89. #define DM1105_IRCTR 0x64
  90. #define DM1105_IRMODE 0x68
  91. #define DM1105_SYSTEMCODE 0x6c
  92. #define DM1105_IRCODE 0x70
  93. /* Unknown Values */
  94. #define DM1105_ENCRYPT 0x74
  95. #define DM1105_VER 0x7c
  96. /* I2C Interface */
  97. #define DM1105_I2CCTR 0x80
  98. #define DM1105_I2CSTS 0x81
  99. #define DM1105_I2CDAT 0x82
  100. #define DM1105_I2C_RA 0x83
  101. /* ----------------------------------------------- */
  102. /* Interrupt Mask Bits */
  103. #define INTMAK_TSIRQM 0x01
  104. #define INTMAK_HIRQM 0x04
  105. #define INTMAK_IRM 0x08
  106. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  107. INTMAK_HIRQM | \
  108. INTMAK_IRM)
  109. #define INTMAK_NONEMASK 0x00
  110. /* Interrupt Status Bits */
  111. #define INTSTS_TSIRQ 0x01
  112. #define INTSTS_HIRQ 0x04
  113. #define INTSTS_IR 0x08
  114. /* IR Control Bits */
  115. #define DM1105_IR_EN 0x01
  116. #define DM1105_SYS_CHK 0x02
  117. #define DM1105_REP_FLG 0x08
  118. /* EEPROM addr */
  119. #define IIC_24C01_addr 0xa0
  120. /* Max board count */
  121. #define DM1105_MAX 0x04
  122. #define DRIVER_NAME "dm1105"
  123. #define DM1105_DMA_PACKETS 47
  124. #define DM1105_DMA_PACKET_LENGTH (128*4)
  125. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  126. /* GPIO's for LNB power control */
  127. #define DM1105_LNB_MASK 0x00000000
  128. #define DM1105_LNB_13V 0x00010100
  129. #define DM1105_LNB_18V 0x00000100
  130. static int ir_debug;
  131. module_param(ir_debug, int, 0644);
  132. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  133. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  134. static u16 ir_codes_dm1105_nec[128] = {
  135. [0x0a] = KEY_Q, /*power*/
  136. [0x0c] = KEY_M, /*mute*/
  137. [0x11] = KEY_1,
  138. [0x12] = KEY_2,
  139. [0x13] = KEY_3,
  140. [0x14] = KEY_4,
  141. [0x15] = KEY_5,
  142. [0x16] = KEY_6,
  143. [0x17] = KEY_7,
  144. [0x18] = KEY_8,
  145. [0x19] = KEY_9,
  146. [0x10] = KEY_0,
  147. [0x1c] = KEY_PAGEUP, /*ch+*/
  148. [0x0f] = KEY_PAGEDOWN, /*ch-*/
  149. [0x1a] = KEY_O, /*vol+*/
  150. [0x0e] = KEY_Z, /*vol-*/
  151. [0x04] = KEY_R, /*rec*/
  152. [0x09] = KEY_D, /*fav*/
  153. [0x08] = KEY_BACKSPACE, /*rewind*/
  154. [0x07] = KEY_A, /*fast*/
  155. [0x0b] = KEY_P, /*pause*/
  156. [0x02] = KEY_ESC, /*cancel*/
  157. [0x03] = KEY_G, /*tab*/
  158. [0x00] = KEY_UP, /*up*/
  159. [0x1f] = KEY_ENTER, /*ok*/
  160. [0x01] = KEY_DOWN, /*down*/
  161. [0x05] = KEY_C, /*cap*/
  162. [0x06] = KEY_S, /*stop*/
  163. [0x40] = KEY_F, /*full*/
  164. [0x1e] = KEY_W, /*tvmode*/
  165. [0x1b] = KEY_B, /*recall*/
  166. };
  167. /* infrared remote control */
  168. struct infrared {
  169. u16 key_map[128];
  170. struct input_dev *input_dev;
  171. char input_phys[32];
  172. struct tasklet_struct ir_tasklet;
  173. u32 ir_command;
  174. };
  175. struct dm1105dvb {
  176. /* pci */
  177. struct pci_dev *pdev;
  178. u8 __iomem *io_mem;
  179. /* ir */
  180. struct infrared ir;
  181. /* dvb */
  182. struct dmx_frontend hw_frontend;
  183. struct dmx_frontend mem_frontend;
  184. struct dmxdev dmxdev;
  185. struct dvb_adapter dvb_adapter;
  186. struct dvb_demux demux;
  187. struct dvb_frontend *fe;
  188. struct dvb_net dvbnet;
  189. unsigned int full_ts_users;
  190. /* i2c */
  191. struct i2c_adapter i2c_adap;
  192. /* irq */
  193. struct work_struct work;
  194. /* dma */
  195. dma_addr_t dma_addr;
  196. unsigned char *ts_buf;
  197. u32 wrp;
  198. u32 nextwrp;
  199. u32 buffer_size;
  200. unsigned int PacketErrorCount;
  201. unsigned int dmarst;
  202. spinlock_t lock;
  203. };
  204. #define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg]))
  205. static struct dm1105dvb *dm1105dvb_local;
  206. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  207. struct i2c_msg *msgs, int num)
  208. {
  209. struct dm1105dvb *dm1105dvb ;
  210. int addr, rc, i, j, k, len, byte, data;
  211. u8 status;
  212. dm1105dvb = i2c_adap->algo_data;
  213. for (i = 0; i < num; i++) {
  214. outb(0x00, dm_io_mem(DM1105_I2CCTR));
  215. if (msgs[i].flags & I2C_M_RD) {
  216. /* read bytes */
  217. addr = msgs[i].addr << 1;
  218. addr |= 1;
  219. outb(addr, dm_io_mem(DM1105_I2CDAT));
  220. for (byte = 0; byte < msgs[i].len; byte++)
  221. outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1));
  222. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  223. for (j = 0; j < 55; j++) {
  224. mdelay(10);
  225. status = inb(dm_io_mem(DM1105_I2CSTS));
  226. if ((status & 0xc0) == 0x40)
  227. break;
  228. }
  229. if (j >= 55)
  230. return -1;
  231. for (byte = 0; byte < msgs[i].len; byte++) {
  232. rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1));
  233. if (rc < 0)
  234. goto err;
  235. msgs[i].buf[byte] = rc;
  236. }
  237. } else {
  238. if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  239. /* prepaired for cx24116 firmware */
  240. /* Write in small blocks */
  241. len = msgs[i].len - 1;
  242. k = 1;
  243. do {
  244. outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT));
  245. outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1));
  246. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  247. data = msgs[i].buf[k+byte];
  248. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
  249. }
  250. outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
  251. for (j = 0; j < 25; j++) {
  252. mdelay(10);
  253. status = inb(dm_io_mem(DM1105_I2CSTS));
  254. if ((status & 0xc0) == 0x40)
  255. break;
  256. }
  257. if (j >= 25)
  258. return -1;
  259. k += 48;
  260. len -= 48;
  261. } while (len > 0);
  262. } else {
  263. /* write bytes */
  264. outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
  265. for (byte = 0; byte < msgs[i].len; byte++) {
  266. data = msgs[i].buf[byte];
  267. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
  268. }
  269. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  270. for (j = 0; j < 25; j++) {
  271. mdelay(10);
  272. status = inb(dm_io_mem(DM1105_I2CSTS));
  273. if ((status & 0xc0) == 0x40)
  274. break;
  275. }
  276. if (j >= 25)
  277. return -1;
  278. }
  279. }
  280. }
  281. return num;
  282. err:
  283. return rc;
  284. }
  285. static u32 functionality(struct i2c_adapter *adap)
  286. {
  287. return I2C_FUNC_I2C;
  288. }
  289. static struct i2c_algorithm dm1105_algo = {
  290. .master_xfer = dm1105_i2c_xfer,
  291. .functionality = functionality,
  292. };
  293. static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed)
  294. {
  295. return container_of(feed->demux, struct dm1105dvb, demux);
  296. }
  297. static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe)
  298. {
  299. return container_of(fe->dvb, struct dm1105dvb, dvb_adapter);
  300. }
  301. static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  302. {
  303. struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe);
  304. if (voltage == SEC_VOLTAGE_18) {
  305. outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
  306. outl(DM1105_LNB_18V, dm_io_mem(DM1105_GPIOVAL));
  307. } else {
  308. /*LNB ON-13V by default!*/
  309. outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
  310. outl(DM1105_LNB_13V, dm_io_mem(DM1105_GPIOVAL));
  311. }
  312. return 0;
  313. }
  314. static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb)
  315. {
  316. outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR));
  317. }
  318. static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb)
  319. {
  320. dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr);
  321. return !dm1105dvb->ts_buf;
  322. }
  323. static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb)
  324. {
  325. pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr);
  326. }
  327. static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb)
  328. {
  329. outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK));
  330. outb(1, dm_io_mem(DM1105_CR));
  331. }
  332. static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb)
  333. {
  334. outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK));
  335. outb(0, dm_io_mem(DM1105_CR));
  336. }
  337. static int dm1105dvb_start_feed(struct dvb_demux_feed *f)
  338. {
  339. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  340. if (dm1105dvb->full_ts_users++ == 0)
  341. dm1105dvb_enable_irqs(dm1105dvb);
  342. return 0;
  343. }
  344. static int dm1105dvb_stop_feed(struct dvb_demux_feed *f)
  345. {
  346. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  347. if (--dm1105dvb->full_ts_users == 0)
  348. dm1105dvb_disable_irqs(dm1105dvb);
  349. return 0;
  350. }
  351. /* ir tasklet */
  352. static void dm1105_emit_key(unsigned long parm)
  353. {
  354. struct infrared *ir = (struct infrared *) parm;
  355. u32 ircom = ir->ir_command;
  356. u8 data;
  357. u16 keycode;
  358. if (ir_debug)
  359. printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
  360. data = (ircom >> 8) & 0x7f;
  361. input_event(ir->input_dev, EV_MSC, MSC_RAW, (0x0000f8 << 16) | data);
  362. input_event(ir->input_dev, EV_MSC, MSC_SCAN, data);
  363. keycode = ir->key_map[data];
  364. if (!keycode)
  365. return;
  366. input_event(ir->input_dev, EV_KEY, keycode, 1);
  367. input_sync(ir->input_dev);
  368. input_event(ir->input_dev, EV_KEY, keycode, 0);
  369. input_sync(ir->input_dev);
  370. }
  371. /* work handler */
  372. static void dm1105_dmx_buffer(struct work_struct *work)
  373. {
  374. struct dm1105dvb *dm1105dvb =
  375. container_of(work, struct dm1105dvb, work);
  376. unsigned int nbpackets;
  377. u32 oldwrp = dm1105dvb->wrp;
  378. u32 nextwrp = dm1105dvb->nextwrp;
  379. if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) &&
  380. (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) &&
  381. (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  382. dm1105dvb->PacketErrorCount++;
  383. /* bad packet found */
  384. if ((dm1105dvb->PacketErrorCount >= 2) &&
  385. (dm1105dvb->dmarst == 0)) {
  386. outb(1, dm_io_mem(DM1105_RST));
  387. dm1105dvb->wrp = 0;
  388. dm1105dvb->PacketErrorCount = 0;
  389. dm1105dvb->dmarst = 0;
  390. return;
  391. }
  392. }
  393. if (nextwrp < oldwrp) {
  394. memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size,
  395. dm1105dvb->ts_buf, nextwrp);
  396. nbpackets = ((dm1105dvb->buffer_size - oldwrp) + nextwrp) / 188;
  397. } else
  398. nbpackets = (nextwrp - oldwrp) / 188;
  399. dm1105dvb->wrp = nextwrp;
  400. dvb_dmx_swfilter_packets(&dm1105dvb->demux,
  401. &dm1105dvb->ts_buf[oldwrp], nbpackets);
  402. }
  403. static irqreturn_t dm1105dvb_irq(int irq, void *dev_id)
  404. {
  405. struct dm1105dvb *dm1105dvb = dev_id;
  406. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  407. unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS));
  408. outb(intsts, dm_io_mem(DM1105_INTSTS));
  409. switch (intsts) {
  410. case INTSTS_TSIRQ:
  411. case (INTSTS_TSIRQ | INTSTS_IR):
  412. dm1105dvb->nextwrp = inl(dm_io_mem(DM1105_WRP)) -
  413. inl(dm_io_mem(DM1105_STADR));
  414. schedule_work(&dm1105dvb->work);
  415. break;
  416. case INTSTS_IR:
  417. dm1105dvb->ir.ir_command = inl(dm_io_mem(DM1105_IRCODE));
  418. tasklet_schedule(&dm1105dvb->ir.ir_tasklet);
  419. break;
  420. }
  421. return IRQ_HANDLED;
  422. }
  423. /* register with input layer */
  424. static void input_register_keys(struct infrared *ir)
  425. {
  426. int i;
  427. memset(ir->input_dev->keybit, 0, sizeof(ir->input_dev->keybit));
  428. for (i = 0; i < ARRAY_SIZE(ir->key_map); i++)
  429. set_bit(ir->key_map[i], ir->input_dev->keybit);
  430. ir->input_dev->keycode = ir->key_map;
  431. ir->input_dev->keycodesize = sizeof(ir->key_map[0]);
  432. ir->input_dev->keycodemax = ARRAY_SIZE(ir->key_map);
  433. }
  434. int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
  435. {
  436. struct input_dev *input_dev;
  437. int err;
  438. dm1105dvb_local = dm1105;
  439. input_dev = input_allocate_device();
  440. if (!input_dev)
  441. return -ENOMEM;
  442. dm1105->ir.input_dev = input_dev;
  443. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  444. "pci-%s/ir0", pci_name(dm1105->pdev));
  445. input_dev->evbit[0] = BIT(EV_KEY);
  446. input_dev->name = "DVB on-card IR receiver";
  447. input_dev->phys = dm1105->ir.input_phys;
  448. input_dev->id.bustype = BUS_PCI;
  449. input_dev->id.version = 2;
  450. if (dm1105->pdev->subsystem_vendor) {
  451. input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
  452. input_dev->id.product = dm1105->pdev->subsystem_device;
  453. } else {
  454. input_dev->id.vendor = dm1105->pdev->vendor;
  455. input_dev->id.product = dm1105->pdev->device;
  456. }
  457. input_dev->dev.parent = &dm1105->pdev->dev;
  458. /* initial keymap */
  459. memcpy(dm1105->ir.key_map, ir_codes_dm1105_nec, sizeof dm1105->ir.key_map);
  460. input_register_keys(&dm1105->ir);
  461. err = input_register_device(input_dev);
  462. if (err) {
  463. input_free_device(input_dev);
  464. return err;
  465. }
  466. tasklet_init(&dm1105->ir.ir_tasklet, dm1105_emit_key, (unsigned long) &dm1105->ir);
  467. return 0;
  468. }
  469. void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
  470. {
  471. tasklet_kill(&dm1105->ir.ir_tasklet);
  472. input_unregister_device(dm1105->ir.input_dev);
  473. }
  474. static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
  475. {
  476. dm1105dvb_disable_irqs(dm1105dvb);
  477. outb(0, dm_io_mem(DM1105_HOST_CTR));
  478. /*DATALEN 188,*/
  479. outb(188, dm_io_mem(DM1105_DTALENTH));
  480. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  481. outw(0xc10a, dm_io_mem(DM1105_TSCTR));
  482. /* map DMA and set address */
  483. dm1105dvb_dma_map(dm1105dvb);
  484. dm1105dvb_set_dma_addr(dm1105dvb);
  485. /* big buffer */
  486. outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN));
  487. outb(47, dm_io_mem(DM1105_INTCNT));
  488. /* IR NEC mode enable */
  489. outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR));
  490. outb(0, dm_io_mem(DM1105_IRMODE));
  491. outw(0, dm_io_mem(DM1105_SYSTEMCODE));
  492. return 0;
  493. }
  494. static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb)
  495. {
  496. dm1105dvb_disable_irqs(dm1105dvb);
  497. /* IR disable */
  498. outb(0, dm_io_mem(DM1105_IRCTR));
  499. outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK));
  500. dm1105dvb_dma_unmap(dm1105dvb);
  501. }
  502. static struct stv0299_config sharp_z0194a_config = {
  503. .demod_address = 0x68,
  504. .inittab = sharp_z0194a_inittab,
  505. .mclk = 88000000UL,
  506. .invert = 1,
  507. .skip_reinit = 0,
  508. .lock_output = STV0299_LOCKOUTPUT_1,
  509. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  510. .min_delay_ms = 100,
  511. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  512. };
  513. static struct stv0288_config earda_config = {
  514. .demod_address = 0x68,
  515. .min_delay_ms = 100,
  516. };
  517. static struct si21xx_config serit_config = {
  518. .demod_address = 0x68,
  519. .min_delay_ms = 100,
  520. };
  521. static struct cx24116_config serit_sp2633_config = {
  522. .demod_address = 0x55,
  523. };
  524. static int __devinit frontend_init(struct dm1105dvb *dm1105dvb)
  525. {
  526. int ret;
  527. switch (dm1105dvb->pdev->subsystem_device) {
  528. case PCI_DEVICE_ID_DW2002:
  529. dm1105dvb->fe = dvb_attach(
  530. stv0299_attach, &sharp_z0194a_config,
  531. &dm1105dvb->i2c_adap);
  532. if (dm1105dvb->fe) {
  533. dm1105dvb->fe->ops.set_voltage =
  534. dm1105dvb_set_voltage;
  535. dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60,
  536. &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
  537. }
  538. if (!dm1105dvb->fe) {
  539. dm1105dvb->fe = dvb_attach(
  540. stv0288_attach, &earda_config,
  541. &dm1105dvb->i2c_adap);
  542. if (dm1105dvb->fe) {
  543. dm1105dvb->fe->ops.set_voltage =
  544. dm1105dvb_set_voltage;
  545. dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61,
  546. &dm1105dvb->i2c_adap);
  547. }
  548. }
  549. if (!dm1105dvb->fe) {
  550. dm1105dvb->fe = dvb_attach(
  551. si21xx_attach, &serit_config,
  552. &dm1105dvb->i2c_adap);
  553. if (dm1105dvb->fe)
  554. dm1105dvb->fe->ops.set_voltage =
  555. dm1105dvb_set_voltage;
  556. }
  557. break;
  558. case PCI_DEVICE_ID_DW2004:
  559. dm1105dvb->fe = dvb_attach(
  560. cx24116_attach, &serit_sp2633_config,
  561. &dm1105dvb->i2c_adap);
  562. if (dm1105dvb->fe)
  563. dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage;
  564. break;
  565. }
  566. if (!dm1105dvb->fe) {
  567. dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n");
  568. return -ENODEV;
  569. }
  570. ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe);
  571. if (ret < 0) {
  572. if (dm1105dvb->fe->ops.release)
  573. dm1105dvb->fe->ops.release(dm1105dvb->fe);
  574. dm1105dvb->fe = NULL;
  575. return ret;
  576. }
  577. return 0;
  578. }
  579. static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
  580. {
  581. static u8 command[1] = { 0x28 };
  582. struct i2c_msg msg[] = {
  583. { .addr = IIC_24C01_addr >> 1, .flags = 0,
  584. .buf = command, .len = 1 },
  585. { .addr = IIC_24C01_addr >> 1, .flags = I2C_M_RD,
  586. .buf = mac, .len = 6 },
  587. };
  588. dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2);
  589. dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac);
  590. }
  591. static int __devinit dm1105_probe(struct pci_dev *pdev,
  592. const struct pci_device_id *ent)
  593. {
  594. struct dm1105dvb *dm1105dvb;
  595. struct dvb_adapter *dvb_adapter;
  596. struct dvb_demux *dvbdemux;
  597. struct dmx_demux *dmx;
  598. int ret = -ENOMEM;
  599. dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL);
  600. if (!dm1105dvb)
  601. return -ENOMEM;
  602. dm1105dvb->pdev = pdev;
  603. dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES;
  604. dm1105dvb->PacketErrorCount = 0;
  605. dm1105dvb->dmarst = 0;
  606. ret = pci_enable_device(pdev);
  607. if (ret < 0)
  608. goto err_kfree;
  609. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  610. if (ret < 0)
  611. goto err_pci_disable_device;
  612. pci_set_master(pdev);
  613. ret = pci_request_regions(pdev, DRIVER_NAME);
  614. if (ret < 0)
  615. goto err_pci_disable_device;
  616. dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  617. if (!dm1105dvb->io_mem) {
  618. ret = -EIO;
  619. goto err_pci_release_regions;
  620. }
  621. spin_lock_init(&dm1105dvb->lock);
  622. pci_set_drvdata(pdev, dm1105dvb);
  623. ret = dm1105dvb_hw_init(dm1105dvb);
  624. if (ret < 0)
  625. goto err_pci_iounmap;
  626. /* i2c */
  627. i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb);
  628. strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME);
  629. dm1105dvb->i2c_adap.owner = THIS_MODULE;
  630. dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  631. dm1105dvb->i2c_adap.dev.parent = &pdev->dev;
  632. dm1105dvb->i2c_adap.algo = &dm1105_algo;
  633. dm1105dvb->i2c_adap.algo_data = dm1105dvb;
  634. ret = i2c_add_adapter(&dm1105dvb->i2c_adap);
  635. if (ret < 0)
  636. goto err_dm1105dvb_hw_exit;
  637. /* dvb */
  638. ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME,
  639. THIS_MODULE, &pdev->dev, adapter_nr);
  640. if (ret < 0)
  641. goto err_i2c_del_adapter;
  642. dvb_adapter = &dm1105dvb->dvb_adapter;
  643. dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac);
  644. dvbdemux = &dm1105dvb->demux;
  645. dvbdemux->filternum = 256;
  646. dvbdemux->feednum = 256;
  647. dvbdemux->start_feed = dm1105dvb_start_feed;
  648. dvbdemux->stop_feed = dm1105dvb_stop_feed;
  649. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  650. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  651. ret = dvb_dmx_init(dvbdemux);
  652. if (ret < 0)
  653. goto err_dvb_unregister_adapter;
  654. dmx = &dvbdemux->dmx;
  655. dm1105dvb->dmxdev.filternum = 256;
  656. dm1105dvb->dmxdev.demux = dmx;
  657. dm1105dvb->dmxdev.capabilities = 0;
  658. ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter);
  659. if (ret < 0)
  660. goto err_dvb_dmx_release;
  661. dm1105dvb->hw_frontend.source = DMX_FRONTEND_0;
  662. ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend);
  663. if (ret < 0)
  664. goto err_dvb_dmxdev_release;
  665. dm1105dvb->mem_frontend.source = DMX_MEMORY_FE;
  666. ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend);
  667. if (ret < 0)
  668. goto err_remove_hw_frontend;
  669. ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend);
  670. if (ret < 0)
  671. goto err_remove_mem_frontend;
  672. ret = frontend_init(dm1105dvb);
  673. if (ret < 0)
  674. goto err_disconnect_frontend;
  675. dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx);
  676. dm1105_ir_init(dm1105dvb);
  677. INIT_WORK(&dm1105dvb->work, dm1105_dmx_buffer);
  678. ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED,
  679. DRIVER_NAME, dm1105dvb);
  680. if (ret < 0)
  681. goto err_free_irq;
  682. return 0;
  683. err_disconnect_frontend:
  684. dmx->disconnect_frontend(dmx);
  685. err_remove_mem_frontend:
  686. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  687. err_remove_hw_frontend:
  688. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  689. err_dvb_dmxdev_release:
  690. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  691. err_dvb_dmx_release:
  692. dvb_dmx_release(dvbdemux);
  693. err_dvb_unregister_adapter:
  694. dvb_unregister_adapter(dvb_adapter);
  695. err_i2c_del_adapter:
  696. i2c_del_adapter(&dm1105dvb->i2c_adap);
  697. err_dm1105dvb_hw_exit:
  698. dm1105dvb_hw_exit(dm1105dvb);
  699. err_free_irq:
  700. free_irq(pdev->irq, dm1105dvb);
  701. err_pci_iounmap:
  702. pci_iounmap(pdev, dm1105dvb->io_mem);
  703. err_pci_release_regions:
  704. pci_release_regions(pdev);
  705. err_pci_disable_device:
  706. pci_disable_device(pdev);
  707. err_kfree:
  708. pci_set_drvdata(pdev, NULL);
  709. kfree(dm1105dvb);
  710. return ret;
  711. }
  712. static void __devexit dm1105_remove(struct pci_dev *pdev)
  713. {
  714. struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev);
  715. struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter;
  716. struct dvb_demux *dvbdemux = &dm1105dvb->demux;
  717. struct dmx_demux *dmx = &dvbdemux->dmx;
  718. dm1105_ir_exit(dm1105dvb);
  719. dmx->close(dmx);
  720. dvb_net_release(&dm1105dvb->dvbnet);
  721. if (dm1105dvb->fe)
  722. dvb_unregister_frontend(dm1105dvb->fe);
  723. dmx->disconnect_frontend(dmx);
  724. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  725. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  726. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  727. dvb_dmx_release(dvbdemux);
  728. dvb_unregister_adapter(dvb_adapter);
  729. if (&dm1105dvb->i2c_adap)
  730. i2c_del_adapter(&dm1105dvb->i2c_adap);
  731. dm1105dvb_hw_exit(dm1105dvb);
  732. synchronize_irq(pdev->irq);
  733. free_irq(pdev->irq, dm1105dvb);
  734. pci_iounmap(pdev, dm1105dvb->io_mem);
  735. pci_release_regions(pdev);
  736. pci_disable_device(pdev);
  737. pci_set_drvdata(pdev, NULL);
  738. kfree(dm1105dvb);
  739. }
  740. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  741. {
  742. .vendor = PCI_VENDOR_ID_TRIGEM,
  743. .device = PCI_DEVICE_ID_DM1105,
  744. .subvendor = PCI_ANY_ID,
  745. .subdevice = PCI_DEVICE_ID_DW2002,
  746. }, {
  747. .vendor = PCI_VENDOR_ID_TRIGEM,
  748. .device = PCI_DEVICE_ID_DM1105,
  749. .subvendor = PCI_ANY_ID,
  750. .subdevice = PCI_DEVICE_ID_DW2004,
  751. }, {
  752. /* empty */
  753. },
  754. };
  755. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  756. static struct pci_driver dm1105_driver = {
  757. .name = DRIVER_NAME,
  758. .id_table = dm1105_id_table,
  759. .probe = dm1105_probe,
  760. .remove = __devexit_p(dm1105_remove),
  761. };
  762. static int __init dm1105_init(void)
  763. {
  764. return pci_register_driver(&dm1105_driver);
  765. }
  766. static void __exit dm1105_exit(void)
  767. {
  768. pci_unregister_driver(&dm1105_driver);
  769. }
  770. module_init(dm1105_init);
  771. module_exit(dm1105_exit);
  772. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  773. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  774. MODULE_LICENSE("GPL");