iwl4965-base.c 269 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #include "iwl-4965.h"
  46. #include "iwl-helpers.h"
  47. #ifdef CONFIG_IWL4965_DEBUG
  48. u32 iwl4965_debug_level;
  49. #endif
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /* module parameters */
  58. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  59. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  60. static int iwl4965_param_disable; /* def: enable radio */
  61. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  62. int iwl4965_param_hwcrypto; /* def: using software encryption */
  63. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  64. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.22k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. static int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For data Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr, int is_ap, u8 flags)
  419. {
  420. int i;
  421. int index = IWL_INVALID_STATION;
  422. struct iwl4965_station_entry *station;
  423. unsigned long flags_spin;
  424. DECLARE_MAC_BUF(mac);
  425. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  426. if (is_ap)
  427. index = IWL_AP_ID;
  428. else if (is_broadcast_ether_addr(addr))
  429. index = priv->hw_setting.bcast_sta_id;
  430. else
  431. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  432. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  433. addr)) {
  434. index = i;
  435. break;
  436. }
  437. if (!priv->stations[i].used &&
  438. index == IWL_INVALID_STATION)
  439. index = i;
  440. }
  441. /* These two conditions have the same outcome, but keep them separate
  442. since they have different meanings */
  443. if (unlikely(index == IWL_INVALID_STATION)) {
  444. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  445. return index;
  446. }
  447. if (priv->stations[index].used &&
  448. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  449. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  450. return index;
  451. }
  452. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  453. station = &priv->stations[index];
  454. station->used = 1;
  455. priv->num_stations++;
  456. /* Set up the REPLY_ADD_STA command to send to device */
  457. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  458. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  459. station->sta.mode = 0;
  460. station->sta.sta.sta_id = index;
  461. station->sta.station_flags = 0;
  462. #ifdef CONFIG_IWL4965_HT
  463. /* BCAST station and IBSS stations do not work in HT mode */
  464. if (index != priv->hw_setting.bcast_sta_id &&
  465. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  466. iwl4965_set_ht_add_station(priv, index);
  467. #endif /*CONFIG_IWL4965_HT*/
  468. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  469. /* Add station to device's station table */
  470. iwl4965_send_add_station(priv, &station->sta, flags);
  471. return index;
  472. }
  473. /*************** DRIVER STATUS FUNCTIONS *****/
  474. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  475. {
  476. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  477. * set but EXIT_PENDING is not */
  478. return test_bit(STATUS_READY, &priv->status) &&
  479. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  480. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  481. }
  482. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  483. {
  484. return test_bit(STATUS_ALIVE, &priv->status);
  485. }
  486. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  487. {
  488. return test_bit(STATUS_INIT, &priv->status);
  489. }
  490. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  491. {
  492. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  493. test_bit(STATUS_RF_KILL_SW, &priv->status);
  494. }
  495. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  496. {
  497. if (iwl4965_is_rfkill(priv))
  498. return 0;
  499. return iwl4965_is_ready(priv);
  500. }
  501. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  502. #define IWL_CMD(x) case x : return #x
  503. static const char *get_cmd_string(u8 cmd)
  504. {
  505. switch (cmd) {
  506. IWL_CMD(REPLY_ALIVE);
  507. IWL_CMD(REPLY_ERROR);
  508. IWL_CMD(REPLY_RXON);
  509. IWL_CMD(REPLY_RXON_ASSOC);
  510. IWL_CMD(REPLY_QOS_PARAM);
  511. IWL_CMD(REPLY_RXON_TIMING);
  512. IWL_CMD(REPLY_ADD_STA);
  513. IWL_CMD(REPLY_REMOVE_STA);
  514. IWL_CMD(REPLY_REMOVE_ALL_STA);
  515. IWL_CMD(REPLY_TX);
  516. IWL_CMD(REPLY_RATE_SCALE);
  517. IWL_CMD(REPLY_LEDS_CMD);
  518. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  519. IWL_CMD(RADAR_NOTIFICATION);
  520. IWL_CMD(REPLY_QUIET_CMD);
  521. IWL_CMD(REPLY_CHANNEL_SWITCH);
  522. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  523. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  524. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  525. IWL_CMD(POWER_TABLE_CMD);
  526. IWL_CMD(PM_SLEEP_NOTIFICATION);
  527. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  528. IWL_CMD(REPLY_SCAN_CMD);
  529. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  530. IWL_CMD(SCAN_START_NOTIFICATION);
  531. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  532. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  533. IWL_CMD(BEACON_NOTIFICATION);
  534. IWL_CMD(REPLY_TX_BEACON);
  535. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  536. IWL_CMD(QUIET_NOTIFICATION);
  537. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  538. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  539. IWL_CMD(REPLY_BT_CONFIG);
  540. IWL_CMD(REPLY_STATISTICS_CMD);
  541. IWL_CMD(STATISTICS_NOTIFICATION);
  542. IWL_CMD(REPLY_CARD_STATE_CMD);
  543. IWL_CMD(CARD_STATE_NOTIFICATION);
  544. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  545. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  546. IWL_CMD(SENSITIVITY_CMD);
  547. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  548. IWL_CMD(REPLY_RX_PHY_CMD);
  549. IWL_CMD(REPLY_RX_MPDU_CMD);
  550. IWL_CMD(REPLY_4965_RX);
  551. IWL_CMD(REPLY_COMPRESSED_BA);
  552. default:
  553. return "UNKNOWN";
  554. }
  555. }
  556. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  557. /**
  558. * iwl4965_enqueue_hcmd - enqueue a uCode command
  559. * @priv: device private data point
  560. * @cmd: a point to the ucode command structure
  561. *
  562. * The function returns < 0 values to indicate the operation is
  563. * failed. On success, it turns the index (> 0) of command in the
  564. * command queue.
  565. */
  566. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  567. {
  568. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  569. struct iwl4965_queue *q = &txq->q;
  570. struct iwl4965_tfd_frame *tfd;
  571. u32 *control_flags;
  572. struct iwl4965_cmd *out_cmd;
  573. u32 idx;
  574. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  575. dma_addr_t phys_addr;
  576. int ret;
  577. unsigned long flags;
  578. /* If any of the command structures end up being larger than
  579. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  580. * we will need to increase the size of the TFD entries */
  581. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  582. !(cmd->meta.flags & CMD_SIZE_HUGE));
  583. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  584. IWL_ERROR("No space for Tx\n");
  585. return -ENOSPC;
  586. }
  587. spin_lock_irqsave(&priv->hcmd_lock, flags);
  588. tfd = &txq->bd[q->write_ptr];
  589. memset(tfd, 0, sizeof(*tfd));
  590. control_flags = (u32 *) tfd;
  591. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  592. out_cmd = &txq->cmd[idx];
  593. out_cmd->hdr.cmd = cmd->id;
  594. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  595. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  596. /* At this point, the out_cmd now has all of the incoming cmd
  597. * information */
  598. out_cmd->hdr.flags = 0;
  599. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  600. INDEX_TO_SEQ(q->write_ptr));
  601. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  602. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  603. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  604. offsetof(struct iwl4965_cmd, hdr);
  605. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  606. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  607. "%d bytes at %d[%d]:%d\n",
  608. get_cmd_string(out_cmd->hdr.cmd),
  609. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  610. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  611. txq->need_update = 1;
  612. /* Set up entry in queue's byte count circular buffer */
  613. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  614. /* Increment and update queue's write index */
  615. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  616. iwl4965_tx_queue_update_write_ptr(priv, txq);
  617. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  618. return ret ? ret : idx;
  619. }
  620. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  621. {
  622. int ret;
  623. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  624. /* An asynchronous command can not expect an SKB to be set. */
  625. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  626. /* An asynchronous command MUST have a callback. */
  627. BUG_ON(!cmd->meta.u.callback);
  628. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  629. return -EBUSY;
  630. ret = iwl4965_enqueue_hcmd(priv, cmd);
  631. if (ret < 0) {
  632. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  633. get_cmd_string(cmd->id), ret);
  634. return ret;
  635. }
  636. return 0;
  637. }
  638. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  639. {
  640. int cmd_idx;
  641. int ret;
  642. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  643. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  644. /* A synchronous command can not have a callback set. */
  645. BUG_ON(cmd->meta.u.callback != NULL);
  646. if (atomic_xchg(&entry, 1)) {
  647. IWL_ERROR("Error sending %s: Already sending a host command\n",
  648. get_cmd_string(cmd->id));
  649. return -EBUSY;
  650. }
  651. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  652. if (cmd->meta.flags & CMD_WANT_SKB)
  653. cmd->meta.source = &cmd->meta;
  654. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  655. if (cmd_idx < 0) {
  656. ret = cmd_idx;
  657. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  658. get_cmd_string(cmd->id), ret);
  659. goto out;
  660. }
  661. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  662. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  663. HOST_COMPLETE_TIMEOUT);
  664. if (!ret) {
  665. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  666. IWL_ERROR("Error sending %s: time out after %dms.\n",
  667. get_cmd_string(cmd->id),
  668. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  669. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  670. ret = -ETIMEDOUT;
  671. goto cancel;
  672. }
  673. }
  674. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  675. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  676. get_cmd_string(cmd->id));
  677. ret = -ECANCELED;
  678. goto fail;
  679. }
  680. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  681. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  682. get_cmd_string(cmd->id));
  683. ret = -EIO;
  684. goto fail;
  685. }
  686. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  687. IWL_ERROR("Error: Response NULL in '%s'\n",
  688. get_cmd_string(cmd->id));
  689. ret = -EIO;
  690. goto out;
  691. }
  692. ret = 0;
  693. goto out;
  694. cancel:
  695. if (cmd->meta.flags & CMD_WANT_SKB) {
  696. struct iwl4965_cmd *qcmd;
  697. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  698. * TX cmd queue. Otherwise in case the cmd comes
  699. * in later, it will possibly set an invalid
  700. * address (cmd->meta.source). */
  701. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  702. qcmd->meta.flags &= ~CMD_WANT_SKB;
  703. }
  704. fail:
  705. if (cmd->meta.u.skb) {
  706. dev_kfree_skb_any(cmd->meta.u.skb);
  707. cmd->meta.u.skb = NULL;
  708. }
  709. out:
  710. atomic_set(&entry, 0);
  711. return ret;
  712. }
  713. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  714. {
  715. if (cmd->meta.flags & CMD_ASYNC)
  716. return iwl4965_send_cmd_async(priv, cmd);
  717. return iwl4965_send_cmd_sync(priv, cmd);
  718. }
  719. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  720. {
  721. struct iwl4965_host_cmd cmd = {
  722. .id = id,
  723. .len = len,
  724. .data = data,
  725. };
  726. return iwl4965_send_cmd_sync(priv, &cmd);
  727. }
  728. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  729. {
  730. struct iwl4965_host_cmd cmd = {
  731. .id = id,
  732. .len = sizeof(val),
  733. .data = &val,
  734. };
  735. return iwl4965_send_cmd_sync(priv, &cmd);
  736. }
  737. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  738. {
  739. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  740. }
  741. /**
  742. * iwl4965_rxon_add_station - add station into station table.
  743. *
  744. * there is only one AP station with id= IWL_AP_ID
  745. * NOTE: mutex must be held before calling this fnction
  746. */
  747. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  748. const u8 *addr, int is_ap)
  749. {
  750. u8 sta_id;
  751. /* Add station to device's station table */
  752. sta_id = iwl4965_add_station_flags(priv, addr, is_ap, 0);
  753. /* Set up default rate scaling table in device's station table */
  754. iwl4965_add_station(priv, addr, is_ap);
  755. return sta_id;
  756. }
  757. /**
  758. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  759. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  760. * @channel: Any channel valid for the requested phymode
  761. * In addition to setting the staging RXON, priv->phymode is also set.
  762. *
  763. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  764. * in the staging RXON flag structure based on the phymode
  765. */
  766. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  767. u16 channel)
  768. {
  769. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  770. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  771. channel, phymode);
  772. return -EINVAL;
  773. }
  774. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  775. (priv->phymode == phymode))
  776. return 0;
  777. priv->staging_rxon.channel = cpu_to_le16(channel);
  778. if (phymode == MODE_IEEE80211A)
  779. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  780. else
  781. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  782. priv->phymode = phymode;
  783. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  784. return 0;
  785. }
  786. /**
  787. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  788. *
  789. * NOTE: This is really only useful during development and can eventually
  790. * be #ifdef'd out once the driver is stable and folks aren't actively
  791. * making changes
  792. */
  793. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  794. {
  795. int error = 0;
  796. int counter = 1;
  797. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  798. error |= le32_to_cpu(rxon->flags &
  799. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  800. RXON_FLG_RADAR_DETECT_MSK));
  801. if (error)
  802. IWL_WARNING("check 24G fields %d | %d\n",
  803. counter++, error);
  804. } else {
  805. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  806. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  807. if (error)
  808. IWL_WARNING("check 52 fields %d | %d\n",
  809. counter++, error);
  810. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  811. if (error)
  812. IWL_WARNING("check 52 CCK %d | %d\n",
  813. counter++, error);
  814. }
  815. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  816. if (error)
  817. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  818. /* make sure basic rates 6Mbps and 1Mbps are supported */
  819. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  820. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  821. if (error)
  822. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  823. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  824. if (error)
  825. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  826. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  827. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  828. if (error)
  829. IWL_WARNING("check CCK and short slot %d | %d\n",
  830. counter++, error);
  831. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  832. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  833. if (error)
  834. IWL_WARNING("check CCK & auto detect %d | %d\n",
  835. counter++, error);
  836. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  837. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  838. if (error)
  839. IWL_WARNING("check TGG and auto detect %d | %d\n",
  840. counter++, error);
  841. if (error)
  842. IWL_WARNING("Tuning to channel %d\n",
  843. le16_to_cpu(rxon->channel));
  844. if (error) {
  845. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  846. return -1;
  847. }
  848. return 0;
  849. }
  850. /**
  851. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  852. * @priv: staging_rxon is compared to active_rxon
  853. *
  854. * If the RXON structure is changing enough to require a new tune,
  855. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  856. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  857. */
  858. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  859. {
  860. /* These items are only settable from the full RXON command */
  861. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  862. compare_ether_addr(priv->staging_rxon.bssid_addr,
  863. priv->active_rxon.bssid_addr) ||
  864. compare_ether_addr(priv->staging_rxon.node_addr,
  865. priv->active_rxon.node_addr) ||
  866. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  867. priv->active_rxon.wlap_bssid_addr) ||
  868. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  869. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  870. (priv->staging_rxon.air_propagation !=
  871. priv->active_rxon.air_propagation) ||
  872. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  873. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  874. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  875. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  876. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  877. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  878. return 1;
  879. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  880. * be updated with the RXON_ASSOC command -- however only some
  881. * flag transitions are allowed using RXON_ASSOC */
  882. /* Check if we are not switching bands */
  883. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  884. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  885. return 1;
  886. /* Check if we are switching association toggle */
  887. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  888. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  889. return 1;
  890. return 0;
  891. }
  892. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  893. {
  894. int rc = 0;
  895. struct iwl4965_rx_packet *res = NULL;
  896. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  897. struct iwl4965_host_cmd cmd = {
  898. .id = REPLY_RXON_ASSOC,
  899. .len = sizeof(rxon_assoc),
  900. .meta.flags = CMD_WANT_SKB,
  901. .data = &rxon_assoc,
  902. };
  903. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  904. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  905. if ((rxon1->flags == rxon2->flags) &&
  906. (rxon1->filter_flags == rxon2->filter_flags) &&
  907. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  908. (rxon1->ofdm_ht_single_stream_basic_rates ==
  909. rxon2->ofdm_ht_single_stream_basic_rates) &&
  910. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  911. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  912. (rxon1->rx_chain == rxon2->rx_chain) &&
  913. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  914. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  915. return 0;
  916. }
  917. rxon_assoc.flags = priv->staging_rxon.flags;
  918. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  919. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  920. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  921. rxon_assoc.reserved = 0;
  922. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  923. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  924. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  925. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  926. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  927. rc = iwl4965_send_cmd_sync(priv, &cmd);
  928. if (rc)
  929. return rc;
  930. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  931. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  932. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  933. rc = -EIO;
  934. }
  935. priv->alloc_rxb_skb--;
  936. dev_kfree_skb_any(cmd.meta.u.skb);
  937. return rc;
  938. }
  939. /**
  940. * iwl4965_commit_rxon - commit staging_rxon to hardware
  941. *
  942. * The RXON command in staging_rxon is committed to the hardware and
  943. * the active_rxon structure is updated with the new data. This
  944. * function correctly transitions out of the RXON_ASSOC_MSK state if
  945. * a HW tune is required based on the RXON structure changes.
  946. */
  947. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  948. {
  949. /* cast away the const for active_rxon in this function */
  950. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  951. DECLARE_MAC_BUF(mac);
  952. int rc = 0;
  953. if (!iwl4965_is_alive(priv))
  954. return -1;
  955. /* always get timestamp with Rx frame */
  956. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  957. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  958. if (rc) {
  959. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  960. return -EINVAL;
  961. }
  962. /* If we don't need to send a full RXON, we can use
  963. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  964. * and other flags for the current radio configuration. */
  965. if (!iwl4965_full_rxon_required(priv)) {
  966. rc = iwl4965_send_rxon_assoc(priv);
  967. if (rc) {
  968. IWL_ERROR("Error setting RXON_ASSOC "
  969. "configuration (%d).\n", rc);
  970. return rc;
  971. }
  972. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  973. return 0;
  974. }
  975. /* station table will be cleared */
  976. priv->assoc_station_added = 0;
  977. #ifdef CONFIG_IWL4965_SENSITIVITY
  978. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  979. if (!priv->error_recovering)
  980. priv->start_calib = 0;
  981. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  982. #endif /* CONFIG_IWL4965_SENSITIVITY */
  983. /* If we are currently associated and the new config requires
  984. * an RXON_ASSOC and the new config wants the associated mask enabled,
  985. * we must clear the associated from the active configuration
  986. * before we apply the new config */
  987. if (iwl4965_is_associated(priv) &&
  988. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  989. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  990. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  991. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  992. sizeof(struct iwl4965_rxon_cmd),
  993. &priv->active_rxon);
  994. /* If the mask clearing failed then we set
  995. * active_rxon back to what it was previously */
  996. if (rc) {
  997. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  998. IWL_ERROR("Error clearing ASSOC_MSK on current "
  999. "configuration (%d).\n", rc);
  1000. return rc;
  1001. }
  1002. }
  1003. IWL_DEBUG_INFO("Sending RXON\n"
  1004. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1005. "* channel = %d\n"
  1006. "* bssid = %s\n",
  1007. ((priv->staging_rxon.filter_flags &
  1008. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1009. le16_to_cpu(priv->staging_rxon.channel),
  1010. print_mac(mac, priv->staging_rxon.bssid_addr));
  1011. /* Apply the new configuration */
  1012. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1013. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1014. if (rc) {
  1015. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1016. return rc;
  1017. }
  1018. iwl4965_clear_stations_table(priv);
  1019. #ifdef CONFIG_IWL4965_SENSITIVITY
  1020. if (!priv->error_recovering)
  1021. priv->start_calib = 0;
  1022. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1023. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1024. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1025. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1026. /* If we issue a new RXON command which required a tune then we must
  1027. * send a new TXPOWER command or we won't be able to Tx any frames */
  1028. rc = iwl4965_hw_reg_send_txpower(priv);
  1029. if (rc) {
  1030. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1031. return rc;
  1032. }
  1033. /* Add the broadcast address so we can send broadcast frames */
  1034. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1035. IWL_INVALID_STATION) {
  1036. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1037. return -EIO;
  1038. }
  1039. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1040. * add the IWL_AP_ID to the station rate table */
  1041. if (iwl4965_is_associated(priv) &&
  1042. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1043. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1044. == IWL_INVALID_STATION) {
  1045. IWL_ERROR("Error adding AP address for transmit.\n");
  1046. return -EIO;
  1047. }
  1048. priv->assoc_station_added = 1;
  1049. }
  1050. return 0;
  1051. }
  1052. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1053. {
  1054. struct iwl4965_bt_cmd bt_cmd = {
  1055. .flags = 3,
  1056. .lead_time = 0xAA,
  1057. .max_kill = 1,
  1058. .kill_ack_mask = 0,
  1059. .kill_cts_mask = 0,
  1060. };
  1061. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1062. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1063. }
  1064. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1065. {
  1066. int rc = 0;
  1067. struct iwl4965_rx_packet *res;
  1068. struct iwl4965_host_cmd cmd = {
  1069. .id = REPLY_SCAN_ABORT_CMD,
  1070. .meta.flags = CMD_WANT_SKB,
  1071. };
  1072. /* If there isn't a scan actively going on in the hardware
  1073. * then we are in between scan bands and not actually
  1074. * actively scanning, so don't send the abort command */
  1075. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1076. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1077. return 0;
  1078. }
  1079. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1080. if (rc) {
  1081. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1082. return rc;
  1083. }
  1084. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1085. if (res->u.status != CAN_ABORT_STATUS) {
  1086. /* The scan abort will return 1 for success or
  1087. * 2 for "failure". A failure condition can be
  1088. * due to simply not being in an active scan which
  1089. * can occur if we send the scan abort before we
  1090. * the microcode has notified us that a scan is
  1091. * completed. */
  1092. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1093. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1094. clear_bit(STATUS_SCAN_HW, &priv->status);
  1095. }
  1096. dev_kfree_skb_any(cmd.meta.u.skb);
  1097. return rc;
  1098. }
  1099. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1100. struct iwl4965_cmd *cmd,
  1101. struct sk_buff *skb)
  1102. {
  1103. return 1;
  1104. }
  1105. /*
  1106. * CARD_STATE_CMD
  1107. *
  1108. * Use: Sets the device's internal card state to enable, disable, or halt
  1109. *
  1110. * When in the 'enable' state the card operates as normal.
  1111. * When in the 'disable' state, the card enters into a low power mode.
  1112. * When in the 'halt' state, the card is shut down and must be fully
  1113. * restarted to come back on.
  1114. */
  1115. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1116. {
  1117. struct iwl4965_host_cmd cmd = {
  1118. .id = REPLY_CARD_STATE_CMD,
  1119. .len = sizeof(u32),
  1120. .data = &flags,
  1121. .meta.flags = meta_flag,
  1122. };
  1123. if (meta_flag & CMD_ASYNC)
  1124. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1125. return iwl4965_send_cmd(priv, &cmd);
  1126. }
  1127. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1128. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1129. {
  1130. struct iwl4965_rx_packet *res = NULL;
  1131. if (!skb) {
  1132. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1133. return 1;
  1134. }
  1135. res = (struct iwl4965_rx_packet *)skb->data;
  1136. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1137. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1138. res->hdr.flags);
  1139. return 1;
  1140. }
  1141. switch (res->u.add_sta.status) {
  1142. case ADD_STA_SUCCESS_MSK:
  1143. break;
  1144. default:
  1145. break;
  1146. }
  1147. /* We didn't cache the SKB; let the caller free it */
  1148. return 1;
  1149. }
  1150. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1151. struct iwl4965_addsta_cmd *sta, u8 flags)
  1152. {
  1153. struct iwl4965_rx_packet *res = NULL;
  1154. int rc = 0;
  1155. struct iwl4965_host_cmd cmd = {
  1156. .id = REPLY_ADD_STA,
  1157. .len = sizeof(struct iwl4965_addsta_cmd),
  1158. .meta.flags = flags,
  1159. .data = sta,
  1160. };
  1161. if (flags & CMD_ASYNC)
  1162. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1163. else
  1164. cmd.meta.flags |= CMD_WANT_SKB;
  1165. rc = iwl4965_send_cmd(priv, &cmd);
  1166. if (rc || (flags & CMD_ASYNC))
  1167. return rc;
  1168. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1169. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1170. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1171. res->hdr.flags);
  1172. rc = -EIO;
  1173. }
  1174. if (rc == 0) {
  1175. switch (res->u.add_sta.status) {
  1176. case ADD_STA_SUCCESS_MSK:
  1177. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1178. break;
  1179. default:
  1180. rc = -EIO;
  1181. IWL_WARNING("REPLY_ADD_STA failed\n");
  1182. break;
  1183. }
  1184. }
  1185. priv->alloc_rxb_skb--;
  1186. dev_kfree_skb_any(cmd.meta.u.skb);
  1187. return rc;
  1188. }
  1189. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1190. struct ieee80211_key_conf *keyconf,
  1191. u8 sta_id)
  1192. {
  1193. unsigned long flags;
  1194. __le16 key_flags = 0;
  1195. switch (keyconf->alg) {
  1196. case ALG_CCMP:
  1197. key_flags |= STA_KEY_FLG_CCMP;
  1198. key_flags |= cpu_to_le16(
  1199. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1200. key_flags &= ~STA_KEY_FLG_INVALID;
  1201. break;
  1202. case ALG_TKIP:
  1203. case ALG_WEP:
  1204. default:
  1205. return -EINVAL;
  1206. }
  1207. spin_lock_irqsave(&priv->sta_lock, flags);
  1208. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1209. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1210. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1211. keyconf->keylen);
  1212. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1213. keyconf->keylen);
  1214. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1215. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1216. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1217. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1218. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1219. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1220. return 0;
  1221. }
  1222. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1223. {
  1224. unsigned long flags;
  1225. spin_lock_irqsave(&priv->sta_lock, flags);
  1226. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1227. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1228. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1229. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1230. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1231. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1232. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1233. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1234. return 0;
  1235. }
  1236. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1237. {
  1238. struct list_head *element;
  1239. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1240. priv->frames_count);
  1241. while (!list_empty(&priv->free_frames)) {
  1242. element = priv->free_frames.next;
  1243. list_del(element);
  1244. kfree(list_entry(element, struct iwl4965_frame, list));
  1245. priv->frames_count--;
  1246. }
  1247. if (priv->frames_count) {
  1248. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1249. priv->frames_count);
  1250. priv->frames_count = 0;
  1251. }
  1252. }
  1253. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1254. {
  1255. struct iwl4965_frame *frame;
  1256. struct list_head *element;
  1257. if (list_empty(&priv->free_frames)) {
  1258. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1259. if (!frame) {
  1260. IWL_ERROR("Could not allocate frame!\n");
  1261. return NULL;
  1262. }
  1263. priv->frames_count++;
  1264. return frame;
  1265. }
  1266. element = priv->free_frames.next;
  1267. list_del(element);
  1268. return list_entry(element, struct iwl4965_frame, list);
  1269. }
  1270. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1271. {
  1272. memset(frame, 0, sizeof(*frame));
  1273. list_add(&frame->list, &priv->free_frames);
  1274. }
  1275. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1276. struct ieee80211_hdr *hdr,
  1277. const u8 *dest, int left)
  1278. {
  1279. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1280. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1281. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1282. return 0;
  1283. if (priv->ibss_beacon->len > left)
  1284. return 0;
  1285. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1286. return priv->ibss_beacon->len;
  1287. }
  1288. int iwl4965_rate_index_from_plcp(int plcp)
  1289. {
  1290. int i = 0;
  1291. /* 4965 HT rate format */
  1292. if (plcp & RATE_MCS_HT_MSK) {
  1293. i = (plcp & 0xff);
  1294. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1295. i = i - IWL_RATE_MIMO_6M_PLCP;
  1296. i += IWL_FIRST_OFDM_RATE;
  1297. /* skip 9M not supported in ht*/
  1298. if (i >= IWL_RATE_9M_INDEX)
  1299. i += 1;
  1300. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1301. (i <= IWL_LAST_OFDM_RATE))
  1302. return i;
  1303. /* 4965 legacy rate format, search for match in table */
  1304. } else {
  1305. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1306. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1307. return i;
  1308. }
  1309. return -1;
  1310. }
  1311. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1312. {
  1313. u8 i;
  1314. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1315. i = iwl4965_rates[i].next_ieee) {
  1316. if (rate_mask & (1 << i))
  1317. return iwl4965_rates[i].plcp;
  1318. }
  1319. return IWL_RATE_INVALID;
  1320. }
  1321. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1322. {
  1323. struct iwl4965_frame *frame;
  1324. unsigned int frame_size;
  1325. int rc;
  1326. u8 rate;
  1327. frame = iwl4965_get_free_frame(priv);
  1328. if (!frame) {
  1329. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1330. "command.\n");
  1331. return -ENOMEM;
  1332. }
  1333. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1334. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1335. 0xFF0);
  1336. if (rate == IWL_INVALID_RATE)
  1337. rate = IWL_RATE_6M_PLCP;
  1338. } else {
  1339. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1340. if (rate == IWL_INVALID_RATE)
  1341. rate = IWL_RATE_1M_PLCP;
  1342. }
  1343. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1344. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1345. &frame->u.cmd[0]);
  1346. iwl4965_free_frame(priv, frame);
  1347. return rc;
  1348. }
  1349. /******************************************************************************
  1350. *
  1351. * EEPROM related functions
  1352. *
  1353. ******************************************************************************/
  1354. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1355. {
  1356. memcpy(mac, priv->eeprom.mac_address, 6);
  1357. }
  1358. /**
  1359. * iwl4965_eeprom_init - read EEPROM contents
  1360. *
  1361. * Load the EEPROM contents from adapter into priv->eeprom
  1362. *
  1363. * NOTE: This routine uses the non-debug IO access functions.
  1364. */
  1365. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1366. {
  1367. u16 *e = (u16 *)&priv->eeprom;
  1368. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1369. u32 r;
  1370. int sz = sizeof(priv->eeprom);
  1371. int rc;
  1372. int i;
  1373. u16 addr;
  1374. /* The EEPROM structure has several padding buffers within it
  1375. * and when adding new EEPROM maps is subject to programmer errors
  1376. * which may be very difficult to identify without explicitly
  1377. * checking the resulting size of the eeprom map. */
  1378. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1379. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1380. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1381. return -ENOENT;
  1382. }
  1383. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1384. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1385. if (rc < 0) {
  1386. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1387. return -ENOENT;
  1388. }
  1389. /* eeprom is an array of 16bit values */
  1390. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1391. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1392. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1393. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1394. i += IWL_EEPROM_ACCESS_DELAY) {
  1395. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1396. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1397. break;
  1398. udelay(IWL_EEPROM_ACCESS_DELAY);
  1399. }
  1400. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1401. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1402. rc = -ETIMEDOUT;
  1403. goto done;
  1404. }
  1405. e[addr / 2] = le16_to_cpu(r >> 16);
  1406. }
  1407. rc = 0;
  1408. done:
  1409. iwl4965_eeprom_release_semaphore(priv);
  1410. return rc;
  1411. }
  1412. /******************************************************************************
  1413. *
  1414. * Misc. internal state and helper functions
  1415. *
  1416. ******************************************************************************/
  1417. #ifdef CONFIG_IWL4965_DEBUG
  1418. /**
  1419. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1420. *
  1421. * You may hack this function to show different aspects of received frames,
  1422. * including selective frame dumps.
  1423. * group100 parameter selects whether to show 1 out of 100 good frames.
  1424. *
  1425. * TODO: This was originally written for 3945, need to audit for
  1426. * proper operation with 4965.
  1427. */
  1428. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1429. struct iwl4965_rx_packet *pkt,
  1430. struct ieee80211_hdr *header, int group100)
  1431. {
  1432. u32 to_us;
  1433. u32 print_summary = 0;
  1434. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1435. u32 hundred = 0;
  1436. u32 dataframe = 0;
  1437. u16 fc;
  1438. u16 seq_ctl;
  1439. u16 channel;
  1440. u16 phy_flags;
  1441. int rate_sym;
  1442. u16 length;
  1443. u16 status;
  1444. u16 bcn_tmr;
  1445. u32 tsf_low;
  1446. u64 tsf;
  1447. u8 rssi;
  1448. u8 agc;
  1449. u16 sig_avg;
  1450. u16 noise_diff;
  1451. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1452. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1453. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1454. u8 *data = IWL_RX_DATA(pkt);
  1455. /* MAC header */
  1456. fc = le16_to_cpu(header->frame_control);
  1457. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1458. /* metadata */
  1459. channel = le16_to_cpu(rx_hdr->channel);
  1460. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1461. rate_sym = rx_hdr->rate;
  1462. length = le16_to_cpu(rx_hdr->len);
  1463. /* end-of-frame status and timestamp */
  1464. status = le32_to_cpu(rx_end->status);
  1465. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1466. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1467. tsf = le64_to_cpu(rx_end->timestamp);
  1468. /* signal statistics */
  1469. rssi = rx_stats->rssi;
  1470. agc = rx_stats->agc;
  1471. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1472. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1473. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1474. /* if data frame is to us and all is good,
  1475. * (optionally) print summary for only 1 out of every 100 */
  1476. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1477. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1478. dataframe = 1;
  1479. if (!group100)
  1480. print_summary = 1; /* print each frame */
  1481. else if (priv->framecnt_to_us < 100) {
  1482. priv->framecnt_to_us++;
  1483. print_summary = 0;
  1484. } else {
  1485. priv->framecnt_to_us = 0;
  1486. print_summary = 1;
  1487. hundred = 1;
  1488. }
  1489. } else {
  1490. /* print summary for all other frames */
  1491. print_summary = 1;
  1492. }
  1493. if (print_summary) {
  1494. char *title;
  1495. u32 rate;
  1496. if (hundred)
  1497. title = "100Frames";
  1498. else if (fc & IEEE80211_FCTL_RETRY)
  1499. title = "Retry";
  1500. else if (ieee80211_is_assoc_response(fc))
  1501. title = "AscRsp";
  1502. else if (ieee80211_is_reassoc_response(fc))
  1503. title = "RasRsp";
  1504. else if (ieee80211_is_probe_response(fc)) {
  1505. title = "PrbRsp";
  1506. print_dump = 1; /* dump frame contents */
  1507. } else if (ieee80211_is_beacon(fc)) {
  1508. title = "Beacon";
  1509. print_dump = 1; /* dump frame contents */
  1510. } else if (ieee80211_is_atim(fc))
  1511. title = "ATIM";
  1512. else if (ieee80211_is_auth(fc))
  1513. title = "Auth";
  1514. else if (ieee80211_is_deauth(fc))
  1515. title = "DeAuth";
  1516. else if (ieee80211_is_disassoc(fc))
  1517. title = "DisAssoc";
  1518. else
  1519. title = "Frame";
  1520. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1521. if (rate == -1)
  1522. rate = 0;
  1523. else
  1524. rate = iwl4965_rates[rate].ieee / 2;
  1525. /* print frame summary.
  1526. * MAC addresses show just the last byte (for brevity),
  1527. * but you can hack it to show more, if you'd like to. */
  1528. if (dataframe)
  1529. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1530. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1531. title, fc, header->addr1[5],
  1532. length, rssi, channel, rate);
  1533. else {
  1534. /* src/dst addresses assume managed mode */
  1535. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1536. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1537. "phy=0x%02x, chnl=%d\n",
  1538. title, fc, header->addr1[5],
  1539. header->addr3[5], rssi,
  1540. tsf_low - priv->scan_start_tsf,
  1541. phy_flags, channel);
  1542. }
  1543. }
  1544. if (print_dump)
  1545. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1546. }
  1547. #endif
  1548. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1549. {
  1550. if (priv->hw_setting.shared_virt)
  1551. pci_free_consistent(priv->pci_dev,
  1552. sizeof(struct iwl4965_shared),
  1553. priv->hw_setting.shared_virt,
  1554. priv->hw_setting.shared_phys);
  1555. }
  1556. /**
  1557. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1558. *
  1559. * return : set the bit for each supported rate insert in ie
  1560. */
  1561. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1562. u16 basic_rate, int *left)
  1563. {
  1564. u16 ret_rates = 0, bit;
  1565. int i;
  1566. u8 *cnt = ie;
  1567. u8 *rates = ie + 1;
  1568. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1569. if (bit & supported_rate) {
  1570. ret_rates |= bit;
  1571. rates[*cnt] = iwl4965_rates[i].ieee |
  1572. ((bit & basic_rate) ? 0x80 : 0x00);
  1573. (*cnt)++;
  1574. (*left)--;
  1575. if ((*left <= 0) ||
  1576. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1577. break;
  1578. }
  1579. }
  1580. return ret_rates;
  1581. }
  1582. #ifdef CONFIG_IWL4965_HT
  1583. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1584. struct ieee80211_ht_capability *ht_cap,
  1585. u8 use_wide_chan);
  1586. #endif
  1587. /**
  1588. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1589. */
  1590. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1591. struct ieee80211_mgmt *frame,
  1592. int left, int is_direct)
  1593. {
  1594. int len = 0;
  1595. u8 *pos = NULL;
  1596. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1597. /* Make sure there is enough space for the probe request,
  1598. * two mandatory IEs and the data */
  1599. left -= 24;
  1600. if (left < 0)
  1601. return 0;
  1602. len += 24;
  1603. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1604. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1605. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1606. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1607. frame->seq_ctrl = 0;
  1608. /* fill in our indirect SSID IE */
  1609. /* ...next IE... */
  1610. left -= 2;
  1611. if (left < 0)
  1612. return 0;
  1613. len += 2;
  1614. pos = &(frame->u.probe_req.variable[0]);
  1615. *pos++ = WLAN_EID_SSID;
  1616. *pos++ = 0;
  1617. /* fill in our direct SSID IE... */
  1618. if (is_direct) {
  1619. /* ...next IE... */
  1620. left -= 2 + priv->essid_len;
  1621. if (left < 0)
  1622. return 0;
  1623. /* ... fill it in... */
  1624. *pos++ = WLAN_EID_SSID;
  1625. *pos++ = priv->essid_len;
  1626. memcpy(pos, priv->essid, priv->essid_len);
  1627. pos += priv->essid_len;
  1628. len += 2 + priv->essid_len;
  1629. }
  1630. /* fill in supported rate */
  1631. /* ...next IE... */
  1632. left -= 2;
  1633. if (left < 0)
  1634. return 0;
  1635. /* ... fill it in... */
  1636. *pos++ = WLAN_EID_SUPP_RATES;
  1637. *pos = 0;
  1638. /* exclude 60M rate */
  1639. active_rates = priv->rates_mask;
  1640. active_rates &= ~IWL_RATE_60M_MASK;
  1641. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1642. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1643. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1644. active_rate_basic, &left);
  1645. active_rates &= ~ret_rates;
  1646. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1647. active_rate_basic, &left);
  1648. active_rates &= ~ret_rates;
  1649. len += 2 + *pos;
  1650. pos += (*pos) + 1;
  1651. if (active_rates == 0)
  1652. goto fill_end;
  1653. /* fill in supported extended rate */
  1654. /* ...next IE... */
  1655. left -= 2;
  1656. if (left < 0)
  1657. return 0;
  1658. /* ... fill it in... */
  1659. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1660. *pos = 0;
  1661. iwl4965_supported_rate_to_ie(pos, active_rates,
  1662. active_rate_basic, &left);
  1663. if (*pos > 0)
  1664. len += 2 + *pos;
  1665. #ifdef CONFIG_IWL4965_HT
  1666. if (is_direct && priv->is_ht_enabled) {
  1667. u8 use_wide_chan = 1;
  1668. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1669. use_wide_chan = 0;
  1670. pos += (*pos) + 1;
  1671. *pos++ = WLAN_EID_HT_CAPABILITY;
  1672. *pos++ = sizeof(struct ieee80211_ht_capability);
  1673. iwl4965_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1674. use_wide_chan);
  1675. len += 2 + sizeof(struct ieee80211_ht_capability);
  1676. }
  1677. #endif /*CONFIG_IWL4965_HT */
  1678. fill_end:
  1679. return (u16)len;
  1680. }
  1681. /*
  1682. * QoS support
  1683. */
  1684. #ifdef CONFIG_IWL4965_QOS
  1685. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1686. struct iwl4965_qosparam_cmd *qos)
  1687. {
  1688. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1689. sizeof(struct iwl4965_qosparam_cmd), qos);
  1690. }
  1691. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1692. {
  1693. u16 cw_min = 15;
  1694. u16 cw_max = 1023;
  1695. u8 aifs = 2;
  1696. u8 is_legacy = 0;
  1697. unsigned long flags;
  1698. int i;
  1699. spin_lock_irqsave(&priv->lock, flags);
  1700. priv->qos_data.qos_active = 0;
  1701. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1702. if (priv->qos_data.qos_enable)
  1703. priv->qos_data.qos_active = 1;
  1704. if (!(priv->active_rate & 0xfff0)) {
  1705. cw_min = 31;
  1706. is_legacy = 1;
  1707. }
  1708. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1709. if (priv->qos_data.qos_enable)
  1710. priv->qos_data.qos_active = 1;
  1711. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1712. cw_min = 31;
  1713. is_legacy = 1;
  1714. }
  1715. if (priv->qos_data.qos_active)
  1716. aifs = 3;
  1717. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1718. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1719. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1720. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1721. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1722. if (priv->qos_data.qos_active) {
  1723. i = 1;
  1724. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1725. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1726. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1727. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1728. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1729. i = 2;
  1730. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1731. cpu_to_le16((cw_min + 1) / 2 - 1);
  1732. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1733. cpu_to_le16(cw_max);
  1734. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1735. if (is_legacy)
  1736. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1737. cpu_to_le16(6016);
  1738. else
  1739. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1740. cpu_to_le16(3008);
  1741. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1742. i = 3;
  1743. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1744. cpu_to_le16((cw_min + 1) / 4 - 1);
  1745. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1746. cpu_to_le16((cw_max + 1) / 2 - 1);
  1747. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1748. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1749. if (is_legacy)
  1750. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1751. cpu_to_le16(3264);
  1752. else
  1753. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1754. cpu_to_le16(1504);
  1755. } else {
  1756. for (i = 1; i < 4; i++) {
  1757. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1758. cpu_to_le16(cw_min);
  1759. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1760. cpu_to_le16(cw_max);
  1761. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1762. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1763. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1764. }
  1765. }
  1766. IWL_DEBUG_QOS("set QoS to default \n");
  1767. spin_unlock_irqrestore(&priv->lock, flags);
  1768. }
  1769. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1770. {
  1771. unsigned long flags;
  1772. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1773. return;
  1774. if (!priv->qos_data.qos_enable)
  1775. return;
  1776. spin_lock_irqsave(&priv->lock, flags);
  1777. priv->qos_data.def_qos_parm.qos_flags = 0;
  1778. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1779. !priv->qos_data.qos_cap.q_AP.txop_request)
  1780. priv->qos_data.def_qos_parm.qos_flags |=
  1781. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1782. if (priv->qos_data.qos_active)
  1783. priv->qos_data.def_qos_parm.qos_flags |=
  1784. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1785. #ifdef CONFIG_IWL4965_HT
  1786. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  1787. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1788. #endif /* CONFIG_IWL4965_HT */
  1789. spin_unlock_irqrestore(&priv->lock, flags);
  1790. if (force || iwl4965_is_associated(priv)) {
  1791. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1792. priv->qos_data.qos_active,
  1793. priv->qos_data.def_qos_parm.qos_flags);
  1794. iwl4965_send_qos_params_command(priv,
  1795. &(priv->qos_data.def_qos_parm));
  1796. }
  1797. }
  1798. #endif /* CONFIG_IWL4965_QOS */
  1799. /*
  1800. * Power management (not Tx power!) functions
  1801. */
  1802. #define MSEC_TO_USEC 1024
  1803. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1804. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1805. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1806. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1807. __constant_cpu_to_le32(X1), \
  1808. __constant_cpu_to_le32(X2), \
  1809. __constant_cpu_to_le32(X3), \
  1810. __constant_cpu_to_le32(X4)}
  1811. /* default power management (not Tx power) table values */
  1812. /* for tim 0-10 */
  1813. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1814. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1815. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1816. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1817. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1818. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1819. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1820. };
  1821. /* for tim > 10 */
  1822. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1823. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1824. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1825. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1826. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1827. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1828. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1829. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1830. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1831. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1832. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1833. };
  1834. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1835. {
  1836. int rc = 0, i;
  1837. struct iwl4965_power_mgr *pow_data;
  1838. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1839. u16 pci_pm;
  1840. IWL_DEBUG_POWER("Initialize power \n");
  1841. pow_data = &(priv->power_data);
  1842. memset(pow_data, 0, sizeof(*pow_data));
  1843. pow_data->active_index = IWL_POWER_RANGE_0;
  1844. pow_data->dtim_val = 0xffff;
  1845. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1846. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1847. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1848. if (rc != 0)
  1849. return 0;
  1850. else {
  1851. struct iwl4965_powertable_cmd *cmd;
  1852. IWL_DEBUG_POWER("adjust power command flags\n");
  1853. for (i = 0; i < IWL_POWER_AC; i++) {
  1854. cmd = &pow_data->pwr_range_0[i].cmd;
  1855. if (pci_pm & 0x1)
  1856. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1857. else
  1858. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1859. }
  1860. }
  1861. return rc;
  1862. }
  1863. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1864. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1865. {
  1866. int rc = 0, i;
  1867. u8 skip;
  1868. u32 max_sleep = 0;
  1869. struct iwl4965_power_vec_entry *range;
  1870. u8 period = 0;
  1871. struct iwl4965_power_mgr *pow_data;
  1872. if (mode > IWL_POWER_INDEX_5) {
  1873. IWL_DEBUG_POWER("Error invalid power mode \n");
  1874. return -1;
  1875. }
  1876. pow_data = &(priv->power_data);
  1877. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1878. range = &pow_data->pwr_range_0[0];
  1879. else
  1880. range = &pow_data->pwr_range_1[1];
  1881. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1882. #ifdef IWL_MAC80211_DISABLE
  1883. if (priv->assoc_network != NULL) {
  1884. unsigned long flags;
  1885. period = priv->assoc_network->tim.tim_period;
  1886. }
  1887. #endif /*IWL_MAC80211_DISABLE */
  1888. skip = range[mode].no_dtim;
  1889. if (period == 0) {
  1890. period = 1;
  1891. skip = 0;
  1892. }
  1893. if (skip == 0) {
  1894. max_sleep = period;
  1895. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1896. } else {
  1897. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1898. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1899. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1900. }
  1901. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1902. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1903. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1904. }
  1905. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1906. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1907. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1908. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1909. le32_to_cpu(cmd->sleep_interval[0]),
  1910. le32_to_cpu(cmd->sleep_interval[1]),
  1911. le32_to_cpu(cmd->sleep_interval[2]),
  1912. le32_to_cpu(cmd->sleep_interval[3]),
  1913. le32_to_cpu(cmd->sleep_interval[4]));
  1914. return rc;
  1915. }
  1916. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1917. {
  1918. u32 uninitialized_var(final_mode);
  1919. int rc;
  1920. struct iwl4965_powertable_cmd cmd;
  1921. /* If on battery, set to 3,
  1922. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1923. * else user level */
  1924. switch (mode) {
  1925. case IWL_POWER_BATTERY:
  1926. final_mode = IWL_POWER_INDEX_3;
  1927. break;
  1928. case IWL_POWER_AC:
  1929. final_mode = IWL_POWER_MODE_CAM;
  1930. break;
  1931. default:
  1932. final_mode = mode;
  1933. break;
  1934. }
  1935. cmd.keep_alive_beacons = 0;
  1936. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1937. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1938. if (final_mode == IWL_POWER_MODE_CAM)
  1939. clear_bit(STATUS_POWER_PMI, &priv->status);
  1940. else
  1941. set_bit(STATUS_POWER_PMI, &priv->status);
  1942. return rc;
  1943. }
  1944. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1945. {
  1946. /* Filter incoming packets to determine if they are targeted toward
  1947. * this network, discarding packets coming from ourselves */
  1948. switch (priv->iw_mode) {
  1949. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1950. /* packets from our adapter are dropped (echo) */
  1951. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1952. return 0;
  1953. /* {broad,multi}cast packets to our IBSS go through */
  1954. if (is_multicast_ether_addr(header->addr1))
  1955. return !compare_ether_addr(header->addr3, priv->bssid);
  1956. /* packets to our adapter go through */
  1957. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1958. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1959. /* packets from our adapter are dropped (echo) */
  1960. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1961. return 0;
  1962. /* {broad,multi}cast packets to our BSS go through */
  1963. if (is_multicast_ether_addr(header->addr1))
  1964. return !compare_ether_addr(header->addr2, priv->bssid);
  1965. /* packets to our adapter go through */
  1966. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1967. }
  1968. return 1;
  1969. }
  1970. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1971. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1972. {
  1973. switch (status & TX_STATUS_MSK) {
  1974. case TX_STATUS_SUCCESS:
  1975. return "SUCCESS";
  1976. TX_STATUS_ENTRY(SHORT_LIMIT);
  1977. TX_STATUS_ENTRY(LONG_LIMIT);
  1978. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1979. TX_STATUS_ENTRY(MGMNT_ABORT);
  1980. TX_STATUS_ENTRY(NEXT_FRAG);
  1981. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1982. TX_STATUS_ENTRY(DEST_PS);
  1983. TX_STATUS_ENTRY(ABORTED);
  1984. TX_STATUS_ENTRY(BT_RETRY);
  1985. TX_STATUS_ENTRY(STA_INVALID);
  1986. TX_STATUS_ENTRY(FRAG_DROPPED);
  1987. TX_STATUS_ENTRY(TID_DISABLE);
  1988. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1989. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1990. TX_STATUS_ENTRY(TX_LOCKED);
  1991. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1992. }
  1993. return "UNKNOWN";
  1994. }
  1995. /**
  1996. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1997. *
  1998. * NOTE: priv->mutex is not required before calling this function
  1999. */
  2000. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2001. {
  2002. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2003. clear_bit(STATUS_SCANNING, &priv->status);
  2004. return 0;
  2005. }
  2006. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2007. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2008. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2009. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2010. queue_work(priv->workqueue, &priv->abort_scan);
  2011. } else
  2012. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2013. return test_bit(STATUS_SCANNING, &priv->status);
  2014. }
  2015. return 0;
  2016. }
  2017. /**
  2018. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2019. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2020. *
  2021. * NOTE: priv->mutex must be held before calling this function
  2022. */
  2023. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2024. {
  2025. unsigned long now = jiffies;
  2026. int ret;
  2027. ret = iwl4965_scan_cancel(priv);
  2028. if (ret && ms) {
  2029. mutex_unlock(&priv->mutex);
  2030. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2031. test_bit(STATUS_SCANNING, &priv->status))
  2032. msleep(1);
  2033. mutex_lock(&priv->mutex);
  2034. return test_bit(STATUS_SCANNING, &priv->status);
  2035. }
  2036. return ret;
  2037. }
  2038. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2039. {
  2040. /* Reset ieee stats */
  2041. /* We don't reset the net_device_stats (ieee->stats) on
  2042. * re-association */
  2043. priv->last_seq_num = -1;
  2044. priv->last_frag_num = -1;
  2045. priv->last_packet_time = 0;
  2046. iwl4965_scan_cancel(priv);
  2047. }
  2048. #define MAX_UCODE_BEACON_INTERVAL 4096
  2049. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2050. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2051. {
  2052. u16 new_val = 0;
  2053. u16 beacon_factor = 0;
  2054. beacon_factor =
  2055. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2056. / MAX_UCODE_BEACON_INTERVAL;
  2057. new_val = beacon_val / beacon_factor;
  2058. return cpu_to_le16(new_val);
  2059. }
  2060. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2061. {
  2062. u64 interval_tm_unit;
  2063. u64 tsf, result;
  2064. unsigned long flags;
  2065. struct ieee80211_conf *conf = NULL;
  2066. u16 beacon_int = 0;
  2067. conf = ieee80211_get_hw_conf(priv->hw);
  2068. spin_lock_irqsave(&priv->lock, flags);
  2069. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2070. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2071. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2072. tsf = priv->timestamp1;
  2073. tsf = ((tsf << 32) | priv->timestamp0);
  2074. beacon_int = priv->beacon_int;
  2075. spin_unlock_irqrestore(&priv->lock, flags);
  2076. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2077. if (beacon_int == 0) {
  2078. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2079. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2080. } else {
  2081. priv->rxon_timing.beacon_interval =
  2082. cpu_to_le16(beacon_int);
  2083. priv->rxon_timing.beacon_interval =
  2084. iwl4965_adjust_beacon_interval(
  2085. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2086. }
  2087. priv->rxon_timing.atim_window = 0;
  2088. } else {
  2089. priv->rxon_timing.beacon_interval =
  2090. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2091. /* TODO: we need to get atim_window from upper stack
  2092. * for now we set to 0 */
  2093. priv->rxon_timing.atim_window = 0;
  2094. }
  2095. interval_tm_unit =
  2096. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2097. result = do_div(tsf, interval_tm_unit);
  2098. priv->rxon_timing.beacon_init_val =
  2099. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2100. IWL_DEBUG_ASSOC
  2101. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2102. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2103. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2104. le16_to_cpu(priv->rxon_timing.atim_window));
  2105. }
  2106. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2107. {
  2108. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2109. IWL_ERROR("APs don't scan.\n");
  2110. return 0;
  2111. }
  2112. if (!iwl4965_is_ready_rf(priv)) {
  2113. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2114. return -EIO;
  2115. }
  2116. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2117. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2118. return -EAGAIN;
  2119. }
  2120. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2121. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2122. "Queuing.\n");
  2123. return -EAGAIN;
  2124. }
  2125. IWL_DEBUG_INFO("Starting scan...\n");
  2126. priv->scan_bands = 2;
  2127. set_bit(STATUS_SCANNING, &priv->status);
  2128. priv->scan_start = jiffies;
  2129. priv->scan_pass_start = priv->scan_start;
  2130. queue_work(priv->workqueue, &priv->request_scan);
  2131. return 0;
  2132. }
  2133. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2134. {
  2135. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2136. if (hw_decrypt)
  2137. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2138. else
  2139. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2140. return 0;
  2141. }
  2142. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2143. {
  2144. if (phymode == MODE_IEEE80211A) {
  2145. priv->staging_rxon.flags &=
  2146. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2147. | RXON_FLG_CCK_MSK);
  2148. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2149. } else {
  2150. /* Copied from iwl4965_bg_post_associate() */
  2151. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2152. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2153. else
  2154. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2155. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2156. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2157. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2158. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2159. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2160. }
  2161. }
  2162. /*
  2163. * initialize rxon structure with default values from eeprom
  2164. */
  2165. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2166. {
  2167. const struct iwl4965_channel_info *ch_info;
  2168. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2169. switch (priv->iw_mode) {
  2170. case IEEE80211_IF_TYPE_AP:
  2171. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2172. break;
  2173. case IEEE80211_IF_TYPE_STA:
  2174. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2175. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2176. break;
  2177. case IEEE80211_IF_TYPE_IBSS:
  2178. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2179. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2180. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2181. RXON_FILTER_ACCEPT_GRP_MSK;
  2182. break;
  2183. case IEEE80211_IF_TYPE_MNTR:
  2184. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2185. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2186. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2187. break;
  2188. }
  2189. #if 0
  2190. /* TODO: Figure out when short_preamble would be set and cache from
  2191. * that */
  2192. if (!hw_to_local(priv->hw)->short_preamble)
  2193. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2194. else
  2195. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2196. #endif
  2197. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2198. le16_to_cpu(priv->staging_rxon.channel));
  2199. if (!ch_info)
  2200. ch_info = &priv->channel_info[0];
  2201. /*
  2202. * in some case A channels are all non IBSS
  2203. * in this case force B/G channel
  2204. */
  2205. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2206. !(is_channel_ibss(ch_info)))
  2207. ch_info = &priv->channel_info[0];
  2208. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2209. if (is_channel_a_band(ch_info))
  2210. priv->phymode = MODE_IEEE80211A;
  2211. else
  2212. priv->phymode = MODE_IEEE80211G;
  2213. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2214. priv->staging_rxon.ofdm_basic_rates =
  2215. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2216. priv->staging_rxon.cck_basic_rates =
  2217. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2218. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2219. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2220. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2221. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2222. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2223. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2224. iwl4965_set_rxon_chain(priv);
  2225. }
  2226. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2227. {
  2228. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2229. const struct iwl4965_channel_info *ch_info;
  2230. ch_info = iwl4965_get_channel_info(priv,
  2231. priv->phymode,
  2232. le16_to_cpu(priv->staging_rxon.channel));
  2233. if (!ch_info || !is_channel_ibss(ch_info)) {
  2234. IWL_ERROR("channel %d not IBSS channel\n",
  2235. le16_to_cpu(priv->staging_rxon.channel));
  2236. return -EINVAL;
  2237. }
  2238. }
  2239. priv->iw_mode = mode;
  2240. iwl4965_connection_init_rx_config(priv);
  2241. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2242. iwl4965_clear_stations_table(priv);
  2243. /* dont commit rxon if rf-kill is on*/
  2244. if (!iwl4965_is_ready_rf(priv))
  2245. return -EAGAIN;
  2246. cancel_delayed_work(&priv->scan_check);
  2247. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2248. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2249. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2250. return -EAGAIN;
  2251. }
  2252. iwl4965_commit_rxon(priv);
  2253. return 0;
  2254. }
  2255. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2256. struct ieee80211_tx_control *ctl,
  2257. struct iwl4965_cmd *cmd,
  2258. struct sk_buff *skb_frag,
  2259. int last_frag)
  2260. {
  2261. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2262. switch (keyinfo->alg) {
  2263. case ALG_CCMP:
  2264. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2265. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2266. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2267. break;
  2268. case ALG_TKIP:
  2269. #if 0
  2270. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2271. if (last_frag)
  2272. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2273. 8);
  2274. else
  2275. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2276. #endif
  2277. break;
  2278. case ALG_WEP:
  2279. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2280. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2281. if (keyinfo->keylen == 13)
  2282. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2283. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2284. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2285. "with key %d\n", ctl->key_idx);
  2286. break;
  2287. default:
  2288. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2289. break;
  2290. }
  2291. }
  2292. /*
  2293. * handle build REPLY_TX command notification.
  2294. */
  2295. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2296. struct iwl4965_cmd *cmd,
  2297. struct ieee80211_tx_control *ctrl,
  2298. struct ieee80211_hdr *hdr,
  2299. int is_unicast, u8 std_id)
  2300. {
  2301. __le16 *qc;
  2302. u16 fc = le16_to_cpu(hdr->frame_control);
  2303. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2304. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2305. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2306. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2307. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2308. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2309. if (ieee80211_is_probe_response(fc) &&
  2310. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2311. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2312. } else {
  2313. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2314. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2315. }
  2316. cmd->cmd.tx.sta_id = std_id;
  2317. if (ieee80211_get_morefrag(hdr))
  2318. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2319. qc = ieee80211_get_qos_ctrl(hdr);
  2320. if (qc) {
  2321. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2322. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2323. } else
  2324. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2325. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2326. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2327. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2328. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2329. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2330. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2331. }
  2332. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2333. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2334. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2335. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2336. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2337. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2338. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2339. else
  2340. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2341. } else
  2342. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2343. cmd->cmd.tx.driver_txop = 0;
  2344. cmd->cmd.tx.tx_flags = tx_flags;
  2345. cmd->cmd.tx.next_frame_len = 0;
  2346. }
  2347. /**
  2348. * iwl4965_get_sta_id - Find station's index within station table
  2349. *
  2350. * If new IBSS station, create new entry in station table
  2351. */
  2352. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2353. struct ieee80211_hdr *hdr)
  2354. {
  2355. int sta_id;
  2356. u16 fc = le16_to_cpu(hdr->frame_control);
  2357. DECLARE_MAC_BUF(mac);
  2358. /* If this frame is broadcast or management, use broadcast station id */
  2359. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2360. is_multicast_ether_addr(hdr->addr1))
  2361. return priv->hw_setting.bcast_sta_id;
  2362. switch (priv->iw_mode) {
  2363. /* If we are a client station in a BSS network, use the special
  2364. * AP station entry (that's the only station we communicate with) */
  2365. case IEEE80211_IF_TYPE_STA:
  2366. return IWL_AP_ID;
  2367. /* If we are an AP, then find the station, or use BCAST */
  2368. case IEEE80211_IF_TYPE_AP:
  2369. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2370. if (sta_id != IWL_INVALID_STATION)
  2371. return sta_id;
  2372. return priv->hw_setting.bcast_sta_id;
  2373. /* If this frame is going out to an IBSS network, find the station,
  2374. * or create a new station table entry */
  2375. case IEEE80211_IF_TYPE_IBSS:
  2376. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2377. if (sta_id != IWL_INVALID_STATION)
  2378. return sta_id;
  2379. /* Create new station table entry */
  2380. sta_id = iwl4965_add_station_flags(priv, hdr->addr1, 0, CMD_ASYNC);
  2381. if (sta_id != IWL_INVALID_STATION)
  2382. return sta_id;
  2383. IWL_DEBUG_DROP("Station %s not in station map. "
  2384. "Defaulting to broadcast...\n",
  2385. print_mac(mac, hdr->addr1));
  2386. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2387. return priv->hw_setting.bcast_sta_id;
  2388. default:
  2389. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2390. return priv->hw_setting.bcast_sta_id;
  2391. }
  2392. }
  2393. /*
  2394. * start REPLY_TX command process
  2395. */
  2396. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2397. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2398. {
  2399. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2400. struct iwl4965_tfd_frame *tfd;
  2401. u32 *control_flags;
  2402. int txq_id = ctl->queue;
  2403. struct iwl4965_tx_queue *txq = NULL;
  2404. struct iwl4965_queue *q = NULL;
  2405. dma_addr_t phys_addr;
  2406. dma_addr_t txcmd_phys;
  2407. struct iwl4965_cmd *out_cmd = NULL;
  2408. u16 len, idx, len_org;
  2409. u8 id, hdr_len, unicast;
  2410. u8 sta_id;
  2411. u16 seq_number = 0;
  2412. u16 fc;
  2413. __le16 *qc;
  2414. u8 wait_write_ptr = 0;
  2415. unsigned long flags;
  2416. int rc;
  2417. spin_lock_irqsave(&priv->lock, flags);
  2418. if (iwl4965_is_rfkill(priv)) {
  2419. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2420. goto drop_unlock;
  2421. }
  2422. if (!priv->interface_id) {
  2423. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2424. goto drop_unlock;
  2425. }
  2426. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2427. IWL_ERROR("ERROR: No TX rate available.\n");
  2428. goto drop_unlock;
  2429. }
  2430. unicast = !is_multicast_ether_addr(hdr->addr1);
  2431. id = 0;
  2432. fc = le16_to_cpu(hdr->frame_control);
  2433. #ifdef CONFIG_IWL4965_DEBUG
  2434. if (ieee80211_is_auth(fc))
  2435. IWL_DEBUG_TX("Sending AUTH frame\n");
  2436. else if (ieee80211_is_assoc_request(fc))
  2437. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2438. else if (ieee80211_is_reassoc_request(fc))
  2439. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2440. #endif
  2441. /* drop all data frame if we are not associated */
  2442. if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
  2443. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2444. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2445. goto drop_unlock;
  2446. }
  2447. spin_unlock_irqrestore(&priv->lock, flags);
  2448. hdr_len = ieee80211_get_hdrlen(fc);
  2449. /* Find (or create) index into station table for destination station */
  2450. sta_id = iwl4965_get_sta_id(priv, hdr);
  2451. if (sta_id == IWL_INVALID_STATION) {
  2452. DECLARE_MAC_BUF(mac);
  2453. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2454. print_mac(mac, hdr->addr1));
  2455. goto drop;
  2456. }
  2457. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2458. qc = ieee80211_get_qos_ctrl(hdr);
  2459. if (qc) {
  2460. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2461. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2462. IEEE80211_SCTL_SEQ;
  2463. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2464. (hdr->seq_ctrl &
  2465. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2466. seq_number += 0x10;
  2467. #ifdef CONFIG_IWL4965_HT
  2468. #ifdef CONFIG_IWL4965_HT_AGG
  2469. /* aggregation is on for this <sta,tid> */
  2470. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2471. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2472. #endif /* CONFIG_IWL4965_HT_AGG */
  2473. #endif /* CONFIG_IWL4965_HT */
  2474. }
  2475. /* Descriptor for chosen Tx queue */
  2476. txq = &priv->txq[txq_id];
  2477. q = &txq->q;
  2478. spin_lock_irqsave(&priv->lock, flags);
  2479. /* Set up first empty TFD within this queue's circular TFD buffer */
  2480. tfd = &txq->bd[q->write_ptr];
  2481. memset(tfd, 0, sizeof(*tfd));
  2482. control_flags = (u32 *) tfd;
  2483. idx = get_cmd_index(q, q->write_ptr, 0);
  2484. /* Set up driver data for this TFD */
  2485. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2486. txq->txb[q->write_ptr].skb[0] = skb;
  2487. memcpy(&(txq->txb[q->write_ptr].status.control),
  2488. ctl, sizeof(struct ieee80211_tx_control));
  2489. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2490. out_cmd = &txq->cmd[idx];
  2491. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2492. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2493. /*
  2494. * Set up the Tx-command (not MAC!) header.
  2495. * Store the chosen Tx queue and TFD index within the sequence field;
  2496. * after Tx, uCode's Tx response will return this value so driver can
  2497. * locate the frame within the tx queue and do post-tx processing.
  2498. */
  2499. out_cmd->hdr.cmd = REPLY_TX;
  2500. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2501. INDEX_TO_SEQ(q->write_ptr)));
  2502. /* Copy MAC header from skb into command buffer */
  2503. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2504. /*
  2505. * Use the first empty entry in this queue's command buffer array
  2506. * to contain the Tx command and MAC header concatenated together
  2507. * (payload data will be in another buffer).
  2508. * Size of this varies, due to varying MAC header length.
  2509. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2510. * of the MAC header (device reads on dword boundaries).
  2511. * We'll tell device about this padding later.
  2512. */
  2513. len = priv->hw_setting.tx_cmd_len +
  2514. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2515. len_org = len;
  2516. len = (len + 3) & ~3;
  2517. if (len_org != len)
  2518. len_org = 1;
  2519. else
  2520. len_org = 0;
  2521. /* Physical address of this Tx command's header (not MAC header!),
  2522. * within command buffer array. */
  2523. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2524. offsetof(struct iwl4965_cmd, hdr);
  2525. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2526. * first entry */
  2527. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2528. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2529. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2530. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2531. * if any (802.11 null frames have no payload). */
  2532. len = skb->len - hdr_len;
  2533. if (len) {
  2534. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2535. len, PCI_DMA_TODEVICE);
  2536. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2537. }
  2538. /* Tell 4965 about any 2-byte padding after MAC header */
  2539. if (len_org)
  2540. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2541. /* Total # bytes to be transmitted */
  2542. len = (u16)skb->len;
  2543. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2544. /* TODO need this for burst mode later on */
  2545. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2546. /* set is_hcca to 0; it probably will never be implemented */
  2547. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2548. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2549. hdr, hdr_len, ctl, NULL);
  2550. if (!ieee80211_get_morefrag(hdr)) {
  2551. txq->need_update = 1;
  2552. if (qc) {
  2553. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2554. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2555. }
  2556. } else {
  2557. wait_write_ptr = 1;
  2558. txq->need_update = 0;
  2559. }
  2560. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2561. sizeof(out_cmd->cmd.tx));
  2562. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2563. ieee80211_get_hdrlen(fc));
  2564. /* Set up entry for this TFD in Tx byte-count array */
  2565. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2566. /* Tell device the write index *just past* this latest filled TFD */
  2567. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2568. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2569. spin_unlock_irqrestore(&priv->lock, flags);
  2570. if (rc)
  2571. return rc;
  2572. if ((iwl4965_queue_space(q) < q->high_mark)
  2573. && priv->mac80211_registered) {
  2574. if (wait_write_ptr) {
  2575. spin_lock_irqsave(&priv->lock, flags);
  2576. txq->need_update = 1;
  2577. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2578. spin_unlock_irqrestore(&priv->lock, flags);
  2579. }
  2580. ieee80211_stop_queue(priv->hw, ctl->queue);
  2581. }
  2582. return 0;
  2583. drop_unlock:
  2584. spin_unlock_irqrestore(&priv->lock, flags);
  2585. drop:
  2586. return -1;
  2587. }
  2588. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2589. {
  2590. const struct ieee80211_hw_mode *hw = NULL;
  2591. struct ieee80211_rate *rate;
  2592. int i;
  2593. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2594. if (!hw) {
  2595. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2596. return;
  2597. }
  2598. priv->active_rate = 0;
  2599. priv->active_rate_basic = 0;
  2600. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2601. hw->mode == MODE_IEEE80211A ?
  2602. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2603. for (i = 0; i < hw->num_rates; i++) {
  2604. rate = &(hw->rates[i]);
  2605. if ((rate->val < IWL_RATE_COUNT) &&
  2606. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2607. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2608. rate->val, iwl4965_rates[rate->val].plcp,
  2609. (rate->flags & IEEE80211_RATE_BASIC) ?
  2610. "*" : "");
  2611. priv->active_rate |= (1 << rate->val);
  2612. if (rate->flags & IEEE80211_RATE_BASIC)
  2613. priv->active_rate_basic |= (1 << rate->val);
  2614. } else
  2615. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2616. rate->val, iwl4965_rates[rate->val].plcp);
  2617. }
  2618. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2619. priv->active_rate, priv->active_rate_basic);
  2620. /*
  2621. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2622. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2623. * OFDM
  2624. */
  2625. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2626. priv->staging_rxon.cck_basic_rates =
  2627. ((priv->active_rate_basic &
  2628. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2629. else
  2630. priv->staging_rxon.cck_basic_rates =
  2631. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2632. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2633. priv->staging_rxon.ofdm_basic_rates =
  2634. ((priv->active_rate_basic &
  2635. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2636. IWL_FIRST_OFDM_RATE) & 0xFF;
  2637. else
  2638. priv->staging_rxon.ofdm_basic_rates =
  2639. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2640. }
  2641. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2642. {
  2643. unsigned long flags;
  2644. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2645. return;
  2646. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2647. disable_radio ? "OFF" : "ON");
  2648. if (disable_radio) {
  2649. iwl4965_scan_cancel(priv);
  2650. /* FIXME: This is a workaround for AP */
  2651. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2652. spin_lock_irqsave(&priv->lock, flags);
  2653. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2654. CSR_UCODE_SW_BIT_RFKILL);
  2655. spin_unlock_irqrestore(&priv->lock, flags);
  2656. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2657. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2658. }
  2659. return;
  2660. }
  2661. spin_lock_irqsave(&priv->lock, flags);
  2662. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2663. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2664. spin_unlock_irqrestore(&priv->lock, flags);
  2665. /* wake up ucode */
  2666. msleep(10);
  2667. spin_lock_irqsave(&priv->lock, flags);
  2668. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2669. if (!iwl4965_grab_nic_access(priv))
  2670. iwl4965_release_nic_access(priv);
  2671. spin_unlock_irqrestore(&priv->lock, flags);
  2672. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2673. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2674. "disabled by HW switch\n");
  2675. return;
  2676. }
  2677. queue_work(priv->workqueue, &priv->restart);
  2678. return;
  2679. }
  2680. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2681. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2682. {
  2683. u16 fc =
  2684. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2685. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2686. return;
  2687. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2688. return;
  2689. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2690. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2691. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2692. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2693. RX_RES_STATUS_BAD_ICV_MIC)
  2694. stats->flag |= RX_FLAG_MMIC_ERROR;
  2695. case RX_RES_STATUS_SEC_TYPE_WEP:
  2696. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2697. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2698. RX_RES_STATUS_DECRYPT_OK) {
  2699. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2700. stats->flag |= RX_FLAG_DECRYPTED;
  2701. }
  2702. break;
  2703. default:
  2704. break;
  2705. }
  2706. }
  2707. void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
  2708. struct iwl4965_rx_mem_buffer *rxb,
  2709. void *data, short len,
  2710. struct ieee80211_rx_status *stats,
  2711. u16 phy_flags)
  2712. {
  2713. struct iwl4965_rt_rx_hdr *iwl4965_rt;
  2714. /* First cache any information we need before we overwrite
  2715. * the information provided in the skb from the hardware */
  2716. s8 signal = stats->ssi;
  2717. s8 noise = 0;
  2718. int rate = stats->rate;
  2719. u64 tsf = stats->mactime;
  2720. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2721. /* We received data from the HW, so stop the watchdog */
  2722. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl4965_rt)) {
  2723. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2724. return;
  2725. }
  2726. /* copy the frame data to write after where the radiotap header goes */
  2727. iwl4965_rt = (void *)rxb->skb->data;
  2728. memmove(iwl4965_rt->payload, data, len);
  2729. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2730. iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2731. /* total header + data */
  2732. iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt));
  2733. /* Set the size of the skb to the size of the frame */
  2734. skb_put(rxb->skb, sizeof(*iwl4965_rt) + len);
  2735. /* Big bitfield of all the fields we provide in radiotap */
  2736. iwl4965_rt->rt_hdr.it_present =
  2737. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2738. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2739. (1 << IEEE80211_RADIOTAP_RATE) |
  2740. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2741. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2742. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2743. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2744. /* Zero the flags, we'll add to them as we go */
  2745. iwl4965_rt->rt_flags = 0;
  2746. iwl4965_rt->rt_tsf = cpu_to_le64(tsf);
  2747. /* Convert to dBm */
  2748. iwl4965_rt->rt_dbmsignal = signal;
  2749. iwl4965_rt->rt_dbmnoise = noise;
  2750. /* Convert the channel frequency and set the flags */
  2751. iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2752. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2753. iwl4965_rt->rt_chbitmask =
  2754. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2755. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2756. iwl4965_rt->rt_chbitmask =
  2757. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2758. else /* 802.11g */
  2759. iwl4965_rt->rt_chbitmask =
  2760. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2761. rate = iwl4965_rate_index_from_plcp(rate);
  2762. if (rate == -1)
  2763. iwl4965_rt->rt_rate = 0;
  2764. else
  2765. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2766. /* antenna number */
  2767. iwl4965_rt->rt_antenna =
  2768. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2769. /* set the preamble flag if we have it */
  2770. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2771. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2772. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2773. stats->flag |= RX_FLAG_RADIOTAP;
  2774. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2775. rxb->skb = NULL;
  2776. }
  2777. #define IWL_PACKET_RETRY_TIME HZ
  2778. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2779. {
  2780. u16 sc = le16_to_cpu(header->seq_ctrl);
  2781. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2782. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2783. u16 *last_seq, *last_frag;
  2784. unsigned long *last_time;
  2785. switch (priv->iw_mode) {
  2786. case IEEE80211_IF_TYPE_IBSS:{
  2787. struct list_head *p;
  2788. struct iwl4965_ibss_seq *entry = NULL;
  2789. u8 *mac = header->addr2;
  2790. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2791. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2792. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2793. if (!compare_ether_addr(entry->mac, mac))
  2794. break;
  2795. }
  2796. if (p == &priv->ibss_mac_hash[index]) {
  2797. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2798. if (!entry) {
  2799. IWL_ERROR("Cannot malloc new mac entry\n");
  2800. return 0;
  2801. }
  2802. memcpy(entry->mac, mac, ETH_ALEN);
  2803. entry->seq_num = seq;
  2804. entry->frag_num = frag;
  2805. entry->packet_time = jiffies;
  2806. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2807. return 0;
  2808. }
  2809. last_seq = &entry->seq_num;
  2810. last_frag = &entry->frag_num;
  2811. last_time = &entry->packet_time;
  2812. break;
  2813. }
  2814. case IEEE80211_IF_TYPE_STA:
  2815. last_seq = &priv->last_seq_num;
  2816. last_frag = &priv->last_frag_num;
  2817. last_time = &priv->last_packet_time;
  2818. break;
  2819. default:
  2820. return 0;
  2821. }
  2822. if ((*last_seq == seq) &&
  2823. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2824. if (*last_frag == frag)
  2825. goto drop;
  2826. if (*last_frag + 1 != frag)
  2827. /* out-of-order fragment */
  2828. goto drop;
  2829. } else
  2830. *last_seq = seq;
  2831. *last_frag = frag;
  2832. *last_time = jiffies;
  2833. return 0;
  2834. drop:
  2835. return 1;
  2836. }
  2837. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2838. #include "iwl-spectrum.h"
  2839. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2840. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2841. #define TIME_UNIT 1024
  2842. /*
  2843. * extended beacon time format
  2844. * time in usec will be changed into a 32-bit value in 8:24 format
  2845. * the high 1 byte is the beacon counts
  2846. * the lower 3 bytes is the time in usec within one beacon interval
  2847. */
  2848. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2849. {
  2850. u32 quot;
  2851. u32 rem;
  2852. u32 interval = beacon_interval * 1024;
  2853. if (!interval || !usec)
  2854. return 0;
  2855. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2856. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2857. return (quot << 24) + rem;
  2858. }
  2859. /* base is usually what we get from ucode with each received frame,
  2860. * the same as HW timer counter counting down
  2861. */
  2862. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2863. {
  2864. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2865. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2866. u32 interval = beacon_interval * TIME_UNIT;
  2867. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2868. (addon & BEACON_TIME_MASK_HIGH);
  2869. if (base_low > addon_low)
  2870. res += base_low - addon_low;
  2871. else if (base_low < addon_low) {
  2872. res += interval + base_low - addon_low;
  2873. res += (1 << 24);
  2874. } else
  2875. res += (1 << 24);
  2876. return cpu_to_le32(res);
  2877. }
  2878. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2879. struct ieee80211_measurement_params *params,
  2880. u8 type)
  2881. {
  2882. struct iwl4965_spectrum_cmd spectrum;
  2883. struct iwl4965_rx_packet *res;
  2884. struct iwl4965_host_cmd cmd = {
  2885. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2886. .data = (void *)&spectrum,
  2887. .meta.flags = CMD_WANT_SKB,
  2888. };
  2889. u32 add_time = le64_to_cpu(params->start_time);
  2890. int rc;
  2891. int spectrum_resp_status;
  2892. int duration = le16_to_cpu(params->duration);
  2893. if (iwl4965_is_associated(priv))
  2894. add_time =
  2895. iwl4965_usecs_to_beacons(
  2896. le64_to_cpu(params->start_time) - priv->last_tsf,
  2897. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2898. memset(&spectrum, 0, sizeof(spectrum));
  2899. spectrum.channel_count = cpu_to_le16(1);
  2900. spectrum.flags =
  2901. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2902. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2903. cmd.len = sizeof(spectrum);
  2904. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2905. if (iwl4965_is_associated(priv))
  2906. spectrum.start_time =
  2907. iwl4965_add_beacon_time(priv->last_beacon_time,
  2908. add_time,
  2909. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2910. else
  2911. spectrum.start_time = 0;
  2912. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2913. spectrum.channels[0].channel = params->channel;
  2914. spectrum.channels[0].type = type;
  2915. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2916. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2917. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2918. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2919. if (rc)
  2920. return rc;
  2921. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2922. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2923. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2924. rc = -EIO;
  2925. }
  2926. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2927. switch (spectrum_resp_status) {
  2928. case 0: /* Command will be handled */
  2929. if (res->u.spectrum.id != 0xff) {
  2930. IWL_DEBUG_INFO
  2931. ("Replaced existing measurement: %d\n",
  2932. res->u.spectrum.id);
  2933. priv->measurement_status &= ~MEASUREMENT_READY;
  2934. }
  2935. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2936. rc = 0;
  2937. break;
  2938. case 1: /* Command will not be handled */
  2939. rc = -EAGAIN;
  2940. break;
  2941. }
  2942. dev_kfree_skb_any(cmd.meta.u.skb);
  2943. return rc;
  2944. }
  2945. #endif
  2946. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2947. struct iwl4965_tx_info *tx_sta)
  2948. {
  2949. tx_sta->status.ack_signal = 0;
  2950. tx_sta->status.excessive_retries = 0;
  2951. tx_sta->status.queue_length = 0;
  2952. tx_sta->status.queue_number = 0;
  2953. if (in_interrupt())
  2954. ieee80211_tx_status_irqsafe(priv->hw,
  2955. tx_sta->skb[0], &(tx_sta->status));
  2956. else
  2957. ieee80211_tx_status(priv->hw,
  2958. tx_sta->skb[0], &(tx_sta->status));
  2959. tx_sta->skb[0] = NULL;
  2960. }
  2961. /**
  2962. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2963. *
  2964. * When FW advances 'R' index, all entries between old and new 'R' index
  2965. * need to be reclaimed. As result, some free space forms. If there is
  2966. * enough free space (> low mark), wake the stack that feeds us.
  2967. */
  2968. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2969. {
  2970. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2971. struct iwl4965_queue *q = &txq->q;
  2972. int nfreed = 0;
  2973. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2974. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2975. "is out of range [0-%d] %d %d.\n", txq_id,
  2976. index, q->n_bd, q->write_ptr, q->read_ptr);
  2977. return 0;
  2978. }
  2979. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2980. q->read_ptr != index;
  2981. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2982. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2983. iwl4965_txstatus_to_ieee(priv,
  2984. &(txq->txb[txq->q.read_ptr]));
  2985. iwl4965_hw_txq_free_tfd(priv, txq);
  2986. } else if (nfreed > 1) {
  2987. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2988. q->write_ptr, q->read_ptr);
  2989. queue_work(priv->workqueue, &priv->restart);
  2990. }
  2991. nfreed++;
  2992. }
  2993. if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2994. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2995. priv->mac80211_registered)
  2996. ieee80211_wake_queue(priv->hw, txq_id);
  2997. return nfreed;
  2998. }
  2999. static int iwl4965_is_tx_success(u32 status)
  3000. {
  3001. status &= TX_STATUS_MSK;
  3002. return (status == TX_STATUS_SUCCESS)
  3003. || (status == TX_STATUS_DIRECT_DONE);
  3004. }
  3005. /******************************************************************************
  3006. *
  3007. * Generic RX handler implementations
  3008. *
  3009. ******************************************************************************/
  3010. #ifdef CONFIG_IWL4965_HT
  3011. #ifdef CONFIG_IWL4965_HT_AGG
  3012. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  3013. struct ieee80211_hdr *hdr)
  3014. {
  3015. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  3016. return IWL_AP_ID;
  3017. else {
  3018. u8 *da = ieee80211_get_DA(hdr);
  3019. return iwl4965_hw_find_station(priv, da);
  3020. }
  3021. }
  3022. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  3023. struct iwl4965_priv *priv, int txq_id, int idx)
  3024. {
  3025. if (priv->txq[txq_id].txb[idx].skb[0])
  3026. return (struct ieee80211_hdr *)priv->txq[txq_id].
  3027. txb[idx].skb[0]->data;
  3028. return NULL;
  3029. }
  3030. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  3031. {
  3032. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  3033. tx_resp->frame_count);
  3034. return le32_to_cpu(*scd_ssn) & MAX_SN;
  3035. }
  3036. /**
  3037. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  3038. */
  3039. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  3040. struct iwl4965_ht_agg *agg,
  3041. struct iwl4965_tx_resp *tx_resp,
  3042. u16 start_idx)
  3043. {
  3044. u32 status;
  3045. __le32 *frame_status = &tx_resp->status;
  3046. struct ieee80211_tx_status *tx_status = NULL;
  3047. struct ieee80211_hdr *hdr = NULL;
  3048. int i, sh;
  3049. int txq_id, idx;
  3050. u16 seq;
  3051. if (agg->wait_for_ba)
  3052. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  3053. agg->frame_count = tx_resp->frame_count;
  3054. agg->start_idx = start_idx;
  3055. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3056. agg->bitmap0 = agg->bitmap1 = 0;
  3057. /* # frames attempted by Tx command */
  3058. if (agg->frame_count == 1) {
  3059. /* Only one frame was attempted; no block-ack will arrive */
  3060. struct iwl4965_tx_queue *txq ;
  3061. status = le32_to_cpu(frame_status[0]);
  3062. txq_id = agg->txq_id;
  3063. txq = &priv->txq[txq_id];
  3064. /* FIXME: code repetition */
  3065. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  3066. agg->frame_count, agg->start_idx);
  3067. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  3068. tx_status->retry_count = tx_resp->failure_frame;
  3069. tx_status->queue_number = status & 0xff;
  3070. tx_status->queue_length = tx_resp->bt_kill_count;
  3071. tx_status->queue_length |= tx_resp->failure_rts;
  3072. tx_status->flags = iwl4965_is_tx_success(status)?
  3073. IEEE80211_TX_STATUS_ACK : 0;
  3074. tx_status->control.tx_rate =
  3075. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3076. /* FIXME: code repetition end */
  3077. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3078. status & 0xff, tx_resp->failure_frame);
  3079. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3080. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3081. agg->wait_for_ba = 0;
  3082. } else {
  3083. /* Two or more frames were attempted; expect block-ack */
  3084. u64 bitmap = 0;
  3085. int start = agg->start_idx;
  3086. /* Construct bit-map of pending frames within Tx window */
  3087. for (i = 0; i < agg->frame_count; i++) {
  3088. u16 sc;
  3089. status = le32_to_cpu(frame_status[i]);
  3090. seq = status >> 16;
  3091. idx = SEQ_TO_INDEX(seq);
  3092. txq_id = SEQ_TO_QUEUE(seq);
  3093. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3094. AGG_TX_STATE_ABORT_MSK))
  3095. continue;
  3096. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3097. agg->frame_count, txq_id, idx);
  3098. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3099. sc = le16_to_cpu(hdr->seq_ctrl);
  3100. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3101. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3102. " idx=%d, seq_idx=%d, seq=%d\n",
  3103. idx, SEQ_TO_SN(sc),
  3104. hdr->seq_ctrl);
  3105. return -1;
  3106. }
  3107. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3108. i, idx, SEQ_TO_SN(sc));
  3109. sh = idx - start;
  3110. if (sh > 64) {
  3111. sh = (start - idx) + 0xff;
  3112. bitmap = bitmap << sh;
  3113. sh = 0;
  3114. start = idx;
  3115. } else if (sh < -64)
  3116. sh = 0xff - (start - idx);
  3117. else if (sh < 0) {
  3118. sh = start - idx;
  3119. start = idx;
  3120. bitmap = bitmap << sh;
  3121. sh = 0;
  3122. }
  3123. bitmap |= (1 << sh);
  3124. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3125. start, (u32)(bitmap & 0xFFFFFFFF));
  3126. }
  3127. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3128. agg->bitmap1 = bitmap >> 32;
  3129. agg->start_idx = start;
  3130. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3131. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3132. agg->frame_count, agg->start_idx,
  3133. agg->bitmap0);
  3134. if (bitmap)
  3135. agg->wait_for_ba = 1;
  3136. }
  3137. return 0;
  3138. }
  3139. #endif
  3140. #endif
  3141. /**
  3142. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3143. */
  3144. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3145. struct iwl4965_rx_mem_buffer *rxb)
  3146. {
  3147. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3148. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3149. int txq_id = SEQ_TO_QUEUE(sequence);
  3150. int index = SEQ_TO_INDEX(sequence);
  3151. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3152. struct ieee80211_tx_status *tx_status;
  3153. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3154. u32 status = le32_to_cpu(tx_resp->status);
  3155. #ifdef CONFIG_IWL4965_HT
  3156. #ifdef CONFIG_IWL4965_HT_AGG
  3157. int tid, sta_id;
  3158. #endif
  3159. #endif
  3160. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3161. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3162. "is out of range [0-%d] %d %d\n", txq_id,
  3163. index, txq->q.n_bd, txq->q.write_ptr,
  3164. txq->q.read_ptr);
  3165. return;
  3166. }
  3167. #ifdef CONFIG_IWL4965_HT
  3168. #ifdef CONFIG_IWL4965_HT_AGG
  3169. if (txq->sched_retry) {
  3170. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3171. struct ieee80211_hdr *hdr =
  3172. iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3173. struct iwl4965_ht_agg *agg = NULL;
  3174. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3175. if (qc == NULL) {
  3176. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3177. return;
  3178. }
  3179. tid = le16_to_cpu(*qc) & 0xf;
  3180. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3181. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3182. IWL_ERROR("Station not known for\n");
  3183. return;
  3184. }
  3185. agg = &priv->stations[sta_id].tid[tid].agg;
  3186. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3187. if ((tx_resp->frame_count == 1) &&
  3188. !iwl4965_is_tx_success(status)) {
  3189. /* TODO: send BAR */
  3190. }
  3191. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3192. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3193. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3194. "%d index %d\n", scd_ssn , index);
  3195. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3196. }
  3197. } else {
  3198. #endif /* CONFIG_IWL4965_HT_AGG */
  3199. #endif /* CONFIG_IWL4965_HT */
  3200. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3201. tx_status->retry_count = tx_resp->failure_frame;
  3202. tx_status->queue_number = status;
  3203. tx_status->queue_length = tx_resp->bt_kill_count;
  3204. tx_status->queue_length |= tx_resp->failure_rts;
  3205. tx_status->flags =
  3206. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3207. tx_status->control.tx_rate =
  3208. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3209. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3210. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3211. status, le32_to_cpu(tx_resp->rate_n_flags),
  3212. tx_resp->failure_frame);
  3213. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3214. if (index != -1)
  3215. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3216. #ifdef CONFIG_IWL4965_HT
  3217. #ifdef CONFIG_IWL4965_HT_AGG
  3218. }
  3219. #endif /* CONFIG_IWL4965_HT_AGG */
  3220. #endif /* CONFIG_IWL4965_HT */
  3221. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3222. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3223. }
  3224. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3225. struct iwl4965_rx_mem_buffer *rxb)
  3226. {
  3227. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3228. struct iwl4965_alive_resp *palive;
  3229. struct delayed_work *pwork;
  3230. palive = &pkt->u.alive_frame;
  3231. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3232. "0x%01X 0x%01X\n",
  3233. palive->is_valid, palive->ver_type,
  3234. palive->ver_subtype);
  3235. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3236. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3237. memcpy(&priv->card_alive_init,
  3238. &pkt->u.alive_frame,
  3239. sizeof(struct iwl4965_init_alive_resp));
  3240. pwork = &priv->init_alive_start;
  3241. } else {
  3242. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3243. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3244. sizeof(struct iwl4965_alive_resp));
  3245. pwork = &priv->alive_start;
  3246. }
  3247. /* We delay the ALIVE response by 5ms to
  3248. * give the HW RF Kill time to activate... */
  3249. if (palive->is_valid == UCODE_VALID_OK)
  3250. queue_delayed_work(priv->workqueue, pwork,
  3251. msecs_to_jiffies(5));
  3252. else
  3253. IWL_WARNING("uCode did not respond OK.\n");
  3254. }
  3255. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3256. struct iwl4965_rx_mem_buffer *rxb)
  3257. {
  3258. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3259. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3260. return;
  3261. }
  3262. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3263. struct iwl4965_rx_mem_buffer *rxb)
  3264. {
  3265. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3266. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3267. "seq 0x%04X ser 0x%08X\n",
  3268. le32_to_cpu(pkt->u.err_resp.error_type),
  3269. get_cmd_string(pkt->u.err_resp.cmd_id),
  3270. pkt->u.err_resp.cmd_id,
  3271. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3272. le32_to_cpu(pkt->u.err_resp.error_info));
  3273. }
  3274. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3275. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3276. {
  3277. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3278. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3279. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3280. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3281. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3282. rxon->channel = csa->channel;
  3283. priv->staging_rxon.channel = csa->channel;
  3284. }
  3285. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3286. struct iwl4965_rx_mem_buffer *rxb)
  3287. {
  3288. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3289. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3290. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3291. if (!report->state) {
  3292. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3293. "Spectrum Measure Notification: Start\n");
  3294. return;
  3295. }
  3296. memcpy(&priv->measure_report, report, sizeof(*report));
  3297. priv->measurement_status |= MEASUREMENT_READY;
  3298. #endif
  3299. }
  3300. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3301. struct iwl4965_rx_mem_buffer *rxb)
  3302. {
  3303. #ifdef CONFIG_IWL4965_DEBUG
  3304. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3305. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3306. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3307. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3308. #endif
  3309. }
  3310. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3311. struct iwl4965_rx_mem_buffer *rxb)
  3312. {
  3313. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3314. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3315. "notification for %s:\n",
  3316. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3317. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3318. }
  3319. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3320. {
  3321. struct iwl4965_priv *priv =
  3322. container_of(work, struct iwl4965_priv, beacon_update);
  3323. struct sk_buff *beacon;
  3324. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3325. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3326. if (!beacon) {
  3327. IWL_ERROR("update beacon failed\n");
  3328. return;
  3329. }
  3330. mutex_lock(&priv->mutex);
  3331. /* new beacon skb is allocated every time; dispose previous.*/
  3332. if (priv->ibss_beacon)
  3333. dev_kfree_skb(priv->ibss_beacon);
  3334. priv->ibss_beacon = beacon;
  3335. mutex_unlock(&priv->mutex);
  3336. iwl4965_send_beacon_cmd(priv);
  3337. }
  3338. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3339. struct iwl4965_rx_mem_buffer *rxb)
  3340. {
  3341. #ifdef CONFIG_IWL4965_DEBUG
  3342. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3343. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3344. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3345. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3346. "tsf %d %d rate %d\n",
  3347. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3348. beacon->beacon_notify_hdr.failure_frame,
  3349. le32_to_cpu(beacon->ibss_mgr_status),
  3350. le32_to_cpu(beacon->high_tsf),
  3351. le32_to_cpu(beacon->low_tsf), rate);
  3352. #endif
  3353. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3354. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3355. queue_work(priv->workqueue, &priv->beacon_update);
  3356. }
  3357. /* Service response to REPLY_SCAN_CMD (0x80) */
  3358. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3359. struct iwl4965_rx_mem_buffer *rxb)
  3360. {
  3361. #ifdef CONFIG_IWL4965_DEBUG
  3362. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3363. struct iwl4965_scanreq_notification *notif =
  3364. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3365. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3366. #endif
  3367. }
  3368. /* Service SCAN_START_NOTIFICATION (0x82) */
  3369. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3370. struct iwl4965_rx_mem_buffer *rxb)
  3371. {
  3372. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3373. struct iwl4965_scanstart_notification *notif =
  3374. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3375. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3376. IWL_DEBUG_SCAN("Scan start: "
  3377. "%d [802.11%s] "
  3378. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3379. notif->channel,
  3380. notif->band ? "bg" : "a",
  3381. notif->tsf_high,
  3382. notif->tsf_low, notif->status, notif->beacon_timer);
  3383. }
  3384. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3385. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3386. struct iwl4965_rx_mem_buffer *rxb)
  3387. {
  3388. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3389. struct iwl4965_scanresults_notification *notif =
  3390. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3391. IWL_DEBUG_SCAN("Scan ch.res: "
  3392. "%d [802.11%s] "
  3393. "(TSF: 0x%08X:%08X) - %d "
  3394. "elapsed=%lu usec (%dms since last)\n",
  3395. notif->channel,
  3396. notif->band ? "bg" : "a",
  3397. le32_to_cpu(notif->tsf_high),
  3398. le32_to_cpu(notif->tsf_low),
  3399. le32_to_cpu(notif->statistics[0]),
  3400. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3401. jiffies_to_msecs(elapsed_jiffies
  3402. (priv->last_scan_jiffies, jiffies)));
  3403. priv->last_scan_jiffies = jiffies;
  3404. priv->next_scan_jiffies = 0;
  3405. }
  3406. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3407. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3408. struct iwl4965_rx_mem_buffer *rxb)
  3409. {
  3410. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3411. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3412. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3413. scan_notif->scanned_channels,
  3414. scan_notif->tsf_low,
  3415. scan_notif->tsf_high, scan_notif->status);
  3416. /* The HW is no longer scanning */
  3417. clear_bit(STATUS_SCAN_HW, &priv->status);
  3418. /* The scan completion notification came in, so kill that timer... */
  3419. cancel_delayed_work(&priv->scan_check);
  3420. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3421. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3422. jiffies_to_msecs(elapsed_jiffies
  3423. (priv->scan_pass_start, jiffies)));
  3424. /* Remove this scanned band from the list
  3425. * of pending bands to scan */
  3426. priv->scan_bands--;
  3427. /* If a request to abort was given, or the scan did not succeed
  3428. * then we reset the scan state machine and terminate,
  3429. * re-queuing another scan if one has been requested */
  3430. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3431. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3432. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3433. } else {
  3434. /* If there are more bands on this scan pass reschedule */
  3435. if (priv->scan_bands > 0)
  3436. goto reschedule;
  3437. }
  3438. priv->last_scan_jiffies = jiffies;
  3439. priv->next_scan_jiffies = 0;
  3440. IWL_DEBUG_INFO("Setting scan to off\n");
  3441. clear_bit(STATUS_SCANNING, &priv->status);
  3442. IWL_DEBUG_INFO("Scan took %dms\n",
  3443. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3444. queue_work(priv->workqueue, &priv->scan_completed);
  3445. return;
  3446. reschedule:
  3447. priv->scan_pass_start = jiffies;
  3448. queue_work(priv->workqueue, &priv->request_scan);
  3449. }
  3450. /* Handle notification from uCode that card's power state is changing
  3451. * due to software, hardware, or critical temperature RFKILL */
  3452. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3453. struct iwl4965_rx_mem_buffer *rxb)
  3454. {
  3455. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3456. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3457. unsigned long status = priv->status;
  3458. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3459. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3460. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3461. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3462. RF_CARD_DISABLED)) {
  3463. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3464. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3465. if (!iwl4965_grab_nic_access(priv)) {
  3466. iwl4965_write_direct32(
  3467. priv, HBUS_TARG_MBX_C,
  3468. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3469. iwl4965_release_nic_access(priv);
  3470. }
  3471. if (!(flags & RXON_CARD_DISABLED)) {
  3472. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3473. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3474. if (!iwl4965_grab_nic_access(priv)) {
  3475. iwl4965_write_direct32(
  3476. priv, HBUS_TARG_MBX_C,
  3477. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3478. iwl4965_release_nic_access(priv);
  3479. }
  3480. }
  3481. if (flags & RF_CARD_DISABLED) {
  3482. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3483. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3484. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3485. if (!iwl4965_grab_nic_access(priv))
  3486. iwl4965_release_nic_access(priv);
  3487. }
  3488. }
  3489. if (flags & HW_CARD_DISABLED)
  3490. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3491. else
  3492. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3493. if (flags & SW_CARD_DISABLED)
  3494. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3495. else
  3496. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3497. if (!(flags & RXON_CARD_DISABLED))
  3498. iwl4965_scan_cancel(priv);
  3499. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3500. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3501. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3502. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3503. queue_work(priv->workqueue, &priv->rf_kill);
  3504. else
  3505. wake_up_interruptible(&priv->wait_command_queue);
  3506. }
  3507. /**
  3508. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3509. *
  3510. * Setup the RX handlers for each of the reply types sent from the uCode
  3511. * to the host.
  3512. *
  3513. * This function chains into the hardware specific files for them to setup
  3514. * any hardware specific handlers as well.
  3515. */
  3516. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3517. {
  3518. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3519. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3520. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3521. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3522. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3523. iwl4965_rx_spectrum_measure_notif;
  3524. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3525. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3526. iwl4965_rx_pm_debug_statistics_notif;
  3527. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3528. /*
  3529. * The same handler is used for both the REPLY to a discrete
  3530. * statistics request from the host as well as for the periodic
  3531. * statistics notifications (after received beacons) from the uCode.
  3532. */
  3533. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3534. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3535. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3536. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3537. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3538. iwl4965_rx_scan_results_notif;
  3539. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3540. iwl4965_rx_scan_complete_notif;
  3541. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3542. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3543. /* Set up hardware specific Rx handlers */
  3544. iwl4965_hw_rx_handler_setup(priv);
  3545. }
  3546. /**
  3547. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3548. * @rxb: Rx buffer to reclaim
  3549. *
  3550. * If an Rx buffer has an async callback associated with it the callback
  3551. * will be executed. The attached skb (if present) will only be freed
  3552. * if the callback returns 1
  3553. */
  3554. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3555. struct iwl4965_rx_mem_buffer *rxb)
  3556. {
  3557. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3558. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3559. int txq_id = SEQ_TO_QUEUE(sequence);
  3560. int index = SEQ_TO_INDEX(sequence);
  3561. int huge = sequence & SEQ_HUGE_FRAME;
  3562. int cmd_index;
  3563. struct iwl4965_cmd *cmd;
  3564. /* If a Tx command is being handled and it isn't in the actual
  3565. * command queue then there a command routing bug has been introduced
  3566. * in the queue management code. */
  3567. if (txq_id != IWL_CMD_QUEUE_NUM)
  3568. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3569. txq_id, pkt->hdr.cmd);
  3570. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3571. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3572. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3573. /* Input error checking is done when commands are added to queue. */
  3574. if (cmd->meta.flags & CMD_WANT_SKB) {
  3575. cmd->meta.source->u.skb = rxb->skb;
  3576. rxb->skb = NULL;
  3577. } else if (cmd->meta.u.callback &&
  3578. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3579. rxb->skb = NULL;
  3580. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3581. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3582. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3583. wake_up_interruptible(&priv->wait_command_queue);
  3584. }
  3585. }
  3586. /************************** RX-FUNCTIONS ****************************/
  3587. /*
  3588. * Rx theory of operation
  3589. *
  3590. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3591. * each of which point to Receive Buffers to be filled by 4965. These get
  3592. * used not only for Rx frames, but for any command response or notification
  3593. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3594. * of indexes into the circular buffer.
  3595. *
  3596. * Rx Queue Indexes
  3597. * The host/firmware share two index registers for managing the Rx buffers.
  3598. *
  3599. * The READ index maps to the first position that the firmware may be writing
  3600. * to -- the driver can read up to (but not including) this position and get
  3601. * good data.
  3602. * The READ index is managed by the firmware once the card is enabled.
  3603. *
  3604. * The WRITE index maps to the last position the driver has read from -- the
  3605. * position preceding WRITE is the last slot the firmware can place a packet.
  3606. *
  3607. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3608. * WRITE = READ.
  3609. *
  3610. * During initialization, the host sets up the READ queue position to the first
  3611. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3612. *
  3613. * When the firmware places a packet in a buffer, it will advance the READ index
  3614. * and fire the RX interrupt. The driver can then query the READ index and
  3615. * process as many packets as possible, moving the WRITE index forward as it
  3616. * resets the Rx queue buffers with new memory.
  3617. *
  3618. * The management in the driver is as follows:
  3619. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3620. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3621. * to replenish the iwl->rxq->rx_free.
  3622. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3623. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3624. * 'processed' and 'read' driver indexes as well)
  3625. * + A received packet is processed and handed to the kernel network stack,
  3626. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3627. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3628. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3629. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3630. * were enough free buffers and RX_STALLED is set it is cleared.
  3631. *
  3632. *
  3633. * Driver sequence:
  3634. *
  3635. * iwl4965_rx_queue_alloc() Allocates rx_free
  3636. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3637. * iwl4965_rx_queue_restock
  3638. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3639. * queue, updates firmware pointers, and updates
  3640. * the WRITE index. If insufficient rx_free buffers
  3641. * are available, schedules iwl4965_rx_replenish
  3642. *
  3643. * -- enable interrupts --
  3644. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3645. * READ INDEX, detaching the SKB from the pool.
  3646. * Moves the packet buffer from queue to rx_used.
  3647. * Calls iwl4965_rx_queue_restock to refill any empty
  3648. * slots.
  3649. * ...
  3650. *
  3651. */
  3652. /**
  3653. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3654. */
  3655. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3656. {
  3657. int s = q->read - q->write;
  3658. if (s <= 0)
  3659. s += RX_QUEUE_SIZE;
  3660. /* keep some buffer to not confuse full and empty queue */
  3661. s -= 2;
  3662. if (s < 0)
  3663. s = 0;
  3664. return s;
  3665. }
  3666. /**
  3667. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3668. */
  3669. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3670. {
  3671. u32 reg = 0;
  3672. int rc = 0;
  3673. unsigned long flags;
  3674. spin_lock_irqsave(&q->lock, flags);
  3675. if (q->need_update == 0)
  3676. goto exit_unlock;
  3677. /* If power-saving is in use, make sure device is awake */
  3678. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3679. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3680. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3681. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3682. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3683. goto exit_unlock;
  3684. }
  3685. rc = iwl4965_grab_nic_access(priv);
  3686. if (rc)
  3687. goto exit_unlock;
  3688. /* Device expects a multiple of 8 */
  3689. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3690. q->write & ~0x7);
  3691. iwl4965_release_nic_access(priv);
  3692. /* Else device is assumed to be awake */
  3693. } else
  3694. /* Device expects a multiple of 8 */
  3695. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3696. q->need_update = 0;
  3697. exit_unlock:
  3698. spin_unlock_irqrestore(&q->lock, flags);
  3699. return rc;
  3700. }
  3701. /**
  3702. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3703. */
  3704. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3705. dma_addr_t dma_addr)
  3706. {
  3707. return cpu_to_le32((u32)(dma_addr >> 8));
  3708. }
  3709. /**
  3710. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3711. *
  3712. * If there are slots in the RX queue that need to be restocked,
  3713. * and we have free pre-allocated buffers, fill the ranks as much
  3714. * as we can, pulling from rx_free.
  3715. *
  3716. * This moves the 'write' index forward to catch up with 'processed', and
  3717. * also updates the memory address in the firmware to reference the new
  3718. * target buffer.
  3719. */
  3720. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3721. {
  3722. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3723. struct list_head *element;
  3724. struct iwl4965_rx_mem_buffer *rxb;
  3725. unsigned long flags;
  3726. int write, rc;
  3727. spin_lock_irqsave(&rxq->lock, flags);
  3728. write = rxq->write & ~0x7;
  3729. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3730. /* Get next free Rx buffer, remove from free list */
  3731. element = rxq->rx_free.next;
  3732. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3733. list_del(element);
  3734. /* Point to Rx buffer via next RBD in circular buffer */
  3735. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3736. rxq->queue[rxq->write] = rxb;
  3737. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3738. rxq->free_count--;
  3739. }
  3740. spin_unlock_irqrestore(&rxq->lock, flags);
  3741. /* If the pre-allocated buffer pool is dropping low, schedule to
  3742. * refill it */
  3743. if (rxq->free_count <= RX_LOW_WATERMARK)
  3744. queue_work(priv->workqueue, &priv->rx_replenish);
  3745. /* If we've added more space for the firmware to place data, tell it.
  3746. * Increment device's write pointer in multiples of 8. */
  3747. if ((write != (rxq->write & ~0x7))
  3748. || (abs(rxq->write - rxq->read) > 7)) {
  3749. spin_lock_irqsave(&rxq->lock, flags);
  3750. rxq->need_update = 1;
  3751. spin_unlock_irqrestore(&rxq->lock, flags);
  3752. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3753. if (rc)
  3754. return rc;
  3755. }
  3756. return 0;
  3757. }
  3758. /**
  3759. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3760. *
  3761. * When moving to rx_free an SKB is allocated for the slot.
  3762. *
  3763. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3764. * This is called as a scheduled work item (except for during initialization)
  3765. */
  3766. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3767. {
  3768. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3769. struct list_head *element;
  3770. struct iwl4965_rx_mem_buffer *rxb;
  3771. unsigned long flags;
  3772. spin_lock_irqsave(&rxq->lock, flags);
  3773. while (!list_empty(&rxq->rx_used)) {
  3774. element = rxq->rx_used.next;
  3775. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3776. /* Alloc a new receive buffer */
  3777. rxb->skb =
  3778. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3779. if (!rxb->skb) {
  3780. if (net_ratelimit())
  3781. printk(KERN_CRIT DRV_NAME
  3782. ": Can not allocate SKB buffers\n");
  3783. /* We don't reschedule replenish work here -- we will
  3784. * call the restock method and if it still needs
  3785. * more buffers it will schedule replenish */
  3786. break;
  3787. }
  3788. priv->alloc_rxb_skb++;
  3789. list_del(element);
  3790. /* Get physical address of RB/SKB */
  3791. rxb->dma_addr =
  3792. pci_map_single(priv->pci_dev, rxb->skb->data,
  3793. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3794. list_add_tail(&rxb->list, &rxq->rx_free);
  3795. rxq->free_count++;
  3796. }
  3797. spin_unlock_irqrestore(&rxq->lock, flags);
  3798. }
  3799. /*
  3800. * this should be called while priv->lock is locked
  3801. */
  3802. void __iwl4965_rx_replenish(void *data)
  3803. {
  3804. struct iwl4965_priv *priv = data;
  3805. iwl4965_rx_allocate(priv);
  3806. iwl4965_rx_queue_restock(priv);
  3807. }
  3808. void iwl4965_rx_replenish(void *data)
  3809. {
  3810. struct iwl4965_priv *priv = data;
  3811. unsigned long flags;
  3812. iwl4965_rx_allocate(priv);
  3813. spin_lock_irqsave(&priv->lock, flags);
  3814. iwl4965_rx_queue_restock(priv);
  3815. spin_unlock_irqrestore(&priv->lock, flags);
  3816. }
  3817. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3818. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3819. * This free routine walks the list of POOL entries and if SKB is set to
  3820. * non NULL it is unmapped and freed
  3821. */
  3822. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3823. {
  3824. int i;
  3825. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3826. if (rxq->pool[i].skb != NULL) {
  3827. pci_unmap_single(priv->pci_dev,
  3828. rxq->pool[i].dma_addr,
  3829. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3830. dev_kfree_skb(rxq->pool[i].skb);
  3831. }
  3832. }
  3833. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3834. rxq->dma_addr);
  3835. rxq->bd = NULL;
  3836. }
  3837. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3838. {
  3839. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3840. struct pci_dev *dev = priv->pci_dev;
  3841. int i;
  3842. spin_lock_init(&rxq->lock);
  3843. INIT_LIST_HEAD(&rxq->rx_free);
  3844. INIT_LIST_HEAD(&rxq->rx_used);
  3845. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3846. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3847. if (!rxq->bd)
  3848. return -ENOMEM;
  3849. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3850. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3851. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3852. /* Set us so that we have processed and used all buffers, but have
  3853. * not restocked the Rx queue with fresh buffers */
  3854. rxq->read = rxq->write = 0;
  3855. rxq->free_count = 0;
  3856. rxq->need_update = 0;
  3857. return 0;
  3858. }
  3859. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3860. {
  3861. unsigned long flags;
  3862. int i;
  3863. spin_lock_irqsave(&rxq->lock, flags);
  3864. INIT_LIST_HEAD(&rxq->rx_free);
  3865. INIT_LIST_HEAD(&rxq->rx_used);
  3866. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3867. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3868. /* In the reset function, these buffers may have been allocated
  3869. * to an SKB, so we need to unmap and free potential storage */
  3870. if (rxq->pool[i].skb != NULL) {
  3871. pci_unmap_single(priv->pci_dev,
  3872. rxq->pool[i].dma_addr,
  3873. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3874. priv->alloc_rxb_skb--;
  3875. dev_kfree_skb(rxq->pool[i].skb);
  3876. rxq->pool[i].skb = NULL;
  3877. }
  3878. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3879. }
  3880. /* Set us so that we have processed and used all buffers, but have
  3881. * not restocked the Rx queue with fresh buffers */
  3882. rxq->read = rxq->write = 0;
  3883. rxq->free_count = 0;
  3884. spin_unlock_irqrestore(&rxq->lock, flags);
  3885. }
  3886. /* Convert linear signal-to-noise ratio into dB */
  3887. static u8 ratio2dB[100] = {
  3888. /* 0 1 2 3 4 5 6 7 8 9 */
  3889. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3890. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3891. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3892. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3893. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3894. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3895. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3896. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3897. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3898. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3899. };
  3900. /* Calculates a relative dB value from a ratio of linear
  3901. * (i.e. not dB) signal levels.
  3902. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3903. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3904. {
  3905. /* 1000:1 or higher just report as 60 dB */
  3906. if (sig_ratio >= 1000)
  3907. return 60;
  3908. /* 100:1 or higher, divide by 10 and use table,
  3909. * add 20 dB to make up for divide by 10 */
  3910. if (sig_ratio >= 100)
  3911. return (20 + (int)ratio2dB[sig_ratio/10]);
  3912. /* We shouldn't see this */
  3913. if (sig_ratio < 1)
  3914. return 0;
  3915. /* Use table for ratios 1:1 - 99:1 */
  3916. return (int)ratio2dB[sig_ratio];
  3917. }
  3918. #define PERFECT_RSSI (-20) /* dBm */
  3919. #define WORST_RSSI (-95) /* dBm */
  3920. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3921. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3922. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3923. * about formulas used below. */
  3924. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3925. {
  3926. int sig_qual;
  3927. int degradation = PERFECT_RSSI - rssi_dbm;
  3928. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3929. * as indicator; formula is (signal dbm - noise dbm).
  3930. * SNR at or above 40 is a great signal (100%).
  3931. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3932. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3933. if (noise_dbm) {
  3934. if (rssi_dbm - noise_dbm >= 40)
  3935. return 100;
  3936. else if (rssi_dbm < noise_dbm)
  3937. return 0;
  3938. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3939. /* Else use just the signal level.
  3940. * This formula is a least squares fit of data points collected and
  3941. * compared with a reference system that had a percentage (%) display
  3942. * for signal quality. */
  3943. } else
  3944. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3945. (15 * RSSI_RANGE + 62 * degradation)) /
  3946. (RSSI_RANGE * RSSI_RANGE);
  3947. if (sig_qual > 100)
  3948. sig_qual = 100;
  3949. else if (sig_qual < 1)
  3950. sig_qual = 0;
  3951. return sig_qual;
  3952. }
  3953. /**
  3954. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3955. *
  3956. * Uses the priv->rx_handlers callback function array to invoke
  3957. * the appropriate handlers, including command responses,
  3958. * frame-received notifications, and other notifications.
  3959. */
  3960. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3961. {
  3962. struct iwl4965_rx_mem_buffer *rxb;
  3963. struct iwl4965_rx_packet *pkt;
  3964. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3965. u32 r, i;
  3966. int reclaim;
  3967. unsigned long flags;
  3968. u8 fill_rx = 0;
  3969. u32 count = 0;
  3970. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3971. * buffer that the driver may process (last buffer filled by ucode). */
  3972. r = iwl4965_hw_get_rx_read(priv);
  3973. i = rxq->read;
  3974. /* Rx interrupt, but nothing sent from uCode */
  3975. if (i == r)
  3976. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3977. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3978. fill_rx = 1;
  3979. while (i != r) {
  3980. rxb = rxq->queue[i];
  3981. /* If an RXB doesn't have a Rx queue slot associated with it,
  3982. * then a bug has been introduced in the queue refilling
  3983. * routines -- catch it here */
  3984. BUG_ON(rxb == NULL);
  3985. rxq->queue[i] = NULL;
  3986. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3987. IWL_RX_BUF_SIZE,
  3988. PCI_DMA_FROMDEVICE);
  3989. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3990. /* Reclaim a command buffer only if this packet is a response
  3991. * to a (driver-originated) command.
  3992. * If the packet (e.g. Rx frame) originated from uCode,
  3993. * there is no command buffer to reclaim.
  3994. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3995. * but apparently a few don't get set; catch them here. */
  3996. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3997. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3998. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3999. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  4000. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  4001. (pkt->hdr.cmd != REPLY_TX);
  4002. /* Based on type of command response or notification,
  4003. * handle those that need handling via function in
  4004. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  4005. if (priv->rx_handlers[pkt->hdr.cmd]) {
  4006. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  4007. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  4008. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  4009. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  4010. } else {
  4011. /* No handling needed */
  4012. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  4013. "r %d i %d No handler needed for %s, 0x%02x\n",
  4014. r, i, get_cmd_string(pkt->hdr.cmd),
  4015. pkt->hdr.cmd);
  4016. }
  4017. if (reclaim) {
  4018. /* Invoke any callbacks, transfer the skb to caller, and
  4019. * fire off the (possibly) blocking iwl4965_send_cmd()
  4020. * as we reclaim the driver command queue */
  4021. if (rxb && rxb->skb)
  4022. iwl4965_tx_cmd_complete(priv, rxb);
  4023. else
  4024. IWL_WARNING("Claim null rxb?\n");
  4025. }
  4026. /* For now we just don't re-use anything. We can tweak this
  4027. * later to try and re-use notification packets and SKBs that
  4028. * fail to Rx correctly */
  4029. if (rxb->skb != NULL) {
  4030. priv->alloc_rxb_skb--;
  4031. dev_kfree_skb_any(rxb->skb);
  4032. rxb->skb = NULL;
  4033. }
  4034. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  4035. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  4036. spin_lock_irqsave(&rxq->lock, flags);
  4037. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  4038. spin_unlock_irqrestore(&rxq->lock, flags);
  4039. i = (i + 1) & RX_QUEUE_MASK;
  4040. /* If there are a lot of unused frames,
  4041. * restock the Rx queue so ucode wont assert. */
  4042. if (fill_rx) {
  4043. count++;
  4044. if (count >= 8) {
  4045. priv->rxq.read = i;
  4046. __iwl4965_rx_replenish(priv);
  4047. count = 0;
  4048. }
  4049. }
  4050. }
  4051. /* Backtrack one entry */
  4052. priv->rxq.read = i;
  4053. iwl4965_rx_queue_restock(priv);
  4054. }
  4055. /**
  4056. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4057. */
  4058. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4059. struct iwl4965_tx_queue *txq)
  4060. {
  4061. u32 reg = 0;
  4062. int rc = 0;
  4063. int txq_id = txq->q.id;
  4064. if (txq->need_update == 0)
  4065. return rc;
  4066. /* if we're trying to save power */
  4067. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4068. /* wake up nic if it's powered down ...
  4069. * uCode will wake up, and interrupt us again, so next
  4070. * time we'll skip this part. */
  4071. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4072. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4073. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4074. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4075. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4076. return rc;
  4077. }
  4078. /* restore this queue's parameters in nic hardware. */
  4079. rc = iwl4965_grab_nic_access(priv);
  4080. if (rc)
  4081. return rc;
  4082. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4083. txq->q.write_ptr | (txq_id << 8));
  4084. iwl4965_release_nic_access(priv);
  4085. /* else not in power-save mode, uCode will never sleep when we're
  4086. * trying to tx (during RFKILL, we're not trying to tx). */
  4087. } else
  4088. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4089. txq->q.write_ptr | (txq_id << 8));
  4090. txq->need_update = 0;
  4091. return rc;
  4092. }
  4093. #ifdef CONFIG_IWL4965_DEBUG
  4094. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4095. {
  4096. DECLARE_MAC_BUF(mac);
  4097. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4098. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4099. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4100. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4101. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4102. le32_to_cpu(rxon->filter_flags));
  4103. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4104. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4105. rxon->ofdm_basic_rates);
  4106. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4107. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4108. print_mac(mac, rxon->node_addr));
  4109. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4110. print_mac(mac, rxon->bssid_addr));
  4111. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4112. }
  4113. #endif
  4114. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4115. {
  4116. IWL_DEBUG_ISR("Enabling interrupts\n");
  4117. set_bit(STATUS_INT_ENABLED, &priv->status);
  4118. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4119. }
  4120. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4121. {
  4122. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4123. /* disable interrupts from uCode/NIC to host */
  4124. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4125. /* acknowledge/clear/reset any interrupts still pending
  4126. * from uCode or flow handler (Rx/Tx DMA) */
  4127. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4128. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4129. IWL_DEBUG_ISR("Disabled interrupts\n");
  4130. }
  4131. static const char *desc_lookup(int i)
  4132. {
  4133. switch (i) {
  4134. case 1:
  4135. return "FAIL";
  4136. case 2:
  4137. return "BAD_PARAM";
  4138. case 3:
  4139. return "BAD_CHECKSUM";
  4140. case 4:
  4141. return "NMI_INTERRUPT";
  4142. case 5:
  4143. return "SYSASSERT";
  4144. case 6:
  4145. return "FATAL_ERROR";
  4146. }
  4147. return "UNKNOWN";
  4148. }
  4149. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4150. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4151. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4152. {
  4153. u32 data2, line;
  4154. u32 desc, time, count, base, data1;
  4155. u32 blink1, blink2, ilink1, ilink2;
  4156. int rc;
  4157. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4158. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4159. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4160. return;
  4161. }
  4162. rc = iwl4965_grab_nic_access(priv);
  4163. if (rc) {
  4164. IWL_WARNING("Can not read from adapter at this time.\n");
  4165. return;
  4166. }
  4167. count = iwl4965_read_targ_mem(priv, base);
  4168. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4169. IWL_ERROR("Start IWL Error Log Dump:\n");
  4170. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4171. priv->status, priv->config, count);
  4172. }
  4173. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4174. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4175. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4176. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4177. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4178. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4179. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4180. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4181. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4182. IWL_ERROR("Desc Time "
  4183. "data1 data2 line\n");
  4184. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4185. desc_lookup(desc), desc, time, data1, data2, line);
  4186. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4187. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4188. ilink1, ilink2);
  4189. iwl4965_release_nic_access(priv);
  4190. }
  4191. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4192. /**
  4193. * iwl4965_print_event_log - Dump error event log to syslog
  4194. *
  4195. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4196. */
  4197. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4198. u32 num_events, u32 mode)
  4199. {
  4200. u32 i;
  4201. u32 base; /* SRAM byte address of event log header */
  4202. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4203. u32 ptr; /* SRAM byte address of log data */
  4204. u32 ev, time, data; /* event log data */
  4205. if (num_events == 0)
  4206. return;
  4207. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4208. if (mode == 0)
  4209. event_size = 2 * sizeof(u32);
  4210. else
  4211. event_size = 3 * sizeof(u32);
  4212. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4213. /* "time" is actually "data" for mode 0 (no timestamp).
  4214. * place event id # at far right for easier visual parsing. */
  4215. for (i = 0; i < num_events; i++) {
  4216. ev = iwl4965_read_targ_mem(priv, ptr);
  4217. ptr += sizeof(u32);
  4218. time = iwl4965_read_targ_mem(priv, ptr);
  4219. ptr += sizeof(u32);
  4220. if (mode == 0)
  4221. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4222. else {
  4223. data = iwl4965_read_targ_mem(priv, ptr);
  4224. ptr += sizeof(u32);
  4225. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4226. }
  4227. }
  4228. }
  4229. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4230. {
  4231. int rc;
  4232. u32 base; /* SRAM byte address of event log header */
  4233. u32 capacity; /* event log capacity in # entries */
  4234. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4235. u32 num_wraps; /* # times uCode wrapped to top of log */
  4236. u32 next_entry; /* index of next entry to be written by uCode */
  4237. u32 size; /* # entries that we'll print */
  4238. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4239. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4240. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4241. return;
  4242. }
  4243. rc = iwl4965_grab_nic_access(priv);
  4244. if (rc) {
  4245. IWL_WARNING("Can not read from adapter at this time.\n");
  4246. return;
  4247. }
  4248. /* event log header */
  4249. capacity = iwl4965_read_targ_mem(priv, base);
  4250. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4251. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4252. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4253. size = num_wraps ? capacity : next_entry;
  4254. /* bail out if nothing in log */
  4255. if (size == 0) {
  4256. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4257. iwl4965_release_nic_access(priv);
  4258. return;
  4259. }
  4260. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4261. size, num_wraps);
  4262. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4263. * i.e the next one that uCode would fill. */
  4264. if (num_wraps)
  4265. iwl4965_print_event_log(priv, next_entry,
  4266. capacity - next_entry, mode);
  4267. /* (then/else) start at top of log */
  4268. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4269. iwl4965_release_nic_access(priv);
  4270. }
  4271. /**
  4272. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4273. */
  4274. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4275. {
  4276. /* Set the FW error flag -- cleared on iwl4965_down */
  4277. set_bit(STATUS_FW_ERROR, &priv->status);
  4278. /* Cancel currently queued command. */
  4279. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4280. #ifdef CONFIG_IWL4965_DEBUG
  4281. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4282. iwl4965_dump_nic_error_log(priv);
  4283. iwl4965_dump_nic_event_log(priv);
  4284. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4285. }
  4286. #endif
  4287. wake_up_interruptible(&priv->wait_command_queue);
  4288. /* Keep the restart process from trying to send host
  4289. * commands by clearing the INIT status bit */
  4290. clear_bit(STATUS_READY, &priv->status);
  4291. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4292. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4293. "Restarting adapter due to uCode error.\n");
  4294. if (iwl4965_is_associated(priv)) {
  4295. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4296. sizeof(priv->recovery_rxon));
  4297. priv->error_recovering = 1;
  4298. }
  4299. queue_work(priv->workqueue, &priv->restart);
  4300. }
  4301. }
  4302. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4303. {
  4304. unsigned long flags;
  4305. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4306. sizeof(priv->staging_rxon));
  4307. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4308. iwl4965_commit_rxon(priv);
  4309. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4310. spin_lock_irqsave(&priv->lock, flags);
  4311. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4312. priv->error_recovering = 0;
  4313. spin_unlock_irqrestore(&priv->lock, flags);
  4314. }
  4315. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4316. {
  4317. u32 inta, handled = 0;
  4318. u32 inta_fh;
  4319. unsigned long flags;
  4320. #ifdef CONFIG_IWL4965_DEBUG
  4321. u32 inta_mask;
  4322. #endif
  4323. spin_lock_irqsave(&priv->lock, flags);
  4324. /* Ack/clear/reset pending uCode interrupts.
  4325. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4326. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4327. inta = iwl4965_read32(priv, CSR_INT);
  4328. iwl4965_write32(priv, CSR_INT, inta);
  4329. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4330. * Any new interrupts that happen after this, either while we're
  4331. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4332. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4333. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4334. #ifdef CONFIG_IWL4965_DEBUG
  4335. if (iwl4965_debug_level & IWL_DL_ISR) {
  4336. /* just for debug */
  4337. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4338. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4339. inta, inta_mask, inta_fh);
  4340. }
  4341. #endif
  4342. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4343. * atomic, make sure that inta covers all the interrupts that
  4344. * we've discovered, even if FH interrupt came in just after
  4345. * reading CSR_INT. */
  4346. if (inta_fh & CSR_FH_INT_RX_MASK)
  4347. inta |= CSR_INT_BIT_FH_RX;
  4348. if (inta_fh & CSR_FH_INT_TX_MASK)
  4349. inta |= CSR_INT_BIT_FH_TX;
  4350. /* Now service all interrupt bits discovered above. */
  4351. if (inta & CSR_INT_BIT_HW_ERR) {
  4352. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4353. /* Tell the device to stop sending interrupts */
  4354. iwl4965_disable_interrupts(priv);
  4355. iwl4965_irq_handle_error(priv);
  4356. handled |= CSR_INT_BIT_HW_ERR;
  4357. spin_unlock_irqrestore(&priv->lock, flags);
  4358. return;
  4359. }
  4360. #ifdef CONFIG_IWL4965_DEBUG
  4361. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4362. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4363. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4364. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4365. /* Alive notification via Rx interrupt will do the real work */
  4366. if (inta & CSR_INT_BIT_ALIVE)
  4367. IWL_DEBUG_ISR("Alive interrupt\n");
  4368. }
  4369. #endif
  4370. /* Safely ignore these bits for debug checks below */
  4371. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4372. /* HW RF KILL switch toggled */
  4373. if (inta & CSR_INT_BIT_RF_KILL) {
  4374. int hw_rf_kill = 0;
  4375. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4376. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4377. hw_rf_kill = 1;
  4378. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4379. "RF_KILL bit toggled to %s.\n",
  4380. hw_rf_kill ? "disable radio":"enable radio");
  4381. /* Queue restart only if RF_KILL switch was set to "kill"
  4382. * when we loaded driver, and is now set to "enable".
  4383. * After we're Alive, RF_KILL gets handled by
  4384. * iwl_rx_card_state_notif() */
  4385. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4386. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4387. queue_work(priv->workqueue, &priv->restart);
  4388. }
  4389. handled |= CSR_INT_BIT_RF_KILL;
  4390. }
  4391. /* Chip got too hot and stopped itself */
  4392. if (inta & CSR_INT_BIT_CT_KILL) {
  4393. IWL_ERROR("Microcode CT kill error detected.\n");
  4394. handled |= CSR_INT_BIT_CT_KILL;
  4395. }
  4396. /* Error detected by uCode */
  4397. if (inta & CSR_INT_BIT_SW_ERR) {
  4398. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4399. inta);
  4400. iwl4965_irq_handle_error(priv);
  4401. handled |= CSR_INT_BIT_SW_ERR;
  4402. }
  4403. /* uCode wakes up after power-down sleep */
  4404. if (inta & CSR_INT_BIT_WAKEUP) {
  4405. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4406. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4407. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4408. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4409. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4410. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4411. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4412. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4413. handled |= CSR_INT_BIT_WAKEUP;
  4414. }
  4415. /* All uCode command responses, including Tx command responses,
  4416. * Rx "responses" (frame-received notification), and other
  4417. * notifications from uCode come through here*/
  4418. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4419. iwl4965_rx_handle(priv);
  4420. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4421. }
  4422. if (inta & CSR_INT_BIT_FH_TX) {
  4423. IWL_DEBUG_ISR("Tx interrupt\n");
  4424. handled |= CSR_INT_BIT_FH_TX;
  4425. }
  4426. if (inta & ~handled)
  4427. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4428. if (inta & ~CSR_INI_SET_MASK) {
  4429. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4430. inta & ~CSR_INI_SET_MASK);
  4431. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4432. }
  4433. /* Re-enable all interrupts */
  4434. iwl4965_enable_interrupts(priv);
  4435. #ifdef CONFIG_IWL4965_DEBUG
  4436. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4437. inta = iwl4965_read32(priv, CSR_INT);
  4438. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4439. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4440. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4441. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4442. }
  4443. #endif
  4444. spin_unlock_irqrestore(&priv->lock, flags);
  4445. }
  4446. static irqreturn_t iwl4965_isr(int irq, void *data)
  4447. {
  4448. struct iwl4965_priv *priv = data;
  4449. u32 inta, inta_mask;
  4450. u32 inta_fh;
  4451. if (!priv)
  4452. return IRQ_NONE;
  4453. spin_lock(&priv->lock);
  4454. /* Disable (but don't clear!) interrupts here to avoid
  4455. * back-to-back ISRs and sporadic interrupts from our NIC.
  4456. * If we have something to service, the tasklet will re-enable ints.
  4457. * If we *don't* have something, we'll re-enable before leaving here. */
  4458. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4459. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4460. /* Discover which interrupts are active/pending */
  4461. inta = iwl4965_read32(priv, CSR_INT);
  4462. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4463. /* Ignore interrupt if there's nothing in NIC to service.
  4464. * This may be due to IRQ shared with another device,
  4465. * or due to sporadic interrupts thrown from our NIC. */
  4466. if (!inta && !inta_fh) {
  4467. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4468. goto none;
  4469. }
  4470. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4471. /* Hardware disappeared. It might have already raised
  4472. * an interrupt */
  4473. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4474. goto unplugged;
  4475. }
  4476. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4477. inta, inta_mask, inta_fh);
  4478. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4479. tasklet_schedule(&priv->irq_tasklet);
  4480. unplugged:
  4481. spin_unlock(&priv->lock);
  4482. return IRQ_HANDLED;
  4483. none:
  4484. /* re-enable interrupts here since we don't have anything to service. */
  4485. iwl4965_enable_interrupts(priv);
  4486. spin_unlock(&priv->lock);
  4487. return IRQ_NONE;
  4488. }
  4489. /************************** EEPROM BANDS ****************************
  4490. *
  4491. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4492. * EEPROM contents to the specific channel number supported for each
  4493. * band.
  4494. *
  4495. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4496. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4497. * The specific geography and calibration information for that channel
  4498. * is contained in the eeprom map itself.
  4499. *
  4500. * During init, we copy the eeprom information and channel map
  4501. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4502. *
  4503. * channel_map_24/52 provides the index in the channel_info array for a
  4504. * given channel. We have to have two separate maps as there is channel
  4505. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4506. * band_2
  4507. *
  4508. * A value of 0xff stored in the channel_map indicates that the channel
  4509. * is not supported by the hardware at all.
  4510. *
  4511. * A value of 0xfe in the channel_map indicates that the channel is not
  4512. * valid for Tx with the current hardware. This means that
  4513. * while the system can tune and receive on a given channel, it may not
  4514. * be able to associate or transmit any frames on that
  4515. * channel. There is no corresponding channel information for that
  4516. * entry.
  4517. *
  4518. *********************************************************************/
  4519. /* 2.4 GHz */
  4520. static const u8 iwl4965_eeprom_band_1[14] = {
  4521. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4522. };
  4523. /* 5.2 GHz bands */
  4524. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4525. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4526. };
  4527. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4528. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4529. };
  4530. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4531. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4532. };
  4533. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4534. 145, 149, 153, 157, 161, 165
  4535. };
  4536. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4537. 1, 2, 3, 4, 5, 6, 7
  4538. };
  4539. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4540. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4541. };
  4542. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4543. int band,
  4544. int *eeprom_ch_count,
  4545. const struct iwl4965_eeprom_channel
  4546. **eeprom_ch_info,
  4547. const u8 **eeprom_ch_index)
  4548. {
  4549. switch (band) {
  4550. case 1: /* 2.4GHz band */
  4551. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4552. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4553. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4554. break;
  4555. case 2: /* 4.9GHz band */
  4556. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4557. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4558. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4559. break;
  4560. case 3: /* 5.2GHz band */
  4561. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4562. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4563. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4564. break;
  4565. case 4: /* 5.5GHz band */
  4566. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4567. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4568. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4569. break;
  4570. case 5: /* 5.7GHz band */
  4571. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4572. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4573. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4574. break;
  4575. case 6: /* 2.4GHz FAT channels */
  4576. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4577. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4578. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4579. break;
  4580. case 7: /* 5 GHz FAT channels */
  4581. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4582. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4583. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4584. break;
  4585. default:
  4586. BUG();
  4587. return;
  4588. }
  4589. }
  4590. /**
  4591. * iwl4965_get_channel_info - Find driver's private channel info
  4592. *
  4593. * Based on band and channel number.
  4594. */
  4595. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4596. int phymode, u16 channel)
  4597. {
  4598. int i;
  4599. switch (phymode) {
  4600. case MODE_IEEE80211A:
  4601. for (i = 14; i < priv->channel_count; i++) {
  4602. if (priv->channel_info[i].channel == channel)
  4603. return &priv->channel_info[i];
  4604. }
  4605. break;
  4606. case MODE_IEEE80211B:
  4607. case MODE_IEEE80211G:
  4608. if (channel >= 1 && channel <= 14)
  4609. return &priv->channel_info[channel - 1];
  4610. break;
  4611. }
  4612. return NULL;
  4613. }
  4614. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4615. ? # x " " : "")
  4616. /**
  4617. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4618. */
  4619. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4620. {
  4621. int eeprom_ch_count = 0;
  4622. const u8 *eeprom_ch_index = NULL;
  4623. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4624. int band, ch;
  4625. struct iwl4965_channel_info *ch_info;
  4626. if (priv->channel_count) {
  4627. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4628. return 0;
  4629. }
  4630. if (priv->eeprom.version < 0x2f) {
  4631. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4632. priv->eeprom.version);
  4633. return -EINVAL;
  4634. }
  4635. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4636. priv->channel_count =
  4637. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4638. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4639. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4640. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4641. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4642. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4643. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4644. priv->channel_count, GFP_KERNEL);
  4645. if (!priv->channel_info) {
  4646. IWL_ERROR("Could not allocate channel_info\n");
  4647. priv->channel_count = 0;
  4648. return -ENOMEM;
  4649. }
  4650. ch_info = priv->channel_info;
  4651. /* Loop through the 5 EEPROM bands adding them in order to the
  4652. * channel map we maintain (that contains additional information than
  4653. * what just in the EEPROM) */
  4654. for (band = 1; band <= 5; band++) {
  4655. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4656. &eeprom_ch_info, &eeprom_ch_index);
  4657. /* Loop through each band adding each of the channels */
  4658. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4659. ch_info->channel = eeprom_ch_index[ch];
  4660. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4661. MODE_IEEE80211A;
  4662. /* permanently store EEPROM's channel regulatory flags
  4663. * and max power in channel info database. */
  4664. ch_info->eeprom = eeprom_ch_info[ch];
  4665. /* Copy the run-time flags so they are there even on
  4666. * invalid channels */
  4667. ch_info->flags = eeprom_ch_info[ch].flags;
  4668. if (!(is_channel_valid(ch_info))) {
  4669. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4670. "No traffic\n",
  4671. ch_info->channel,
  4672. ch_info->flags,
  4673. is_channel_a_band(ch_info) ?
  4674. "5.2" : "2.4");
  4675. ch_info++;
  4676. continue;
  4677. }
  4678. /* Initialize regulatory-based run-time data */
  4679. ch_info->max_power_avg = ch_info->curr_txpow =
  4680. eeprom_ch_info[ch].max_power_avg;
  4681. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4682. ch_info->min_power = 0;
  4683. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4684. " %ddBm): Ad-Hoc %ssupported\n",
  4685. ch_info->channel,
  4686. is_channel_a_band(ch_info) ?
  4687. "5.2" : "2.4",
  4688. CHECK_AND_PRINT(IBSS),
  4689. CHECK_AND_PRINT(ACTIVE),
  4690. CHECK_AND_PRINT(RADAR),
  4691. CHECK_AND_PRINT(WIDE),
  4692. CHECK_AND_PRINT(NARROW),
  4693. CHECK_AND_PRINT(DFS),
  4694. eeprom_ch_info[ch].flags,
  4695. eeprom_ch_info[ch].max_power_avg,
  4696. ((eeprom_ch_info[ch].
  4697. flags & EEPROM_CHANNEL_IBSS)
  4698. && !(eeprom_ch_info[ch].
  4699. flags & EEPROM_CHANNEL_RADAR))
  4700. ? "" : "not ");
  4701. /* Set the user_txpower_limit to the highest power
  4702. * supported by any channel */
  4703. if (eeprom_ch_info[ch].max_power_avg >
  4704. priv->user_txpower_limit)
  4705. priv->user_txpower_limit =
  4706. eeprom_ch_info[ch].max_power_avg;
  4707. ch_info++;
  4708. }
  4709. }
  4710. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4711. for (band = 6; band <= 7; band++) {
  4712. int phymode;
  4713. u8 fat_extension_chan;
  4714. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4715. &eeprom_ch_info, &eeprom_ch_index);
  4716. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4717. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4718. /* Loop through each band adding each of the channels */
  4719. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4720. if ((band == 6) &&
  4721. ((eeprom_ch_index[ch] == 5) ||
  4722. (eeprom_ch_index[ch] == 6) ||
  4723. (eeprom_ch_index[ch] == 7)))
  4724. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4725. else
  4726. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4727. /* Set up driver's info for lower half */
  4728. iwl4965_set_fat_chan_info(priv, phymode,
  4729. eeprom_ch_index[ch],
  4730. &(eeprom_ch_info[ch]),
  4731. fat_extension_chan);
  4732. /* Set up driver's info for upper half */
  4733. iwl4965_set_fat_chan_info(priv, phymode,
  4734. (eeprom_ch_index[ch] + 4),
  4735. &(eeprom_ch_info[ch]),
  4736. HT_IE_EXT_CHANNEL_BELOW);
  4737. }
  4738. }
  4739. return 0;
  4740. }
  4741. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4742. * sending probe req. This should be set long enough to hear probe responses
  4743. * from more than one AP. */
  4744. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4745. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4746. /* For faster active scanning, scan will move to the next channel if fewer than
  4747. * PLCP_QUIET_THRESH packets are heard on this channel within
  4748. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4749. * time if it's a quiet channel (nothing responded to our probe, and there's
  4750. * no other traffic).
  4751. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4752. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4753. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4754. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4755. * Must be set longer than active dwell time.
  4756. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4757. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4758. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4759. #define IWL_PASSIVE_DWELL_BASE (100)
  4760. #define IWL_CHANNEL_TUNE_TIME 5
  4761. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4762. {
  4763. if (phymode == MODE_IEEE80211A)
  4764. return IWL_ACTIVE_DWELL_TIME_52;
  4765. else
  4766. return IWL_ACTIVE_DWELL_TIME_24;
  4767. }
  4768. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4769. {
  4770. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4771. u16 passive = (phymode != MODE_IEEE80211A) ?
  4772. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4773. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4774. if (iwl4965_is_associated(priv)) {
  4775. /* If we're associated, we clamp the maximum passive
  4776. * dwell time to be 98% of the beacon interval (minus
  4777. * 2 * channel tune time) */
  4778. passive = priv->beacon_int;
  4779. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4780. passive = IWL_PASSIVE_DWELL_BASE;
  4781. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4782. }
  4783. if (passive <= active)
  4784. passive = active + 1;
  4785. return passive;
  4786. }
  4787. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4788. u8 is_active, u8 direct_mask,
  4789. struct iwl4965_scan_channel *scan_ch)
  4790. {
  4791. const struct ieee80211_channel *channels = NULL;
  4792. const struct ieee80211_hw_mode *hw_mode;
  4793. const struct iwl4965_channel_info *ch_info;
  4794. u16 passive_dwell = 0;
  4795. u16 active_dwell = 0;
  4796. int added, i;
  4797. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4798. if (!hw_mode)
  4799. return 0;
  4800. channels = hw_mode->channels;
  4801. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4802. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4803. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4804. if (channels[i].chan ==
  4805. le16_to_cpu(priv->active_rxon.channel)) {
  4806. if (iwl4965_is_associated(priv)) {
  4807. IWL_DEBUG_SCAN
  4808. ("Skipping current channel %d\n",
  4809. le16_to_cpu(priv->active_rxon.channel));
  4810. continue;
  4811. }
  4812. } else if (priv->only_active_channel)
  4813. continue;
  4814. scan_ch->channel = channels[i].chan;
  4815. ch_info = iwl4965_get_channel_info(priv, phymode,
  4816. scan_ch->channel);
  4817. if (!is_channel_valid(ch_info)) {
  4818. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4819. scan_ch->channel);
  4820. continue;
  4821. }
  4822. if (!is_active || is_channel_passive(ch_info) ||
  4823. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4824. scan_ch->type = 0; /* passive */
  4825. else
  4826. scan_ch->type = 1; /* active */
  4827. if (scan_ch->type & 1)
  4828. scan_ch->type |= (direct_mask << 1);
  4829. if (is_channel_narrow(ch_info))
  4830. scan_ch->type |= (1 << 7);
  4831. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4832. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4833. /* Set txpower levels to defaults */
  4834. scan_ch->tpc.dsp_atten = 110;
  4835. /* scan_pwr_info->tpc.dsp_atten; */
  4836. /*scan_pwr_info->tpc.tx_gain; */
  4837. if (phymode == MODE_IEEE80211A)
  4838. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4839. else {
  4840. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4841. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4842. * power level:
  4843. * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4844. */
  4845. }
  4846. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4847. scan_ch->channel,
  4848. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4849. (scan_ch->type & 1) ?
  4850. active_dwell : passive_dwell);
  4851. scan_ch++;
  4852. added++;
  4853. }
  4854. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4855. return added;
  4856. }
  4857. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4858. {
  4859. int i, j;
  4860. for (i = 0; i < 3; i++) {
  4861. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4862. for (j = 0; j < hw_mode->num_channels; j++)
  4863. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4864. }
  4865. }
  4866. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4867. struct ieee80211_rate *rates)
  4868. {
  4869. int i;
  4870. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4871. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4872. rates[i].val = i; /* Rate scaling will work on indexes */
  4873. rates[i].val2 = i;
  4874. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4875. /* Only OFDM have the bits-per-symbol set */
  4876. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4877. rates[i].flags |= IEEE80211_RATE_OFDM;
  4878. else {
  4879. /*
  4880. * If CCK 1M then set rate flag to CCK else CCK_2
  4881. * which is CCK | PREAMBLE2
  4882. */
  4883. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4884. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4885. }
  4886. /* Set up which ones are basic rates... */
  4887. if (IWL_BASIC_RATES_MASK & (1 << i))
  4888. rates[i].flags |= IEEE80211_RATE_BASIC;
  4889. }
  4890. }
  4891. /**
  4892. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4893. */
  4894. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4895. {
  4896. struct iwl4965_channel_info *ch;
  4897. struct ieee80211_hw_mode *modes;
  4898. struct ieee80211_channel *channels;
  4899. struct ieee80211_channel *geo_ch;
  4900. struct ieee80211_rate *rates;
  4901. int i = 0;
  4902. enum {
  4903. A = 0,
  4904. B = 1,
  4905. G = 2,
  4906. A_11N = 3,
  4907. G_11N = 4,
  4908. };
  4909. int mode_count = 5;
  4910. if (priv->modes) {
  4911. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4912. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4913. return 0;
  4914. }
  4915. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4916. GFP_KERNEL);
  4917. if (!modes)
  4918. return -ENOMEM;
  4919. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4920. priv->channel_count, GFP_KERNEL);
  4921. if (!channels) {
  4922. kfree(modes);
  4923. return -ENOMEM;
  4924. }
  4925. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4926. GFP_KERNEL);
  4927. if (!rates) {
  4928. kfree(modes);
  4929. kfree(channels);
  4930. return -ENOMEM;
  4931. }
  4932. /* 0 = 802.11a
  4933. * 1 = 802.11b
  4934. * 2 = 802.11g
  4935. */
  4936. /* 5.2GHz channels start after the 2.4GHz channels */
  4937. modes[A].mode = MODE_IEEE80211A;
  4938. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4939. modes[A].rates = rates;
  4940. modes[A].num_rates = 8; /* just OFDM */
  4941. modes[A].rates = &rates[4];
  4942. modes[A].num_channels = 0;
  4943. modes[B].mode = MODE_IEEE80211B;
  4944. modes[B].channels = channels;
  4945. modes[B].rates = rates;
  4946. modes[B].num_rates = 4; /* just CCK */
  4947. modes[B].num_channels = 0;
  4948. modes[G].mode = MODE_IEEE80211G;
  4949. modes[G].channels = channels;
  4950. modes[G].rates = rates;
  4951. modes[G].num_rates = 12; /* OFDM & CCK */
  4952. modes[G].num_channels = 0;
  4953. modes[G_11N].mode = MODE_IEEE80211G;
  4954. modes[G_11N].channels = channels;
  4955. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4956. modes[G_11N].rates = rates;
  4957. modes[G_11N].num_channels = 0;
  4958. modes[A_11N].mode = MODE_IEEE80211A;
  4959. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4960. modes[A_11N].rates = &rates[4];
  4961. modes[A_11N].num_rates = 9; /* just OFDM */
  4962. modes[A_11N].num_channels = 0;
  4963. priv->ieee_channels = channels;
  4964. priv->ieee_rates = rates;
  4965. iwl4965_init_hw_rates(priv, rates);
  4966. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4967. ch = &priv->channel_info[i];
  4968. if (!is_channel_valid(ch)) {
  4969. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4970. "skipping.\n",
  4971. ch->channel, is_channel_a_band(ch) ?
  4972. "5.2" : "2.4");
  4973. continue;
  4974. }
  4975. if (is_channel_a_band(ch)) {
  4976. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4977. modes[A_11N].num_channels++;
  4978. } else {
  4979. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4980. modes[G].num_channels++;
  4981. modes[G_11N].num_channels++;
  4982. }
  4983. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4984. geo_ch->chan = ch->channel;
  4985. geo_ch->power_level = ch->max_power_avg;
  4986. geo_ch->antenna_max = 0xff;
  4987. if (is_channel_valid(ch)) {
  4988. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4989. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4990. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4991. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4992. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4993. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4994. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4995. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4996. priv->max_channel_txpower_limit =
  4997. ch->max_power_avg;
  4998. }
  4999. geo_ch->val = geo_ch->flag;
  5000. }
  5001. if ((modes[A].num_channels == 0) && priv->is_abg) {
  5002. printk(KERN_INFO DRV_NAME
  5003. ": Incorrectly detected BG card as ABG. Please send "
  5004. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  5005. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  5006. priv->is_abg = 0;
  5007. }
  5008. printk(KERN_INFO DRV_NAME
  5009. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  5010. modes[G].num_channels, modes[A].num_channels);
  5011. /*
  5012. * NOTE: We register these in preference of order -- the
  5013. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  5014. * a phymode based on rates or AP capabilities but seems to
  5015. * configure it purely on if the channel being configured
  5016. * is supported by a mode -- and the first match is taken
  5017. */
  5018. if (modes[G].num_channels)
  5019. ieee80211_register_hwmode(priv->hw, &modes[G]);
  5020. if (modes[B].num_channels)
  5021. ieee80211_register_hwmode(priv->hw, &modes[B]);
  5022. if (modes[A].num_channels)
  5023. ieee80211_register_hwmode(priv->hw, &modes[A]);
  5024. priv->modes = modes;
  5025. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  5026. return 0;
  5027. }
  5028. /******************************************************************************
  5029. *
  5030. * uCode download functions
  5031. *
  5032. ******************************************************************************/
  5033. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  5034. {
  5035. if (priv->ucode_code.v_addr != NULL) {
  5036. pci_free_consistent(priv->pci_dev,
  5037. priv->ucode_code.len,
  5038. priv->ucode_code.v_addr,
  5039. priv->ucode_code.p_addr);
  5040. priv->ucode_code.v_addr = NULL;
  5041. }
  5042. if (priv->ucode_data.v_addr != NULL) {
  5043. pci_free_consistent(priv->pci_dev,
  5044. priv->ucode_data.len,
  5045. priv->ucode_data.v_addr,
  5046. priv->ucode_data.p_addr);
  5047. priv->ucode_data.v_addr = NULL;
  5048. }
  5049. if (priv->ucode_data_backup.v_addr != NULL) {
  5050. pci_free_consistent(priv->pci_dev,
  5051. priv->ucode_data_backup.len,
  5052. priv->ucode_data_backup.v_addr,
  5053. priv->ucode_data_backup.p_addr);
  5054. priv->ucode_data_backup.v_addr = NULL;
  5055. }
  5056. if (priv->ucode_init.v_addr != NULL) {
  5057. pci_free_consistent(priv->pci_dev,
  5058. priv->ucode_init.len,
  5059. priv->ucode_init.v_addr,
  5060. priv->ucode_init.p_addr);
  5061. priv->ucode_init.v_addr = NULL;
  5062. }
  5063. if (priv->ucode_init_data.v_addr != NULL) {
  5064. pci_free_consistent(priv->pci_dev,
  5065. priv->ucode_init_data.len,
  5066. priv->ucode_init_data.v_addr,
  5067. priv->ucode_init_data.p_addr);
  5068. priv->ucode_init_data.v_addr = NULL;
  5069. }
  5070. if (priv->ucode_boot.v_addr != NULL) {
  5071. pci_free_consistent(priv->pci_dev,
  5072. priv->ucode_boot.len,
  5073. priv->ucode_boot.v_addr,
  5074. priv->ucode_boot.p_addr);
  5075. priv->ucode_boot.v_addr = NULL;
  5076. }
  5077. }
  5078. /**
  5079. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  5080. * looking at all data.
  5081. */
  5082. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 * image,
  5083. u32 len)
  5084. {
  5085. u32 val;
  5086. u32 save_len = len;
  5087. int rc = 0;
  5088. u32 errcnt;
  5089. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5090. rc = iwl4965_grab_nic_access(priv);
  5091. if (rc)
  5092. return rc;
  5093. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5094. errcnt = 0;
  5095. for (; len > 0; len -= sizeof(u32), image++) {
  5096. /* read data comes through single port, auto-incr addr */
  5097. /* NOTE: Use the debugless read so we don't flood kernel log
  5098. * if IWL_DL_IO is set */
  5099. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5100. if (val != le32_to_cpu(*image)) {
  5101. IWL_ERROR("uCode INST section is invalid at "
  5102. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5103. save_len - len, val, le32_to_cpu(*image));
  5104. rc = -EIO;
  5105. errcnt++;
  5106. if (errcnt >= 20)
  5107. break;
  5108. }
  5109. }
  5110. iwl4965_release_nic_access(priv);
  5111. if (!errcnt)
  5112. IWL_DEBUG_INFO
  5113. ("ucode image in INSTRUCTION memory is good\n");
  5114. return rc;
  5115. }
  5116. /**
  5117. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5118. * using sample data 100 bytes apart. If these sample points are good,
  5119. * it's a pretty good bet that everything between them is good, too.
  5120. */
  5121. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5122. {
  5123. u32 val;
  5124. int rc = 0;
  5125. u32 errcnt = 0;
  5126. u32 i;
  5127. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5128. rc = iwl4965_grab_nic_access(priv);
  5129. if (rc)
  5130. return rc;
  5131. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5132. /* read data comes through single port, auto-incr addr */
  5133. /* NOTE: Use the debugless read so we don't flood kernel log
  5134. * if IWL_DL_IO is set */
  5135. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5136. i + RTC_INST_LOWER_BOUND);
  5137. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5138. if (val != le32_to_cpu(*image)) {
  5139. #if 0 /* Enable this if you want to see details */
  5140. IWL_ERROR("uCode INST section is invalid at "
  5141. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5142. i, val, *image);
  5143. #endif
  5144. rc = -EIO;
  5145. errcnt++;
  5146. if (errcnt >= 3)
  5147. break;
  5148. }
  5149. }
  5150. iwl4965_release_nic_access(priv);
  5151. return rc;
  5152. }
  5153. /**
  5154. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5155. * and verify its contents
  5156. */
  5157. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5158. {
  5159. __le32 *image;
  5160. u32 len;
  5161. int rc = 0;
  5162. /* Try bootstrap */
  5163. image = (__le32 *)priv->ucode_boot.v_addr;
  5164. len = priv->ucode_boot.len;
  5165. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5166. if (rc == 0) {
  5167. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5168. return 0;
  5169. }
  5170. /* Try initialize */
  5171. image = (__le32 *)priv->ucode_init.v_addr;
  5172. len = priv->ucode_init.len;
  5173. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5174. if (rc == 0) {
  5175. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5176. return 0;
  5177. }
  5178. /* Try runtime/protocol */
  5179. image = (__le32 *)priv->ucode_code.v_addr;
  5180. len = priv->ucode_code.len;
  5181. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5182. if (rc == 0) {
  5183. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5184. return 0;
  5185. }
  5186. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5187. /* Since nothing seems to match, show first several data entries in
  5188. * instruction SRAM, so maybe visual inspection will give a clue.
  5189. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5190. image = (__le32 *)priv->ucode_boot.v_addr;
  5191. len = priv->ucode_boot.len;
  5192. rc = iwl4965_verify_inst_full(priv, image, len);
  5193. return rc;
  5194. }
  5195. /* check contents of special bootstrap uCode SRAM */
  5196. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5197. {
  5198. __le32 *image = priv->ucode_boot.v_addr;
  5199. u32 len = priv->ucode_boot.len;
  5200. u32 reg;
  5201. u32 val;
  5202. IWL_DEBUG_INFO("Begin verify bsm\n");
  5203. /* verify BSM SRAM contents */
  5204. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5205. for (reg = BSM_SRAM_LOWER_BOUND;
  5206. reg < BSM_SRAM_LOWER_BOUND + len;
  5207. reg += sizeof(u32), image ++) {
  5208. val = iwl4965_read_prph(priv, reg);
  5209. if (val != le32_to_cpu(*image)) {
  5210. IWL_ERROR("BSM uCode verification failed at "
  5211. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5212. BSM_SRAM_LOWER_BOUND,
  5213. reg - BSM_SRAM_LOWER_BOUND, len,
  5214. val, le32_to_cpu(*image));
  5215. return -EIO;
  5216. }
  5217. }
  5218. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5219. return 0;
  5220. }
  5221. /**
  5222. * iwl4965_load_bsm - Load bootstrap instructions
  5223. *
  5224. * BSM operation:
  5225. *
  5226. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5227. * in special SRAM that does not power down during RFKILL. When powering back
  5228. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5229. * the bootstrap program into the on-board processor, and starts it.
  5230. *
  5231. * The bootstrap program loads (via DMA) instructions and data for a new
  5232. * program from host DRAM locations indicated by the host driver in the
  5233. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5234. * automatically.
  5235. *
  5236. * When initializing the NIC, the host driver points the BSM to the
  5237. * "initialize" uCode image. This uCode sets up some internal data, then
  5238. * notifies host via "initialize alive" that it is complete.
  5239. *
  5240. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5241. * normal runtime uCode instructions and a backup uCode data cache buffer
  5242. * (filled initially with starting data values for the on-board processor),
  5243. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5244. * which begins normal operation.
  5245. *
  5246. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5247. * the backup data cache in DRAM before SRAM is powered down.
  5248. *
  5249. * When powering back up, the BSM loads the bootstrap program. This reloads
  5250. * the runtime uCode instructions and the backup data cache into SRAM,
  5251. * and re-launches the runtime uCode from where it left off.
  5252. */
  5253. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5254. {
  5255. __le32 *image = priv->ucode_boot.v_addr;
  5256. u32 len = priv->ucode_boot.len;
  5257. dma_addr_t pinst;
  5258. dma_addr_t pdata;
  5259. u32 inst_len;
  5260. u32 data_len;
  5261. int rc;
  5262. int i;
  5263. u32 done;
  5264. u32 reg_offset;
  5265. IWL_DEBUG_INFO("Begin load bsm\n");
  5266. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5267. if (len > IWL_MAX_BSM_SIZE)
  5268. return -EINVAL;
  5269. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5270. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5271. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5272. * after the "initialize" uCode has run, to point to
  5273. * runtime/protocol instructions and backup data cache. */
  5274. pinst = priv->ucode_init.p_addr >> 4;
  5275. pdata = priv->ucode_init_data.p_addr >> 4;
  5276. inst_len = priv->ucode_init.len;
  5277. data_len = priv->ucode_init_data.len;
  5278. rc = iwl4965_grab_nic_access(priv);
  5279. if (rc)
  5280. return rc;
  5281. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5282. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5283. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5284. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5285. /* Fill BSM memory with bootstrap instructions */
  5286. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5287. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5288. reg_offset += sizeof(u32), image++)
  5289. _iwl4965_write_prph(priv, reg_offset,
  5290. le32_to_cpu(*image));
  5291. rc = iwl4965_verify_bsm(priv);
  5292. if (rc) {
  5293. iwl4965_release_nic_access(priv);
  5294. return rc;
  5295. }
  5296. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5297. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5298. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5299. RTC_INST_LOWER_BOUND);
  5300. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5301. /* Load bootstrap code into instruction SRAM now,
  5302. * to prepare to load "initialize" uCode */
  5303. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5304. BSM_WR_CTRL_REG_BIT_START);
  5305. /* Wait for load of bootstrap uCode to finish */
  5306. for (i = 0; i < 100; i++) {
  5307. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5308. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5309. break;
  5310. udelay(10);
  5311. }
  5312. if (i < 100)
  5313. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5314. else {
  5315. IWL_ERROR("BSM write did not complete!\n");
  5316. return -EIO;
  5317. }
  5318. /* Enable future boot loads whenever power management unit triggers it
  5319. * (e.g. when powering back up after power-save shutdown) */
  5320. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5321. BSM_WR_CTRL_REG_BIT_START_EN);
  5322. iwl4965_release_nic_access(priv);
  5323. return 0;
  5324. }
  5325. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5326. {
  5327. /* Remove all resets to allow NIC to operate */
  5328. iwl4965_write32(priv, CSR_RESET, 0);
  5329. }
  5330. static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
  5331. {
  5332. desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
  5333. return (desc->v_addr != NULL) ? 0 : -ENOMEM;
  5334. }
  5335. /**
  5336. * iwl4965_read_ucode - Read uCode images from disk file.
  5337. *
  5338. * Copy into buffers for card to fetch via bus-mastering
  5339. */
  5340. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5341. {
  5342. struct iwl4965_ucode *ucode;
  5343. int ret;
  5344. const struct firmware *ucode_raw;
  5345. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5346. u8 *src;
  5347. size_t len;
  5348. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5349. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5350. * request_firmware() is synchronous, file is in memory on return. */
  5351. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5352. if (ret < 0) {
  5353. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5354. name, ret);
  5355. goto error;
  5356. }
  5357. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5358. name, ucode_raw->size);
  5359. /* Make sure that we got at least our header! */
  5360. if (ucode_raw->size < sizeof(*ucode)) {
  5361. IWL_ERROR("File size way too small!\n");
  5362. ret = -EINVAL;
  5363. goto err_release;
  5364. }
  5365. /* Data from ucode file: header followed by uCode images */
  5366. ucode = (void *)ucode_raw->data;
  5367. ver = le32_to_cpu(ucode->ver);
  5368. inst_size = le32_to_cpu(ucode->inst_size);
  5369. data_size = le32_to_cpu(ucode->data_size);
  5370. init_size = le32_to_cpu(ucode->init_size);
  5371. init_data_size = le32_to_cpu(ucode->init_data_size);
  5372. boot_size = le32_to_cpu(ucode->boot_size);
  5373. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5374. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5375. inst_size);
  5376. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5377. data_size);
  5378. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5379. init_size);
  5380. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5381. init_data_size);
  5382. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5383. boot_size);
  5384. /* Verify size of file vs. image size info in file's header */
  5385. if (ucode_raw->size < sizeof(*ucode) +
  5386. inst_size + data_size + init_size +
  5387. init_data_size + boot_size) {
  5388. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5389. (int)ucode_raw->size);
  5390. ret = -EINVAL;
  5391. goto err_release;
  5392. }
  5393. /* Verify that uCode images will fit in card's SRAM */
  5394. if (inst_size > IWL_MAX_INST_SIZE) {
  5395. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5396. inst_size);
  5397. ret = -EINVAL;
  5398. goto err_release;
  5399. }
  5400. if (data_size > IWL_MAX_DATA_SIZE) {
  5401. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5402. data_size);
  5403. ret = -EINVAL;
  5404. goto err_release;
  5405. }
  5406. if (init_size > IWL_MAX_INST_SIZE) {
  5407. IWL_DEBUG_INFO
  5408. ("uCode init instr len %d too large to fit in\n",
  5409. init_size);
  5410. ret = -EINVAL;
  5411. goto err_release;
  5412. }
  5413. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5414. IWL_DEBUG_INFO
  5415. ("uCode init data len %d too large to fit in\n",
  5416. init_data_size);
  5417. ret = -EINVAL;
  5418. goto err_release;
  5419. }
  5420. if (boot_size > IWL_MAX_BSM_SIZE) {
  5421. IWL_DEBUG_INFO
  5422. ("uCode boot instr len %d too large to fit in\n",
  5423. boot_size);
  5424. ret = -EINVAL;
  5425. goto err_release;
  5426. }
  5427. /* Allocate ucode buffers for card's bus-master loading ... */
  5428. /* Runtime instructions and 2 copies of data:
  5429. * 1) unmodified from disk
  5430. * 2) backup cache for save/restore during power-downs */
  5431. priv->ucode_code.len = inst_size;
  5432. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5433. priv->ucode_data.len = data_size;
  5434. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5435. priv->ucode_data_backup.len = data_size;
  5436. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5437. /* Initialization instructions and data */
  5438. if (init_size && init_data_size) {
  5439. priv->ucode_init.len = init_size;
  5440. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5441. priv->ucode_init_data.len = init_data_size;
  5442. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5443. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5444. goto err_pci_alloc;
  5445. }
  5446. /* Bootstrap (instructions only, no data) */
  5447. if (boot_size) {
  5448. priv->ucode_boot.len = boot_size;
  5449. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5450. if (!priv->ucode_boot.v_addr)
  5451. goto err_pci_alloc;
  5452. }
  5453. /* Copy images into buffers for card's bus-master reads ... */
  5454. /* Runtime instructions (first block of data in file) */
  5455. src = &ucode->data[0];
  5456. len = priv->ucode_code.len;
  5457. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5458. memcpy(priv->ucode_code.v_addr, src, len);
  5459. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5460. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5461. /* Runtime data (2nd block)
  5462. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5463. src = &ucode->data[inst_size];
  5464. len = priv->ucode_data.len;
  5465. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5466. memcpy(priv->ucode_data.v_addr, src, len);
  5467. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5468. /* Initialization instructions (3rd block) */
  5469. if (init_size) {
  5470. src = &ucode->data[inst_size + data_size];
  5471. len = priv->ucode_init.len;
  5472. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5473. len);
  5474. memcpy(priv->ucode_init.v_addr, src, len);
  5475. }
  5476. /* Initialization data (4th block) */
  5477. if (init_data_size) {
  5478. src = &ucode->data[inst_size + data_size + init_size];
  5479. len = priv->ucode_init_data.len;
  5480. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5481. len);
  5482. memcpy(priv->ucode_init_data.v_addr, src, len);
  5483. }
  5484. /* Bootstrap instructions (5th block) */
  5485. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5486. len = priv->ucode_boot.len;
  5487. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5488. memcpy(priv->ucode_boot.v_addr, src, len);
  5489. /* We have our copies now, allow OS release its copies */
  5490. release_firmware(ucode_raw);
  5491. return 0;
  5492. err_pci_alloc:
  5493. IWL_ERROR("failed to allocate pci memory\n");
  5494. ret = -ENOMEM;
  5495. iwl4965_dealloc_ucode_pci(priv);
  5496. err_release:
  5497. release_firmware(ucode_raw);
  5498. error:
  5499. return ret;
  5500. }
  5501. /**
  5502. * iwl4965_set_ucode_ptrs - Set uCode address location
  5503. *
  5504. * Tell initialization uCode where to find runtime uCode.
  5505. *
  5506. * BSM registers initially contain pointers to initialization uCode.
  5507. * We need to replace them to load runtime uCode inst and data,
  5508. * and to save runtime data when powering down.
  5509. */
  5510. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5511. {
  5512. dma_addr_t pinst;
  5513. dma_addr_t pdata;
  5514. int rc = 0;
  5515. unsigned long flags;
  5516. /* bits 35:4 for 4965 */
  5517. pinst = priv->ucode_code.p_addr >> 4;
  5518. pdata = priv->ucode_data_backup.p_addr >> 4;
  5519. spin_lock_irqsave(&priv->lock, flags);
  5520. rc = iwl4965_grab_nic_access(priv);
  5521. if (rc) {
  5522. spin_unlock_irqrestore(&priv->lock, flags);
  5523. return rc;
  5524. }
  5525. /* Tell bootstrap uCode where to find image to load */
  5526. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5527. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5528. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5529. priv->ucode_data.len);
  5530. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5531. * that all new ptr/size info is in place */
  5532. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5533. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5534. iwl4965_release_nic_access(priv);
  5535. spin_unlock_irqrestore(&priv->lock, flags);
  5536. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5537. return rc;
  5538. }
  5539. /**
  5540. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5541. *
  5542. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5543. *
  5544. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5545. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5546. * (3945 does not contain this data).
  5547. *
  5548. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5549. */
  5550. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5551. {
  5552. /* Check alive response for "valid" sign from uCode */
  5553. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5554. /* We had an error bringing up the hardware, so take it
  5555. * all the way back down so we can try again */
  5556. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5557. goto restart;
  5558. }
  5559. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5560. * This is a paranoid check, because we would not have gotten the
  5561. * "initialize" alive if code weren't properly loaded. */
  5562. if (iwl4965_verify_ucode(priv)) {
  5563. /* Runtime instruction load was bad;
  5564. * take it all the way back down so we can try again */
  5565. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5566. goto restart;
  5567. }
  5568. /* Calculate temperature */
  5569. priv->temperature = iwl4965_get_temperature(priv);
  5570. /* Send pointers to protocol/runtime uCode image ... init code will
  5571. * load and launch runtime uCode, which will send us another "Alive"
  5572. * notification. */
  5573. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5574. if (iwl4965_set_ucode_ptrs(priv)) {
  5575. /* Runtime instruction load won't happen;
  5576. * take it all the way back down so we can try again */
  5577. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5578. goto restart;
  5579. }
  5580. return;
  5581. restart:
  5582. queue_work(priv->workqueue, &priv->restart);
  5583. }
  5584. /**
  5585. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5586. * from protocol/runtime uCode (initialization uCode's
  5587. * Alive gets handled by iwl4965_init_alive_start()).
  5588. */
  5589. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5590. {
  5591. int rc = 0;
  5592. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5593. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5594. /* We had an error bringing up the hardware, so take it
  5595. * all the way back down so we can try again */
  5596. IWL_DEBUG_INFO("Alive failed.\n");
  5597. goto restart;
  5598. }
  5599. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5600. * This is a paranoid check, because we would not have gotten the
  5601. * "runtime" alive if code weren't properly loaded. */
  5602. if (iwl4965_verify_ucode(priv)) {
  5603. /* Runtime instruction load was bad;
  5604. * take it all the way back down so we can try again */
  5605. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5606. goto restart;
  5607. }
  5608. iwl4965_clear_stations_table(priv);
  5609. rc = iwl4965_alive_notify(priv);
  5610. if (rc) {
  5611. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5612. rc);
  5613. goto restart;
  5614. }
  5615. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5616. set_bit(STATUS_ALIVE, &priv->status);
  5617. /* Clear out the uCode error bit if it is set */
  5618. clear_bit(STATUS_FW_ERROR, &priv->status);
  5619. rc = iwl4965_init_channel_map(priv);
  5620. if (rc) {
  5621. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5622. return;
  5623. }
  5624. iwl4965_init_geos(priv);
  5625. if (iwl4965_is_rfkill(priv))
  5626. return;
  5627. if (!priv->mac80211_registered) {
  5628. /* Unlock so any user space entry points can call back into
  5629. * the driver without a deadlock... */
  5630. mutex_unlock(&priv->mutex);
  5631. iwl4965_rate_control_register(priv->hw);
  5632. rc = ieee80211_register_hw(priv->hw);
  5633. priv->hw->conf.beacon_int = 100;
  5634. mutex_lock(&priv->mutex);
  5635. if (rc) {
  5636. iwl4965_rate_control_unregister(priv->hw);
  5637. IWL_ERROR("Failed to register network "
  5638. "device (error %d)\n", rc);
  5639. return;
  5640. }
  5641. priv->mac80211_registered = 1;
  5642. iwl4965_reset_channel_flag(priv);
  5643. } else
  5644. ieee80211_start_queues(priv->hw);
  5645. priv->active_rate = priv->rates_mask;
  5646. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5647. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5648. if (iwl4965_is_associated(priv)) {
  5649. struct iwl4965_rxon_cmd *active_rxon =
  5650. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5651. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5652. sizeof(priv->staging_rxon));
  5653. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5654. } else {
  5655. /* Initialize our rx_config data */
  5656. iwl4965_connection_init_rx_config(priv);
  5657. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5658. }
  5659. /* Configure Bluetooth device coexistence support */
  5660. iwl4965_send_bt_config(priv);
  5661. /* Configure the adapter for unassociated operation */
  5662. iwl4965_commit_rxon(priv);
  5663. /* At this point, the NIC is initialized and operational */
  5664. priv->notif_missed_beacons = 0;
  5665. set_bit(STATUS_READY, &priv->status);
  5666. iwl4965_rf_kill_ct_config(priv);
  5667. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5668. if (priv->error_recovering)
  5669. iwl4965_error_recovery(priv);
  5670. return;
  5671. restart:
  5672. queue_work(priv->workqueue, &priv->restart);
  5673. }
  5674. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5675. static void __iwl4965_down(struct iwl4965_priv *priv)
  5676. {
  5677. unsigned long flags;
  5678. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5679. struct ieee80211_conf *conf = NULL;
  5680. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5681. conf = ieee80211_get_hw_conf(priv->hw);
  5682. if (!exit_pending)
  5683. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5684. iwl4965_clear_stations_table(priv);
  5685. /* Unblock any waiting calls */
  5686. wake_up_interruptible_all(&priv->wait_command_queue);
  5687. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5688. * exiting the module */
  5689. if (!exit_pending)
  5690. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5691. /* stop and reset the on-board processor */
  5692. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5693. /* tell the device to stop sending interrupts */
  5694. iwl4965_disable_interrupts(priv);
  5695. if (priv->mac80211_registered)
  5696. ieee80211_stop_queues(priv->hw);
  5697. /* If we have not previously called iwl4965_init() then
  5698. * clear all bits but the RF Kill and SUSPEND bits and return */
  5699. if (!iwl4965_is_init(priv)) {
  5700. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5701. STATUS_RF_KILL_HW |
  5702. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5703. STATUS_RF_KILL_SW |
  5704. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5705. STATUS_IN_SUSPEND;
  5706. goto exit;
  5707. }
  5708. /* ...otherwise clear out all the status bits but the RF Kill and
  5709. * SUSPEND bits and continue taking the NIC down. */
  5710. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5711. STATUS_RF_KILL_HW |
  5712. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5713. STATUS_RF_KILL_SW |
  5714. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5715. STATUS_IN_SUSPEND |
  5716. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5717. STATUS_FW_ERROR;
  5718. spin_lock_irqsave(&priv->lock, flags);
  5719. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5720. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5721. spin_unlock_irqrestore(&priv->lock, flags);
  5722. iwl4965_hw_txq_ctx_stop(priv);
  5723. iwl4965_hw_rxq_stop(priv);
  5724. spin_lock_irqsave(&priv->lock, flags);
  5725. if (!iwl4965_grab_nic_access(priv)) {
  5726. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5727. APMG_CLK_VAL_DMA_CLK_RQT);
  5728. iwl4965_release_nic_access(priv);
  5729. }
  5730. spin_unlock_irqrestore(&priv->lock, flags);
  5731. udelay(5);
  5732. iwl4965_hw_nic_stop_master(priv);
  5733. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5734. iwl4965_hw_nic_reset(priv);
  5735. exit:
  5736. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5737. if (priv->ibss_beacon)
  5738. dev_kfree_skb(priv->ibss_beacon);
  5739. priv->ibss_beacon = NULL;
  5740. /* clear out any free frames */
  5741. iwl4965_clear_free_frames(priv);
  5742. }
  5743. static void iwl4965_down(struct iwl4965_priv *priv)
  5744. {
  5745. mutex_lock(&priv->mutex);
  5746. __iwl4965_down(priv);
  5747. mutex_unlock(&priv->mutex);
  5748. iwl4965_cancel_deferred_work(priv);
  5749. }
  5750. #define MAX_HW_RESTARTS 5
  5751. static int __iwl4965_up(struct iwl4965_priv *priv)
  5752. {
  5753. DECLARE_MAC_BUF(mac);
  5754. int rc, i;
  5755. u32 hw_rf_kill = 0;
  5756. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5757. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5758. return -EIO;
  5759. }
  5760. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5761. IWL_WARNING("Radio disabled by SW RF kill (module "
  5762. "parameter)\n");
  5763. return 0;
  5764. }
  5765. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5766. IWL_ERROR("ucode not available for device bringup\n");
  5767. return -EIO;
  5768. }
  5769. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5770. rc = iwl4965_hw_nic_init(priv);
  5771. if (rc) {
  5772. IWL_ERROR("Unable to int nic\n");
  5773. return rc;
  5774. }
  5775. /* make sure rfkill handshake bits are cleared */
  5776. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5777. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5778. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5779. /* clear (again), then enable host interrupts */
  5780. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5781. iwl4965_enable_interrupts(priv);
  5782. /* really make sure rfkill handshake bits are cleared */
  5783. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5784. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5785. /* Copy original ucode data image from disk into backup cache.
  5786. * This will be used to initialize the on-board processor's
  5787. * data SRAM for a clean start when the runtime program first loads. */
  5788. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5789. priv->ucode_data.len);
  5790. /* If platform's RF_KILL switch is set to KILL,
  5791. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5792. * and getting things started */
  5793. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  5794. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5795. hw_rf_kill = 1;
  5796. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5797. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5798. return 0;
  5799. }
  5800. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5801. iwl4965_clear_stations_table(priv);
  5802. /* load bootstrap state machine,
  5803. * load bootstrap program into processor's memory,
  5804. * prepare to load the "initialize" uCode */
  5805. rc = iwl4965_load_bsm(priv);
  5806. if (rc) {
  5807. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5808. continue;
  5809. }
  5810. /* start card; "initialize" will load runtime ucode */
  5811. iwl4965_nic_start(priv);
  5812. /* MAC Address location in EEPROM is same for 3945/4965 */
  5813. get_eeprom_mac(priv, priv->mac_addr);
  5814. IWL_DEBUG_INFO("MAC address: %s\n",
  5815. print_mac(mac, priv->mac_addr));
  5816. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5817. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5818. return 0;
  5819. }
  5820. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5821. __iwl4965_down(priv);
  5822. /* tried to restart and config the device for as long as our
  5823. * patience could withstand */
  5824. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5825. return -EIO;
  5826. }
  5827. /*****************************************************************************
  5828. *
  5829. * Workqueue callbacks
  5830. *
  5831. *****************************************************************************/
  5832. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5833. {
  5834. struct iwl4965_priv *priv =
  5835. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5836. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5837. return;
  5838. mutex_lock(&priv->mutex);
  5839. iwl4965_init_alive_start(priv);
  5840. mutex_unlock(&priv->mutex);
  5841. }
  5842. static void iwl4965_bg_alive_start(struct work_struct *data)
  5843. {
  5844. struct iwl4965_priv *priv =
  5845. container_of(data, struct iwl4965_priv, alive_start.work);
  5846. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5847. return;
  5848. mutex_lock(&priv->mutex);
  5849. iwl4965_alive_start(priv);
  5850. mutex_unlock(&priv->mutex);
  5851. }
  5852. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5853. {
  5854. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5855. wake_up_interruptible(&priv->wait_command_queue);
  5856. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5857. return;
  5858. mutex_lock(&priv->mutex);
  5859. if (!iwl4965_is_rfkill(priv)) {
  5860. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5861. "HW and/or SW RF Kill no longer active, restarting "
  5862. "device\n");
  5863. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5864. queue_work(priv->workqueue, &priv->restart);
  5865. } else {
  5866. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5867. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5868. "disabled by SW switch\n");
  5869. else
  5870. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5871. "Kill switch must be turned off for "
  5872. "wireless networking to work.\n");
  5873. }
  5874. mutex_unlock(&priv->mutex);
  5875. }
  5876. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5877. static void iwl4965_bg_scan_check(struct work_struct *data)
  5878. {
  5879. struct iwl4965_priv *priv =
  5880. container_of(data, struct iwl4965_priv, scan_check.work);
  5881. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5882. return;
  5883. mutex_lock(&priv->mutex);
  5884. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5885. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5886. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5887. "Scan completion watchdog resetting adapter (%dms)\n",
  5888. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5889. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5890. iwl4965_send_scan_abort(priv);
  5891. }
  5892. mutex_unlock(&priv->mutex);
  5893. }
  5894. static void iwl4965_bg_request_scan(struct work_struct *data)
  5895. {
  5896. struct iwl4965_priv *priv =
  5897. container_of(data, struct iwl4965_priv, request_scan);
  5898. struct iwl4965_host_cmd cmd = {
  5899. .id = REPLY_SCAN_CMD,
  5900. .len = sizeof(struct iwl4965_scan_cmd),
  5901. .meta.flags = CMD_SIZE_HUGE,
  5902. };
  5903. int rc = 0;
  5904. struct iwl4965_scan_cmd *scan;
  5905. struct ieee80211_conf *conf = NULL;
  5906. u8 direct_mask;
  5907. int phymode;
  5908. conf = ieee80211_get_hw_conf(priv->hw);
  5909. mutex_lock(&priv->mutex);
  5910. if (!iwl4965_is_ready(priv)) {
  5911. IWL_WARNING("request scan called when driver not ready.\n");
  5912. goto done;
  5913. }
  5914. /* Make sure the scan wasn't cancelled before this queued work
  5915. * was given the chance to run... */
  5916. if (!test_bit(STATUS_SCANNING, &priv->status))
  5917. goto done;
  5918. /* This should never be called or scheduled if there is currently
  5919. * a scan active in the hardware. */
  5920. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5921. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5922. "Ignoring second request.\n");
  5923. rc = -EIO;
  5924. goto done;
  5925. }
  5926. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5927. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5928. goto done;
  5929. }
  5930. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5931. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5932. goto done;
  5933. }
  5934. if (iwl4965_is_rfkill(priv)) {
  5935. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5936. goto done;
  5937. }
  5938. if (!test_bit(STATUS_READY, &priv->status)) {
  5939. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5940. goto done;
  5941. }
  5942. if (!priv->scan_bands) {
  5943. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5944. goto done;
  5945. }
  5946. if (!priv->scan) {
  5947. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5948. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5949. if (!priv->scan) {
  5950. rc = -ENOMEM;
  5951. goto done;
  5952. }
  5953. }
  5954. scan = priv->scan;
  5955. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5956. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5957. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5958. if (iwl4965_is_associated(priv)) {
  5959. u16 interval = 0;
  5960. u32 extra;
  5961. u32 suspend_time = 100;
  5962. u32 scan_suspend_time = 100;
  5963. unsigned long flags;
  5964. IWL_DEBUG_INFO("Scanning while associated...\n");
  5965. spin_lock_irqsave(&priv->lock, flags);
  5966. interval = priv->beacon_int;
  5967. spin_unlock_irqrestore(&priv->lock, flags);
  5968. scan->suspend_time = 0;
  5969. scan->max_out_time = cpu_to_le32(200 * 1024);
  5970. if (!interval)
  5971. interval = suspend_time;
  5972. extra = (suspend_time / interval) << 22;
  5973. scan_suspend_time = (extra |
  5974. ((suspend_time % interval) * 1024));
  5975. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5976. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5977. scan_suspend_time, interval);
  5978. }
  5979. /* We should add the ability for user to lock to PASSIVE ONLY */
  5980. if (priv->one_direct_scan) {
  5981. IWL_DEBUG_SCAN
  5982. ("Kicking off one direct scan for '%s'\n",
  5983. iwl4965_escape_essid(priv->direct_ssid,
  5984. priv->direct_ssid_len));
  5985. scan->direct_scan[0].id = WLAN_EID_SSID;
  5986. scan->direct_scan[0].len = priv->direct_ssid_len;
  5987. memcpy(scan->direct_scan[0].ssid,
  5988. priv->direct_ssid, priv->direct_ssid_len);
  5989. direct_mask = 1;
  5990. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5991. scan->direct_scan[0].id = WLAN_EID_SSID;
  5992. scan->direct_scan[0].len = priv->essid_len;
  5993. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5994. direct_mask = 1;
  5995. } else
  5996. direct_mask = 0;
  5997. /* We don't build a direct scan probe request; the uCode will do
  5998. * that based on the direct_mask added to each channel entry */
  5999. scan->tx_cmd.len = cpu_to_le16(
  6000. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  6001. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  6002. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  6003. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  6004. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  6005. /* flags + rate selection */
  6006. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  6007. switch (priv->scan_bands) {
  6008. case 2:
  6009. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  6010. scan->tx_cmd.rate_n_flags =
  6011. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  6012. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  6013. scan->good_CRC_th = 0;
  6014. phymode = MODE_IEEE80211G;
  6015. break;
  6016. case 1:
  6017. scan->tx_cmd.rate_n_flags =
  6018. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  6019. RATE_MCS_ANT_B_MSK);
  6020. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  6021. phymode = MODE_IEEE80211A;
  6022. break;
  6023. default:
  6024. IWL_WARNING("Invalid scan band count\n");
  6025. goto done;
  6026. }
  6027. /* select Rx chains */
  6028. /* Force use of chains B and C (0x6) for scan Rx.
  6029. * Avoid A (0x1) because of its off-channel reception on A-band.
  6030. * MIMO is not used here, but value is required to make uCode happy. */
  6031. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  6032. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  6033. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  6034. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  6035. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  6036. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  6037. if (direct_mask)
  6038. IWL_DEBUG_SCAN
  6039. ("Initiating direct scan for %s.\n",
  6040. iwl4965_escape_essid(priv->essid, priv->essid_len));
  6041. else
  6042. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  6043. scan->channel_count =
  6044. iwl4965_get_channels_for_scan(
  6045. priv, phymode, 1, /* active */
  6046. direct_mask,
  6047. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  6048. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  6049. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  6050. cmd.data = scan;
  6051. scan->len = cpu_to_le16(cmd.len);
  6052. set_bit(STATUS_SCAN_HW, &priv->status);
  6053. rc = iwl4965_send_cmd_sync(priv, &cmd);
  6054. if (rc)
  6055. goto done;
  6056. queue_delayed_work(priv->workqueue, &priv->scan_check,
  6057. IWL_SCAN_CHECK_WATCHDOG);
  6058. mutex_unlock(&priv->mutex);
  6059. return;
  6060. done:
  6061. /* inform mac80211 scan aborted */
  6062. queue_work(priv->workqueue, &priv->scan_completed);
  6063. mutex_unlock(&priv->mutex);
  6064. }
  6065. static void iwl4965_bg_up(struct work_struct *data)
  6066. {
  6067. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  6068. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6069. return;
  6070. mutex_lock(&priv->mutex);
  6071. __iwl4965_up(priv);
  6072. mutex_unlock(&priv->mutex);
  6073. }
  6074. static void iwl4965_bg_restart(struct work_struct *data)
  6075. {
  6076. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  6077. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6078. return;
  6079. iwl4965_down(priv);
  6080. queue_work(priv->workqueue, &priv->up);
  6081. }
  6082. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  6083. {
  6084. struct iwl4965_priv *priv =
  6085. container_of(data, struct iwl4965_priv, rx_replenish);
  6086. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6087. return;
  6088. mutex_lock(&priv->mutex);
  6089. iwl4965_rx_replenish(priv);
  6090. mutex_unlock(&priv->mutex);
  6091. }
  6092. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6093. static void iwl4965_bg_post_associate(struct work_struct *data)
  6094. {
  6095. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  6096. post_associate.work);
  6097. int rc = 0;
  6098. struct ieee80211_conf *conf = NULL;
  6099. DECLARE_MAC_BUF(mac);
  6100. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6101. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  6102. return;
  6103. }
  6104. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  6105. priv->assoc_id,
  6106. print_mac(mac, priv->active_rxon.bssid_addr));
  6107. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6108. return;
  6109. mutex_lock(&priv->mutex);
  6110. if (!priv->interface_id || !priv->is_open) {
  6111. mutex_unlock(&priv->mutex);
  6112. return;
  6113. }
  6114. iwl4965_scan_cancel_timeout(priv, 200);
  6115. conf = ieee80211_get_hw_conf(priv->hw);
  6116. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6117. iwl4965_commit_rxon(priv);
  6118. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6119. iwl4965_setup_rxon_timing(priv);
  6120. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6121. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6122. if (rc)
  6123. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6124. "Attempting to continue.\n");
  6125. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6126. #ifdef CONFIG_IWL4965_HT
  6127. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  6128. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  6129. else {
  6130. priv->active_rate_ht[0] = 0;
  6131. priv->active_rate_ht[1] = 0;
  6132. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  6133. }
  6134. #endif /* CONFIG_IWL4965_HT*/
  6135. iwl4965_set_rxon_chain(priv);
  6136. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6137. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6138. priv->assoc_id, priv->beacon_int);
  6139. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6140. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6141. else
  6142. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6143. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6144. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6145. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6146. else
  6147. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6148. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6149. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6150. }
  6151. iwl4965_commit_rxon(priv);
  6152. switch (priv->iw_mode) {
  6153. case IEEE80211_IF_TYPE_STA:
  6154. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6155. break;
  6156. case IEEE80211_IF_TYPE_IBSS:
  6157. /* clear out the station table */
  6158. iwl4965_clear_stations_table(priv);
  6159. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6160. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6161. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6162. iwl4965_send_beacon_cmd(priv);
  6163. break;
  6164. default:
  6165. IWL_ERROR("%s Should not be called in %d mode\n",
  6166. __FUNCTION__, priv->iw_mode);
  6167. break;
  6168. }
  6169. iwl4965_sequence_reset(priv);
  6170. #ifdef CONFIG_IWL4965_SENSITIVITY
  6171. /* Enable Rx differential gain and sensitivity calibrations */
  6172. iwl4965_chain_noise_reset(priv);
  6173. priv->start_calib = 1;
  6174. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6175. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6176. priv->assoc_station_added = 1;
  6177. #ifdef CONFIG_IWL4965_QOS
  6178. iwl4965_activate_qos(priv, 0);
  6179. #endif /* CONFIG_IWL4965_QOS */
  6180. /* we have just associated, don't start scan too early */
  6181. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6182. mutex_unlock(&priv->mutex);
  6183. }
  6184. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6185. {
  6186. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6187. if (!iwl4965_is_ready(priv))
  6188. return;
  6189. mutex_lock(&priv->mutex);
  6190. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6191. iwl4965_send_scan_abort(priv);
  6192. mutex_unlock(&priv->mutex);
  6193. }
  6194. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6195. {
  6196. struct iwl4965_priv *priv =
  6197. container_of(work, struct iwl4965_priv, scan_completed);
  6198. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6199. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6200. return;
  6201. ieee80211_scan_completed(priv->hw);
  6202. /* Since setting the TXPOWER may have been deferred while
  6203. * performing the scan, fire one off */
  6204. mutex_lock(&priv->mutex);
  6205. iwl4965_hw_reg_send_txpower(priv);
  6206. mutex_unlock(&priv->mutex);
  6207. }
  6208. /*****************************************************************************
  6209. *
  6210. * mac80211 entry point functions
  6211. *
  6212. *****************************************************************************/
  6213. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6214. {
  6215. struct iwl4965_priv *priv = hw->priv;
  6216. IWL_DEBUG_MAC80211("enter\n");
  6217. /* we should be verifying the device is ready to be opened */
  6218. mutex_lock(&priv->mutex);
  6219. priv->is_open = 1;
  6220. if (!iwl4965_is_rfkill(priv))
  6221. ieee80211_start_queues(priv->hw);
  6222. mutex_unlock(&priv->mutex);
  6223. IWL_DEBUG_MAC80211("leave\n");
  6224. return 0;
  6225. }
  6226. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6227. {
  6228. struct iwl4965_priv *priv = hw->priv;
  6229. IWL_DEBUG_MAC80211("enter\n");
  6230. mutex_lock(&priv->mutex);
  6231. /* stop mac, cancel any scan request and clear
  6232. * RXON_FILTER_ASSOC_MSK BIT
  6233. */
  6234. priv->is_open = 0;
  6235. if (!iwl4965_is_ready_rf(priv)) {
  6236. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6237. mutex_unlock(&priv->mutex);
  6238. return;
  6239. }
  6240. iwl4965_scan_cancel_timeout(priv, 100);
  6241. cancel_delayed_work(&priv->post_associate);
  6242. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6243. iwl4965_commit_rxon(priv);
  6244. mutex_unlock(&priv->mutex);
  6245. IWL_DEBUG_MAC80211("leave\n");
  6246. }
  6247. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6248. struct ieee80211_tx_control *ctl)
  6249. {
  6250. struct iwl4965_priv *priv = hw->priv;
  6251. IWL_DEBUG_MAC80211("enter\n");
  6252. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6253. IWL_DEBUG_MAC80211("leave - monitor\n");
  6254. return -1;
  6255. }
  6256. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6257. ctl->tx_rate);
  6258. if (iwl4965_tx_skb(priv, skb, ctl))
  6259. dev_kfree_skb_any(skb);
  6260. IWL_DEBUG_MAC80211("leave\n");
  6261. return 0;
  6262. }
  6263. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6264. struct ieee80211_if_init_conf *conf)
  6265. {
  6266. struct iwl4965_priv *priv = hw->priv;
  6267. unsigned long flags;
  6268. DECLARE_MAC_BUF(mac);
  6269. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6270. if (priv->interface_id) {
  6271. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6272. return 0;
  6273. }
  6274. spin_lock_irqsave(&priv->lock, flags);
  6275. priv->interface_id = conf->if_id;
  6276. spin_unlock_irqrestore(&priv->lock, flags);
  6277. mutex_lock(&priv->mutex);
  6278. if (conf->mac_addr) {
  6279. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6280. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6281. }
  6282. iwl4965_set_mode(priv, conf->type);
  6283. IWL_DEBUG_MAC80211("leave\n");
  6284. mutex_unlock(&priv->mutex);
  6285. return 0;
  6286. }
  6287. /**
  6288. * iwl4965_mac_config - mac80211 config callback
  6289. *
  6290. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6291. * be set inappropriately and the driver currently sets the hardware up to
  6292. * use it whenever needed.
  6293. */
  6294. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6295. {
  6296. struct iwl4965_priv *priv = hw->priv;
  6297. const struct iwl4965_channel_info *ch_info;
  6298. unsigned long flags;
  6299. mutex_lock(&priv->mutex);
  6300. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6301. if (!iwl4965_is_ready(priv)) {
  6302. IWL_DEBUG_MAC80211("leave - not ready\n");
  6303. mutex_unlock(&priv->mutex);
  6304. return -EIO;
  6305. }
  6306. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6307. * what is exposed through include/ declarations */
  6308. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6309. test_bit(STATUS_SCANNING, &priv->status))) {
  6310. IWL_DEBUG_MAC80211("leave - scanning\n");
  6311. mutex_unlock(&priv->mutex);
  6312. return 0;
  6313. }
  6314. spin_lock_irqsave(&priv->lock, flags);
  6315. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6316. if (!is_channel_valid(ch_info)) {
  6317. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6318. conf->channel, conf->phymode);
  6319. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6320. spin_unlock_irqrestore(&priv->lock, flags);
  6321. mutex_unlock(&priv->mutex);
  6322. return -EINVAL;
  6323. }
  6324. #ifdef CONFIG_IWL4965_HT
  6325. /* if we are switching fron ht to 2.4 clear flags
  6326. * from any ht related info since 2.4 does not
  6327. * support ht */
  6328. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6329. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6330. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6331. #endif
  6332. )
  6333. priv->staging_rxon.flags = 0;
  6334. #endif /* CONFIG_IWL4965_HT */
  6335. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6336. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6337. /* The list of supported rates and rate mask can be different
  6338. * for each phymode; since the phymode may have changed, reset
  6339. * the rate mask to what mac80211 lists */
  6340. iwl4965_set_rate(priv);
  6341. spin_unlock_irqrestore(&priv->lock, flags);
  6342. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6343. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6344. iwl4965_hw_channel_switch(priv, conf->channel);
  6345. mutex_unlock(&priv->mutex);
  6346. return 0;
  6347. }
  6348. #endif
  6349. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6350. if (!conf->radio_enabled) {
  6351. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6352. mutex_unlock(&priv->mutex);
  6353. return 0;
  6354. }
  6355. if (iwl4965_is_rfkill(priv)) {
  6356. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6357. mutex_unlock(&priv->mutex);
  6358. return -EIO;
  6359. }
  6360. iwl4965_set_rate(priv);
  6361. if (memcmp(&priv->active_rxon,
  6362. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6363. iwl4965_commit_rxon(priv);
  6364. else
  6365. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6366. IWL_DEBUG_MAC80211("leave\n");
  6367. mutex_unlock(&priv->mutex);
  6368. return 0;
  6369. }
  6370. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6371. {
  6372. int rc = 0;
  6373. if (priv->status & STATUS_EXIT_PENDING)
  6374. return;
  6375. /* The following should be done only at AP bring up */
  6376. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6377. /* RXON - unassoc (to set timing command) */
  6378. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6379. iwl4965_commit_rxon(priv);
  6380. /* RXON Timing */
  6381. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6382. iwl4965_setup_rxon_timing(priv);
  6383. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6384. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6385. if (rc)
  6386. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6387. "Attempting to continue.\n");
  6388. iwl4965_set_rxon_chain(priv);
  6389. /* FIXME: what should be the assoc_id for AP? */
  6390. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6391. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6392. priv->staging_rxon.flags |=
  6393. RXON_FLG_SHORT_PREAMBLE_MSK;
  6394. else
  6395. priv->staging_rxon.flags &=
  6396. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6397. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6398. if (priv->assoc_capability &
  6399. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6400. priv->staging_rxon.flags |=
  6401. RXON_FLG_SHORT_SLOT_MSK;
  6402. else
  6403. priv->staging_rxon.flags &=
  6404. ~RXON_FLG_SHORT_SLOT_MSK;
  6405. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6406. priv->staging_rxon.flags &=
  6407. ~RXON_FLG_SHORT_SLOT_MSK;
  6408. }
  6409. /* restore RXON assoc */
  6410. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6411. iwl4965_commit_rxon(priv);
  6412. #ifdef CONFIG_IWL4965_QOS
  6413. iwl4965_activate_qos(priv, 1);
  6414. #endif
  6415. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6416. }
  6417. iwl4965_send_beacon_cmd(priv);
  6418. /* FIXME - we need to add code here to detect a totally new
  6419. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6420. * clear sta table, add BCAST sta... */
  6421. }
  6422. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6423. struct ieee80211_if_conf *conf)
  6424. {
  6425. struct iwl4965_priv *priv = hw->priv;
  6426. DECLARE_MAC_BUF(mac);
  6427. unsigned long flags;
  6428. int rc;
  6429. if (conf == NULL)
  6430. return -EIO;
  6431. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6432. (!conf->beacon || !conf->ssid_len)) {
  6433. IWL_DEBUG_MAC80211
  6434. ("Leaving in AP mode because HostAPD is not ready.\n");
  6435. return 0;
  6436. }
  6437. mutex_lock(&priv->mutex);
  6438. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6439. if (conf->bssid)
  6440. IWL_DEBUG_MAC80211("bssid: %s\n",
  6441. print_mac(mac, conf->bssid));
  6442. /*
  6443. * very dubious code was here; the probe filtering flag is never set:
  6444. *
  6445. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6446. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6447. */
  6448. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6449. IWL_DEBUG_MAC80211("leave - scanning\n");
  6450. mutex_unlock(&priv->mutex);
  6451. return 0;
  6452. }
  6453. if (priv->interface_id != if_id) {
  6454. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6455. mutex_unlock(&priv->mutex);
  6456. return 0;
  6457. }
  6458. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6459. if (!conf->bssid) {
  6460. conf->bssid = priv->mac_addr;
  6461. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6462. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6463. print_mac(mac, conf->bssid));
  6464. }
  6465. if (priv->ibss_beacon)
  6466. dev_kfree_skb(priv->ibss_beacon);
  6467. priv->ibss_beacon = conf->beacon;
  6468. }
  6469. if (iwl4965_is_rfkill(priv))
  6470. goto done;
  6471. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6472. !is_multicast_ether_addr(conf->bssid)) {
  6473. /* If there is currently a HW scan going on in the background
  6474. * then we need to cancel it else the RXON below will fail. */
  6475. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6476. IWL_WARNING("Aborted scan still in progress "
  6477. "after 100ms\n");
  6478. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6479. mutex_unlock(&priv->mutex);
  6480. return -EAGAIN;
  6481. }
  6482. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6483. /* TODO: Audit driver for usage of these members and see
  6484. * if mac80211 deprecates them (priv->bssid looks like it
  6485. * shouldn't be there, but I haven't scanned the IBSS code
  6486. * to verify) - jpk */
  6487. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6488. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6489. iwl4965_config_ap(priv);
  6490. else {
  6491. rc = iwl4965_commit_rxon(priv);
  6492. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6493. iwl4965_rxon_add_station(
  6494. priv, priv->active_rxon.bssid_addr, 1);
  6495. }
  6496. } else {
  6497. iwl4965_scan_cancel_timeout(priv, 100);
  6498. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6499. iwl4965_commit_rxon(priv);
  6500. }
  6501. done:
  6502. spin_lock_irqsave(&priv->lock, flags);
  6503. if (!conf->ssid_len)
  6504. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6505. else
  6506. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6507. priv->essid_len = conf->ssid_len;
  6508. spin_unlock_irqrestore(&priv->lock, flags);
  6509. IWL_DEBUG_MAC80211("leave\n");
  6510. mutex_unlock(&priv->mutex);
  6511. return 0;
  6512. }
  6513. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6514. unsigned int changed_flags,
  6515. unsigned int *total_flags,
  6516. int mc_count, struct dev_addr_list *mc_list)
  6517. {
  6518. /*
  6519. * XXX: dummy
  6520. * see also iwl4965_connection_init_rx_config
  6521. */
  6522. *total_flags = 0;
  6523. }
  6524. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6525. struct ieee80211_if_init_conf *conf)
  6526. {
  6527. struct iwl4965_priv *priv = hw->priv;
  6528. IWL_DEBUG_MAC80211("enter\n");
  6529. mutex_lock(&priv->mutex);
  6530. if (iwl4965_is_ready_rf(priv)) {
  6531. iwl4965_scan_cancel_timeout(priv, 100);
  6532. cancel_delayed_work(&priv->post_associate);
  6533. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6534. iwl4965_commit_rxon(priv);
  6535. }
  6536. if (priv->interface_id == conf->if_id) {
  6537. priv->interface_id = 0;
  6538. memset(priv->bssid, 0, ETH_ALEN);
  6539. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6540. priv->essid_len = 0;
  6541. }
  6542. mutex_unlock(&priv->mutex);
  6543. IWL_DEBUG_MAC80211("leave\n");
  6544. }
  6545. static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw,
  6546. u8 changes, int cts_protection, int preamble)
  6547. {
  6548. struct iwl4965_priv *priv = hw->priv;
  6549. if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
  6550. if (preamble == WLAN_ERP_PREAMBLE_SHORT)
  6551. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6552. else
  6553. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6554. }
  6555. if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
  6556. if (cts_protection && (priv->phymode != MODE_IEEE80211A))
  6557. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6558. else
  6559. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6560. }
  6561. if (iwl4965_is_associated(priv))
  6562. iwl4965_send_rxon_assoc(priv);
  6563. }
  6564. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6565. {
  6566. int rc = 0;
  6567. unsigned long flags;
  6568. struct iwl4965_priv *priv = hw->priv;
  6569. IWL_DEBUG_MAC80211("enter\n");
  6570. mutex_lock(&priv->mutex);
  6571. spin_lock_irqsave(&priv->lock, flags);
  6572. if (!iwl4965_is_ready_rf(priv)) {
  6573. rc = -EIO;
  6574. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6575. goto out_unlock;
  6576. }
  6577. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6578. rc = -EIO;
  6579. IWL_ERROR("ERROR: APs don't scan\n");
  6580. goto out_unlock;
  6581. }
  6582. /* we don't schedule scan within next_scan_jiffies period */
  6583. if (priv->next_scan_jiffies &&
  6584. time_after(priv->next_scan_jiffies, jiffies)) {
  6585. rc = -EAGAIN;
  6586. goto out_unlock;
  6587. }
  6588. /* if we just finished scan ask for delay */
  6589. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6590. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6591. rc = -EAGAIN;
  6592. goto out_unlock;
  6593. }
  6594. if (len) {
  6595. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6596. iwl4965_escape_essid(ssid, len), (int)len);
  6597. priv->one_direct_scan = 1;
  6598. priv->direct_ssid_len = (u8)
  6599. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6600. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6601. } else
  6602. priv->one_direct_scan = 0;
  6603. rc = iwl4965_scan_initiate(priv);
  6604. IWL_DEBUG_MAC80211("leave\n");
  6605. out_unlock:
  6606. spin_unlock_irqrestore(&priv->lock, flags);
  6607. mutex_unlock(&priv->mutex);
  6608. return rc;
  6609. }
  6610. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6611. const u8 *local_addr, const u8 *addr,
  6612. struct ieee80211_key_conf *key)
  6613. {
  6614. struct iwl4965_priv *priv = hw->priv;
  6615. DECLARE_MAC_BUF(mac);
  6616. int rc = 0;
  6617. u8 sta_id;
  6618. IWL_DEBUG_MAC80211("enter\n");
  6619. if (!iwl4965_param_hwcrypto) {
  6620. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6621. return -EOPNOTSUPP;
  6622. }
  6623. if (is_zero_ether_addr(addr))
  6624. /* only support pairwise keys */
  6625. return -EOPNOTSUPP;
  6626. sta_id = iwl4965_hw_find_station(priv, addr);
  6627. if (sta_id == IWL_INVALID_STATION) {
  6628. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6629. print_mac(mac, addr));
  6630. return -EINVAL;
  6631. }
  6632. mutex_lock(&priv->mutex);
  6633. iwl4965_scan_cancel_timeout(priv, 100);
  6634. switch (cmd) {
  6635. case SET_KEY:
  6636. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6637. if (!rc) {
  6638. iwl4965_set_rxon_hwcrypto(priv, 1);
  6639. iwl4965_commit_rxon(priv);
  6640. key->hw_key_idx = sta_id;
  6641. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6642. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6643. }
  6644. break;
  6645. case DISABLE_KEY:
  6646. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6647. if (!rc) {
  6648. iwl4965_set_rxon_hwcrypto(priv, 0);
  6649. iwl4965_commit_rxon(priv);
  6650. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6651. }
  6652. break;
  6653. default:
  6654. rc = -EINVAL;
  6655. }
  6656. IWL_DEBUG_MAC80211("leave\n");
  6657. mutex_unlock(&priv->mutex);
  6658. return rc;
  6659. }
  6660. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6661. const struct ieee80211_tx_queue_params *params)
  6662. {
  6663. struct iwl4965_priv *priv = hw->priv;
  6664. #ifdef CONFIG_IWL4965_QOS
  6665. unsigned long flags;
  6666. int q;
  6667. #endif /* CONFIG_IWL4965_QOS */
  6668. IWL_DEBUG_MAC80211("enter\n");
  6669. if (!iwl4965_is_ready_rf(priv)) {
  6670. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6671. return -EIO;
  6672. }
  6673. if (queue >= AC_NUM) {
  6674. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6675. return 0;
  6676. }
  6677. #ifdef CONFIG_IWL4965_QOS
  6678. if (!priv->qos_data.qos_enable) {
  6679. priv->qos_data.qos_active = 0;
  6680. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6681. return 0;
  6682. }
  6683. q = AC_NUM - 1 - queue;
  6684. spin_lock_irqsave(&priv->lock, flags);
  6685. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6686. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6687. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6688. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6689. cpu_to_le16((params->burst_time * 100));
  6690. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6691. priv->qos_data.qos_active = 1;
  6692. spin_unlock_irqrestore(&priv->lock, flags);
  6693. mutex_lock(&priv->mutex);
  6694. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6695. iwl4965_activate_qos(priv, 1);
  6696. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6697. iwl4965_activate_qos(priv, 0);
  6698. mutex_unlock(&priv->mutex);
  6699. #endif /*CONFIG_IWL4965_QOS */
  6700. IWL_DEBUG_MAC80211("leave\n");
  6701. return 0;
  6702. }
  6703. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6704. struct ieee80211_tx_queue_stats *stats)
  6705. {
  6706. struct iwl4965_priv *priv = hw->priv;
  6707. int i, avail;
  6708. struct iwl4965_tx_queue *txq;
  6709. struct iwl4965_queue *q;
  6710. unsigned long flags;
  6711. IWL_DEBUG_MAC80211("enter\n");
  6712. if (!iwl4965_is_ready_rf(priv)) {
  6713. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6714. return -EIO;
  6715. }
  6716. spin_lock_irqsave(&priv->lock, flags);
  6717. for (i = 0; i < AC_NUM; i++) {
  6718. txq = &priv->txq[i];
  6719. q = &txq->q;
  6720. avail = iwl4965_queue_space(q);
  6721. stats->data[i].len = q->n_window - avail;
  6722. stats->data[i].limit = q->n_window - q->high_mark;
  6723. stats->data[i].count = q->n_window;
  6724. }
  6725. spin_unlock_irqrestore(&priv->lock, flags);
  6726. IWL_DEBUG_MAC80211("leave\n");
  6727. return 0;
  6728. }
  6729. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6730. struct ieee80211_low_level_stats *stats)
  6731. {
  6732. IWL_DEBUG_MAC80211("enter\n");
  6733. IWL_DEBUG_MAC80211("leave\n");
  6734. return 0;
  6735. }
  6736. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6737. {
  6738. IWL_DEBUG_MAC80211("enter\n");
  6739. IWL_DEBUG_MAC80211("leave\n");
  6740. return 0;
  6741. }
  6742. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6743. {
  6744. struct iwl4965_priv *priv = hw->priv;
  6745. unsigned long flags;
  6746. mutex_lock(&priv->mutex);
  6747. IWL_DEBUG_MAC80211("enter\n");
  6748. priv->lq_mngr.lq_ready = 0;
  6749. #ifdef CONFIG_IWL4965_HT
  6750. spin_lock_irqsave(&priv->lock, flags);
  6751. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6752. spin_unlock_irqrestore(&priv->lock, flags);
  6753. #ifdef CONFIG_IWL4965_HT_AGG
  6754. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6755. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6756. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6757. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6758. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6759. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6760. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6761. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6762. #endif /*CONFIG_IWL4965_HT_AGG */
  6763. #endif /* CONFIG_IWL4965_HT */
  6764. #ifdef CONFIG_IWL4965_QOS
  6765. iwl4965_reset_qos(priv);
  6766. #endif
  6767. cancel_delayed_work(&priv->post_associate);
  6768. spin_lock_irqsave(&priv->lock, flags);
  6769. priv->assoc_id = 0;
  6770. priv->assoc_capability = 0;
  6771. priv->call_post_assoc_from_beacon = 0;
  6772. priv->assoc_station_added = 0;
  6773. /* new association get rid of ibss beacon skb */
  6774. if (priv->ibss_beacon)
  6775. dev_kfree_skb(priv->ibss_beacon);
  6776. priv->ibss_beacon = NULL;
  6777. priv->beacon_int = priv->hw->conf.beacon_int;
  6778. priv->timestamp1 = 0;
  6779. priv->timestamp0 = 0;
  6780. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6781. priv->beacon_int = 0;
  6782. spin_unlock_irqrestore(&priv->lock, flags);
  6783. if (!iwl4965_is_ready_rf(priv)) {
  6784. IWL_DEBUG_MAC80211("leave - not ready\n");
  6785. mutex_unlock(&priv->mutex);
  6786. return;
  6787. }
  6788. /* we are restarting association process
  6789. * clear RXON_FILTER_ASSOC_MSK bit
  6790. */
  6791. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6792. iwl4965_scan_cancel_timeout(priv, 100);
  6793. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6794. iwl4965_commit_rxon(priv);
  6795. }
  6796. /* Per mac80211.h: This is only used in IBSS mode... */
  6797. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6798. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6799. mutex_unlock(&priv->mutex);
  6800. return;
  6801. }
  6802. priv->only_active_channel = 0;
  6803. iwl4965_set_rate(priv);
  6804. mutex_unlock(&priv->mutex);
  6805. IWL_DEBUG_MAC80211("leave\n");
  6806. }
  6807. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6808. struct ieee80211_tx_control *control)
  6809. {
  6810. struct iwl4965_priv *priv = hw->priv;
  6811. unsigned long flags;
  6812. mutex_lock(&priv->mutex);
  6813. IWL_DEBUG_MAC80211("enter\n");
  6814. if (!iwl4965_is_ready_rf(priv)) {
  6815. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6816. mutex_unlock(&priv->mutex);
  6817. return -EIO;
  6818. }
  6819. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6820. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6821. mutex_unlock(&priv->mutex);
  6822. return -EIO;
  6823. }
  6824. spin_lock_irqsave(&priv->lock, flags);
  6825. if (priv->ibss_beacon)
  6826. dev_kfree_skb(priv->ibss_beacon);
  6827. priv->ibss_beacon = skb;
  6828. priv->assoc_id = 0;
  6829. IWL_DEBUG_MAC80211("leave\n");
  6830. spin_unlock_irqrestore(&priv->lock, flags);
  6831. #ifdef CONFIG_IWL4965_QOS
  6832. iwl4965_reset_qos(priv);
  6833. #endif
  6834. queue_work(priv->workqueue, &priv->post_associate.work);
  6835. mutex_unlock(&priv->mutex);
  6836. return 0;
  6837. }
  6838. #ifdef CONFIG_IWL4965_HT
  6839. union ht_cap_info {
  6840. struct {
  6841. u16 advanced_coding_cap :1;
  6842. u16 supported_chan_width_set :1;
  6843. u16 mimo_power_save_mode :2;
  6844. u16 green_field :1;
  6845. u16 short_GI20 :1;
  6846. u16 short_GI40 :1;
  6847. u16 tx_stbc :1;
  6848. u16 rx_stbc :1;
  6849. u16 beam_forming :1;
  6850. u16 delayed_ba :1;
  6851. u16 maximal_amsdu_size :1;
  6852. u16 cck_mode_at_40MHz :1;
  6853. u16 psmp_support :1;
  6854. u16 stbc_ctrl_frame_support :1;
  6855. u16 sig_txop_protection_support :1;
  6856. };
  6857. u16 val;
  6858. } __attribute__ ((packed));
  6859. union ht_param_info{
  6860. struct {
  6861. u8 max_rx_ampdu_factor :2;
  6862. u8 mpdu_density :3;
  6863. u8 reserved :3;
  6864. };
  6865. u8 val;
  6866. } __attribute__ ((packed));
  6867. union ht_exra_param_info {
  6868. struct {
  6869. u8 ext_chan_offset :2;
  6870. u8 tx_chan_width :1;
  6871. u8 rifs_mode :1;
  6872. u8 controlled_access_only :1;
  6873. u8 service_interval_granularity :3;
  6874. };
  6875. u8 val;
  6876. } __attribute__ ((packed));
  6877. union ht_operation_mode{
  6878. struct {
  6879. u16 op_mode :2;
  6880. u16 non_GF :1;
  6881. u16 reserved :13;
  6882. };
  6883. u16 val;
  6884. } __attribute__ ((packed));
  6885. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6886. struct ieee80211_ht_additional_info *ht_extra,
  6887. struct sta_ht_info *ht_info_ap,
  6888. struct sta_ht_info *ht_info)
  6889. {
  6890. union ht_cap_info cap;
  6891. union ht_operation_mode op_mode;
  6892. union ht_param_info param_info;
  6893. union ht_exra_param_info extra_param_info;
  6894. IWL_DEBUG_MAC80211("enter: \n");
  6895. if (!ht_info) {
  6896. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6897. return -1;
  6898. }
  6899. if (ht_cap) {
  6900. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6901. param_info.val = ht_cap->mac_ht_params_info;
  6902. ht_info->is_ht = 1;
  6903. if (cap.short_GI20)
  6904. ht_info->sgf |= 0x1;
  6905. if (cap.short_GI40)
  6906. ht_info->sgf |= 0x2;
  6907. ht_info->is_green_field = cap.green_field;
  6908. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6909. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6910. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6911. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6912. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6913. ht_info->mpdu_density = param_info.mpdu_density;
  6914. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6915. ht_cap->supported_mcs_set[0],
  6916. ht_cap->supported_mcs_set[1]);
  6917. if (ht_info_ap) {
  6918. ht_info->control_channel = ht_info_ap->control_channel;
  6919. ht_info->extension_chan_offset =
  6920. ht_info_ap->extension_chan_offset;
  6921. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6922. ht_info->operating_mode = ht_info_ap->operating_mode;
  6923. }
  6924. if (ht_extra) {
  6925. extra_param_info.val = ht_extra->ht_param;
  6926. ht_info->control_channel = ht_extra->control_chan;
  6927. ht_info->extension_chan_offset =
  6928. extra_param_info.ext_chan_offset;
  6929. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6930. op_mode.val = (u16)
  6931. le16_to_cpu(ht_extra->operation_mode);
  6932. ht_info->operating_mode = op_mode.op_mode;
  6933. IWL_DEBUG_MAC80211("control channel %d\n",
  6934. ht_extra->control_chan);
  6935. }
  6936. } else
  6937. ht_info->is_ht = 0;
  6938. IWL_DEBUG_MAC80211("leave\n");
  6939. return 0;
  6940. }
  6941. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6942. struct ieee80211_ht_capability *ht_cap,
  6943. struct ieee80211_ht_additional_info *ht_extra)
  6944. {
  6945. struct iwl4965_priv *priv = hw->priv;
  6946. int rs;
  6947. IWL_DEBUG_MAC80211("enter: \n");
  6948. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6949. iwl4965_set_rxon_chain(priv);
  6950. if (priv && priv->assoc_id &&
  6951. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6952. unsigned long flags;
  6953. spin_lock_irqsave(&priv->lock, flags);
  6954. if (priv->beacon_int)
  6955. queue_work(priv->workqueue, &priv->post_associate.work);
  6956. else
  6957. priv->call_post_assoc_from_beacon = 1;
  6958. spin_unlock_irqrestore(&priv->lock, flags);
  6959. }
  6960. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6961. ht_extra->control_chan);
  6962. return rs;
  6963. }
  6964. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6965. struct ieee80211_ht_capability *ht_cap,
  6966. u8 use_wide_chan)
  6967. {
  6968. union ht_cap_info cap;
  6969. union ht_param_info param_info;
  6970. memset(&cap, 0, sizeof(union ht_cap_info));
  6971. memset(&param_info, 0, sizeof(union ht_param_info));
  6972. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6973. cap.green_field = 1;
  6974. cap.short_GI20 = 1;
  6975. cap.short_GI40 = 1;
  6976. cap.supported_chan_width_set = use_wide_chan;
  6977. cap.mimo_power_save_mode = 0x3;
  6978. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6979. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6980. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6981. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6982. ht_cap->supported_mcs_set[0] = 0xff;
  6983. ht_cap->supported_mcs_set[1] = 0xff;
  6984. ht_cap->supported_mcs_set[4] =
  6985. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6986. }
  6987. static void iwl4965_mac_get_ht_capab(struct ieee80211_hw *hw,
  6988. struct ieee80211_ht_capability *ht_cap)
  6989. {
  6990. u8 use_wide_channel = 1;
  6991. struct iwl4965_priv *priv = hw->priv;
  6992. IWL_DEBUG_MAC80211("enter: \n");
  6993. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6994. use_wide_channel = 0;
  6995. /* no fat tx allowed on 2.4GHZ */
  6996. if (priv->phymode != MODE_IEEE80211A)
  6997. use_wide_channel = 0;
  6998. iwl4965_set_ht_capab(hw, ht_cap, use_wide_channel);
  6999. IWL_DEBUG_MAC80211("leave: \n");
  7000. }
  7001. #endif /*CONFIG_IWL4965_HT*/
  7002. /*****************************************************************************
  7003. *
  7004. * sysfs attributes
  7005. *
  7006. *****************************************************************************/
  7007. #ifdef CONFIG_IWL4965_DEBUG
  7008. /*
  7009. * The following adds a new attribute to the sysfs representation
  7010. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  7011. * used for controlling the debug level.
  7012. *
  7013. * See the level definitions in iwl for details.
  7014. */
  7015. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  7016. {
  7017. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  7018. }
  7019. static ssize_t store_debug_level(struct device_driver *d,
  7020. const char *buf, size_t count)
  7021. {
  7022. char *p = (char *)buf;
  7023. u32 val;
  7024. val = simple_strtoul(p, &p, 0);
  7025. if (p == buf)
  7026. printk(KERN_INFO DRV_NAME
  7027. ": %s is not in hex or decimal form.\n", buf);
  7028. else
  7029. iwl4965_debug_level = val;
  7030. return strnlen(buf, count);
  7031. }
  7032. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  7033. show_debug_level, store_debug_level);
  7034. #endif /* CONFIG_IWL4965_DEBUG */
  7035. static ssize_t show_rf_kill(struct device *d,
  7036. struct device_attribute *attr, char *buf)
  7037. {
  7038. /*
  7039. * 0 - RF kill not enabled
  7040. * 1 - SW based RF kill active (sysfs)
  7041. * 2 - HW based RF kill active
  7042. * 3 - Both HW and SW based RF kill active
  7043. */
  7044. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7045. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  7046. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  7047. return sprintf(buf, "%i\n", val);
  7048. }
  7049. static ssize_t store_rf_kill(struct device *d,
  7050. struct device_attribute *attr,
  7051. const char *buf, size_t count)
  7052. {
  7053. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7054. mutex_lock(&priv->mutex);
  7055. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  7056. mutex_unlock(&priv->mutex);
  7057. return count;
  7058. }
  7059. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  7060. static ssize_t show_temperature(struct device *d,
  7061. struct device_attribute *attr, char *buf)
  7062. {
  7063. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7064. if (!iwl4965_is_alive(priv))
  7065. return -EAGAIN;
  7066. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  7067. }
  7068. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  7069. static ssize_t show_rs_window(struct device *d,
  7070. struct device_attribute *attr,
  7071. char *buf)
  7072. {
  7073. struct iwl4965_priv *priv = d->driver_data;
  7074. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  7075. }
  7076. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  7077. static ssize_t show_tx_power(struct device *d,
  7078. struct device_attribute *attr, char *buf)
  7079. {
  7080. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7081. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  7082. }
  7083. static ssize_t store_tx_power(struct device *d,
  7084. struct device_attribute *attr,
  7085. const char *buf, size_t count)
  7086. {
  7087. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7088. char *p = (char *)buf;
  7089. u32 val;
  7090. val = simple_strtoul(p, &p, 10);
  7091. if (p == buf)
  7092. printk(KERN_INFO DRV_NAME
  7093. ": %s is not in decimal form.\n", buf);
  7094. else
  7095. iwl4965_hw_reg_set_txpower(priv, val);
  7096. return count;
  7097. }
  7098. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  7099. static ssize_t show_flags(struct device *d,
  7100. struct device_attribute *attr, char *buf)
  7101. {
  7102. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7103. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  7104. }
  7105. static ssize_t store_flags(struct device *d,
  7106. struct device_attribute *attr,
  7107. const char *buf, size_t count)
  7108. {
  7109. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7110. u32 flags = simple_strtoul(buf, NULL, 0);
  7111. mutex_lock(&priv->mutex);
  7112. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  7113. /* Cancel any currently running scans... */
  7114. if (iwl4965_scan_cancel_timeout(priv, 100))
  7115. IWL_WARNING("Could not cancel scan.\n");
  7116. else {
  7117. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  7118. flags);
  7119. priv->staging_rxon.flags = cpu_to_le32(flags);
  7120. iwl4965_commit_rxon(priv);
  7121. }
  7122. }
  7123. mutex_unlock(&priv->mutex);
  7124. return count;
  7125. }
  7126. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  7127. static ssize_t show_filter_flags(struct device *d,
  7128. struct device_attribute *attr, char *buf)
  7129. {
  7130. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7131. return sprintf(buf, "0x%04X\n",
  7132. le32_to_cpu(priv->active_rxon.filter_flags));
  7133. }
  7134. static ssize_t store_filter_flags(struct device *d,
  7135. struct device_attribute *attr,
  7136. const char *buf, size_t count)
  7137. {
  7138. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7139. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7140. mutex_lock(&priv->mutex);
  7141. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7142. /* Cancel any currently running scans... */
  7143. if (iwl4965_scan_cancel_timeout(priv, 100))
  7144. IWL_WARNING("Could not cancel scan.\n");
  7145. else {
  7146. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7147. "0x%04X\n", filter_flags);
  7148. priv->staging_rxon.filter_flags =
  7149. cpu_to_le32(filter_flags);
  7150. iwl4965_commit_rxon(priv);
  7151. }
  7152. }
  7153. mutex_unlock(&priv->mutex);
  7154. return count;
  7155. }
  7156. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7157. store_filter_flags);
  7158. static ssize_t show_tune(struct device *d,
  7159. struct device_attribute *attr, char *buf)
  7160. {
  7161. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7162. return sprintf(buf, "0x%04X\n",
  7163. (priv->phymode << 8) |
  7164. le16_to_cpu(priv->active_rxon.channel));
  7165. }
  7166. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7167. static ssize_t store_tune(struct device *d,
  7168. struct device_attribute *attr,
  7169. const char *buf, size_t count)
  7170. {
  7171. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7172. char *p = (char *)buf;
  7173. u16 tune = simple_strtoul(p, &p, 0);
  7174. u8 phymode = (tune >> 8) & 0xff;
  7175. u16 channel = tune & 0xff;
  7176. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7177. mutex_lock(&priv->mutex);
  7178. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7179. (priv->phymode != phymode)) {
  7180. const struct iwl4965_channel_info *ch_info;
  7181. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7182. if (!ch_info) {
  7183. IWL_WARNING("Requested invalid phymode/channel "
  7184. "combination: %d %d\n", phymode, channel);
  7185. mutex_unlock(&priv->mutex);
  7186. return -EINVAL;
  7187. }
  7188. /* Cancel any currently running scans... */
  7189. if (iwl4965_scan_cancel_timeout(priv, 100))
  7190. IWL_WARNING("Could not cancel scan.\n");
  7191. else {
  7192. IWL_DEBUG_INFO("Committing phymode and "
  7193. "rxon.channel = %d %d\n",
  7194. phymode, channel);
  7195. iwl4965_set_rxon_channel(priv, phymode, channel);
  7196. iwl4965_set_flags_for_phymode(priv, phymode);
  7197. iwl4965_set_rate(priv);
  7198. iwl4965_commit_rxon(priv);
  7199. }
  7200. }
  7201. mutex_unlock(&priv->mutex);
  7202. return count;
  7203. }
  7204. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7205. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7206. static ssize_t show_measurement(struct device *d,
  7207. struct device_attribute *attr, char *buf)
  7208. {
  7209. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7210. struct iwl4965_spectrum_notification measure_report;
  7211. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7212. u8 *data = (u8 *) & measure_report;
  7213. unsigned long flags;
  7214. spin_lock_irqsave(&priv->lock, flags);
  7215. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7216. spin_unlock_irqrestore(&priv->lock, flags);
  7217. return 0;
  7218. }
  7219. memcpy(&measure_report, &priv->measure_report, size);
  7220. priv->measurement_status = 0;
  7221. spin_unlock_irqrestore(&priv->lock, flags);
  7222. while (size && (PAGE_SIZE - len)) {
  7223. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7224. PAGE_SIZE - len, 1);
  7225. len = strlen(buf);
  7226. if (PAGE_SIZE - len)
  7227. buf[len++] = '\n';
  7228. ofs += 16;
  7229. size -= min(size, 16U);
  7230. }
  7231. return len;
  7232. }
  7233. static ssize_t store_measurement(struct device *d,
  7234. struct device_attribute *attr,
  7235. const char *buf, size_t count)
  7236. {
  7237. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7238. struct ieee80211_measurement_params params = {
  7239. .channel = le16_to_cpu(priv->active_rxon.channel),
  7240. .start_time = cpu_to_le64(priv->last_tsf),
  7241. .duration = cpu_to_le16(1),
  7242. };
  7243. u8 type = IWL_MEASURE_BASIC;
  7244. u8 buffer[32];
  7245. u8 channel;
  7246. if (count) {
  7247. char *p = buffer;
  7248. strncpy(buffer, buf, min(sizeof(buffer), count));
  7249. channel = simple_strtoul(p, NULL, 0);
  7250. if (channel)
  7251. params.channel = channel;
  7252. p = buffer;
  7253. while (*p && *p != ' ')
  7254. p++;
  7255. if (*p)
  7256. type = simple_strtoul(p + 1, NULL, 0);
  7257. }
  7258. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7259. "channel %d (for '%s')\n", type, params.channel, buf);
  7260. iwl4965_get_measurement(priv, &params, type);
  7261. return count;
  7262. }
  7263. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7264. show_measurement, store_measurement);
  7265. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7266. static ssize_t store_retry_rate(struct device *d,
  7267. struct device_attribute *attr,
  7268. const char *buf, size_t count)
  7269. {
  7270. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7271. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7272. if (priv->retry_rate <= 0)
  7273. priv->retry_rate = 1;
  7274. return count;
  7275. }
  7276. static ssize_t show_retry_rate(struct device *d,
  7277. struct device_attribute *attr, char *buf)
  7278. {
  7279. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7280. return sprintf(buf, "%d", priv->retry_rate);
  7281. }
  7282. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7283. store_retry_rate);
  7284. static ssize_t store_power_level(struct device *d,
  7285. struct device_attribute *attr,
  7286. const char *buf, size_t count)
  7287. {
  7288. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7289. int rc;
  7290. int mode;
  7291. mode = simple_strtoul(buf, NULL, 0);
  7292. mutex_lock(&priv->mutex);
  7293. if (!iwl4965_is_ready(priv)) {
  7294. rc = -EAGAIN;
  7295. goto out;
  7296. }
  7297. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7298. mode = IWL_POWER_AC;
  7299. else
  7300. mode |= IWL_POWER_ENABLED;
  7301. if (mode != priv->power_mode) {
  7302. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7303. if (rc) {
  7304. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7305. goto out;
  7306. }
  7307. priv->power_mode = mode;
  7308. }
  7309. rc = count;
  7310. out:
  7311. mutex_unlock(&priv->mutex);
  7312. return rc;
  7313. }
  7314. #define MAX_WX_STRING 80
  7315. /* Values are in microsecond */
  7316. static const s32 timeout_duration[] = {
  7317. 350000,
  7318. 250000,
  7319. 75000,
  7320. 37000,
  7321. 25000,
  7322. };
  7323. static const s32 period_duration[] = {
  7324. 400000,
  7325. 700000,
  7326. 1000000,
  7327. 1000000,
  7328. 1000000
  7329. };
  7330. static ssize_t show_power_level(struct device *d,
  7331. struct device_attribute *attr, char *buf)
  7332. {
  7333. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7334. int level = IWL_POWER_LEVEL(priv->power_mode);
  7335. char *p = buf;
  7336. p += sprintf(p, "%d ", level);
  7337. switch (level) {
  7338. case IWL_POWER_MODE_CAM:
  7339. case IWL_POWER_AC:
  7340. p += sprintf(p, "(AC)");
  7341. break;
  7342. case IWL_POWER_BATTERY:
  7343. p += sprintf(p, "(BATTERY)");
  7344. break;
  7345. default:
  7346. p += sprintf(p,
  7347. "(Timeout %dms, Period %dms)",
  7348. timeout_duration[level - 1] / 1000,
  7349. period_duration[level - 1] / 1000);
  7350. }
  7351. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7352. p += sprintf(p, " OFF\n");
  7353. else
  7354. p += sprintf(p, " \n");
  7355. return (p - buf + 1);
  7356. }
  7357. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7358. store_power_level);
  7359. static ssize_t show_channels(struct device *d,
  7360. struct device_attribute *attr, char *buf)
  7361. {
  7362. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7363. int len = 0, i;
  7364. struct ieee80211_channel *channels = NULL;
  7365. const struct ieee80211_hw_mode *hw_mode = NULL;
  7366. int count = 0;
  7367. if (!iwl4965_is_ready(priv))
  7368. return -EAGAIN;
  7369. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7370. if (!hw_mode)
  7371. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7372. if (hw_mode) {
  7373. channels = hw_mode->channels;
  7374. count = hw_mode->num_channels;
  7375. }
  7376. len +=
  7377. sprintf(&buf[len],
  7378. "Displaying %d channels in 2.4GHz band "
  7379. "(802.11bg):\n", count);
  7380. for (i = 0; i < count; i++)
  7381. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7382. channels[i].chan,
  7383. channels[i].power_level,
  7384. channels[i].
  7385. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7386. " (IEEE 802.11h required)" : "",
  7387. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7388. || (channels[i].
  7389. flag &
  7390. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7391. ", IBSS",
  7392. channels[i].
  7393. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7394. "active/passive" : "passive only");
  7395. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7396. if (hw_mode) {
  7397. channels = hw_mode->channels;
  7398. count = hw_mode->num_channels;
  7399. } else {
  7400. channels = NULL;
  7401. count = 0;
  7402. }
  7403. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7404. "(802.11a):\n", count);
  7405. for (i = 0; i < count; i++)
  7406. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7407. channels[i].chan,
  7408. channels[i].power_level,
  7409. channels[i].
  7410. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7411. " (IEEE 802.11h required)" : "",
  7412. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7413. || (channels[i].
  7414. flag &
  7415. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7416. ", IBSS",
  7417. channels[i].
  7418. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7419. "active/passive" : "passive only");
  7420. return len;
  7421. }
  7422. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7423. static ssize_t show_statistics(struct device *d,
  7424. struct device_attribute *attr, char *buf)
  7425. {
  7426. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7427. u32 size = sizeof(struct iwl4965_notif_statistics);
  7428. u32 len = 0, ofs = 0;
  7429. u8 *data = (u8 *) & priv->statistics;
  7430. int rc = 0;
  7431. if (!iwl4965_is_alive(priv))
  7432. return -EAGAIN;
  7433. mutex_lock(&priv->mutex);
  7434. rc = iwl4965_send_statistics_request(priv);
  7435. mutex_unlock(&priv->mutex);
  7436. if (rc) {
  7437. len = sprintf(buf,
  7438. "Error sending statistics request: 0x%08X\n", rc);
  7439. return len;
  7440. }
  7441. while (size && (PAGE_SIZE - len)) {
  7442. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7443. PAGE_SIZE - len, 1);
  7444. len = strlen(buf);
  7445. if (PAGE_SIZE - len)
  7446. buf[len++] = '\n';
  7447. ofs += 16;
  7448. size -= min(size, 16U);
  7449. }
  7450. return len;
  7451. }
  7452. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7453. static ssize_t show_antenna(struct device *d,
  7454. struct device_attribute *attr, char *buf)
  7455. {
  7456. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7457. if (!iwl4965_is_alive(priv))
  7458. return -EAGAIN;
  7459. return sprintf(buf, "%d\n", priv->antenna);
  7460. }
  7461. static ssize_t store_antenna(struct device *d,
  7462. struct device_attribute *attr,
  7463. const char *buf, size_t count)
  7464. {
  7465. int ant;
  7466. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7467. if (count == 0)
  7468. return 0;
  7469. if (sscanf(buf, "%1i", &ant) != 1) {
  7470. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7471. return count;
  7472. }
  7473. if ((ant >= 0) && (ant <= 2)) {
  7474. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7475. priv->antenna = (enum iwl4965_antenna)ant;
  7476. } else
  7477. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7478. return count;
  7479. }
  7480. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7481. static ssize_t show_status(struct device *d,
  7482. struct device_attribute *attr, char *buf)
  7483. {
  7484. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7485. if (!iwl4965_is_alive(priv))
  7486. return -EAGAIN;
  7487. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7488. }
  7489. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7490. static ssize_t dump_error_log(struct device *d,
  7491. struct device_attribute *attr,
  7492. const char *buf, size_t count)
  7493. {
  7494. char *p = (char *)buf;
  7495. if (p[0] == '1')
  7496. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7497. return strnlen(buf, count);
  7498. }
  7499. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7500. static ssize_t dump_event_log(struct device *d,
  7501. struct device_attribute *attr,
  7502. const char *buf, size_t count)
  7503. {
  7504. char *p = (char *)buf;
  7505. if (p[0] == '1')
  7506. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7507. return strnlen(buf, count);
  7508. }
  7509. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7510. /*****************************************************************************
  7511. *
  7512. * driver setup and teardown
  7513. *
  7514. *****************************************************************************/
  7515. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7516. {
  7517. priv->workqueue = create_workqueue(DRV_NAME);
  7518. init_waitqueue_head(&priv->wait_command_queue);
  7519. INIT_WORK(&priv->up, iwl4965_bg_up);
  7520. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7521. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7522. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7523. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7524. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7525. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7526. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7527. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7528. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7529. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7530. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7531. iwl4965_hw_setup_deferred_work(priv);
  7532. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7533. iwl4965_irq_tasklet, (unsigned long)priv);
  7534. }
  7535. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7536. {
  7537. iwl4965_hw_cancel_deferred_work(priv);
  7538. cancel_delayed_work_sync(&priv->init_alive_start);
  7539. cancel_delayed_work(&priv->scan_check);
  7540. cancel_delayed_work(&priv->alive_start);
  7541. cancel_delayed_work(&priv->post_associate);
  7542. cancel_work_sync(&priv->beacon_update);
  7543. }
  7544. static struct attribute *iwl4965_sysfs_entries[] = {
  7545. &dev_attr_antenna.attr,
  7546. &dev_attr_channels.attr,
  7547. &dev_attr_dump_errors.attr,
  7548. &dev_attr_dump_events.attr,
  7549. &dev_attr_flags.attr,
  7550. &dev_attr_filter_flags.attr,
  7551. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7552. &dev_attr_measurement.attr,
  7553. #endif
  7554. &dev_attr_power_level.attr,
  7555. &dev_attr_retry_rate.attr,
  7556. &dev_attr_rf_kill.attr,
  7557. &dev_attr_rs_window.attr,
  7558. &dev_attr_statistics.attr,
  7559. &dev_attr_status.attr,
  7560. &dev_attr_temperature.attr,
  7561. &dev_attr_tune.attr,
  7562. &dev_attr_tx_power.attr,
  7563. NULL
  7564. };
  7565. static struct attribute_group iwl4965_attribute_group = {
  7566. .name = NULL, /* put in device directory */
  7567. .attrs = iwl4965_sysfs_entries,
  7568. };
  7569. static struct ieee80211_ops iwl4965_hw_ops = {
  7570. .tx = iwl4965_mac_tx,
  7571. .start = iwl4965_mac_start,
  7572. .stop = iwl4965_mac_stop,
  7573. .add_interface = iwl4965_mac_add_interface,
  7574. .remove_interface = iwl4965_mac_remove_interface,
  7575. .config = iwl4965_mac_config,
  7576. .config_interface = iwl4965_mac_config_interface,
  7577. .configure_filter = iwl4965_configure_filter,
  7578. .set_key = iwl4965_mac_set_key,
  7579. .get_stats = iwl4965_mac_get_stats,
  7580. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7581. .conf_tx = iwl4965_mac_conf_tx,
  7582. .get_tsf = iwl4965_mac_get_tsf,
  7583. .reset_tsf = iwl4965_mac_reset_tsf,
  7584. .beacon_update = iwl4965_mac_beacon_update,
  7585. .erp_ie_changed = iwl4965_mac_erp_ie_changed,
  7586. #ifdef CONFIG_IWL4965_HT
  7587. .conf_ht = iwl4965_mac_conf_ht,
  7588. .get_ht_capab = iwl4965_mac_get_ht_capab,
  7589. #ifdef CONFIG_IWL4965_HT_AGG
  7590. .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
  7591. .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
  7592. .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start,
  7593. .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop,
  7594. #endif /* CONFIG_IWL4965_HT_AGG */
  7595. #endif /* CONFIG_IWL4965_HT */
  7596. .hw_scan = iwl4965_mac_hw_scan
  7597. };
  7598. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7599. {
  7600. int err = 0;
  7601. struct iwl4965_priv *priv;
  7602. struct ieee80211_hw *hw;
  7603. int i;
  7604. /* Disabling hardware scan means that mac80211 will perform scans
  7605. * "the hard way", rather than using device's scan. */
  7606. if (iwl4965_param_disable_hw_scan) {
  7607. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7608. iwl4965_hw_ops.hw_scan = NULL;
  7609. }
  7610. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7611. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7612. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7613. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7614. err = -EINVAL;
  7615. goto out;
  7616. }
  7617. /* mac80211 allocates memory for this device instance, including
  7618. * space for this driver's private structure */
  7619. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7620. if (hw == NULL) {
  7621. IWL_ERROR("Can not allocate network device\n");
  7622. err = -ENOMEM;
  7623. goto out;
  7624. }
  7625. SET_IEEE80211_DEV(hw, &pdev->dev);
  7626. hw->rate_control_algorithm = "iwl-4965-rs";
  7627. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7628. priv = hw->priv;
  7629. priv->hw = hw;
  7630. priv->pci_dev = pdev;
  7631. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7632. #ifdef CONFIG_IWL4965_DEBUG
  7633. iwl4965_debug_level = iwl4965_param_debug;
  7634. atomic_set(&priv->restrict_refcnt, 0);
  7635. #endif
  7636. priv->retry_rate = 1;
  7637. priv->ibss_beacon = NULL;
  7638. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7639. * the range of signal quality values that we'll provide.
  7640. * Negative values for level/noise indicate that we'll provide dBm.
  7641. * For WE, at least, non-0 values here *enable* display of values
  7642. * in app (iwconfig). */
  7643. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7644. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7645. hw->max_signal = 100; /* link quality indication (%) */
  7646. /* Tell mac80211 our Tx characteristics */
  7647. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7648. /* Default value; 4 EDCA QOS priorities */
  7649. hw->queues = 4;
  7650. #ifdef CONFIG_IWL4965_HT
  7651. #ifdef CONFIG_IWL4965_HT_AGG
  7652. /* Enhanced value; more queues, to support 11n aggregation */
  7653. hw->queues = 16;
  7654. #endif /* CONFIG_IWL4965_HT_AGG */
  7655. #endif /* CONFIG_IWL4965_HT */
  7656. spin_lock_init(&priv->lock);
  7657. spin_lock_init(&priv->power_data.lock);
  7658. spin_lock_init(&priv->sta_lock);
  7659. spin_lock_init(&priv->hcmd_lock);
  7660. spin_lock_init(&priv->lq_mngr.lock);
  7661. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7662. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7663. INIT_LIST_HEAD(&priv->free_frames);
  7664. mutex_init(&priv->mutex);
  7665. if (pci_enable_device(pdev)) {
  7666. err = -ENODEV;
  7667. goto out_ieee80211_free_hw;
  7668. }
  7669. pci_set_master(pdev);
  7670. /* Clear the driver's (not device's) station table */
  7671. iwl4965_clear_stations_table(priv);
  7672. priv->data_retry_limit = -1;
  7673. priv->ieee_channels = NULL;
  7674. priv->ieee_rates = NULL;
  7675. priv->phymode = -1;
  7676. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7677. if (!err)
  7678. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7679. if (err) {
  7680. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7681. goto out_pci_disable_device;
  7682. }
  7683. pci_set_drvdata(pdev, priv);
  7684. err = pci_request_regions(pdev, DRV_NAME);
  7685. if (err)
  7686. goto out_pci_disable_device;
  7687. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7688. * PCI Tx retries from interfering with C3 CPU state */
  7689. pci_write_config_byte(pdev, 0x41, 0x00);
  7690. priv->hw_base = pci_iomap(pdev, 0, 0);
  7691. if (!priv->hw_base) {
  7692. err = -ENODEV;
  7693. goto out_pci_release_regions;
  7694. }
  7695. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7696. (unsigned long long) pci_resource_len(pdev, 0));
  7697. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7698. /* Initialize module parameter values here */
  7699. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7700. if (iwl4965_param_disable) {
  7701. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7702. IWL_DEBUG_INFO("Radio disabled.\n");
  7703. }
  7704. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7705. priv->ps_mode = 0;
  7706. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7707. priv->is_ht_enabled = 1;
  7708. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7709. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7710. priv->ps_mode = IWL_MIMO_PS_NONE;
  7711. /* Choose which receivers/antennas to use */
  7712. iwl4965_set_rxon_chain(priv);
  7713. printk(KERN_INFO DRV_NAME
  7714. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7715. /* Device-specific setup */
  7716. if (iwl4965_hw_set_hw_setting(priv)) {
  7717. IWL_ERROR("failed to set hw settings\n");
  7718. mutex_unlock(&priv->mutex);
  7719. goto out_iounmap;
  7720. }
  7721. #ifdef CONFIG_IWL4965_QOS
  7722. if (iwl4965_param_qos_enable)
  7723. priv->qos_data.qos_enable = 1;
  7724. iwl4965_reset_qos(priv);
  7725. priv->qos_data.qos_active = 0;
  7726. priv->qos_data.qos_cap.val = 0;
  7727. #endif /* CONFIG_IWL4965_QOS */
  7728. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7729. iwl4965_setup_deferred_work(priv);
  7730. iwl4965_setup_rx_handlers(priv);
  7731. priv->rates_mask = IWL_RATES_MASK;
  7732. /* If power management is turned on, default to AC mode */
  7733. priv->power_mode = IWL_POWER_AC;
  7734. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7735. iwl4965_disable_interrupts(priv);
  7736. pci_enable_msi(pdev);
  7737. err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
  7738. if (err) {
  7739. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7740. goto out_disable_msi;
  7741. }
  7742. mutex_lock(&priv->mutex);
  7743. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7744. if (err) {
  7745. IWL_ERROR("failed to create sysfs device attributes\n");
  7746. mutex_unlock(&priv->mutex);
  7747. goto out_release_irq;
  7748. }
  7749. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7750. * ucode filename and max sizes are card-specific. */
  7751. err = iwl4965_read_ucode(priv);
  7752. if (err) {
  7753. IWL_ERROR("Could not read microcode: %d\n", err);
  7754. mutex_unlock(&priv->mutex);
  7755. goto out_pci_alloc;
  7756. }
  7757. mutex_unlock(&priv->mutex);
  7758. IWL_DEBUG_INFO("Queueing UP work.\n");
  7759. queue_work(priv->workqueue, &priv->up);
  7760. return 0;
  7761. out_pci_alloc:
  7762. iwl4965_dealloc_ucode_pci(priv);
  7763. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7764. out_release_irq:
  7765. free_irq(pdev->irq, priv);
  7766. out_disable_msi:
  7767. pci_disable_msi(pdev);
  7768. destroy_workqueue(priv->workqueue);
  7769. priv->workqueue = NULL;
  7770. iwl4965_unset_hw_setting(priv);
  7771. out_iounmap:
  7772. pci_iounmap(pdev, priv->hw_base);
  7773. out_pci_release_regions:
  7774. pci_release_regions(pdev);
  7775. out_pci_disable_device:
  7776. pci_disable_device(pdev);
  7777. pci_set_drvdata(pdev, NULL);
  7778. out_ieee80211_free_hw:
  7779. ieee80211_free_hw(priv->hw);
  7780. out:
  7781. return err;
  7782. }
  7783. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7784. {
  7785. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7786. struct list_head *p, *q;
  7787. int i;
  7788. if (!priv)
  7789. return;
  7790. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7791. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7792. iwl4965_down(priv);
  7793. /* Free MAC hash list for ADHOC */
  7794. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7795. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7796. list_del(p);
  7797. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7798. }
  7799. }
  7800. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7801. iwl4965_dealloc_ucode_pci(priv);
  7802. if (priv->rxq.bd)
  7803. iwl4965_rx_queue_free(priv, &priv->rxq);
  7804. iwl4965_hw_txq_ctx_free(priv);
  7805. iwl4965_unset_hw_setting(priv);
  7806. iwl4965_clear_stations_table(priv);
  7807. if (priv->mac80211_registered) {
  7808. ieee80211_unregister_hw(priv->hw);
  7809. iwl4965_rate_control_unregister(priv->hw);
  7810. }
  7811. /*netif_stop_queue(dev); */
  7812. flush_workqueue(priv->workqueue);
  7813. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7814. * priv->workqueue... so we can't take down the workqueue
  7815. * until now... */
  7816. destroy_workqueue(priv->workqueue);
  7817. priv->workqueue = NULL;
  7818. free_irq(pdev->irq, priv);
  7819. pci_disable_msi(pdev);
  7820. pci_iounmap(pdev, priv->hw_base);
  7821. pci_release_regions(pdev);
  7822. pci_disable_device(pdev);
  7823. pci_set_drvdata(pdev, NULL);
  7824. kfree(priv->channel_info);
  7825. kfree(priv->ieee_channels);
  7826. kfree(priv->ieee_rates);
  7827. if (priv->ibss_beacon)
  7828. dev_kfree_skb(priv->ibss_beacon);
  7829. ieee80211_free_hw(priv->hw);
  7830. }
  7831. #ifdef CONFIG_PM
  7832. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7833. {
  7834. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7835. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7836. /* Take down the device; powers it off, etc. */
  7837. iwl4965_down(priv);
  7838. if (priv->mac80211_registered)
  7839. ieee80211_stop_queues(priv->hw);
  7840. pci_save_state(pdev);
  7841. pci_disable_device(pdev);
  7842. pci_set_power_state(pdev, PCI_D3hot);
  7843. return 0;
  7844. }
  7845. static void iwl4965_resume(struct iwl4965_priv *priv)
  7846. {
  7847. unsigned long flags;
  7848. /* The following it a temporary work around due to the
  7849. * suspend / resume not fully initializing the NIC correctly.
  7850. * Without all of the following, resume will not attempt to take
  7851. * down the NIC (it shouldn't really need to) and will just try
  7852. * and bring the NIC back up. However that fails during the
  7853. * ucode verification process. This then causes iwl4965_down to be
  7854. * called *after* iwl4965_hw_nic_init() has succeeded -- which
  7855. * then lets the next init sequence succeed. So, we've
  7856. * replicated all of that NIC init code here... */
  7857. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7858. iwl4965_hw_nic_init(priv);
  7859. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7860. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7861. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7862. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7863. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7864. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7865. /* tell the device to stop sending interrupts */
  7866. iwl4965_disable_interrupts(priv);
  7867. spin_lock_irqsave(&priv->lock, flags);
  7868. iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7869. if (!iwl4965_grab_nic_access(priv)) {
  7870. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  7871. APMG_CLK_VAL_DMA_CLK_RQT);
  7872. iwl4965_release_nic_access(priv);
  7873. }
  7874. spin_unlock_irqrestore(&priv->lock, flags);
  7875. udelay(5);
  7876. iwl4965_hw_nic_reset(priv);
  7877. /* Bring the device back up */
  7878. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7879. queue_work(priv->workqueue, &priv->up);
  7880. }
  7881. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7882. {
  7883. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7884. int err;
  7885. printk(KERN_INFO "Coming out of suspend...\n");
  7886. pci_set_power_state(pdev, PCI_D0);
  7887. err = pci_enable_device(pdev);
  7888. pci_restore_state(pdev);
  7889. /*
  7890. * Suspend/Resume resets the PCI configuration space, so we have to
  7891. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7892. * from interfering with C3 CPU state. pci_restore_state won't help
  7893. * here since it only restores the first 64 bytes pci config header.
  7894. */
  7895. pci_write_config_byte(pdev, 0x41, 0x00);
  7896. iwl4965_resume(priv);
  7897. return 0;
  7898. }
  7899. #endif /* CONFIG_PM */
  7900. /*****************************************************************************
  7901. *
  7902. * driver and module entry point
  7903. *
  7904. *****************************************************************************/
  7905. static struct pci_driver iwl4965_driver = {
  7906. .name = DRV_NAME,
  7907. .id_table = iwl4965_hw_card_ids,
  7908. .probe = iwl4965_pci_probe,
  7909. .remove = __devexit_p(iwl4965_pci_remove),
  7910. #ifdef CONFIG_PM
  7911. .suspend = iwl4965_pci_suspend,
  7912. .resume = iwl4965_pci_resume,
  7913. #endif
  7914. };
  7915. static int __init iwl4965_init(void)
  7916. {
  7917. int ret;
  7918. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7919. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7920. ret = pci_register_driver(&iwl4965_driver);
  7921. if (ret) {
  7922. IWL_ERROR("Unable to initialize PCI module\n");
  7923. return ret;
  7924. }
  7925. #ifdef CONFIG_IWL4965_DEBUG
  7926. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7927. if (ret) {
  7928. IWL_ERROR("Unable to create driver sysfs file\n");
  7929. pci_unregister_driver(&iwl4965_driver);
  7930. return ret;
  7931. }
  7932. #endif
  7933. return ret;
  7934. }
  7935. static void __exit iwl4965_exit(void)
  7936. {
  7937. #ifdef CONFIG_IWL4965_DEBUG
  7938. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7939. #endif
  7940. pci_unregister_driver(&iwl4965_driver);
  7941. }
  7942. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7943. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7944. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7945. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7946. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7947. MODULE_PARM_DESC(hwcrypto,
  7948. "using hardware crypto engine (default 0 [software])\n");
  7949. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7950. MODULE_PARM_DESC(debug, "debug output mask");
  7951. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7952. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7953. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7954. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7955. /* QoS */
  7956. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7957. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7958. module_exit(iwl4965_exit);
  7959. module_init(iwl4965_init);