dma-mapping.h 14 KB

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  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm_types.h>
  5. #include <linux/scatterlist.h>
  6. #include <asm-generic/dma-coherent.h>
  7. #include <asm/memory.h>
  8. /*
  9. * page_to_dma/dma_to_virt/virt_to_dma are architecture private functions
  10. * used internally by the DMA-mapping API to provide DMA addresses. They
  11. * must not be used by drivers.
  12. */
  13. #ifndef __arch_page_to_dma
  14. static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
  15. {
  16. return (dma_addr_t)__virt_to_bus((unsigned long)page_address(page));
  17. }
  18. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  19. {
  20. return (void *)__bus_to_virt(addr);
  21. }
  22. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  23. {
  24. return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
  25. }
  26. #else
  27. static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
  28. {
  29. return __arch_page_to_dma(dev, page);
  30. }
  31. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  32. {
  33. return __arch_dma_to_virt(dev, addr);
  34. }
  35. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  36. {
  37. return __arch_virt_to_dma(dev, addr);
  38. }
  39. #endif
  40. /*
  41. * DMA-consistent mapping functions. These allocate/free a region of
  42. * uncached, unwrite-buffered mapped memory space for use with DMA
  43. * devices. This is the "generic" version. The PCI specific version
  44. * is in pci.h
  45. *
  46. * Note: Drivers should NOT use this function directly, as it will break
  47. * platforms with CONFIG_DMABOUNCE.
  48. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  49. */
  50. extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
  51. /*
  52. * Return whether the given device DMA address mask can be supported
  53. * properly. For example, if your device can only drive the low 24-bits
  54. * during bus mastering, then you would pass 0x00ffffff as the mask
  55. * to this function.
  56. *
  57. * FIXME: This should really be a platform specific issue - we should
  58. * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  59. */
  60. static inline int dma_supported(struct device *dev, u64 mask)
  61. {
  62. return dev->dma_mask && *dev->dma_mask != 0;
  63. }
  64. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  65. {
  66. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  67. return -EIO;
  68. *dev->dma_mask = dma_mask;
  69. return 0;
  70. }
  71. static inline int dma_get_cache_alignment(void)
  72. {
  73. return 32;
  74. }
  75. static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
  76. {
  77. return !!arch_is_coherent();
  78. }
  79. /*
  80. * DMA errors are defined by all-bits-set in the DMA address.
  81. */
  82. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  83. {
  84. return dma_addr == ~0;
  85. }
  86. /*
  87. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  88. * function so drivers using this API are highlighted with build warnings.
  89. */
  90. static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
  91. dma_addr_t *handle, gfp_t gfp)
  92. {
  93. return NULL;
  94. }
  95. static inline void dma_free_noncoherent(struct device *dev, size_t size,
  96. void *cpu_addr, dma_addr_t handle)
  97. {
  98. }
  99. /**
  100. * dma_alloc_coherent - allocate consistent memory for DMA
  101. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  102. * @size: required memory size
  103. * @handle: bus-specific DMA address
  104. *
  105. * Allocate some uncached, unbuffered memory for a device for
  106. * performing DMA. This function allocates pages, and will
  107. * return the CPU-viewed address, and sets @handle to be the
  108. * device-viewed address.
  109. */
  110. extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
  111. /**
  112. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  113. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  114. * @size: size of memory originally requested in dma_alloc_coherent
  115. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  116. * @handle: device-view address returned from dma_alloc_coherent
  117. *
  118. * Free (and unmap) a DMA buffer previously allocated by
  119. * dma_alloc_coherent().
  120. *
  121. * References to memory and mappings associated with cpu_addr/handle
  122. * during and after this call executing are illegal.
  123. */
  124. extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
  125. /**
  126. * dma_mmap_coherent - map a coherent DMA allocation into user space
  127. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  128. * @vma: vm_area_struct describing requested user mapping
  129. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  130. * @handle: device-view address returned from dma_alloc_coherent
  131. * @size: size of memory originally requested in dma_alloc_coherent
  132. *
  133. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  134. * into user space. The coherent DMA buffer must not be freed by the
  135. * driver until the user space mapping has been released.
  136. */
  137. int dma_mmap_coherent(struct device *, struct vm_area_struct *,
  138. void *, dma_addr_t, size_t);
  139. /**
  140. * dma_alloc_writecombine - allocate writecombining memory for DMA
  141. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  142. * @size: required memory size
  143. * @handle: bus-specific DMA address
  144. *
  145. * Allocate some uncached, buffered memory for a device for
  146. * performing DMA. This function allocates pages, and will
  147. * return the CPU-viewed address, and sets @handle to be the
  148. * device-viewed address.
  149. */
  150. extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
  151. gfp_t);
  152. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  153. dma_free_coherent(dev,size,cpu_addr,handle)
  154. int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
  155. void *, dma_addr_t, size_t);
  156. #ifdef CONFIG_DMABOUNCE
  157. /*
  158. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  159. * and utilize bounce buffers as needed to work around limited DMA windows.
  160. *
  161. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  162. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  163. * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
  164. *
  165. * The following are helper functions used by the dmabounce subystem
  166. *
  167. */
  168. /**
  169. * dmabounce_register_dev
  170. *
  171. * @dev: valid struct device pointer
  172. * @small_buf_size: size of buffers to use with small buffer pool
  173. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  174. *
  175. * This function should be called by low-level platform code to register
  176. * a device as requireing DMA buffer bouncing. The function will allocate
  177. * appropriate DMA pools for the device.
  178. *
  179. */
  180. extern int dmabounce_register_dev(struct device *, unsigned long,
  181. unsigned long);
  182. /**
  183. * dmabounce_unregister_dev
  184. *
  185. * @dev: valid struct device pointer
  186. *
  187. * This function should be called by low-level platform code when device
  188. * that was previously registered with dmabounce_register_dev is removed
  189. * from the system.
  190. *
  191. */
  192. extern void dmabounce_unregister_dev(struct device *);
  193. /**
  194. * dma_needs_bounce
  195. *
  196. * @dev: valid struct device pointer
  197. * @dma_handle: dma_handle of unbounced buffer
  198. * @size: size of region being mapped
  199. *
  200. * Platforms that utilize the dmabounce mechanism must implement
  201. * this function.
  202. *
  203. * The dmabounce routines call this function whenever a dma-mapping
  204. * is requested to determine whether a given buffer needs to be bounced
  205. * or not. The function must return 0 if the buffer is OK for
  206. * DMA access and 1 if the buffer needs to be bounced.
  207. *
  208. */
  209. extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
  210. /*
  211. * The DMA API, implemented by dmabounce.c. See below for descriptions.
  212. */
  213. extern dma_addr_t dma_map_single(struct device *, void *, size_t,
  214. enum dma_data_direction);
  215. extern dma_addr_t dma_map_page(struct device *, struct page *,
  216. unsigned long, size_t, enum dma_data_direction);
  217. extern void dma_unmap_single(struct device *, dma_addr_t, size_t,
  218. enum dma_data_direction);
  219. /*
  220. * Private functions
  221. */
  222. int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
  223. size_t, enum dma_data_direction);
  224. int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
  225. size_t, enum dma_data_direction);
  226. #else
  227. static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
  228. unsigned long offset, size_t size, enum dma_data_direction dir)
  229. {
  230. return 1;
  231. }
  232. static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
  233. unsigned long offset, size_t size, enum dma_data_direction dir)
  234. {
  235. return 1;
  236. }
  237. /**
  238. * dma_map_single - map a single buffer for streaming DMA
  239. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  240. * @cpu_addr: CPU direct mapped address of buffer
  241. * @size: size of buffer to map
  242. * @dir: DMA transfer direction
  243. *
  244. * Ensure that any data held in the cache is appropriately discarded
  245. * or written back.
  246. *
  247. * The device owns this memory once this call has completed. The CPU
  248. * can regain ownership by calling dma_unmap_single() or
  249. * dma_sync_single_for_cpu().
  250. */
  251. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  252. size_t size, enum dma_data_direction dir)
  253. {
  254. BUG_ON(!valid_dma_direction(dir));
  255. if (!arch_is_coherent())
  256. dma_cache_maint(cpu_addr, size, dir);
  257. return virt_to_dma(dev, cpu_addr);
  258. }
  259. /**
  260. * dma_map_page - map a portion of a page for streaming DMA
  261. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  262. * @page: page that buffer resides in
  263. * @offset: offset into page for start of buffer
  264. * @size: size of buffer to map
  265. * @dir: DMA transfer direction
  266. *
  267. * Ensure that any data held in the cache is appropriately discarded
  268. * or written back.
  269. *
  270. * The device owns this memory once this call has completed. The CPU
  271. * can regain ownership by calling dma_unmap_page().
  272. */
  273. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  274. unsigned long offset, size_t size, enum dma_data_direction dir)
  275. {
  276. BUG_ON(!valid_dma_direction(dir));
  277. if (!arch_is_coherent())
  278. dma_cache_maint(page_address(page) + offset, size, dir);
  279. return page_to_dma(dev, page) + offset;
  280. }
  281. /**
  282. * dma_unmap_single - unmap a single buffer previously mapped
  283. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  284. * @handle: DMA address of buffer
  285. * @size: size of buffer (same as passed to dma_map_single)
  286. * @dir: DMA transfer direction (same as passed to dma_map_single)
  287. *
  288. * Unmap a single streaming mode DMA translation. The handle and size
  289. * must match what was provided in the previous dma_map_single() call.
  290. * All other usages are undefined.
  291. *
  292. * After this call, reads by the CPU to the buffer are guaranteed to see
  293. * whatever the device wrote there.
  294. */
  295. static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
  296. size_t size, enum dma_data_direction dir)
  297. {
  298. /* nothing to do */
  299. }
  300. #endif /* CONFIG_DMABOUNCE */
  301. /**
  302. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  303. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  304. * @handle: DMA address of buffer
  305. * @size: size of buffer (same as passed to dma_map_page)
  306. * @dir: DMA transfer direction (same as passed to dma_map_page)
  307. *
  308. * Unmap a page streaming mode DMA translation. The handle and size
  309. * must match what was provided in the previous dma_map_page() call.
  310. * All other usages are undefined.
  311. *
  312. * After this call, reads by the CPU to the buffer are guaranteed to see
  313. * whatever the device wrote there.
  314. */
  315. static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
  316. size_t size, enum dma_data_direction dir)
  317. {
  318. dma_unmap_single(dev, handle, size, dir);
  319. }
  320. /**
  321. * dma_sync_single_range_for_cpu
  322. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  323. * @handle: DMA address of buffer
  324. * @offset: offset of region to start sync
  325. * @size: size of region to sync
  326. * @dir: DMA transfer direction (same as passed to dma_map_single)
  327. *
  328. * Make physical memory consistent for a single streaming mode DMA
  329. * translation after a transfer.
  330. *
  331. * If you perform a dma_map_single() but wish to interrogate the
  332. * buffer using the cpu, yet do not wish to teardown the PCI dma
  333. * mapping, you must call this function before doing so. At the
  334. * next point you give the PCI dma address back to the card, you
  335. * must first the perform a dma_sync_for_device, and then the
  336. * device again owns the buffer.
  337. */
  338. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  339. dma_addr_t handle, unsigned long offset, size_t size,
  340. enum dma_data_direction dir)
  341. {
  342. BUG_ON(!valid_dma_direction(dir));
  343. dmabounce_sync_for_cpu(dev, handle, offset, size, dir);
  344. }
  345. static inline void dma_sync_single_range_for_device(struct device *dev,
  346. dma_addr_t handle, unsigned long offset, size_t size,
  347. enum dma_data_direction dir)
  348. {
  349. BUG_ON(!valid_dma_direction(dir));
  350. if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
  351. return;
  352. if (!arch_is_coherent())
  353. dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
  354. }
  355. static inline void dma_sync_single_for_cpu(struct device *dev,
  356. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  357. {
  358. dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
  359. }
  360. static inline void dma_sync_single_for_device(struct device *dev,
  361. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  362. {
  363. dma_sync_single_range_for_device(dev, handle, 0, size, dir);
  364. }
  365. /*
  366. * The scatter list versions of the above methods.
  367. */
  368. extern int dma_map_sg(struct device *, struct scatterlist *, int,
  369. enum dma_data_direction);
  370. extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
  371. enum dma_data_direction);
  372. extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
  373. enum dma_data_direction);
  374. extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
  375. enum dma_data_direction);
  376. #endif /* __KERNEL__ */
  377. #endif