trident.c 123 KB

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  1. /*
  2. * OSS driver for Linux 2.[46].x for
  3. *
  4. * Trident 4D-Wave
  5. * SiS 7018
  6. * ALi 5451
  7. * Tvia/IGST CyberPro 5050
  8. *
  9. * Driver: Alan Cox <alan@redhat.com>
  10. *
  11. * Built from:
  12. * Low level code: <audio@tridentmicro.com> from ALSA
  13. * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
  14. * Extended by: Zach Brown <zab@redhat.com>
  15. *
  16. * Hacked up by:
  17. * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
  18. * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
  19. * Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support
  20. * Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support
  21. * Peter Wächtler <pwaechtler@loewe-komp.de> CyberPro5050 support
  22. * Muli Ben-Yehuda <mulix@mulix.org>
  23. *
  24. *
  25. * This program is free software; you can redistribute it and/or modify
  26. * it under the terms of the GNU General Public License as published by
  27. * the Free Software Foundation; either version 2 of the License, or
  28. * (at your option) any later version.
  29. *
  30. * This program is distributed in the hope that it will be useful,
  31. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  32. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  33. * GNU General Public License for more details.
  34. *
  35. * You should have received a copy of the GNU General Public License
  36. * along with this program; if not, write to the Free Software
  37. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  38. *
  39. * History
  40. * v0.14.10j
  41. * January 3 2004 Eugene Teo <eugeneteo@eugeneteo.net>
  42. * minor cleanup to use pr_debug instead of TRDBG since it is already
  43. * defined in linux/kernel.h.
  44. * v0.14.10i
  45. * December 29 2003 Muli Ben-Yehuda <mulix@mulix.org>
  46. * major cleanup for 2.6, fix a few error patch buglets
  47. * with returning without properly cleaning up first,
  48. * get rid of lock_kernel().
  49. * v0.14.10h
  50. * Sept 10 2002 Pascal Schmidt <der.eremit@email.de>
  51. * added support for ALi 5451 joystick port
  52. * v0.14.10g
  53. * Sept 05 2002 Alan Cox <alan@redhat.com>
  54. * adapt to new pci joystick attachment interface
  55. * v0.14.10f
  56. * July 24 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
  57. * patch from Eric Lemar (via Ian Soboroff): in suspend and resume,
  58. * fix wrong cast from pci_dev* to struct trident_card*.
  59. * v0.14.10e
  60. * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
  61. * rewrite the DMA buffer allocation/deallcoation functions, to make it
  62. * modular and fix a bug where we would call free_pages on memory
  63. * obtained with pci_alloc_consistent. Also remove unnecessary #ifdef
  64. * CONFIG_PROC_FS and various other cleanups.
  65. * v0.14.10d
  66. * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
  67. * made several printk(KERN_NOTICE...) into TRDBG(...), to avoid spamming
  68. * my syslog with hundreds of messages.
  69. * v0.14.10c
  70. * July 16 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
  71. * Cleaned up Lei Hu's 0.4.10 driver to conform to Documentation/CodingStyle
  72. * and the coding style used in the rest of the file.
  73. * v0.14.10b
  74. * June 23 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
  75. * add a missing unlock_set_fmt, remove a superflous lock/unlock pair
  76. * with nothing in between.
  77. * v0.14.10a
  78. * June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
  79. * use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns
  80. * per line, use 'do {} while (0)' in statement macros.
  81. * v0.14.10
  82. * June 6 2002 Lei Hu <Lei_hu@ali.com.tw>
  83. * rewrite the part to read/write registers of audio codec for Ali5451
  84. * v0.14.9e
  85. * January 2 2002 Vojtech Pavlik <vojtech@ucw.cz> added gameport
  86. * support to avoid resource conflict with pcigame.c
  87. * v0.14.9d
  88. * October 8 2001 Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  89. * use set_current_state, properly release resources on failure in
  90. * trident_probe, get rid of check_region
  91. * v0.14.9c
  92. * August 10 2001 Peter Wächtler <pwaechtler@loewe-komp.de>
  93. * added support for Tvia (formerly Integraphics/IGST) CyberPro5050
  94. * this chip is often found in settop boxes (combined video+audio)
  95. * v0.14.9b
  96. * Switch to static inline not extern inline (gcc 3)
  97. * v0.14.9a
  98. * Aug 6 2001 Alan Cox
  99. * 0.14.9 crashed on rmmod due to a timer/bh left running. Simplified
  100. * the existing logic (the BH doesn't help as ac97 is lock_irqsave)
  101. * and used del_timer_sync to clean up
  102. * Fixed a problem where the ALi change broke my generic card
  103. * v0.14.9
  104. * Jul 10 2001 Matt Wu
  105. * Add H/W Volume Control
  106. * v0.14.8a
  107. * July 7 2001 Alan Cox
  108. * Moved Matt Wu's ac97 register cache into the card structure
  109. * v0.14.8
  110. * Apr 30 2001 Matt Wu
  111. * Set EBUF1 and EBUF2 to still mode
  112. * Add dc97/ac97 reset function
  113. * Fix power management: ali_restore_regs
  114. * unreleased
  115. * Mar 09 2001 Matt Wu
  116. * Add cache for ac97 access
  117. * v0.14.7
  118. * Feb 06 2001 Matt Wu
  119. * Fix ac97 initialization
  120. * Fix bug: an extra tail will be played when playing
  121. * Jan 05 2001 Matt Wu
  122. * Implement multi-channels and S/PDIF in support for ALi 1535+
  123. * v0.14.6
  124. * Nov 1 2000 Ching-Ling Lee
  125. * Fix the bug of memory leak when switching 5.1-channels to 2 channels.
  126. * Add lock protection into dynamic changing format of data.
  127. * Oct 18 2000 Ching-Ling Lee
  128. * 5.1-channels support for ALi
  129. * June 28 2000 Ching-Ling Lee
  130. * S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user
  131. * Simple Power Management support for ALi
  132. * v0.14.5 May 23 2000 Ollie Lho
  133. * Misc bug fix from the Net
  134. * v0.14.4 May 20 2000 Aaron Holtzman
  135. * Fix kfree'd memory access in release
  136. * Fix race in open while looking for a free virtual channel slot
  137. * remove open_wait wq (which appears to be unused)
  138. * v0.14.3 May 10 2000 Ollie Lho
  139. * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU
  140. * v0.14.2 Mar 29 2000 Ching-Ling Lee
  141. * Add clear to silence advance in trident_update_ptr
  142. * fix invalid data of the end of the sound
  143. * v0.14.1 Mar 24 2000 Ching-Ling Lee
  144. * ALi 5451 support added, playback and recording O.K.
  145. * ALi 5451 originally developed and structured based on sonicvibes, and
  146. * suggested to merge into this file by Alan Cox.
  147. * v0.14 Mar 15 2000 Ollie Lho
  148. * 5.1 channel output support with channel binding. What's the Matrix ?
  149. * v0.13.1 Mar 10 2000 Ollie Lho
  150. * few minor bugs on dual codec support, needs more testing
  151. * v0.13 Mar 03 2000 Ollie Lho
  152. * new pci_* for 2.4 kernel, back ported to 2.2
  153. * v0.12 Feb 23 2000 Ollie Lho
  154. * Preliminary Recording support
  155. * v0.11.2 Feb 19 2000 Ollie Lho
  156. * removed incomplete full-dulplex support
  157. * v0.11.1 Jan 28 2000 Ollie Lho
  158. * small bug in setting sample rate for 4d-nx (reported by Aaron)
  159. * v0.11 Jan 27 2000 Ollie Lho
  160. * DMA bug, scheduler latency, second try
  161. * v0.10 Jan 24 2000 Ollie Lho
  162. * DMA bug fixed, found kernel scheduling problem
  163. * v0.09 Jan 20 2000 Ollie Lho
  164. * Clean up of channel register access routine (prepare for channel binding)
  165. * v0.08 Jan 14 2000 Ollie Lho
  166. * Isolation of AC97 codec code
  167. * v0.07 Jan 13 2000 Ollie Lho
  168. * Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
  169. * v0.06 Jan 11 2000 Ollie Lho
  170. * Preliminary support for dual (more ?) AC97 codecs
  171. * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
  172. * adapt to 2.3.x new __setup/__init call
  173. * v0.04 Dec 31 1999 Ollie Lho
  174. * Multiple Open, using Middle Loop Interrupt to smooth playback
  175. * v0.03 Dec 24 1999 Ollie Lho
  176. * mem leak in prog_dmabuf and dealloc_dmabuf removed
  177. * v0.02 Dec 15 1999 Ollie Lho
  178. * SiS 7018 support added, playback O.K.
  179. * v0.01 Alan Cox et. al.
  180. * Initial Release in kernel 2.3.30, does not work
  181. *
  182. * ToDo
  183. * Clean up of low level channel register access code. (done)
  184. * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
  185. * Dual AC97 codecs support (done)
  186. * Recording support (done)
  187. * Mmap support
  188. * "Channel Binding" ioctl extension (done)
  189. * new pci device driver interface for 2.4 kernel (done)
  190. *
  191. * Lock order (high->low)
  192. * lock - hardware lock
  193. * open_mutex - guard opens
  194. * sem - guard dmabuf, write re-entry etc
  195. */
  196. #include <linux/module.h>
  197. #include <linux/string.h>
  198. #include <linux/ctype.h>
  199. #include <linux/ioport.h>
  200. #include <linux/sched.h>
  201. #include <linux/delay.h>
  202. #include <linux/sound.h>
  203. #include <linux/slab.h>
  204. #include <linux/soundcard.h>
  205. #include <linux/pci.h>
  206. #include <linux/init.h>
  207. #include <linux/poll.h>
  208. #include <linux/spinlock.h>
  209. #include <linux/smp_lock.h>
  210. #include <linux/ac97_codec.h>
  211. #include <linux/bitops.h>
  212. #include <linux/proc_fs.h>
  213. #include <linux/interrupt.h>
  214. #include <linux/pm.h>
  215. #include <linux/gameport.h>
  216. #include <linux/kernel.h>
  217. #include <linux/mutex.h>
  218. #include <asm/uaccess.h>
  219. #include <asm/io.h>
  220. #include <asm/dma.h>
  221. #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
  222. #include <asm/hwrpb.h>
  223. #endif
  224. #include "trident.h"
  225. #define DRIVER_VERSION "0.14.10j-2.6"
  226. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  227. #define SUPPORT_JOYSTICK 1
  228. #endif
  229. /* magic numbers to protect our data structures */
  230. #define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */
  231. #define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */
  232. #define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */
  233. #define ALI_DMA_MASK 0x7fffffff /* ALI Tridents have 31-bit DMA. Wow. */
  234. #define NR_HW_CH 32
  235. /* maximum number of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
  236. have 2 SDATA_IN lines (currently) */
  237. #define NR_AC97 2
  238. /* minor number of /dev/swmodem (temporary, experimental) */
  239. #define SND_DEV_SWMODEM 7
  240. static const unsigned ali_multi_channels_5_1[] = {
  241. /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL, */
  242. ALI_CENTER_CHANNEL,
  243. ALI_LEF_CHANNEL,
  244. ALI_SURR_LEFT_CHANNEL,
  245. ALI_SURR_RIGHT_CHANNEL
  246. };
  247. static const unsigned sample_size[] = { 1, 2, 2, 4 };
  248. static const unsigned sample_shift[] = { 0, 1, 1, 2 };
  249. static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
  250. enum {
  251. TRIDENT_4D_DX = 0,
  252. TRIDENT_4D_NX,
  253. SIS_7018,
  254. ALI_5451,
  255. CYBER5050
  256. };
  257. static char *card_names[] = {
  258. "Trident 4DWave DX",
  259. "Trident 4DWave NX",
  260. "SiS 7018 PCI Audio",
  261. "ALi Audio Accelerator",
  262. "Tvia/IGST CyberPro 5050"
  263. };
  264. static struct pci_device_id trident_pci_tbl[] = {
  265. {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX),
  266. PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TRIDENT_4D_DX},
  267. {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX),
  268. 0, 0, TRIDENT_4D_NX},
  269. {PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018), 0, 0, SIS_7018},
  270. {PCI_DEVICE(PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451), 0, 0, ALI_5451},
  271. {PCI_DEVICE(PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050),
  272. 0, 0, CYBER5050},
  273. {0,}
  274. };
  275. MODULE_DEVICE_TABLE(pci, trident_pci_tbl);
  276. /* "software" or virtual channel, an instance of opened /dev/dsp */
  277. struct trident_state {
  278. unsigned int magic;
  279. struct trident_card *card; /* Card info */
  280. /* file mode */
  281. mode_t open_mode;
  282. /* virtual channel number */
  283. int virt;
  284. struct dmabuf {
  285. /* wave sample stuff */
  286. unsigned int rate;
  287. unsigned char fmt, enable;
  288. /* hardware channel */
  289. struct trident_channel *channel;
  290. /* OSS buffer management stuff */
  291. void *rawbuf;
  292. dma_addr_t dma_handle;
  293. unsigned buforder;
  294. unsigned numfrag;
  295. unsigned fragshift;
  296. /* our buffer acts like a circular ring */
  297. unsigned hwptr; /* where dma last started, updated by update_ptr */
  298. unsigned swptr; /* where driver last clear/filled, updated by read/write */
  299. int count; /* bytes to be comsumed or been generated by dma machine */
  300. unsigned total_bytes; /* total bytes dmaed by hardware */
  301. unsigned error; /* number of over/underruns */
  302. /* put process on wait queue when no more space in buffer */
  303. wait_queue_head_t wait;
  304. /* redundant, but makes calculations easier */
  305. unsigned fragsize;
  306. unsigned dmasize;
  307. unsigned fragsamples;
  308. /* OSS stuff */
  309. unsigned mapped:1;
  310. unsigned ready:1;
  311. unsigned endcleared:1;
  312. unsigned update_flag;
  313. unsigned ossfragshift;
  314. int ossmaxfrags;
  315. unsigned subdivision;
  316. } dmabuf;
  317. /* 5.1 channels */
  318. struct trident_state *other_states[4];
  319. int multi_channels_adjust_count;
  320. unsigned chans_num;
  321. unsigned long fmt_flag;
  322. /* Guard against mmap/write/read races */
  323. struct mutex sem;
  324. };
  325. /* hardware channels */
  326. struct trident_channel {
  327. int num; /* channel number */
  328. u32 lba; /* Loop Begine Address, where dma buffer starts */
  329. u32 eso; /* End Sample Offset, wehre dma buffer ends */
  330. /* (in the unit of samples) */
  331. u32 delta; /* delta value, sample rate / 48k for playback, */
  332. /* 48k/sample rate for recording */
  333. u16 attribute; /* control where PCM data go and come */
  334. u16 fm_vol;
  335. u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */
  336. };
  337. struct trident_pcm_bank_address {
  338. u32 start;
  339. u32 stop;
  340. u32 aint;
  341. u32 aint_en;
  342. };
  343. static struct trident_pcm_bank_address bank_a_addrs = {
  344. T4D_START_A,
  345. T4D_STOP_A,
  346. T4D_AINT_A,
  347. T4D_AINTEN_A
  348. };
  349. static struct trident_pcm_bank_address bank_b_addrs = {
  350. T4D_START_B,
  351. T4D_STOP_B,
  352. T4D_AINT_B,
  353. T4D_AINTEN_B
  354. };
  355. struct trident_pcm_bank {
  356. /* register addresses to control bank operations */
  357. struct trident_pcm_bank_address *addresses;
  358. /* each bank has 32 channels */
  359. u32 bitmap; /* channel allocation bitmap */
  360. struct trident_channel channels[32];
  361. };
  362. struct trident_card {
  363. unsigned int magic;
  364. /* We keep trident cards in a linked list */
  365. struct trident_card *next;
  366. /* single open lock mechanism, only used for recording */
  367. struct mutex open_mutex;
  368. /* The trident has a certain amount of cross channel interaction
  369. so we use a single per card lock */
  370. spinlock_t lock;
  371. /* PCI device stuff */
  372. struct pci_dev *pci_dev;
  373. u16 pci_id;
  374. u8 revision;
  375. /* soundcore stuff */
  376. int dev_audio;
  377. /* structures for abstraction of hardware facilities, codecs, */
  378. /* banks and channels */
  379. struct ac97_codec *ac97_codec[NR_AC97];
  380. struct trident_pcm_bank banks[NR_BANKS];
  381. struct trident_state *states[NR_HW_CH];
  382. /* hardware resources */
  383. unsigned long iobase;
  384. u32 irq;
  385. /* Function support */
  386. struct trident_channel *(*alloc_pcm_channel) (struct trident_card *);
  387. struct trident_channel *(*alloc_rec_pcm_channel) (struct trident_card *);
  388. void (*free_pcm_channel) (struct trident_card *, unsigned int chan);
  389. void (*address_interrupt) (struct trident_card *);
  390. /* Added by Matt Wu 01-05-2001 for spdif in */
  391. int multi_channel_use_count;
  392. int rec_channel_use_count;
  393. u16 mixer_regs[64][NR_AC97]; /* Made card local by Alan */
  394. int mixer_regs_ready;
  395. /* Added for hardware volume control */
  396. int hwvolctl;
  397. struct timer_list timer;
  398. /* Game port support */
  399. struct gameport *gameport;
  400. };
  401. enum dmabuf_mode {
  402. DM_PLAYBACK = 0,
  403. DM_RECORD
  404. };
  405. /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
  406. static u16 mask2attr[] = {
  407. PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
  408. HSET, MIC, MODEM_LINE1, MODEM_LINE2,
  409. I2S_LR, SPDIF_LR
  410. };
  411. /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
  412. static int attr2mask[] = {
  413. DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
  414. DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
  415. };
  416. /* Added by Matt Wu 01-05-2001 for spdif in */
  417. static int ali_close_multi_channels(void);
  418. static void ali_delay(struct trident_card *card, int interval);
  419. static void ali_detect_spdif_rate(struct trident_card *card);
  420. static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val);
  421. static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg);
  422. static struct trident_card *devs;
  423. static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
  424. static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
  425. static int trident_open_mixdev(struct inode *inode, struct file *file);
  426. static int trident_ioctl_mixdev(struct inode *inode, struct file *file,
  427. unsigned int cmd, unsigned long arg);
  428. static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val);
  429. static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg);
  430. static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate);
  431. static void ali_enable_special_channel(struct trident_state *stat);
  432. static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card);
  433. static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card);
  434. static void ali_restore_regs(struct trident_card *card);
  435. static void ali_save_regs(struct trident_card *card);
  436. static int trident_suspend(struct pci_dev *dev, pm_message_t unused);
  437. static int trident_resume(struct pci_dev *dev);
  438. static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel);
  439. static int ali_setup_multi_channels(struct trident_card *card, int chan_nums);
  440. static unsigned int ali_get_spdif_in_rate(struct trident_card *card);
  441. static void ali_setup_spdif_in(struct trident_card *card);
  442. static void ali_disable_spdif_in(struct trident_card *card);
  443. static void ali_disable_special_channel(struct trident_card *card, int ch);
  444. static void ali_setup_spdif_out(struct trident_card *card, int flag);
  445. static int ali_write_5_1(struct trident_state *state,
  446. const char __user *buffer,
  447. int cnt_for_multi_channel, unsigned int *copy_count,
  448. unsigned int *state_cnt);
  449. static int ali_allocate_other_states_resources(struct trident_state *state,
  450. int chan_nums);
  451. static void ali_free_other_states_resources(struct trident_state *state);
  452. /* save registers for ALi Power Management */
  453. static struct ali_saved_registers {
  454. unsigned long global_regs[ALI_GLOBAL_REGS];
  455. unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS];
  456. unsigned mixer_regs[ALI_MIXER_REGS];
  457. } ali_registers;
  458. #define seek_offset(dma_ptr, buffer, cnt, offset, copy_count) do { \
  459. (dma_ptr) += (offset); \
  460. (buffer) += (offset); \
  461. (cnt) -= (offset); \
  462. (copy_count) += (offset); \
  463. } while (0)
  464. static inline int lock_set_fmt(struct trident_state* state)
  465. {
  466. if (test_and_set_bit(0, &state->fmt_flag))
  467. return -EFAULT;
  468. return 0;
  469. }
  470. static inline void unlock_set_fmt(struct trident_state* state)
  471. {
  472. clear_bit(0, &state->fmt_flag);
  473. }
  474. static int
  475. trident_enable_loop_interrupts(struct trident_card *card)
  476. {
  477. u32 global_control;
  478. global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
  479. switch (card->pci_id) {
  480. case PCI_DEVICE_ID_SI_7018:
  481. global_control |= (ENDLP_IE | MIDLP_IE | BANK_B_EN);
  482. break;
  483. case PCI_DEVICE_ID_ALI_5451:
  484. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  485. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  486. case PCI_DEVICE_ID_INTERG_5050:
  487. global_control |= (ENDLP_IE | MIDLP_IE);
  488. break;
  489. default:
  490. return 0;
  491. }
  492. outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
  493. pr_debug("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
  494. inl(TRID_REG(card, T4D_LFO_GC_CIR)));
  495. return 1;
  496. }
  497. static int
  498. trident_disable_loop_interrupts(struct trident_card *card)
  499. {
  500. u32 global_control;
  501. global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
  502. global_control &= ~(ENDLP_IE | MIDLP_IE);
  503. outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
  504. pr_debug("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
  505. global_control);
  506. return 1;
  507. }
  508. static void
  509. trident_enable_voice_irq(struct trident_card *card, unsigned int channel)
  510. {
  511. unsigned int mask = 1 << (channel & 0x1f);
  512. struct trident_pcm_bank *bank = &card->banks[channel >> 5];
  513. u32 reg, addr = bank->addresses->aint_en;
  514. reg = inl(TRID_REG(card, addr));
  515. reg |= mask;
  516. outl(reg, TRID_REG(card, addr));
  517. #ifdef DEBUG
  518. reg = inl(TRID_REG(card, addr));
  519. pr_debug("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
  520. channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A",
  521. reg, addr);
  522. #endif /* DEBUG */
  523. }
  524. static void
  525. trident_disable_voice_irq(struct trident_card *card, unsigned int channel)
  526. {
  527. unsigned int mask = 1 << (channel & 0x1f);
  528. struct trident_pcm_bank *bank = &card->banks[channel >> 5];
  529. u32 reg, addr = bank->addresses->aint_en;
  530. reg = inl(TRID_REG(card, addr));
  531. reg &= ~mask;
  532. outl(reg, TRID_REG(card, addr));
  533. /* Ack the channel in case the interrupt was set before we disable it. */
  534. outl(mask, TRID_REG(card, bank->addresses->aint));
  535. #ifdef DEBUG
  536. reg = inl(TRID_REG(card, addr));
  537. pr_debug("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
  538. channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A",
  539. reg, addr);
  540. #endif /* DEBUG */
  541. }
  542. static void
  543. trident_start_voice(struct trident_card *card, unsigned int channel)
  544. {
  545. unsigned int mask = 1 << (channel & 0x1f);
  546. struct trident_pcm_bank *bank = &card->banks[channel >> 5];
  547. u32 addr = bank->addresses->start;
  548. #ifdef DEBUG
  549. u32 reg;
  550. #endif /* DEBUG */
  551. outl(mask, TRID_REG(card, addr));
  552. #ifdef DEBUG
  553. reg = inl(TRID_REG(card, addr));
  554. pr_debug("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n",
  555. channel, addr == T4D_START_B ? "START_B" : "START_A",
  556. reg, addr);
  557. #endif /* DEBUG */
  558. }
  559. static void
  560. trident_stop_voice(struct trident_card *card, unsigned int channel)
  561. {
  562. unsigned int mask = 1 << (channel & 0x1f);
  563. struct trident_pcm_bank *bank = &card->banks[channel >> 5];
  564. u32 addr = bank->addresses->stop;
  565. #ifdef DEBUG
  566. u32 reg;
  567. #endif /* DEBUG */
  568. outl(mask, TRID_REG(card, addr));
  569. #ifdef DEBUG
  570. reg = inl(TRID_REG(card, addr));
  571. pr_debug("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n",
  572. channel, addr == T4D_STOP_B ? "STOP_B" : "STOP_A",
  573. reg, addr);
  574. #endif /* DEBUG */
  575. }
  576. static u32
  577. trident_get_interrupt_mask(struct trident_card *card, unsigned int channel)
  578. {
  579. struct trident_pcm_bank *bank = &card->banks[channel];
  580. u32 addr = bank->addresses->aint;
  581. return inl(TRID_REG(card, addr));
  582. }
  583. static int
  584. trident_check_channel_interrupt(struct trident_card *card, unsigned int channel)
  585. {
  586. unsigned int mask = 1 << (channel & 0x1f);
  587. u32 reg = trident_get_interrupt_mask(card, channel >> 5);
  588. #ifdef DEBUG
  589. if (reg & mask)
  590. pr_debug("trident: channel %d has interrupt, %s = 0x%08x\n",
  591. channel, reg == T4D_AINT_B ? "AINT_B" : "AINT_A",
  592. reg);
  593. #endif /* DEBUG */
  594. return (reg & mask) ? 1 : 0;
  595. }
  596. static void
  597. trident_ack_channel_interrupt(struct trident_card *card, unsigned int channel)
  598. {
  599. unsigned int mask = 1 << (channel & 0x1f);
  600. struct trident_pcm_bank *bank = &card->banks[channel >> 5];
  601. u32 reg, addr = bank->addresses->aint;
  602. reg = inl(TRID_REG(card, addr));
  603. reg &= mask;
  604. outl(reg, TRID_REG(card, addr));
  605. #ifdef DEBUG
  606. reg = inl(TRID_REG(card, T4D_AINT_B));
  607. pr_debug("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
  608. channel, reg);
  609. #endif /* DEBUG */
  610. }
  611. static struct trident_channel *
  612. trident_alloc_pcm_channel(struct trident_card *card)
  613. {
  614. struct trident_pcm_bank *bank;
  615. int idx;
  616. bank = &card->banks[BANK_B];
  617. for (idx = 31; idx >= 0; idx--) {
  618. if (!(bank->bitmap & (1 << idx))) {
  619. struct trident_channel *channel = &bank->channels[idx];
  620. bank->bitmap |= 1 << idx;
  621. channel->num = idx + 32;
  622. return channel;
  623. }
  624. }
  625. /* no more free channels available */
  626. printk(KERN_ERR "trident: no more channels available on Bank B.\n");
  627. return NULL;
  628. }
  629. static void
  630. trident_free_pcm_channel(struct trident_card *card, unsigned int channel)
  631. {
  632. int bank;
  633. unsigned char b;
  634. if (channel < 31 || channel > 63)
  635. return;
  636. if (card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_DX ||
  637. card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) {
  638. b = inb(TRID_REG(card, T4D_REC_CH));
  639. if ((b & ~0x80) == channel)
  640. outb(0x0, TRID_REG(card, T4D_REC_CH));
  641. }
  642. bank = channel >> 5;
  643. channel = channel & 0x1f;
  644. card->banks[bank].bitmap &= ~(1 << (channel));
  645. }
  646. static struct trident_channel *
  647. cyber_alloc_pcm_channel(struct trident_card *card)
  648. {
  649. struct trident_pcm_bank *bank;
  650. int idx;
  651. /* The cyberpro 5050 has only 32 voices and one bank */
  652. /* .. at least they are not documented (if you want to call that
  653. * crap documentation), perhaps broken ? */
  654. bank = &card->banks[BANK_A];
  655. for (idx = 31; idx >= 0; idx--) {
  656. if (!(bank->bitmap & (1 << idx))) {
  657. struct trident_channel *channel = &bank->channels[idx];
  658. bank->bitmap |= 1 << idx;
  659. channel->num = idx;
  660. return channel;
  661. }
  662. }
  663. /* no more free channels available */
  664. printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n");
  665. return NULL;
  666. }
  667. static void
  668. cyber_free_pcm_channel(struct trident_card *card, unsigned int channel)
  669. {
  670. if (channel > 31)
  671. return;
  672. card->banks[BANK_A].bitmap &= ~(1 << (channel));
  673. }
  674. static inline void
  675. cyber_outidx(int port, int idx, int data)
  676. {
  677. outb(idx, port);
  678. outb(data, port + 1);
  679. }
  680. static inline int
  681. cyber_inidx(int port, int idx)
  682. {
  683. outb(idx, port);
  684. return inb(port + 1);
  685. }
  686. static int
  687. cyber_init_ritual(struct trident_card *card)
  688. {
  689. /* some black magic, taken from SDK samples */
  690. /* remove this and nothing will work */
  691. int portDat;
  692. int ret = 0;
  693. unsigned long flags;
  694. /*
  695. * Keep interrupts off for the configure - we don't want to
  696. * clash with another cyberpro config event
  697. */
  698. spin_lock_irqsave(&card->lock, flags);
  699. portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
  700. /* enable, if it was disabled */
  701. if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) {
  702. printk(KERN_INFO "cyberpro5050: enabling audio controller\n");
  703. cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE,
  704. portDat | CYBER_BMSK_AUENZ_ENABLE);
  705. /* check again if hardware is enabled now */
  706. portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
  707. }
  708. if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) {
  709. printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n");
  710. ret = -1;
  711. } else {
  712. cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE,
  713. CYBER_BMSK_AUDIO_INT_ENABLE);
  714. cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x01);
  715. cyber_outidx(CYBER_PORT_AUDIO, 0xba, 0x20);
  716. cyber_outidx(CYBER_PORT_AUDIO, 0xbb, 0x08);
  717. cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x02);
  718. cyber_outidx(CYBER_PORT_AUDIO, 0xb3, 0x06);
  719. cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x00);
  720. }
  721. spin_unlock_irqrestore(&card->lock, flags);
  722. return ret;
  723. }
  724. /* called with spin lock held */
  725. static int
  726. trident_load_channel_registers(struct trident_card *card, u32 * data,
  727. unsigned int channel)
  728. {
  729. int i;
  730. if (channel > 63)
  731. return 0;
  732. /* select hardware channel to write */
  733. outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
  734. /* Output the channel registers, but don't write register
  735. three to an ALI chip. */
  736. for (i = 0; i < CHANNEL_REGS; i++) {
  737. if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451)
  738. continue;
  739. outl(data[i], TRID_REG(card, CHANNEL_START + 4 * i));
  740. }
  741. if (card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
  742. card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
  743. outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1));
  744. outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2));
  745. }
  746. return 1;
  747. }
  748. /* called with spin lock held */
  749. static int
  750. trident_write_voice_regs(struct trident_state *state)
  751. {
  752. unsigned int data[CHANNEL_REGS + 1];
  753. struct trident_channel *channel;
  754. channel = state->dmabuf.channel;
  755. data[1] = channel->lba;
  756. data[4] = channel->control;
  757. switch (state->card->pci_id) {
  758. case PCI_DEVICE_ID_ALI_5451:
  759. data[0] = 0; /* Current Sample Offset */
  760. data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
  761. data[3] = 0;
  762. break;
  763. case PCI_DEVICE_ID_SI_7018:
  764. case PCI_DEVICE_ID_INTERG_5050:
  765. data[0] = 0; /* Current Sample Offset */
  766. data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
  767. data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
  768. break;
  769. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  770. data[0] = 0; /* Current Sample Offset */
  771. data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
  772. data[3] = channel->fm_vol & 0xffff;
  773. break;
  774. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  775. data[0] = (channel->delta << 24);
  776. data[2] = ((channel->delta << 16) & 0xff000000) |
  777. (channel->eso & 0x00ffffff);
  778. data[3] = channel->fm_vol & 0xffff;
  779. break;
  780. default:
  781. return 0;
  782. }
  783. return trident_load_channel_registers(state->card, data, channel->num);
  784. }
  785. static int
  786. compute_rate_play(u32 rate)
  787. {
  788. int delta;
  789. /* We special case 44100 and 8000 since rounding with the equation
  790. does not give us an accurate enough value. For 11025 and 22050
  791. the equation gives us the best answer. All other frequencies will
  792. also use the equation. JDW */
  793. if (rate == 44100)
  794. delta = 0xeb3;
  795. else if (rate == 8000)
  796. delta = 0x2ab;
  797. else if (rate == 48000)
  798. delta = 0x1000;
  799. else
  800. delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
  801. return delta;
  802. }
  803. static int
  804. compute_rate_rec(u32 rate)
  805. {
  806. int delta;
  807. if (rate == 44100)
  808. delta = 0x116a;
  809. else if (rate == 8000)
  810. delta = 0x6000;
  811. else if (rate == 48000)
  812. delta = 0x1000;
  813. else
  814. delta = ((48000 << 12) / rate) & 0x0000ffff;
  815. return delta;
  816. }
  817. /* set playback sample rate */
  818. static unsigned int
  819. trident_set_dac_rate(struct trident_state *state, unsigned int rate)
  820. {
  821. struct dmabuf *dmabuf = &state->dmabuf;
  822. if (rate > 48000)
  823. rate = 48000;
  824. if (rate < 4000)
  825. rate = 4000;
  826. dmabuf->rate = rate;
  827. dmabuf->channel->delta = compute_rate_play(rate);
  828. trident_write_voice_regs(state);
  829. pr_debug("trident: called trident_set_dac_rate : rate = %d\n", rate);
  830. return rate;
  831. }
  832. /* set recording sample rate */
  833. static unsigned int
  834. trident_set_adc_rate(struct trident_state *state, unsigned int rate)
  835. {
  836. struct dmabuf *dmabuf = &state->dmabuf;
  837. if (rate > 48000)
  838. rate = 48000;
  839. if (rate < 4000)
  840. rate = 4000;
  841. dmabuf->rate = rate;
  842. dmabuf->channel->delta = compute_rate_rec(rate);
  843. trident_write_voice_regs(state);
  844. pr_debug("trident: called trident_set_adc_rate : rate = %d\n", rate);
  845. return rate;
  846. }
  847. /* prepare channel attributes for playback */
  848. static void
  849. trident_play_setup(struct trident_state *state)
  850. {
  851. struct dmabuf *dmabuf = &state->dmabuf;
  852. struct trident_channel *channel = dmabuf->channel;
  853. channel->lba = dmabuf->dma_handle;
  854. channel->delta = compute_rate_play(dmabuf->rate);
  855. channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
  856. channel->eso -= 1;
  857. if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
  858. channel->attribute = 0;
  859. if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  860. if ((channel->num == ALI_SPDIF_IN_CHANNEL) ||
  861. (channel->num == ALI_PCM_IN_CHANNEL))
  862. ali_disable_special_channel(state->card, channel->num);
  863. else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL))
  864. & ALI_SPDIF_OUT_CH_ENABLE)
  865. && (channel->num == ALI_SPDIF_OUT_CHANNEL)) {
  866. ali_set_spdif_out_rate(state->card,
  867. state->dmabuf.rate);
  868. state->dmabuf.channel->delta = 0x1000;
  869. }
  870. }
  871. }
  872. channel->fm_vol = 0x0;
  873. channel->control = CHANNEL_LOOP;
  874. if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
  875. /* 16-bits */
  876. channel->control |= CHANNEL_16BITS;
  877. /* signed */
  878. channel->control |= CHANNEL_SIGNED;
  879. }
  880. if (dmabuf->fmt & TRIDENT_FMT_STEREO)
  881. /* stereo */
  882. channel->control |= CHANNEL_STEREO;
  883. pr_debug("trident: trident_play_setup, LBA = 0x%08x, Delta = 0x%08x, "
  884. "ESO = 0x%08x, Control = 0x%08x\n", channel->lba,
  885. channel->delta, channel->eso, channel->control);
  886. trident_write_voice_regs(state);
  887. }
  888. /* prepare channel attributes for recording */
  889. static void
  890. trident_rec_setup(struct trident_state *state)
  891. {
  892. u16 w;
  893. u8 bval;
  894. struct trident_card *card = state->card;
  895. struct dmabuf *dmabuf = &state->dmabuf;
  896. struct trident_channel *channel = dmabuf->channel;
  897. unsigned int rate;
  898. /* Enable AC-97 ADC (capture) */
  899. switch (card->pci_id) {
  900. case PCI_DEVICE_ID_ALI_5451:
  901. ali_enable_special_channel(state);
  902. break;
  903. case PCI_DEVICE_ID_SI_7018:
  904. /* for 7018, the ac97 is always in playback/record (duplex) mode */
  905. break;
  906. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  907. w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
  908. outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
  909. /* enable and set record channel */
  910. outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
  911. break;
  912. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  913. w = inw(TRID_REG(card, T4D_MISCINT));
  914. outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
  915. /* enable and set record channel */
  916. outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
  917. break;
  918. case PCI_DEVICE_ID_INTERG_5050:
  919. /* don't know yet, using special channel 22 in GC1(0xd4)? */
  920. break;
  921. default:
  922. return;
  923. }
  924. channel->lba = dmabuf->dma_handle;
  925. channel->delta = compute_rate_rec(dmabuf->rate);
  926. if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) &&
  927. (channel->num == ALI_SPDIF_IN_CHANNEL)) {
  928. rate = ali_get_spdif_in_rate(card);
  929. if (rate == 0) {
  930. printk(KERN_WARNING "trident: ALi 5451 "
  931. "S/PDIF input setup error!\n");
  932. rate = 48000;
  933. }
  934. bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
  935. if (bval & 0x10) {
  936. outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
  937. printk(KERN_WARNING "trident: cleared ALi "
  938. "5451 S/PDIF parity error flag.\n");
  939. }
  940. if (rate != 48000)
  941. channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff;
  942. }
  943. channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
  944. channel->eso -= 1;
  945. if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
  946. channel->attribute = 0;
  947. }
  948. channel->fm_vol = 0x0;
  949. channel->control = CHANNEL_LOOP;
  950. if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
  951. /* 16-bits */
  952. channel->control |= CHANNEL_16BITS;
  953. /* signed */
  954. channel->control |= CHANNEL_SIGNED;
  955. }
  956. if (dmabuf->fmt & TRIDENT_FMT_STEREO)
  957. /* stereo */
  958. channel->control |= CHANNEL_STEREO;
  959. pr_debug("trident: trident_rec_setup, LBA = 0x%08x, Delat = 0x%08x, "
  960. "ESO = 0x%08x, Control = 0x%08x\n", channel->lba,
  961. channel->delta, channel->eso, channel->control);
  962. trident_write_voice_regs(state);
  963. }
  964. /* get current playback/recording dma buffer pointer (byte offset from LBA),
  965. called with spinlock held! */
  966. static inline unsigned
  967. trident_get_dma_addr(struct trident_state *state)
  968. {
  969. struct dmabuf *dmabuf = &state->dmabuf;
  970. u32 cso;
  971. if (!dmabuf->enable)
  972. return 0;
  973. outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
  974. switch (state->card->pci_id) {
  975. case PCI_DEVICE_ID_ALI_5451:
  976. case PCI_DEVICE_ID_SI_7018:
  977. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  978. case PCI_DEVICE_ID_INTERG_5050:
  979. /* 16 bits ESO, CSO for 7018 and DX */
  980. cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
  981. break;
  982. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  983. /* 24 bits ESO, CSO for NX */
  984. cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
  985. break;
  986. default:
  987. return 0;
  988. }
  989. pr_debug("trident: trident_get_dma_addr: chip reported channel: %d, "
  990. "cso = 0x%04x\n", dmabuf->channel->num, cso);
  991. /* ESO and CSO are in units of Samples, convert to byte offset */
  992. cso <<= sample_shift[dmabuf->fmt];
  993. return (cso % dmabuf->dmasize);
  994. }
  995. /* Stop recording (lock held) */
  996. static inline void
  997. __stop_adc(struct trident_state *state)
  998. {
  999. struct dmabuf *dmabuf = &state->dmabuf;
  1000. unsigned int chan_num = dmabuf->channel->num;
  1001. struct trident_card *card = state->card;
  1002. dmabuf->enable &= ~ADC_RUNNING;
  1003. trident_stop_voice(card, chan_num);
  1004. trident_disable_voice_irq(card, chan_num);
  1005. }
  1006. static void
  1007. stop_adc(struct trident_state *state)
  1008. {
  1009. struct trident_card *card = state->card;
  1010. unsigned long flags;
  1011. spin_lock_irqsave(&card->lock, flags);
  1012. __stop_adc(state);
  1013. spin_unlock_irqrestore(&card->lock, flags);
  1014. }
  1015. static void
  1016. start_adc(struct trident_state *state)
  1017. {
  1018. struct dmabuf *dmabuf = &state->dmabuf;
  1019. unsigned int chan_num = dmabuf->channel->num;
  1020. struct trident_card *card = state->card;
  1021. unsigned long flags;
  1022. spin_lock_irqsave(&card->lock, flags);
  1023. if ((dmabuf->mapped ||
  1024. dmabuf->count < (signed) dmabuf->dmasize) &&
  1025. dmabuf->ready) {
  1026. dmabuf->enable |= ADC_RUNNING;
  1027. trident_enable_voice_irq(card, chan_num);
  1028. trident_start_voice(card, chan_num);
  1029. }
  1030. spin_unlock_irqrestore(&card->lock, flags);
  1031. }
  1032. /* stop playback (lock held) */
  1033. static inline void
  1034. __stop_dac(struct trident_state *state)
  1035. {
  1036. struct dmabuf *dmabuf = &state->dmabuf;
  1037. unsigned int chan_num = dmabuf->channel->num;
  1038. struct trident_card *card = state->card;
  1039. dmabuf->enable &= ~DAC_RUNNING;
  1040. trident_stop_voice(card, chan_num);
  1041. if (state->chans_num == 6) {
  1042. trident_stop_voice(card, state->other_states[0]->
  1043. dmabuf.channel->num);
  1044. trident_stop_voice(card, state->other_states[1]->
  1045. dmabuf.channel->num);
  1046. trident_stop_voice(card, state->other_states[2]->
  1047. dmabuf.channel->num);
  1048. trident_stop_voice(card, state->other_states[3]->
  1049. dmabuf.channel->num);
  1050. }
  1051. trident_disable_voice_irq(card, chan_num);
  1052. }
  1053. static void
  1054. stop_dac(struct trident_state *state)
  1055. {
  1056. struct trident_card *card = state->card;
  1057. unsigned long flags;
  1058. spin_lock_irqsave(&card->lock, flags);
  1059. __stop_dac(state);
  1060. spin_unlock_irqrestore(&card->lock, flags);
  1061. }
  1062. static void
  1063. start_dac(struct trident_state *state)
  1064. {
  1065. struct dmabuf *dmabuf = &state->dmabuf;
  1066. unsigned int chan_num = dmabuf->channel->num;
  1067. struct trident_card *card = state->card;
  1068. unsigned long flags;
  1069. spin_lock_irqsave(&card->lock, flags);
  1070. if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
  1071. dmabuf->enable |= DAC_RUNNING;
  1072. trident_enable_voice_irq(card, chan_num);
  1073. trident_start_voice(card, chan_num);
  1074. if (state->chans_num == 6) {
  1075. trident_start_voice(card, state->other_states[0]->
  1076. dmabuf.channel->num);
  1077. trident_start_voice(card, state->other_states[1]->
  1078. dmabuf.channel->num);
  1079. trident_start_voice(card, state->other_states[2]->
  1080. dmabuf.channel->num);
  1081. trident_start_voice(card, state->other_states[3]->
  1082. dmabuf.channel->num);
  1083. }
  1084. }
  1085. spin_unlock_irqrestore(&card->lock, flags);
  1086. }
  1087. #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
  1088. #define DMABUF_MINORDER 1
  1089. /* alloc a DMA buffer of with a buffer of this order */
  1090. static int
  1091. alloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev, int order)
  1092. {
  1093. void *rawbuf = NULL;
  1094. struct page *page, *pend;
  1095. if (!(rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order,
  1096. &dmabuf->dma_handle)))
  1097. return -ENOMEM;
  1098. pr_debug("trident: allocated %ld (order = %d) bytes at %p\n",
  1099. PAGE_SIZE << order, order, rawbuf);
  1100. dmabuf->ready = dmabuf->mapped = 0;
  1101. dmabuf->rawbuf = rawbuf;
  1102. dmabuf->buforder = order;
  1103. /* now mark the pages as reserved; otherwise */
  1104. /* remap_pfn_range doesn't do what we want */
  1105. pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
  1106. for (page = virt_to_page(rawbuf); page <= pend; page++)
  1107. SetPageReserved(page);
  1108. return 0;
  1109. }
  1110. /* allocate the main DMA buffer, playback and recording buffer should be */
  1111. /* allocated separately */
  1112. static int
  1113. alloc_main_dmabuf(struct trident_state *state)
  1114. {
  1115. struct dmabuf *dmabuf = &state->dmabuf;
  1116. int order;
  1117. int ret = -ENOMEM;
  1118. /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
  1119. for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
  1120. if (!(ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order)))
  1121. return 0;
  1122. /* else try again */
  1123. }
  1124. return ret;
  1125. }
  1126. /* deallocate a DMA buffer */
  1127. static void
  1128. dealloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev)
  1129. {
  1130. struct page *page, *pend;
  1131. if (dmabuf->rawbuf) {
  1132. /* undo marking the pages as reserved */
  1133. pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
  1134. for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
  1135. ClearPageReserved(page);
  1136. pci_free_consistent(pci_dev, PAGE_SIZE << dmabuf->buforder,
  1137. dmabuf->rawbuf, dmabuf->dma_handle);
  1138. dmabuf->rawbuf = NULL;
  1139. }
  1140. dmabuf->mapped = dmabuf->ready = 0;
  1141. }
  1142. static int
  1143. prog_dmabuf(struct trident_state *state, enum dmabuf_mode rec)
  1144. {
  1145. struct dmabuf *dmabuf = &state->dmabuf;
  1146. unsigned bytepersec;
  1147. struct trident_state *s = state;
  1148. unsigned bufsize, dma_nums;
  1149. unsigned long flags;
  1150. int ret, i, order;
  1151. if ((ret = lock_set_fmt(state)) < 0)
  1152. return ret;
  1153. if (state->chans_num == 6)
  1154. dma_nums = 5;
  1155. else
  1156. dma_nums = 1;
  1157. for (i = 0; i < dma_nums; i++) {
  1158. if (i > 0) {
  1159. s = state->other_states[i - 1];
  1160. dmabuf = &s->dmabuf;
  1161. dmabuf->fmt = state->dmabuf.fmt;
  1162. dmabuf->rate = state->dmabuf.rate;
  1163. }
  1164. spin_lock_irqsave(&s->card->lock, flags);
  1165. dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
  1166. dmabuf->count = dmabuf->error = 0;
  1167. spin_unlock_irqrestore(&s->card->lock, flags);
  1168. /* allocate DMA buffer if not allocated yet */
  1169. if (!dmabuf->rawbuf) {
  1170. if (i == 0) {
  1171. if ((ret = alloc_main_dmabuf(state))) {
  1172. unlock_set_fmt(state);
  1173. return ret;
  1174. }
  1175. } else {
  1176. ret = -ENOMEM;
  1177. order = state->dmabuf.buforder - 1;
  1178. if (order >= DMABUF_MINORDER) {
  1179. ret = alloc_dmabuf(dmabuf,
  1180. state->card->pci_dev,
  1181. order);
  1182. }
  1183. if (ret) {
  1184. /* release the main DMA buffer */
  1185. dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
  1186. /* release the auxiliary DMA buffers */
  1187. for (i -= 2; i >= 0; i--)
  1188. dealloc_dmabuf(&state->other_states[i]->dmabuf,
  1189. state->card->pci_dev);
  1190. unlock_set_fmt(state);
  1191. return ret;
  1192. }
  1193. }
  1194. }
  1195. /* FIXME: figure out all this OSS fragment stuff */
  1196. bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
  1197. bufsize = PAGE_SIZE << dmabuf->buforder;
  1198. if (dmabuf->ossfragshift) {
  1199. if ((1000 << dmabuf->ossfragshift) < bytepersec)
  1200. dmabuf->fragshift = ld2(bytepersec / 1000);
  1201. else
  1202. dmabuf->fragshift = dmabuf->ossfragshift;
  1203. } else {
  1204. /* lets hand out reasonable big ass buffers by default */
  1205. dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT - 2);
  1206. }
  1207. dmabuf->numfrag = bufsize >> dmabuf->fragshift;
  1208. while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
  1209. dmabuf->fragshift--;
  1210. dmabuf->numfrag = bufsize >> dmabuf->fragshift;
  1211. }
  1212. dmabuf->fragsize = 1 << dmabuf->fragshift;
  1213. if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
  1214. dmabuf->numfrag = dmabuf->ossmaxfrags;
  1215. dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
  1216. dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
  1217. memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
  1218. dmabuf->dmasize);
  1219. spin_lock_irqsave(&s->card->lock, flags);
  1220. if (rec == DM_RECORD)
  1221. trident_rec_setup(s);
  1222. else /* DM_PLAYBACK */
  1223. trident_play_setup(s);
  1224. spin_unlock_irqrestore(&s->card->lock, flags);
  1225. /* set the ready flag for the dma buffer */
  1226. dmabuf->ready = 1;
  1227. pr_debug("trident: prog_dmabuf(%d), sample rate = %d, "
  1228. "format = %d, numfrag = %d, fragsize = %d "
  1229. "dmasize = %d\n", dmabuf->channel->num,
  1230. dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
  1231. dmabuf->fragsize, dmabuf->dmasize);
  1232. }
  1233. unlock_set_fmt(state);
  1234. return 0;
  1235. }
  1236. static inline int prog_dmabuf_record(struct trident_state* state)
  1237. {
  1238. return prog_dmabuf(state, DM_RECORD);
  1239. }
  1240. static inline int prog_dmabuf_playback(struct trident_state* state)
  1241. {
  1242. return prog_dmabuf(state, DM_PLAYBACK);
  1243. }
  1244. /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
  1245. |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx|
  1246. but we almost always get this
  1247. |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------|
  1248. so we have to clear the tail space to "silence"
  1249. |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000|
  1250. */
  1251. static void
  1252. trident_clear_tail(struct trident_state *state)
  1253. {
  1254. struct dmabuf *dmabuf = &state->dmabuf;
  1255. unsigned swptr;
  1256. unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
  1257. unsigned int len;
  1258. unsigned long flags;
  1259. spin_lock_irqsave(&state->card->lock, flags);
  1260. swptr = dmabuf->swptr;
  1261. spin_unlock_irqrestore(&state->card->lock, flags);
  1262. if (swptr == 0 || swptr == dmabuf->dmasize / 2 ||
  1263. swptr == dmabuf->dmasize)
  1264. return;
  1265. if (swptr < dmabuf->dmasize / 2)
  1266. len = dmabuf->dmasize / 2 - swptr;
  1267. else
  1268. len = dmabuf->dmasize - swptr;
  1269. memset(dmabuf->rawbuf + swptr, silence, len);
  1270. if (state->card->pci_id != PCI_DEVICE_ID_ALI_5451) {
  1271. spin_lock_irqsave(&state->card->lock, flags);
  1272. dmabuf->swptr += len;
  1273. dmabuf->count += len;
  1274. spin_unlock_irqrestore(&state->card->lock, flags);
  1275. }
  1276. /* restart the dma machine in case it is halted */
  1277. start_dac(state);
  1278. }
  1279. static int
  1280. drain_dac(struct trident_state *state, int nonblock)
  1281. {
  1282. DECLARE_WAITQUEUE(wait, current);
  1283. struct dmabuf *dmabuf = &state->dmabuf;
  1284. unsigned long flags;
  1285. unsigned long tmo;
  1286. int count;
  1287. unsigned long diff = 0;
  1288. if (dmabuf->mapped || !dmabuf->ready)
  1289. return 0;
  1290. add_wait_queue(&dmabuf->wait, &wait);
  1291. for (;;) {
  1292. /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
  1293. every time to make the process really go to sleep */
  1294. set_current_state(TASK_INTERRUPTIBLE);
  1295. spin_lock_irqsave(&state->card->lock, flags);
  1296. count = dmabuf->count;
  1297. spin_unlock_irqrestore(&state->card->lock, flags);
  1298. if (count <= 0)
  1299. break;
  1300. if (signal_pending(current))
  1301. break;
  1302. if (nonblock) {
  1303. remove_wait_queue(&dmabuf->wait, &wait);
  1304. set_current_state(TASK_RUNNING);
  1305. return -EBUSY;
  1306. }
  1307. /* No matter how much data is left in the buffer, we have to wait until
  1308. CSO == ESO/2 or CSO == ESO when address engine interrupts */
  1309. if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
  1310. state->card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
  1311. diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize;
  1312. diff = diff % (dmabuf->dmasize);
  1313. tmo = (diff * HZ) / dmabuf->rate;
  1314. } else {
  1315. tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
  1316. }
  1317. tmo >>= sample_shift[dmabuf->fmt];
  1318. if (!schedule_timeout(tmo ? tmo : 1) && tmo) {
  1319. break;
  1320. }
  1321. }
  1322. remove_wait_queue(&dmabuf->wait, &wait);
  1323. set_current_state(TASK_RUNNING);
  1324. if (signal_pending(current))
  1325. return -ERESTARTSYS;
  1326. return 0;
  1327. }
  1328. /* update buffer manangement pointers, especially, */
  1329. /* dmabuf->count and dmabuf->hwptr */
  1330. static void
  1331. trident_update_ptr(struct trident_state *state)
  1332. {
  1333. struct dmabuf *dmabuf = &state->dmabuf;
  1334. unsigned hwptr, swptr;
  1335. int clear_cnt = 0;
  1336. int diff;
  1337. unsigned char silence;
  1338. unsigned half_dmasize;
  1339. /* update hardware pointer */
  1340. hwptr = trident_get_dma_addr(state);
  1341. diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
  1342. dmabuf->hwptr = hwptr;
  1343. dmabuf->total_bytes += diff;
  1344. /* error handling and process wake up for ADC */
  1345. if (dmabuf->enable == ADC_RUNNING) {
  1346. if (dmabuf->mapped) {
  1347. dmabuf->count -= diff;
  1348. if (dmabuf->count >= (signed) dmabuf->fragsize)
  1349. wake_up(&dmabuf->wait);
  1350. } else {
  1351. dmabuf->count += diff;
  1352. if (dmabuf->count < 0 ||
  1353. dmabuf->count > dmabuf->dmasize) {
  1354. /* buffer underrun or buffer overrun, */
  1355. /* we have no way to recover it here, just */
  1356. /* stop the machine and let the process */
  1357. /* force hwptr and swptr to sync */
  1358. __stop_adc(state);
  1359. dmabuf->error++;
  1360. }
  1361. if (dmabuf->count < (signed) dmabuf->dmasize / 2)
  1362. wake_up(&dmabuf->wait);
  1363. }
  1364. }
  1365. /* error handling and process wake up for DAC */
  1366. if (dmabuf->enable == DAC_RUNNING) {
  1367. if (dmabuf->mapped) {
  1368. dmabuf->count += diff;
  1369. if (dmabuf->count >= (signed) dmabuf->fragsize)
  1370. wake_up(&dmabuf->wait);
  1371. } else {
  1372. dmabuf->count -= diff;
  1373. if (dmabuf->count < 0 ||
  1374. dmabuf->count > dmabuf->dmasize) {
  1375. /* buffer underrun or buffer overrun, we have no way to recover
  1376. it here, just stop the machine and let the process force hwptr
  1377. and swptr to sync */
  1378. __stop_dac(state);
  1379. dmabuf->error++;
  1380. } else if (!dmabuf->endcleared) {
  1381. swptr = dmabuf->swptr;
  1382. silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
  1383. if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
  1384. /* We must clear end data of 1/2 dmabuf if needed.
  1385. According to 1/2 algorithm of Address Engine Interrupt,
  1386. check the validation of the data of half dmasize. */
  1387. half_dmasize = dmabuf->dmasize / 2;
  1388. if ((diff = hwptr - half_dmasize) < 0)
  1389. diff = hwptr;
  1390. if ((dmabuf->count + diff) < half_dmasize) {
  1391. //there is invalid data in the end of half buffer
  1392. if ((clear_cnt = half_dmasize - swptr) < 0)
  1393. clear_cnt += half_dmasize;
  1394. //clear the invalid data
  1395. memset(dmabuf->rawbuf + swptr, silence, clear_cnt);
  1396. if (state->chans_num == 6) {
  1397. clear_cnt = clear_cnt / 2;
  1398. swptr = swptr / 2;
  1399. memset(state->other_states[0]->dmabuf.rawbuf + swptr,
  1400. silence, clear_cnt);
  1401. memset(state->other_states[1]->dmabuf.rawbuf + swptr,
  1402. silence, clear_cnt);
  1403. memset(state->other_states[2]->dmabuf.rawbuf + swptr,
  1404. silence, clear_cnt);
  1405. memset(state->other_states[3]->dmabuf.rawbuf + swptr,
  1406. silence, clear_cnt);
  1407. }
  1408. dmabuf->endcleared = 1;
  1409. }
  1410. } else if (dmabuf->count < (signed) dmabuf->fragsize) {
  1411. clear_cnt = dmabuf->fragsize;
  1412. if ((swptr + clear_cnt) > dmabuf->dmasize)
  1413. clear_cnt = dmabuf->dmasize - swptr;
  1414. memset(dmabuf->rawbuf + swptr, silence, clear_cnt);
  1415. if (state->chans_num == 6) {
  1416. clear_cnt = clear_cnt / 2;
  1417. swptr = swptr / 2;
  1418. memset(state->other_states[0]->dmabuf.rawbuf + swptr,
  1419. silence, clear_cnt);
  1420. memset(state->other_states[1]->dmabuf.rawbuf + swptr,
  1421. silence, clear_cnt);
  1422. memset(state->other_states[2]->dmabuf.rawbuf + swptr,
  1423. silence, clear_cnt);
  1424. memset(state->other_states[3]->dmabuf.rawbuf + swptr,
  1425. silence, clear_cnt);
  1426. }
  1427. dmabuf->endcleared = 1;
  1428. }
  1429. }
  1430. /* trident_update_ptr is called by interrupt handler or by process via
  1431. ioctl/poll, we only wake up the waiting process when we have more
  1432. than 1/2 buffer free (always true for interrupt handler) */
  1433. if (dmabuf->count < (signed) dmabuf->dmasize / 2)
  1434. wake_up(&dmabuf->wait);
  1435. }
  1436. }
  1437. dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
  1438. }
  1439. static void
  1440. trident_address_interrupt(struct trident_card *card)
  1441. {
  1442. int i;
  1443. struct trident_state *state;
  1444. unsigned int channel;
  1445. /* Update the pointers for all channels we are running. */
  1446. /* FIXME: should read interrupt status only once */
  1447. for (i = 0; i < NR_HW_CH; i++) {
  1448. channel = 63 - i;
  1449. if (trident_check_channel_interrupt(card, channel)) {
  1450. trident_ack_channel_interrupt(card, channel);
  1451. if ((state = card->states[i]) != NULL) {
  1452. trident_update_ptr(state);
  1453. } else {
  1454. printk(KERN_WARNING "trident: spurious channel "
  1455. "irq %d.\n", channel);
  1456. trident_stop_voice(card, channel);
  1457. trident_disable_voice_irq(card, channel);
  1458. }
  1459. }
  1460. }
  1461. }
  1462. static void
  1463. ali_hwvol_control(struct trident_card *card, int opt)
  1464. {
  1465. u16 dwTemp, volume[2], mute, diff, *pVol[2];
  1466. dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02);
  1467. mute = dwTemp & 0x8000;
  1468. volume[0] = dwTemp & 0x001f;
  1469. volume[1] = (dwTemp & 0x1f00) >> 8;
  1470. if (volume[0] < volume[1]) {
  1471. pVol[0] = &volume[0];
  1472. pVol[1] = &volume[1];
  1473. } else {
  1474. pVol[1] = &volume[0];
  1475. pVol[0] = &volume[1];
  1476. }
  1477. diff = *(pVol[1]) - *(pVol[0]);
  1478. if (opt == 1) { // MUTE
  1479. dwTemp ^= 0x8000;
  1480. ali_ac97_write(card->ac97_codec[0],
  1481. 0x02, dwTemp);
  1482. } else if (opt == 2) { // Down
  1483. if (mute)
  1484. return;
  1485. if (*(pVol[1]) < 0x001f) {
  1486. (*pVol[1])++;
  1487. *(pVol[0]) = *(pVol[1]) - diff;
  1488. }
  1489. dwTemp &= 0xe0e0;
  1490. dwTemp |= (volume[0]) | (volume[1] << 8);
  1491. ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
  1492. card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) |
  1493. (((32 - volume[1]) * 25 / 8) << 8);
  1494. } else if (opt == 4) { // Up
  1495. if (mute)
  1496. return;
  1497. if (*(pVol[0]) > 0) {
  1498. (*pVol[0])--;
  1499. *(pVol[1]) = *(pVol[0]) + diff;
  1500. }
  1501. dwTemp &= 0xe0e0;
  1502. dwTemp |= (volume[0]) | (volume[1] << 8);
  1503. ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
  1504. card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) |
  1505. (((32 - volume[1]) * 25 / 8) << 8);
  1506. } else {
  1507. /* Nothing needs doing */
  1508. }
  1509. }
  1510. /*
  1511. * Re-enable reporting of vol change after 0.1 seconds
  1512. */
  1513. static void
  1514. ali_timeout(unsigned long ptr)
  1515. {
  1516. struct trident_card *card = (struct trident_card *) ptr;
  1517. u16 temp = 0;
  1518. /* Enable GPIO IRQ (MISCINT bit 18h) */
  1519. temp = inw(TRID_REG(card, T4D_MISCINT + 2));
  1520. temp |= 0x0004;
  1521. outw(temp, TRID_REG(card, T4D_MISCINT + 2));
  1522. }
  1523. /*
  1524. * Set up the timer to clear the vol change notification
  1525. */
  1526. static void
  1527. ali_set_timer(struct trident_card *card)
  1528. {
  1529. /* Add Timer Routine to Enable GPIO IRQ */
  1530. del_timer(&card->timer); /* Never queue twice */
  1531. card->timer.function = ali_timeout;
  1532. card->timer.data = (unsigned long) card;
  1533. card->timer.expires = jiffies + HZ / 10;
  1534. add_timer(&card->timer);
  1535. }
  1536. /*
  1537. * Process a GPIO event
  1538. */
  1539. static void
  1540. ali_queue_task(struct trident_card *card, int opt)
  1541. {
  1542. u16 temp;
  1543. /* Disable GPIO IRQ (MISCINT bit 18h) */
  1544. temp = inw(TRID_REG(card, T4D_MISCINT + 2));
  1545. temp &= (u16) (~0x0004);
  1546. outw(temp, TRID_REG(card, T4D_MISCINT + 2));
  1547. /* Adjust the volume */
  1548. ali_hwvol_control(card, opt);
  1549. /* Set the timer for 1/10th sec */
  1550. ali_set_timer(card);
  1551. }
  1552. static void
  1553. cyber_address_interrupt(struct trident_card *card)
  1554. {
  1555. int i, irq_status;
  1556. struct trident_state *state;
  1557. unsigned int channel;
  1558. /* Update the pointers for all channels we are running. */
  1559. /* FIXED: read interrupt status only once */
  1560. irq_status = inl(TRID_REG(card, T4D_AINT_A));
  1561. pr_debug("cyber_address_interrupt: irq_status 0x%X\n", irq_status);
  1562. for (i = 0; i < NR_HW_CH; i++) {
  1563. channel = 31 - i;
  1564. if (irq_status & (1 << channel)) {
  1565. /* clear bit by writing a 1, zeroes are ignored */
  1566. outl((1 << channel), TRID_REG(card, T4D_AINT_A));
  1567. pr_debug("cyber_interrupt: channel %d\n", channel);
  1568. if ((state = card->states[i]) != NULL) {
  1569. trident_update_ptr(state);
  1570. } else {
  1571. printk(KERN_WARNING "cyber5050: spurious "
  1572. "channel irq %d.\n", channel);
  1573. trident_stop_voice(card, channel);
  1574. trident_disable_voice_irq(card, channel);
  1575. }
  1576. }
  1577. }
  1578. }
  1579. static irqreturn_t
  1580. trident_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1581. {
  1582. struct trident_card *card = (struct trident_card *) dev_id;
  1583. u32 event;
  1584. u32 gpio;
  1585. spin_lock(&card->lock);
  1586. event = inl(TRID_REG(card, T4D_MISCINT));
  1587. pr_debug("trident: trident_interrupt called, MISCINT = 0x%08x\n",
  1588. event);
  1589. if (event & ADDRESS_IRQ) {
  1590. card->address_interrupt(card);
  1591. }
  1592. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  1593. /* GPIO IRQ (H/W Volume Control) */
  1594. event = inl(TRID_REG(card, T4D_MISCINT));
  1595. if (event & (1 << 25)) {
  1596. gpio = inl(TRID_REG(card, ALI_GPIO));
  1597. if (!timer_pending(&card->timer))
  1598. ali_queue_task(card, gpio & 0x07);
  1599. }
  1600. event = inl(TRID_REG(card, T4D_MISCINT));
  1601. outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
  1602. TRID_REG(card, T4D_MISCINT));
  1603. spin_unlock(&card->lock);
  1604. return IRQ_HANDLED;
  1605. }
  1606. /* manually clear interrupt status, bad hardware design, blame T^2 */
  1607. outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
  1608. TRID_REG(card, T4D_MISCINT));
  1609. spin_unlock(&card->lock);
  1610. return IRQ_HANDLED;
  1611. }
  1612. /* in this loop, dmabuf.count signifies the amount of data that is waiting */
  1613. /* to be copied to the user's buffer. it is filled by the dma machine and */
  1614. /* drained by this loop. */
  1615. static ssize_t
  1616. trident_read(struct file *file, char __user *buffer, size_t count, loff_t * ppos)
  1617. {
  1618. struct trident_state *state = (struct trident_state *)file->private_data;
  1619. struct dmabuf *dmabuf = &state->dmabuf;
  1620. ssize_t ret = 0;
  1621. unsigned long flags;
  1622. unsigned swptr;
  1623. int cnt;
  1624. pr_debug("trident: trident_read called, count = %d\n", count);
  1625. VALIDATE_STATE(state);
  1626. if (dmabuf->mapped)
  1627. return -ENXIO;
  1628. if (!access_ok(VERIFY_WRITE, buffer, count))
  1629. return -EFAULT;
  1630. mutex_lock(&state->sem);
  1631. if (!dmabuf->ready && (ret = prog_dmabuf_record(state)))
  1632. goto out;
  1633. while (count > 0) {
  1634. spin_lock_irqsave(&state->card->lock, flags);
  1635. if (dmabuf->count > (signed) dmabuf->dmasize) {
  1636. /* buffer overrun, we are recovering from */
  1637. /* sleep_on_timeout, resync hwptr and swptr, */
  1638. /* make process flush the buffer */
  1639. dmabuf->count = dmabuf->dmasize;
  1640. dmabuf->swptr = dmabuf->hwptr;
  1641. }
  1642. swptr = dmabuf->swptr;
  1643. cnt = dmabuf->dmasize - swptr;
  1644. if (dmabuf->count < cnt)
  1645. cnt = dmabuf->count;
  1646. spin_unlock_irqrestore(&state->card->lock, flags);
  1647. if (cnt > count)
  1648. cnt = count;
  1649. if (cnt <= 0) {
  1650. unsigned long tmo;
  1651. /* buffer is empty, start the dma machine and */
  1652. /* wait for data to be recorded */
  1653. start_adc(state);
  1654. if (file->f_flags & O_NONBLOCK) {
  1655. if (!ret)
  1656. ret = -EAGAIN;
  1657. goto out;
  1658. }
  1659. mutex_unlock(&state->sem);
  1660. /* No matter how much space left in the buffer, */
  1661. /* we have to wait until CSO == ESO/2 or CSO == ESO */
  1662. /* when address engine interrupts */
  1663. tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
  1664. tmo >>= sample_shift[dmabuf->fmt];
  1665. /* There are two situations when sleep_on_timeout returns, one is when
  1666. the interrupt is serviced correctly and the process is waked up by
  1667. ISR ON TIME. Another is when timeout is expired, which means that
  1668. either interrupt is NOT serviced correctly (pending interrupt) or it
  1669. is TOO LATE for the process to be scheduled to run (scheduler latency)
  1670. which results in a (potential) buffer overrun. And worse, there is
  1671. NOTHING we can do to prevent it. */
  1672. if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
  1673. pr_debug(KERN_ERR "trident: recording schedule timeout, "
  1674. "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
  1675. dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
  1676. dmabuf->hwptr, dmabuf->swptr);
  1677. /* a buffer overrun, we delay the recovery until next time the
  1678. while loop begin and we REALLY have space to record */
  1679. }
  1680. if (signal_pending(current)) {
  1681. if (!ret)
  1682. ret = -ERESTARTSYS;
  1683. goto out;
  1684. }
  1685. mutex_lock(&state->sem);
  1686. if (dmabuf->mapped) {
  1687. if (!ret)
  1688. ret = -ENXIO;
  1689. goto out;
  1690. }
  1691. continue;
  1692. }
  1693. if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
  1694. if (!ret)
  1695. ret = -EFAULT;
  1696. goto out;
  1697. }
  1698. swptr = (swptr + cnt) % dmabuf->dmasize;
  1699. spin_lock_irqsave(&state->card->lock, flags);
  1700. dmabuf->swptr = swptr;
  1701. dmabuf->count -= cnt;
  1702. spin_unlock_irqrestore(&state->card->lock, flags);
  1703. count -= cnt;
  1704. buffer += cnt;
  1705. ret += cnt;
  1706. start_adc(state);
  1707. }
  1708. out:
  1709. mutex_unlock(&state->sem);
  1710. return ret;
  1711. }
  1712. /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
  1713. the soundcard. it is drained by the dma machine and filled by this loop. */
  1714. static ssize_t
  1715. trident_write(struct file *file, const char __user *buffer, size_t count, loff_t * ppos)
  1716. {
  1717. struct trident_state *state = (struct trident_state *)file->private_data;
  1718. struct dmabuf *dmabuf = &state->dmabuf;
  1719. ssize_t ret;
  1720. unsigned long flags;
  1721. unsigned swptr;
  1722. int cnt;
  1723. unsigned int state_cnt;
  1724. unsigned int copy_count;
  1725. int lret; /* for lock_set_fmt */
  1726. pr_debug("trident: trident_write called, count = %d\n", count);
  1727. VALIDATE_STATE(state);
  1728. /*
  1729. * Guard against an mmap or ioctl while writing
  1730. */
  1731. mutex_lock(&state->sem);
  1732. if (dmabuf->mapped) {
  1733. ret = -ENXIO;
  1734. goto out;
  1735. }
  1736. if (!dmabuf->ready && (ret = prog_dmabuf_playback(state)))
  1737. goto out;
  1738. if (!access_ok(VERIFY_READ, buffer, count)) {
  1739. ret = -EFAULT;
  1740. goto out;
  1741. }
  1742. ret = 0;
  1743. while (count > 0) {
  1744. spin_lock_irqsave(&state->card->lock, flags);
  1745. if (dmabuf->count < 0) {
  1746. /* buffer underrun, we are recovering from */
  1747. /* sleep_on_timeout, resync hwptr and swptr */
  1748. dmabuf->count = 0;
  1749. dmabuf->swptr = dmabuf->hwptr;
  1750. }
  1751. swptr = dmabuf->swptr;
  1752. cnt = dmabuf->dmasize - swptr;
  1753. if (dmabuf->count + cnt > dmabuf->dmasize)
  1754. cnt = dmabuf->dmasize - dmabuf->count;
  1755. spin_unlock_irqrestore(&state->card->lock, flags);
  1756. if (cnt > count)
  1757. cnt = count;
  1758. if (cnt <= 0) {
  1759. unsigned long tmo;
  1760. /* buffer is full, start the dma machine and */
  1761. /* wait for data to be played */
  1762. start_dac(state);
  1763. if (file->f_flags & O_NONBLOCK) {
  1764. if (!ret)
  1765. ret = -EAGAIN;
  1766. goto out;
  1767. }
  1768. /* No matter how much data left in the buffer, */
  1769. /* we have to wait until CSO == ESO/2 or CSO == ESO */
  1770. /* when address engine interrupts */
  1771. lock_set_fmt(state);
  1772. tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
  1773. tmo >>= sample_shift[dmabuf->fmt];
  1774. unlock_set_fmt(state);
  1775. mutex_unlock(&state->sem);
  1776. /* There are two situations when sleep_on_timeout */
  1777. /* returns, one is when the interrupt is serviced */
  1778. /* correctly and the process is waked up by ISR */
  1779. /* ON TIME. Another is when timeout is expired, which */
  1780. /* means that either interrupt is NOT serviced */
  1781. /* correctly (pending interrupt) or it is TOO LATE */
  1782. /* for the process to be scheduled to run */
  1783. /* (scheduler latency) which results in a (potential) */
  1784. /* buffer underrun. And worse, there is NOTHING we */
  1785. /* can do to prevent it. */
  1786. if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
  1787. pr_debug(KERN_ERR "trident: playback schedule "
  1788. "timeout, dmasz %u fragsz %u count %i "
  1789. "hwptr %u swptr %u\n", dmabuf->dmasize,
  1790. dmabuf->fragsize, dmabuf->count,
  1791. dmabuf->hwptr, dmabuf->swptr);
  1792. /* a buffer underrun, we delay the recovery */
  1793. /* until next time the while loop begin and */
  1794. /* we REALLY have data to play */
  1795. }
  1796. if (signal_pending(current)) {
  1797. if (!ret)
  1798. ret = -ERESTARTSYS;
  1799. goto out_nolock;
  1800. }
  1801. mutex_lock(&state->sem);
  1802. if (dmabuf->mapped) {
  1803. if (!ret)
  1804. ret = -ENXIO;
  1805. goto out;
  1806. }
  1807. continue;
  1808. }
  1809. if ((lret = lock_set_fmt(state)) < 0) {
  1810. ret = lret;
  1811. goto out;
  1812. }
  1813. if (state->chans_num == 6) {
  1814. copy_count = 0;
  1815. state_cnt = 0;
  1816. if (ali_write_5_1(state, buffer, cnt, &copy_count,
  1817. &state_cnt) == -EFAULT) {
  1818. if (state_cnt) {
  1819. swptr = (swptr + state_cnt) % dmabuf->dmasize;
  1820. spin_lock_irqsave(&state->card->lock, flags);
  1821. dmabuf->swptr = swptr;
  1822. dmabuf->count += state_cnt;
  1823. dmabuf->endcleared = 0;
  1824. spin_unlock_irqrestore(&state->card->lock, flags);
  1825. }
  1826. ret += copy_count;
  1827. if (!ret)
  1828. ret = -EFAULT;
  1829. unlock_set_fmt(state);
  1830. goto out;
  1831. }
  1832. } else {
  1833. if (copy_from_user(dmabuf->rawbuf + swptr,
  1834. buffer, cnt)) {
  1835. if (!ret)
  1836. ret = -EFAULT;
  1837. unlock_set_fmt(state);
  1838. goto out;
  1839. }
  1840. state_cnt = cnt;
  1841. }
  1842. unlock_set_fmt(state);
  1843. swptr = (swptr + state_cnt) % dmabuf->dmasize;
  1844. spin_lock_irqsave(&state->card->lock, flags);
  1845. dmabuf->swptr = swptr;
  1846. dmabuf->count += state_cnt;
  1847. dmabuf->endcleared = 0;
  1848. spin_unlock_irqrestore(&state->card->lock, flags);
  1849. count -= cnt;
  1850. buffer += cnt;
  1851. ret += cnt;
  1852. start_dac(state);
  1853. }
  1854. out:
  1855. mutex_unlock(&state->sem);
  1856. out_nolock:
  1857. return ret;
  1858. }
  1859. /* No kernel lock - we have our own spinlock */
  1860. static unsigned int
  1861. trident_poll(struct file *file, struct poll_table_struct *wait)
  1862. {
  1863. struct trident_state *state = (struct trident_state *)file->private_data;
  1864. struct dmabuf *dmabuf = &state->dmabuf;
  1865. unsigned long flags;
  1866. unsigned int mask = 0;
  1867. VALIDATE_STATE(state);
  1868. /*
  1869. * Guard against a parallel poll and write causing multiple
  1870. * prog_dmabuf events
  1871. */
  1872. mutex_lock(&state->sem);
  1873. if (file->f_mode & FMODE_WRITE) {
  1874. if (!dmabuf->ready && prog_dmabuf_playback(state)) {
  1875. mutex_unlock(&state->sem);
  1876. return 0;
  1877. }
  1878. poll_wait(file, &dmabuf->wait, wait);
  1879. }
  1880. if (file->f_mode & FMODE_READ) {
  1881. if (!dmabuf->ready && prog_dmabuf_record(state)) {
  1882. mutex_unlock(&state->sem);
  1883. return 0;
  1884. }
  1885. poll_wait(file, &dmabuf->wait, wait);
  1886. }
  1887. mutex_unlock(&state->sem);
  1888. spin_lock_irqsave(&state->card->lock, flags);
  1889. trident_update_ptr(state);
  1890. if (file->f_mode & FMODE_READ) {
  1891. if (dmabuf->count >= (signed) dmabuf->fragsize)
  1892. mask |= POLLIN | POLLRDNORM;
  1893. }
  1894. if (file->f_mode & FMODE_WRITE) {
  1895. if (dmabuf->mapped) {
  1896. if (dmabuf->count >= (signed) dmabuf->fragsize)
  1897. mask |= POLLOUT | POLLWRNORM;
  1898. } else {
  1899. if ((signed) dmabuf->dmasize >= dmabuf->count +
  1900. (signed) dmabuf->fragsize)
  1901. mask |= POLLOUT | POLLWRNORM;
  1902. }
  1903. }
  1904. spin_unlock_irqrestore(&state->card->lock, flags);
  1905. return mask;
  1906. }
  1907. static int
  1908. trident_mmap(struct file *file, struct vm_area_struct *vma)
  1909. {
  1910. struct trident_state *state = (struct trident_state *)file->private_data;
  1911. struct dmabuf *dmabuf = &state->dmabuf;
  1912. int ret = -EINVAL;
  1913. unsigned long size;
  1914. VALIDATE_STATE(state);
  1915. /*
  1916. * Lock against poll read write or mmap creating buffers. Also lock
  1917. * a read or write against an mmap.
  1918. */
  1919. mutex_lock(&state->sem);
  1920. if (vma->vm_flags & VM_WRITE) {
  1921. if ((ret = prog_dmabuf_playback(state)) != 0)
  1922. goto out;
  1923. } else if (vma->vm_flags & VM_READ) {
  1924. if ((ret = prog_dmabuf_record(state)) != 0)
  1925. goto out;
  1926. } else
  1927. goto out;
  1928. ret = -EINVAL;
  1929. if (vma->vm_pgoff != 0)
  1930. goto out;
  1931. size = vma->vm_end - vma->vm_start;
  1932. if (size > (PAGE_SIZE << dmabuf->buforder))
  1933. goto out;
  1934. ret = -EAGAIN;
  1935. if (remap_pfn_range(vma, vma->vm_start,
  1936. virt_to_phys(dmabuf->rawbuf) >> PAGE_SHIFT,
  1937. size, vma->vm_page_prot))
  1938. goto out;
  1939. dmabuf->mapped = 1;
  1940. ret = 0;
  1941. out:
  1942. mutex_unlock(&state->sem);
  1943. return ret;
  1944. }
  1945. static int
  1946. trident_ioctl(struct inode *inode, struct file *file,
  1947. unsigned int cmd, unsigned long arg)
  1948. {
  1949. struct trident_state *state = (struct trident_state *)file->private_data;
  1950. struct dmabuf *dmabuf = &state->dmabuf;
  1951. unsigned long flags;
  1952. audio_buf_info abinfo;
  1953. count_info cinfo;
  1954. int val, mapped, ret = 0;
  1955. struct trident_card *card = state->card;
  1956. void __user *argp = (void __user *)arg;
  1957. int __user *p = argp;
  1958. VALIDATE_STATE(state);
  1959. mapped = ((file->f_mode & (FMODE_WRITE | FMODE_READ)) && dmabuf->mapped);
  1960. pr_debug("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
  1961. _IOC_NR(cmd), arg ? *p : 0);
  1962. switch (cmd) {
  1963. case OSS_GETVERSION:
  1964. ret = put_user(SOUND_VERSION, p);
  1965. break;
  1966. case SNDCTL_DSP_RESET:
  1967. /* FIXME: spin_lock ? */
  1968. if (file->f_mode & FMODE_WRITE) {
  1969. stop_dac(state);
  1970. synchronize_irq(card->irq);
  1971. dmabuf->ready = 0;
  1972. dmabuf->swptr = dmabuf->hwptr = 0;
  1973. dmabuf->count = dmabuf->total_bytes = 0;
  1974. }
  1975. if (file->f_mode & FMODE_READ) {
  1976. stop_adc(state);
  1977. synchronize_irq(card->irq);
  1978. dmabuf->ready = 0;
  1979. dmabuf->swptr = dmabuf->hwptr = 0;
  1980. dmabuf->count = dmabuf->total_bytes = 0;
  1981. }
  1982. break;
  1983. case SNDCTL_DSP_SYNC:
  1984. if (file->f_mode & FMODE_WRITE)
  1985. ret = drain_dac(state, file->f_flags & O_NONBLOCK);
  1986. break;
  1987. case SNDCTL_DSP_SPEED: /* set smaple rate */
  1988. if (get_user(val, p)) {
  1989. ret = -EFAULT;
  1990. break;
  1991. }
  1992. if (val >= 0) {
  1993. if (file->f_mode & FMODE_WRITE) {
  1994. stop_dac(state);
  1995. dmabuf->ready = 0;
  1996. spin_lock_irqsave(&state->card->lock, flags);
  1997. trident_set_dac_rate(state, val);
  1998. spin_unlock_irqrestore(&state->card->lock, flags);
  1999. }
  2000. if (file->f_mode & FMODE_READ) {
  2001. stop_adc(state);
  2002. dmabuf->ready = 0;
  2003. spin_lock_irqsave(&state->card->lock, flags);
  2004. trident_set_adc_rate(state, val);
  2005. spin_unlock_irqrestore(&state->card->lock, flags);
  2006. }
  2007. }
  2008. ret = put_user(dmabuf->rate, p);
  2009. break;
  2010. case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
  2011. if (get_user(val, p)) {
  2012. ret = -EFAULT;
  2013. break;
  2014. }
  2015. if ((ret = lock_set_fmt(state)) < 0)
  2016. return ret;
  2017. if (file->f_mode & FMODE_WRITE) {
  2018. stop_dac(state);
  2019. dmabuf->ready = 0;
  2020. if (val)
  2021. dmabuf->fmt |= TRIDENT_FMT_STEREO;
  2022. else
  2023. dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
  2024. }
  2025. if (file->f_mode & FMODE_READ) {
  2026. stop_adc(state);
  2027. dmabuf->ready = 0;
  2028. if (val)
  2029. dmabuf->fmt |= TRIDENT_FMT_STEREO;
  2030. else
  2031. dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
  2032. }
  2033. unlock_set_fmt(state);
  2034. break;
  2035. case SNDCTL_DSP_GETBLKSIZE:
  2036. if (file->f_mode & FMODE_WRITE) {
  2037. if ((val = prog_dmabuf_playback(state)))
  2038. ret = val;
  2039. else
  2040. ret = put_user(dmabuf->fragsize, p);
  2041. break;
  2042. }
  2043. if (file->f_mode & FMODE_READ) {
  2044. if ((val = prog_dmabuf_record(state)))
  2045. ret = val;
  2046. else
  2047. ret = put_user(dmabuf->fragsize, p);
  2048. break;
  2049. }
  2050. /* neither READ nor WRITE? is this even possible? */
  2051. ret = -EINVAL;
  2052. break;
  2053. case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format */
  2054. ret = put_user(AFMT_S16_LE | AFMT_U16_LE | AFMT_S8 |
  2055. AFMT_U8, p);
  2056. break;
  2057. case SNDCTL_DSP_SETFMT: /* Select sample format */
  2058. if (get_user(val, p)) {
  2059. ret = -EFAULT;
  2060. break;
  2061. }
  2062. if ((ret = lock_set_fmt(state)) < 0)
  2063. return ret;
  2064. if (val != AFMT_QUERY) {
  2065. if (file->f_mode & FMODE_WRITE) {
  2066. stop_dac(state);
  2067. dmabuf->ready = 0;
  2068. if (val == AFMT_S16_LE)
  2069. dmabuf->fmt |= TRIDENT_FMT_16BIT;
  2070. else
  2071. dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
  2072. }
  2073. if (file->f_mode & FMODE_READ) {
  2074. stop_adc(state);
  2075. dmabuf->ready = 0;
  2076. if (val == AFMT_S16_LE)
  2077. dmabuf->fmt |= TRIDENT_FMT_16BIT;
  2078. else
  2079. dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
  2080. }
  2081. }
  2082. unlock_set_fmt(state);
  2083. ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE :
  2084. AFMT_U8, p);
  2085. break;
  2086. case SNDCTL_DSP_CHANNELS:
  2087. if (get_user(val, p)) {
  2088. ret = -EFAULT;
  2089. break;
  2090. }
  2091. if (val != 0) {
  2092. if ((ret = lock_set_fmt(state)) < 0)
  2093. return ret;
  2094. if (file->f_mode & FMODE_WRITE) {
  2095. stop_dac(state);
  2096. dmabuf->ready = 0;
  2097. //prevent from memory leak
  2098. if ((state->chans_num > 2) && (state->chans_num != val)) {
  2099. ali_free_other_states_resources(state);
  2100. state->chans_num = 1;
  2101. }
  2102. if (val >= 2) {
  2103. dmabuf->fmt |= TRIDENT_FMT_STEREO;
  2104. if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) {
  2105. if (card->rec_channel_use_count > 0) {
  2106. printk(KERN_ERR "trident: Record is "
  2107. "working on the card!\n");
  2108. ret = -EBUSY;
  2109. unlock_set_fmt(state);
  2110. break;
  2111. }
  2112. ret = ali_setup_multi_channels(state->card, 6);
  2113. if (ret < 0) {
  2114. unlock_set_fmt(state);
  2115. break;
  2116. }
  2117. mutex_lock(&state->card->open_mutex);
  2118. ret = ali_allocate_other_states_resources(state, 6);
  2119. if (ret < 0) {
  2120. mutex_unlock(&state->card->open_mutex);
  2121. unlock_set_fmt(state);
  2122. break;
  2123. }
  2124. state->card->multi_channel_use_count++;
  2125. mutex_unlock(&state->card->open_mutex);
  2126. } else
  2127. val = 2; /*yield to 2-channels */
  2128. } else
  2129. dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
  2130. state->chans_num = val;
  2131. }
  2132. if (file->f_mode & FMODE_READ) {
  2133. stop_adc(state);
  2134. dmabuf->ready = 0;
  2135. if (val >= 2) {
  2136. if (!((file->f_mode & FMODE_WRITE) &&
  2137. (val == 6)))
  2138. val = 2;
  2139. dmabuf->fmt |= TRIDENT_FMT_STEREO;
  2140. } else
  2141. dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
  2142. state->chans_num = val;
  2143. }
  2144. unlock_set_fmt(state);
  2145. }
  2146. ret = put_user(val, p);
  2147. break;
  2148. case SNDCTL_DSP_POST:
  2149. /* Cause the working fragment to be output */
  2150. break;
  2151. case SNDCTL_DSP_SUBDIVIDE:
  2152. if (dmabuf->subdivision) {
  2153. ret = -EINVAL;
  2154. break;
  2155. }
  2156. if (get_user(val, p)) {
  2157. ret = -EFAULT;
  2158. break;
  2159. }
  2160. if (val != 1 && val != 2 && val != 4) {
  2161. ret = -EINVAL;
  2162. break;
  2163. }
  2164. dmabuf->subdivision = val;
  2165. break;
  2166. case SNDCTL_DSP_SETFRAGMENT:
  2167. if (get_user(val, p)) {
  2168. ret = -EFAULT;
  2169. break;
  2170. }
  2171. dmabuf->ossfragshift = val & 0xffff;
  2172. dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
  2173. if (dmabuf->ossfragshift < 4)
  2174. dmabuf->ossfragshift = 4;
  2175. if (dmabuf->ossfragshift > 15)
  2176. dmabuf->ossfragshift = 15;
  2177. if (dmabuf->ossmaxfrags < 4)
  2178. dmabuf->ossmaxfrags = 4;
  2179. break;
  2180. case SNDCTL_DSP_GETOSPACE:
  2181. if (!(file->f_mode & FMODE_WRITE)) {
  2182. ret = -EINVAL;
  2183. break;
  2184. }
  2185. if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) {
  2186. ret = val;
  2187. break;
  2188. }
  2189. spin_lock_irqsave(&state->card->lock, flags);
  2190. trident_update_ptr(state);
  2191. abinfo.fragsize = dmabuf->fragsize;
  2192. abinfo.bytes = dmabuf->dmasize - dmabuf->count;
  2193. abinfo.fragstotal = dmabuf->numfrag;
  2194. abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
  2195. spin_unlock_irqrestore(&state->card->lock, flags);
  2196. ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ?
  2197. -EFAULT : 0;
  2198. break;
  2199. case SNDCTL_DSP_GETISPACE:
  2200. if (!(file->f_mode & FMODE_READ)) {
  2201. ret = -EINVAL;
  2202. break;
  2203. }
  2204. if (!dmabuf->ready && (val = prog_dmabuf_record(state)) != 0) {
  2205. ret = val;
  2206. break;
  2207. }
  2208. spin_lock_irqsave(&state->card->lock, flags);
  2209. trident_update_ptr(state);
  2210. abinfo.fragsize = dmabuf->fragsize;
  2211. abinfo.bytes = dmabuf->count;
  2212. abinfo.fragstotal = dmabuf->numfrag;
  2213. abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
  2214. spin_unlock_irqrestore(&state->card->lock, flags);
  2215. ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ?
  2216. -EFAULT : 0;
  2217. break;
  2218. case SNDCTL_DSP_NONBLOCK:
  2219. file->f_flags |= O_NONBLOCK;
  2220. break;
  2221. case SNDCTL_DSP_GETCAPS:
  2222. ret = put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER |
  2223. DSP_CAP_MMAP | DSP_CAP_BIND, p);
  2224. break;
  2225. case SNDCTL_DSP_GETTRIGGER:
  2226. val = 0;
  2227. if ((file->f_mode & FMODE_READ) && dmabuf->enable)
  2228. val |= PCM_ENABLE_INPUT;
  2229. if ((file->f_mode & FMODE_WRITE) && dmabuf->enable)
  2230. val |= PCM_ENABLE_OUTPUT;
  2231. ret = put_user(val, p);
  2232. break;
  2233. case SNDCTL_DSP_SETTRIGGER:
  2234. if (get_user(val, p)) {
  2235. ret = -EFAULT;
  2236. break;
  2237. }
  2238. if (file->f_mode & FMODE_READ) {
  2239. if (val & PCM_ENABLE_INPUT) {
  2240. if (!dmabuf->ready &&
  2241. (ret = prog_dmabuf_record(state)))
  2242. break;
  2243. start_adc(state);
  2244. } else
  2245. stop_adc(state);
  2246. }
  2247. if (file->f_mode & FMODE_WRITE) {
  2248. if (val & PCM_ENABLE_OUTPUT) {
  2249. if (!dmabuf->ready &&
  2250. (ret = prog_dmabuf_playback(state)))
  2251. break;
  2252. start_dac(state);
  2253. } else
  2254. stop_dac(state);
  2255. }
  2256. break;
  2257. case SNDCTL_DSP_GETIPTR:
  2258. if (!(file->f_mode & FMODE_READ)) {
  2259. ret = -EINVAL;
  2260. break;
  2261. }
  2262. if (!dmabuf->ready && (val = prog_dmabuf_record(state))
  2263. != 0) {
  2264. ret = val;
  2265. break;
  2266. }
  2267. spin_lock_irqsave(&state->card->lock, flags);
  2268. trident_update_ptr(state);
  2269. cinfo.bytes = dmabuf->total_bytes;
  2270. cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
  2271. cinfo.ptr = dmabuf->hwptr;
  2272. if (dmabuf->mapped)
  2273. dmabuf->count &= dmabuf->fragsize - 1;
  2274. spin_unlock_irqrestore(&state->card->lock, flags);
  2275. ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ?
  2276. -EFAULT : 0;
  2277. break;
  2278. case SNDCTL_DSP_GETOPTR:
  2279. if (!(file->f_mode & FMODE_WRITE)) {
  2280. ret = -EINVAL;
  2281. break;
  2282. }
  2283. if (!dmabuf->ready && (val = prog_dmabuf_playback(state))
  2284. != 0) {
  2285. ret = val;
  2286. break;
  2287. }
  2288. spin_lock_irqsave(&state->card->lock, flags);
  2289. trident_update_ptr(state);
  2290. cinfo.bytes = dmabuf->total_bytes;
  2291. cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
  2292. cinfo.ptr = dmabuf->hwptr;
  2293. if (dmabuf->mapped)
  2294. dmabuf->count &= dmabuf->fragsize - 1;
  2295. spin_unlock_irqrestore(&state->card->lock, flags);
  2296. ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ?
  2297. -EFAULT : 0;
  2298. break;
  2299. case SNDCTL_DSP_SETDUPLEX:
  2300. ret = -EINVAL;
  2301. break;
  2302. case SNDCTL_DSP_GETODELAY:
  2303. if (!(file->f_mode & FMODE_WRITE)) {
  2304. ret = -EINVAL;
  2305. break;
  2306. }
  2307. if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) {
  2308. ret = val;
  2309. break;
  2310. }
  2311. spin_lock_irqsave(&state->card->lock, flags);
  2312. trident_update_ptr(state);
  2313. val = dmabuf->count;
  2314. spin_unlock_irqrestore(&state->card->lock, flags);
  2315. ret = put_user(val, p);
  2316. break;
  2317. case SOUND_PCM_READ_RATE:
  2318. ret = put_user(dmabuf->rate, p);
  2319. break;
  2320. case SOUND_PCM_READ_CHANNELS:
  2321. ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
  2322. p);
  2323. break;
  2324. case SOUND_PCM_READ_BITS:
  2325. ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE :
  2326. AFMT_U8, p);
  2327. break;
  2328. case SNDCTL_DSP_GETCHANNELMASK:
  2329. ret = put_user(DSP_BIND_FRONT | DSP_BIND_SURR |
  2330. DSP_BIND_CENTER_LFE, p);
  2331. break;
  2332. case SNDCTL_DSP_BIND_CHANNEL:
  2333. if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
  2334. ret = -EINVAL;
  2335. break;
  2336. }
  2337. if (get_user(val, p)) {
  2338. ret = -EFAULT;
  2339. break;
  2340. }
  2341. if (val == DSP_BIND_QUERY) {
  2342. val = dmabuf->channel->attribute | 0x3c00;
  2343. val = attr2mask[val >> 8];
  2344. } else {
  2345. dmabuf->ready = 0;
  2346. if (file->f_mode & FMODE_READ)
  2347. dmabuf->channel->attribute = (CHANNEL_REC |
  2348. SRC_ENABLE);
  2349. if (file->f_mode & FMODE_WRITE)
  2350. dmabuf->channel->attribute = (CHANNEL_SPC_PB |
  2351. SRC_ENABLE);
  2352. dmabuf->channel->attribute |= mask2attr[ffs(val)];
  2353. }
  2354. ret = put_user(val, p);
  2355. break;
  2356. case SNDCTL_DSP_MAPINBUF:
  2357. case SNDCTL_DSP_MAPOUTBUF:
  2358. case SNDCTL_DSP_SETSYNCRO:
  2359. case SOUND_PCM_WRITE_FILTER:
  2360. case SOUND_PCM_READ_FILTER:
  2361. default:
  2362. ret = -EINVAL;
  2363. break;
  2364. }
  2365. return ret;
  2366. }
  2367. static int
  2368. trident_open(struct inode *inode, struct file *file)
  2369. {
  2370. int i = 0;
  2371. int minor = iminor(inode);
  2372. struct trident_card *card = devs;
  2373. struct trident_state *state = NULL;
  2374. struct dmabuf *dmabuf = NULL;
  2375. /* Added by Matt Wu 01-05-2001 */
  2376. /* TODO: there's some redundacy here wrt the check below */
  2377. /* for multi_use_count > 0. Should we return -EBUSY or find */
  2378. /* a different card? for now, don't break current behaviour */
  2379. /* -- mulix */
  2380. if (file->f_mode & FMODE_READ) {
  2381. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  2382. if (card->multi_channel_use_count > 0)
  2383. return -EBUSY;
  2384. }
  2385. }
  2386. /* find an available virtual channel (instance of /dev/dsp) */
  2387. while (card != NULL) {
  2388. mutex_lock(&card->open_mutex);
  2389. if (file->f_mode & FMODE_READ) {
  2390. /* Skip opens on cards that are in 6 channel mode */
  2391. if (card->multi_channel_use_count > 0) {
  2392. mutex_unlock(&card->open_mutex);
  2393. card = card->next;
  2394. continue;
  2395. }
  2396. }
  2397. for (i = 0; i < NR_HW_CH; i++) {
  2398. if (card->states[i] == NULL) {
  2399. state = card->states[i] = kmalloc(sizeof(*state), GFP_KERNEL);
  2400. if (state == NULL) {
  2401. mutex_unlock(&card->open_mutex);
  2402. return -ENOMEM;
  2403. }
  2404. memset(state, 0, sizeof(*state));
  2405. mutex_init(&state->sem);
  2406. dmabuf = &state->dmabuf;
  2407. goto found_virt;
  2408. }
  2409. }
  2410. mutex_unlock(&card->open_mutex);
  2411. card = card->next;
  2412. }
  2413. /* no more virtual channel avaiable */
  2414. if (!state) {
  2415. return -ENODEV;
  2416. }
  2417. found_virt:
  2418. /* found a free virtual channel, allocate hardware channels */
  2419. if (file->f_mode & FMODE_READ)
  2420. dmabuf->channel = card->alloc_rec_pcm_channel(card);
  2421. else
  2422. dmabuf->channel = card->alloc_pcm_channel(card);
  2423. if (dmabuf->channel == NULL) {
  2424. kfree(card->states[i]);
  2425. card->states[i] = NULL;
  2426. return -ENODEV;
  2427. }
  2428. /* initialize the virtual channel */
  2429. state->virt = i;
  2430. state->card = card;
  2431. state->magic = TRIDENT_STATE_MAGIC;
  2432. init_waitqueue_head(&dmabuf->wait);
  2433. file->private_data = state;
  2434. /* set default sample format. According to OSS Programmer's */
  2435. /* Guide /dev/dsp should be default to unsigned 8-bits, mono, */
  2436. /* with sample rate 8kHz and /dev/dspW will accept 16-bits sample */
  2437. if (file->f_mode & FMODE_WRITE) {
  2438. dmabuf->fmt &= ~TRIDENT_FMT_MASK;
  2439. if ((minor & 0x0f) == SND_DEV_DSP16)
  2440. dmabuf->fmt |= TRIDENT_FMT_16BIT;
  2441. dmabuf->ossfragshift = 0;
  2442. dmabuf->ossmaxfrags = 0;
  2443. dmabuf->subdivision = 0;
  2444. if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
  2445. /* set default channel attribute to normal playback */
  2446. dmabuf->channel->attribute = CHANNEL_PB;
  2447. }
  2448. trident_set_dac_rate(state, 8000);
  2449. }
  2450. if (file->f_mode & FMODE_READ) {
  2451. /* FIXME: Trident 4d can only record in signed 16-bits stereo, */
  2452. /* 48kHz sample, to be dealed with in trident_set_adc_rate() ?? */
  2453. dmabuf->fmt &= ~TRIDENT_FMT_MASK;
  2454. if ((minor & 0x0f) == SND_DEV_DSP16)
  2455. dmabuf->fmt |= TRIDENT_FMT_16BIT;
  2456. dmabuf->ossfragshift = 0;
  2457. dmabuf->ossmaxfrags = 0;
  2458. dmabuf->subdivision = 0;
  2459. if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
  2460. /* set default channel attribute to 0x8a80, record from
  2461. PCM L/R FIFO and mono = (left + right + 1)/2 */
  2462. dmabuf->channel->attribute = (CHANNEL_REC | PCM_LR |
  2463. MONO_MIX);
  2464. }
  2465. trident_set_adc_rate(state, 8000);
  2466. /* Added by Matt Wu 01-05-2001 */
  2467. if (card->pci_id == PCI_DEVICE_ID_ALI_5451)
  2468. card->rec_channel_use_count++;
  2469. }
  2470. state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
  2471. mutex_unlock(&card->open_mutex);
  2472. pr_debug("trident: open virtual channel %d, hard channel %d\n",
  2473. state->virt, dmabuf->channel->num);
  2474. return nonseekable_open(inode, file);
  2475. }
  2476. static int
  2477. trident_release(struct inode *inode, struct file *file)
  2478. {
  2479. struct trident_state *state = (struct trident_state *)file->private_data;
  2480. struct trident_card *card;
  2481. struct dmabuf *dmabuf;
  2482. VALIDATE_STATE(state);
  2483. card = state->card;
  2484. dmabuf = &state->dmabuf;
  2485. if (file->f_mode & FMODE_WRITE) {
  2486. trident_clear_tail(state);
  2487. drain_dac(state, file->f_flags & O_NONBLOCK);
  2488. }
  2489. pr_debug("trident: closing virtual channel %d, hard channel %d\n",
  2490. state->virt, dmabuf->channel->num);
  2491. /* stop DMA state machine and free DMA buffers/channels */
  2492. mutex_lock(&card->open_mutex);
  2493. if (file->f_mode & FMODE_WRITE) {
  2494. stop_dac(state);
  2495. dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
  2496. state->card->free_pcm_channel(state->card, dmabuf->channel->num);
  2497. /* Added by Matt Wu */
  2498. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  2499. if (state->chans_num > 2) {
  2500. if (card->multi_channel_use_count-- < 0)
  2501. card->multi_channel_use_count = 0;
  2502. if (card->multi_channel_use_count == 0)
  2503. ali_close_multi_channels();
  2504. ali_free_other_states_resources(state);
  2505. }
  2506. }
  2507. }
  2508. if (file->f_mode & FMODE_READ) {
  2509. stop_adc(state);
  2510. dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
  2511. state->card->free_pcm_channel(state->card, dmabuf->channel->num);
  2512. /* Added by Matt Wu */
  2513. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  2514. if (card->rec_channel_use_count-- < 0)
  2515. card->rec_channel_use_count = 0;
  2516. }
  2517. }
  2518. card->states[state->virt] = NULL;
  2519. kfree(state);
  2520. /* we're covered by the open_mutex */
  2521. mutex_unlock(&card->open_mutex);
  2522. return 0;
  2523. }
  2524. static /*const */ struct file_operations trident_audio_fops = {
  2525. .owner = THIS_MODULE,
  2526. .llseek = no_llseek,
  2527. .read = trident_read,
  2528. .write = trident_write,
  2529. .poll = trident_poll,
  2530. .ioctl = trident_ioctl,
  2531. .mmap = trident_mmap,
  2532. .open = trident_open,
  2533. .release = trident_release,
  2534. };
  2535. /* trident specific AC97 functions */
  2536. /* Write AC97 codec registers */
  2537. static void
  2538. trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
  2539. {
  2540. struct trident_card *card = (struct trident_card *)codec->private_data;
  2541. unsigned int address, mask, busy;
  2542. unsigned short count = 0xffff;
  2543. unsigned long flags;
  2544. u32 data;
  2545. data = ((u32) val) << 16;
  2546. switch (card->pci_id) {
  2547. default:
  2548. case PCI_DEVICE_ID_SI_7018:
  2549. address = SI_AC97_WRITE;
  2550. mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
  2551. if (codec->id)
  2552. mask |= SI_AC97_SECONDARY;
  2553. busy = SI_AC97_BUSY_WRITE;
  2554. break;
  2555. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  2556. address = DX_ACR0_AC97_W;
  2557. mask = busy = DX_AC97_BUSY_WRITE;
  2558. break;
  2559. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  2560. address = NX_ACR1_AC97_W;
  2561. mask = NX_AC97_BUSY_WRITE;
  2562. if (codec->id)
  2563. mask |= NX_AC97_WRITE_SECONDARY;
  2564. busy = NX_AC97_BUSY_WRITE;
  2565. break;
  2566. case PCI_DEVICE_ID_INTERG_5050:
  2567. address = SI_AC97_WRITE;
  2568. mask = busy = SI_AC97_BUSY_WRITE;
  2569. if (codec->id)
  2570. mask |= SI_AC97_SECONDARY;
  2571. break;
  2572. }
  2573. spin_lock_irqsave(&card->lock, flags);
  2574. do {
  2575. if ((inw(TRID_REG(card, address)) & busy) == 0)
  2576. break;
  2577. } while (count--);
  2578. data |= (mask | (reg & AC97_REG_ADDR));
  2579. if (count == 0) {
  2580. printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
  2581. spin_unlock_irqrestore(&card->lock, flags);
  2582. return;
  2583. }
  2584. outl(data, TRID_REG(card, address));
  2585. spin_unlock_irqrestore(&card->lock, flags);
  2586. }
  2587. /* Read AC97 codec registers */
  2588. static u16
  2589. trident_ac97_get(struct ac97_codec *codec, u8 reg)
  2590. {
  2591. struct trident_card *card = (struct trident_card *)codec->private_data;
  2592. unsigned int address, mask, busy;
  2593. unsigned short count = 0xffff;
  2594. unsigned long flags;
  2595. u32 data;
  2596. switch (card->pci_id) {
  2597. default:
  2598. case PCI_DEVICE_ID_SI_7018:
  2599. address = SI_AC97_READ;
  2600. mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
  2601. if (codec->id)
  2602. mask |= SI_AC97_SECONDARY;
  2603. busy = SI_AC97_BUSY_READ;
  2604. break;
  2605. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  2606. address = DX_ACR1_AC97_R;
  2607. mask = busy = DX_AC97_BUSY_READ;
  2608. break;
  2609. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  2610. if (codec->id)
  2611. address = NX_ACR3_AC97_R_SECONDARY;
  2612. else
  2613. address = NX_ACR2_AC97_R_PRIMARY;
  2614. mask = NX_AC97_BUSY_READ;
  2615. busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
  2616. break;
  2617. case PCI_DEVICE_ID_INTERG_5050:
  2618. address = SI_AC97_READ;
  2619. mask = busy = SI_AC97_BUSY_READ;
  2620. if (codec->id)
  2621. mask |= SI_AC97_SECONDARY;
  2622. break;
  2623. }
  2624. data = (mask | (reg & AC97_REG_ADDR));
  2625. spin_lock_irqsave(&card->lock, flags);
  2626. outl(data, TRID_REG(card, address));
  2627. do {
  2628. data = inl(TRID_REG(card, address));
  2629. if ((data & busy) == 0)
  2630. break;
  2631. } while (count--);
  2632. spin_unlock_irqrestore(&card->lock, flags);
  2633. if (count == 0) {
  2634. printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
  2635. data = 0;
  2636. }
  2637. return ((u16) (data >> 16));
  2638. }
  2639. /* rewrite ac97 read and write mixer register by hulei for ALI*/
  2640. static int
  2641. acquirecodecaccess(struct trident_card *card)
  2642. {
  2643. u16 wsemamask = 0x6000; /* bit 14..13 */
  2644. u16 wsemabits;
  2645. u16 wcontrol;
  2646. int block = 0;
  2647. int ncount = 25;
  2648. while (1) {
  2649. wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
  2650. wsemabits = wcontrol & wsemamask;
  2651. if (wsemabits == 0x4000)
  2652. return 1; /* 0x4000 is audio ,then success */
  2653. if (ncount-- < 0)
  2654. break;
  2655. if (wsemabits == 0) {
  2656. unlock:
  2657. outl(((u32) (wcontrol & 0x1eff) | 0x00004000),
  2658. TRID_REG(card, ALI_AC97_WRITE));
  2659. continue;
  2660. }
  2661. udelay(20);
  2662. }
  2663. if (!block) {
  2664. pr_debug("accesscodecsemaphore: try unlock\n");
  2665. block = 1;
  2666. goto unlock;
  2667. }
  2668. return 0;
  2669. }
  2670. static void
  2671. releasecodecaccess(struct trident_card *card)
  2672. {
  2673. unsigned long wcontrol;
  2674. wcontrol = inl(TRID_REG(card, ALI_AC97_WRITE));
  2675. outl((wcontrol & 0xffff1eff), TRID_REG(card, ALI_AC97_WRITE));
  2676. }
  2677. static int
  2678. waitforstimertick(struct trident_card *card)
  2679. {
  2680. unsigned long chk1, chk2;
  2681. unsigned int wcount = 0xffff;
  2682. chk1 = inl(TRID_REG(card, ALI_STIMER));
  2683. while (1) {
  2684. chk2 = inl(TRID_REG(card, ALI_STIMER));
  2685. if ((wcount > 0) && chk1 != chk2)
  2686. return 1;
  2687. if (wcount <= 0)
  2688. break;
  2689. udelay(50);
  2690. }
  2691. return 0;
  2692. }
  2693. /* Read AC97 codec registers for ALi*/
  2694. static u16
  2695. ali_ac97_get(struct trident_card *card, int secondary, u8 reg)
  2696. {
  2697. unsigned int address, mask;
  2698. unsigned int ncount;
  2699. unsigned long aud_reg;
  2700. u32 data;
  2701. u16 wcontrol;
  2702. unsigned long flags;
  2703. if (!card)
  2704. BUG();
  2705. address = ALI_AC97_READ;
  2706. if (card->revision == ALI_5451_V02) {
  2707. address = ALI_AC97_WRITE;
  2708. }
  2709. mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
  2710. if (secondary)
  2711. mask |= ALI_AC97_SECONDARY;
  2712. spin_lock_irqsave(&card->lock, flags);
  2713. if (!acquirecodecaccess(card))
  2714. printk(KERN_ERR "access codec fail\n");
  2715. wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
  2716. wcontrol &= 0xfe00;
  2717. wcontrol |= (0x8000 | reg);
  2718. outw(wcontrol, TRID_REG(card, ALI_AC97_WRITE));
  2719. data = (mask | (reg & AC97_REG_ADDR));
  2720. if (!waitforstimertick(card)) {
  2721. printk(KERN_ERR "ali_ac97_read: BIT_CLOCK is dead\n");
  2722. goto releasecodec;
  2723. }
  2724. udelay(20);
  2725. ncount = 10;
  2726. while (1) {
  2727. if ((inw(TRID_REG(card, ALI_AC97_WRITE)) & ALI_AC97_BUSY_READ)
  2728. != 0)
  2729. break;
  2730. if (ncount <= 0)
  2731. break;
  2732. if (ncount-- == 1) {
  2733. pr_debug("ali_ac97_read :try clear busy flag\n");
  2734. aud_reg = inl(TRID_REG(card, ALI_AC97_WRITE));
  2735. outl((aud_reg & 0xffff7fff),
  2736. TRID_REG(card, ALI_AC97_WRITE));
  2737. }
  2738. udelay(10);
  2739. }
  2740. data = inl(TRID_REG(card, address));
  2741. spin_unlock_irqrestore(&card->lock, flags);
  2742. return ((u16) (data >> 16));
  2743. releasecodec:
  2744. releasecodecaccess(card);
  2745. spin_unlock_irqrestore(&card->lock, flags);
  2746. printk(KERN_ERR "ali_ac97_read: AC97 CODEC read timed out.\n");
  2747. return 0;
  2748. }
  2749. /* Write AC97 codec registers for hulei*/
  2750. static void
  2751. ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val)
  2752. {
  2753. unsigned int address, mask;
  2754. unsigned int ncount;
  2755. u32 data;
  2756. u16 wcontrol;
  2757. unsigned long flags;
  2758. data = ((u32) val) << 16;
  2759. if (!card)
  2760. BUG();
  2761. address = ALI_AC97_WRITE;
  2762. mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
  2763. if (secondary)
  2764. mask |= ALI_AC97_SECONDARY;
  2765. if (card->revision == ALI_5451_V02)
  2766. mask |= ALI_AC97_WRITE_MIXER_REGISTER;
  2767. spin_lock_irqsave(&card->lock, flags);
  2768. if (!acquirecodecaccess(card))
  2769. printk(KERN_ERR "ali_ac97_write: access codec fail\n");
  2770. wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
  2771. wcontrol &= 0xff00;
  2772. wcontrol |= (0x8100 | reg); /* bit 8=1: (ali1535 )reserved/ */
  2773. /* ali1535+ write */
  2774. outl((data | wcontrol), TRID_REG(card, ALI_AC97_WRITE));
  2775. if (!waitforstimertick(card)) {
  2776. printk(KERN_ERR "BIT_CLOCK is dead\n");
  2777. goto releasecodec;
  2778. }
  2779. ncount = 10;
  2780. while (1) {
  2781. wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
  2782. if (!(wcontrol & 0x8000))
  2783. break;
  2784. if (ncount <= 0)
  2785. break;
  2786. if (ncount-- == 1) {
  2787. pr_debug("ali_ac97_set :try clear busy flag!!\n");
  2788. outw(wcontrol & 0x7fff,
  2789. TRID_REG(card, ALI_AC97_WRITE));
  2790. }
  2791. udelay(10);
  2792. }
  2793. releasecodec:
  2794. releasecodecaccess(card);
  2795. spin_unlock_irqrestore(&card->lock, flags);
  2796. return;
  2797. }
  2798. static void
  2799. ali_enable_special_channel(struct trident_state *stat)
  2800. {
  2801. struct trident_card *card = stat->card;
  2802. unsigned long s_channels;
  2803. s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2804. s_channels |= (1 << stat->dmabuf.channel->num);
  2805. outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2806. }
  2807. static u16
  2808. ali_ac97_read(struct ac97_codec *codec, u8 reg)
  2809. {
  2810. int id;
  2811. u16 data;
  2812. struct trident_card *card = NULL;
  2813. /* Added by Matt Wu */
  2814. if (!codec)
  2815. BUG();
  2816. card = (struct trident_card *) codec->private_data;
  2817. if (!card->mixer_regs_ready)
  2818. return ali_ac97_get(card, codec->id, reg);
  2819. /*
  2820. * FIXME: need to stop this caching some registers
  2821. */
  2822. if (codec->id)
  2823. id = 1;
  2824. else
  2825. id = 0;
  2826. data = card->mixer_regs[reg / 2][id];
  2827. return data;
  2828. }
  2829. static void
  2830. ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
  2831. {
  2832. int id;
  2833. struct trident_card *card;
  2834. /* Added by Matt Wu */
  2835. if (!codec)
  2836. BUG();
  2837. card = (struct trident_card *) codec->private_data;
  2838. if (!card->mixer_regs_ready) {
  2839. ali_ac97_set(card, codec->id, reg, val);
  2840. return;
  2841. }
  2842. if (codec->id)
  2843. id = 1;
  2844. else
  2845. id = 0;
  2846. card->mixer_regs[reg / 2][id] = val;
  2847. ali_ac97_set(card, codec->id, reg, val);
  2848. }
  2849. /*
  2850. flag: ALI_SPDIF_OUT_TO_SPDIF_OUT
  2851. ALI_PCM_TO_SPDIF_OUT
  2852. */
  2853. static void
  2854. ali_setup_spdif_out(struct trident_card *card, int flag)
  2855. {
  2856. unsigned long spdif;
  2857. unsigned char ch;
  2858. char temp;
  2859. struct pci_dev *pci_dev = NULL;
  2860. pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
  2861. pci_dev);
  2862. if (pci_dev == NULL)
  2863. return;
  2864. pci_read_config_byte(pci_dev, 0x61, &temp);
  2865. temp |= 0x40;
  2866. pci_write_config_byte(pci_dev, 0x61, temp);
  2867. pci_read_config_byte(pci_dev, 0x7d, &temp);
  2868. temp |= 0x01;
  2869. pci_write_config_byte(pci_dev, 0x7d, temp);
  2870. pci_read_config_byte(pci_dev, 0x7e, &temp);
  2871. temp &= (~0x20);
  2872. temp |= 0x10;
  2873. pci_write_config_byte(pci_dev, 0x7e, temp);
  2874. ch = inb(TRID_REG(card, ALI_SCTRL));
  2875. outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL));
  2876. ch = inb(TRID_REG(card, ALI_SPDIF_CTRL));
  2877. outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL));
  2878. if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) {
  2879. spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2880. spdif |= ALI_SPDIF_OUT_CH_ENABLE;
  2881. spdif &= ALI_SPDIF_OUT_SEL_SPDIF;
  2882. outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2883. spdif = inw(TRID_REG(card, ALI_SPDIF_CS));
  2884. if (flag & ALI_SPDIF_OUT_NON_PCM)
  2885. spdif |= 0x0002;
  2886. else
  2887. spdif &= (~0x0002);
  2888. outw(spdif, TRID_REG(card, ALI_SPDIF_CS));
  2889. } else {
  2890. spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2891. spdif |= ALI_SPDIF_OUT_SEL_PCM;
  2892. outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2893. }
  2894. }
  2895. static void
  2896. ali_disable_special_channel(struct trident_card *card, int ch)
  2897. {
  2898. unsigned long sc;
  2899. sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2900. sc &= ~(1 << ch);
  2901. outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2902. }
  2903. static void
  2904. ali_disable_spdif_in(struct trident_card *card)
  2905. {
  2906. unsigned long spdif;
  2907. spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2908. spdif &= (~ALI_SPDIF_IN_SUPPORT);
  2909. outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2910. ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL);
  2911. }
  2912. static void
  2913. ali_setup_spdif_in(struct trident_card *card)
  2914. {
  2915. unsigned long spdif;
  2916. //Set SPDIF IN Supported
  2917. spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2918. spdif |= ALI_SPDIF_IN_SUPPORT;
  2919. outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2920. //Set SPDIF IN Rec
  2921. spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
  2922. spdif |= ALI_SPDIF_IN_CH_ENABLE;
  2923. outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
  2924. spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
  2925. spdif |= ALI_SPDIF_IN_CH_STATUS;
  2926. outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
  2927. /*
  2928. spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
  2929. spdif |= ALI_SPDIF_IN_FUNC_ENABLE;
  2930. outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
  2931. */
  2932. }
  2933. static void
  2934. ali_delay(struct trident_card *card, int interval)
  2935. {
  2936. unsigned long begintimer, currenttimer;
  2937. begintimer = inl(TRID_REG(card, ALI_STIMER));
  2938. currenttimer = inl(TRID_REG(card, ALI_STIMER));
  2939. while (currenttimer < begintimer + interval)
  2940. currenttimer = inl(TRID_REG(card, ALI_STIMER));
  2941. }
  2942. static void
  2943. ali_detect_spdif_rate(struct trident_card *card)
  2944. {
  2945. u16 wval = 0;
  2946. u16 count = 0;
  2947. u8 bval = 0, R1 = 0, R2 = 0;
  2948. bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
  2949. bval |= 0x02;
  2950. outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
  2951. bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
  2952. bval |= 0x1F;
  2953. outb(bval, TRID_REG(card, ALI_SPDIF_CTRL + 1));
  2954. while (((R1 < 0x0B) || (R1 > 0x0E)) && (R1 != 0x12) &&
  2955. count <= 50000) {
  2956. count++;
  2957. ali_delay(card, 6);
  2958. bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
  2959. R1 = bval & 0x1F;
  2960. }
  2961. if (count > 50000) {
  2962. printk(KERN_WARNING "trident: Error in "
  2963. "ali_detect_spdif_rate!\n");
  2964. return;
  2965. }
  2966. count = 0;
  2967. while (count <= 50000) {
  2968. count++;
  2969. ali_delay(card, 6);
  2970. bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
  2971. R2 = bval & 0x1F;
  2972. if (R2 != R1)
  2973. R1 = R2;
  2974. else
  2975. break;
  2976. }
  2977. if (count > 50000) {
  2978. printk(KERN_WARNING "trident: Error in "
  2979. "ali_detect_spdif_rate!\n");
  2980. return;
  2981. }
  2982. switch (R2) {
  2983. case 0x0b:
  2984. case 0x0c:
  2985. case 0x0d:
  2986. case 0x0e:
  2987. wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2));
  2988. wval &= 0xE0F0;
  2989. wval |= (u16) 0x09 << 8 | (u16) 0x05;
  2990. outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2));
  2991. bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0;
  2992. outb(bval | 0x02, TRID_REG(card, ALI_SPDIF_CS + 3));
  2993. break;
  2994. case 0x12:
  2995. wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2));
  2996. wval &= 0xE0F0;
  2997. wval |= (u16) 0x0E << 8 | (u16) 0x08;
  2998. outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2));
  2999. bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0;
  3000. outb(bval | 0x03, TRID_REG(card, ALI_SPDIF_CS + 3));
  3001. break;
  3002. default:
  3003. break;
  3004. }
  3005. }
  3006. static unsigned int
  3007. ali_get_spdif_in_rate(struct trident_card *card)
  3008. {
  3009. u32 dwRate = 0;
  3010. u8 bval = 0;
  3011. ali_detect_spdif_rate(card);
  3012. bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
  3013. bval &= 0x7F;
  3014. bval |= 0x40;
  3015. outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
  3016. bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3));
  3017. bval &= 0x0F;
  3018. switch (bval) {
  3019. case 0:
  3020. dwRate = 44100;
  3021. break;
  3022. case 1:
  3023. dwRate = 48000;
  3024. break;
  3025. case 2:
  3026. dwRate = 32000;
  3027. break;
  3028. default:
  3029. // Error occurs
  3030. break;
  3031. }
  3032. return dwRate;
  3033. }
  3034. static int
  3035. ali_close_multi_channels(void)
  3036. {
  3037. char temp = 0;
  3038. struct pci_dev *pci_dev = NULL;
  3039. pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
  3040. pci_dev);
  3041. if (pci_dev == NULL)
  3042. return -1;
  3043. pci_read_config_byte(pci_dev, 0x59, &temp);
  3044. temp &= ~0x80;
  3045. pci_write_config_byte(pci_dev, 0x59, temp);
  3046. pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
  3047. pci_dev);
  3048. if (pci_dev == NULL)
  3049. return -1;
  3050. pci_read_config_byte(pci_dev, 0xB8, &temp);
  3051. temp &= ~0x20;
  3052. pci_write_config_byte(pci_dev, 0xB8, temp);
  3053. return 0;
  3054. }
  3055. static int
  3056. ali_setup_multi_channels(struct trident_card *card, int chan_nums)
  3057. {
  3058. unsigned long dwValue;
  3059. char temp = 0;
  3060. struct pci_dev *pci_dev = NULL;
  3061. pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
  3062. pci_dev);
  3063. if (pci_dev == NULL)
  3064. return -1;
  3065. pci_read_config_byte(pci_dev, 0x59, &temp);
  3066. temp |= 0x80;
  3067. pci_write_config_byte(pci_dev, 0x59, temp);
  3068. pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
  3069. pci_dev);
  3070. if (pci_dev == NULL)
  3071. return -1;
  3072. pci_read_config_byte(pci_dev, (int) 0xB8, &temp);
  3073. temp |= 0x20;
  3074. pci_write_config_byte(pci_dev, (int) 0xB8, (u8) temp);
  3075. if (chan_nums == 6) {
  3076. dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000;
  3077. outl(dwValue, TRID_REG(card, ALI_SCTRL));
  3078. mdelay(4);
  3079. dwValue = inl(TRID_REG(card, ALI_SCTRL));
  3080. if (dwValue & 0x2000000) {
  3081. ali_ac97_write(card->ac97_codec[0], 0x02, 8080);
  3082. ali_ac97_write(card->ac97_codec[0], 0x36, 0);
  3083. ali_ac97_write(card->ac97_codec[0], 0x38, 0);
  3084. /*
  3085. * On a board with a single codec you won't get the
  3086. * surround. On other boards configure it.
  3087. */
  3088. if (card->ac97_codec[1] != NULL) {
  3089. ali_ac97_write(card->ac97_codec[1], 0x36, 0);
  3090. ali_ac97_write(card->ac97_codec[1], 0x38, 0);
  3091. ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606);
  3092. ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303);
  3093. ali_ac97_write(card->ac97_codec[1], 0x74, 0x3);
  3094. }
  3095. return 1;
  3096. }
  3097. }
  3098. return -EINVAL;
  3099. }
  3100. static void
  3101. ali_free_pcm_channel(struct trident_card *card, unsigned int channel)
  3102. {
  3103. int bank;
  3104. if (channel > 31)
  3105. return;
  3106. bank = channel >> 5;
  3107. channel = channel & 0x1f;
  3108. card->banks[bank].bitmap &= ~(1 << (channel));
  3109. }
  3110. static int
  3111. ali_allocate_other_states_resources(struct trident_state *state, int chan_nums)
  3112. {
  3113. struct trident_card *card = state->card;
  3114. struct trident_state *s;
  3115. int i, state_count = 0;
  3116. struct trident_pcm_bank *bank;
  3117. struct trident_channel *channel;
  3118. unsigned long num;
  3119. bank = &card->banks[BANK_A];
  3120. if (chan_nums != 6)
  3121. return 0;
  3122. for (i = 0; (i < ALI_CHANNELS) && (state_count != 4); i++) {
  3123. if (card->states[i])
  3124. continue;
  3125. num = ali_multi_channels_5_1[state_count];
  3126. if (!(bank->bitmap & (1 << num))) {
  3127. bank->bitmap |= 1 << num;
  3128. channel = &bank->channels[num];
  3129. channel->num = num;
  3130. } else {
  3131. state_count--;
  3132. for (; state_count >= 0; state_count--) {
  3133. kfree(state->other_states[state_count]);
  3134. num = ali_multi_channels_5_1[state_count];
  3135. ali_free_pcm_channel(card, num);
  3136. }
  3137. return -EBUSY;
  3138. }
  3139. s = card->states[i] = kmalloc(sizeof(*state), GFP_KERNEL);
  3140. if (!s) {
  3141. num = ali_multi_channels_5_1[state_count];
  3142. ali_free_pcm_channel(card, num);
  3143. state_count--;
  3144. for (; state_count >= 0; state_count--) {
  3145. num = ali_multi_channels_5_1[state_count];
  3146. ali_free_pcm_channel(card, num);
  3147. kfree(state->other_states[state_count]);
  3148. }
  3149. return -ENOMEM;
  3150. }
  3151. memset(s, 0, sizeof(*state));
  3152. s->dmabuf.channel = channel;
  3153. s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags =
  3154. s->dmabuf.subdivision = 0;
  3155. init_waitqueue_head(&s->dmabuf.wait);
  3156. s->magic = card->magic;
  3157. s->card = card;
  3158. s->virt = i;
  3159. ali_enable_special_channel(s);
  3160. state->other_states[state_count++] = s;
  3161. }
  3162. if (state_count != 4) {
  3163. state_count--;
  3164. for (; state_count >= 0; state_count--) {
  3165. kfree(state->other_states[state_count]);
  3166. num = ali_multi_channels_5_1[state_count];
  3167. ali_free_pcm_channel(card, num);
  3168. }
  3169. return -EBUSY;
  3170. }
  3171. return 0;
  3172. }
  3173. static void
  3174. ali_save_regs(struct trident_card *card)
  3175. {
  3176. unsigned long flags;
  3177. int i, j;
  3178. spin_lock_irqsave(&card->lock, flags);
  3179. ali_registers.global_regs[0x2c] = inl(TRID_REG(card, T4D_MISCINT));
  3180. //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A));
  3181. ali_registers.global_regs[0x21] = inl(TRID_REG(card, T4D_STOP_A));
  3182. //disable all IRQ bits
  3183. outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT));
  3184. for (i = 1; i < ALI_MIXER_REGS; i++)
  3185. ali_registers.mixer_regs[i] = ali_ac97_read(card->ac97_codec[0],
  3186. i * 2);
  3187. for (i = 0; i < ALI_GLOBAL_REGS; i++) {
  3188. if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A))
  3189. continue;
  3190. ali_registers.global_regs[i] = inl(TRID_REG(card, i * 4));
  3191. }
  3192. for (i = 0; i < ALI_CHANNELS; i++) {
  3193. outb(i, TRID_REG(card, T4D_LFO_GC_CIR));
  3194. for (j = 0; j < ALI_CHANNEL_REGS; j++)
  3195. ali_registers.channel_regs[i][j] = inl(TRID_REG(card,
  3196. j * 4 + 0xe0));
  3197. }
  3198. //Stop all HW channel
  3199. outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A));
  3200. spin_unlock_irqrestore(&card->lock, flags);
  3201. }
  3202. static void
  3203. ali_restore_regs(struct trident_card *card)
  3204. {
  3205. unsigned long flags;
  3206. int i, j;
  3207. spin_lock_irqsave(&card->lock, flags);
  3208. for (i = 1; i < ALI_MIXER_REGS; i++)
  3209. ali_ac97_write(card->ac97_codec[0], i * 2,
  3210. ali_registers.mixer_regs[i]);
  3211. for (i = 0; i < ALI_CHANNELS; i++) {
  3212. outb(i, TRID_REG(card, T4D_LFO_GC_CIR));
  3213. for (j = 0; j < ALI_CHANNEL_REGS; j++)
  3214. outl(ali_registers.channel_regs[i][j],
  3215. TRID_REG(card, j * 4 + 0xe0));
  3216. }
  3217. for (i = 0; i < ALI_GLOBAL_REGS; i++) {
  3218. if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A) ||
  3219. (i * 4 == T4D_START_A))
  3220. continue;
  3221. outl(ali_registers.global_regs[i], TRID_REG(card, i * 4));
  3222. }
  3223. //start HW channel
  3224. outl(ali_registers.global_regs[0x20], TRID_REG(card, T4D_START_A));
  3225. //restore IRQ enable bits
  3226. outl(ali_registers.global_regs[0x2c], TRID_REG(card, T4D_MISCINT));
  3227. spin_unlock_irqrestore(&card->lock, flags);
  3228. }
  3229. static int
  3230. trident_suspend(struct pci_dev *dev, pm_message_t unused)
  3231. {
  3232. struct trident_card *card = pci_get_drvdata(dev);
  3233. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3234. ali_save_regs(card);
  3235. }
  3236. return 0;
  3237. }
  3238. static int
  3239. trident_resume(struct pci_dev *dev)
  3240. {
  3241. struct trident_card *card = pci_get_drvdata(dev);
  3242. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3243. ali_restore_regs(card);
  3244. }
  3245. return 0;
  3246. }
  3247. static struct trident_channel *
  3248. ali_alloc_pcm_channel(struct trident_card *card)
  3249. {
  3250. struct trident_pcm_bank *bank;
  3251. int idx;
  3252. bank = &card->banks[BANK_A];
  3253. if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) &
  3254. (ALI_SPDIF_OUT_CH_ENABLE)) {
  3255. idx = ALI_SPDIF_OUT_CHANNEL;
  3256. if (!(bank->bitmap & (1 << idx))) {
  3257. struct trident_channel *channel = &bank->channels[idx];
  3258. bank->bitmap |= 1 << idx;
  3259. channel->num = idx;
  3260. return channel;
  3261. }
  3262. }
  3263. for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST;
  3264. idx++) {
  3265. if (!(bank->bitmap & (1 << idx))) {
  3266. struct trident_channel *channel = &bank->channels[idx];
  3267. bank->bitmap |= 1 << idx;
  3268. channel->num = idx;
  3269. return channel;
  3270. }
  3271. }
  3272. /* no more free channels avaliable */
  3273. #if 0
  3274. printk(KERN_ERR "ali: no more channels available on Bank A.\n");
  3275. #endif /* 0 */
  3276. return NULL;
  3277. }
  3278. static struct trident_channel *
  3279. ali_alloc_rec_pcm_channel(struct trident_card *card)
  3280. {
  3281. struct trident_pcm_bank *bank;
  3282. int idx;
  3283. if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT)
  3284. idx = ALI_SPDIF_IN_CHANNEL;
  3285. else
  3286. idx = ALI_PCM_IN_CHANNEL;
  3287. bank = &card->banks[BANK_A];
  3288. if (!(bank->bitmap & (1 << idx))) {
  3289. struct trident_channel *channel = &bank->channels[idx];
  3290. bank->bitmap |= 1 << idx;
  3291. channel->num = idx;
  3292. return channel;
  3293. }
  3294. /* no free recordable channels avaliable */
  3295. #if 0
  3296. printk(KERN_ERR "ali: no recordable channels available on Bank A.\n");
  3297. #endif /* 0 */
  3298. return NULL;
  3299. }
  3300. static void
  3301. ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate)
  3302. {
  3303. unsigned char ch_st_sel;
  3304. unsigned short status_rate;
  3305. switch (rate) {
  3306. case 44100:
  3307. status_rate = 0;
  3308. break;
  3309. case 32000:
  3310. status_rate = 0x300;
  3311. break;
  3312. case 48000:
  3313. default:
  3314. status_rate = 0x200;
  3315. break;
  3316. }
  3317. /* select spdif_out */
  3318. ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS;
  3319. ch_st_sel |= 0x80; /* select right */
  3320. outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
  3321. outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2));
  3322. ch_st_sel &= (~0x80); /* select left */
  3323. outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
  3324. outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2));
  3325. }
  3326. static void
  3327. ali_address_interrupt(struct trident_card *card)
  3328. {
  3329. int i, channel;
  3330. struct trident_state *state;
  3331. u32 mask, channel_mask;
  3332. mask = trident_get_interrupt_mask(card, 0);
  3333. for (i = 0; i < NR_HW_CH; i++) {
  3334. if ((state = card->states[i]) == NULL)
  3335. continue;
  3336. channel = state->dmabuf.channel->num;
  3337. if ((channel_mask = 1 << channel) & mask) {
  3338. mask &= ~channel_mask;
  3339. trident_ack_channel_interrupt(card, channel);
  3340. udelay(100);
  3341. state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
  3342. trident_update_ptr(state);
  3343. }
  3344. }
  3345. if (mask) {
  3346. for (i = 0; i < NR_HW_CH; i++) {
  3347. if (mask & (1 << i)) {
  3348. printk("ali: spurious channel irq %d.\n", i);
  3349. trident_ack_channel_interrupt(card, i);
  3350. trident_stop_voice(card, i);
  3351. trident_disable_voice_irq(card, i);
  3352. }
  3353. }
  3354. }
  3355. }
  3356. /* Updating the values of counters of other_states' DMAs without lock
  3357. protection is no harm because all DMAs of multi-channels and interrupt
  3358. depend on a master state's DMA, and changing the counters of the master
  3359. state DMA is protected by a spinlock.
  3360. */
  3361. static int
  3362. ali_write_5_1(struct trident_state *state, const char __user *buf,
  3363. int cnt_for_multi_channel, unsigned int *copy_count,
  3364. unsigned int *state_cnt)
  3365. {
  3366. struct dmabuf *dmabuf = &state->dmabuf;
  3367. struct dmabuf *dmabuf_temp;
  3368. const char __user *buffer = buf;
  3369. unsigned swptr, other_dma_nums, sample_s;
  3370. unsigned int i, loop;
  3371. other_dma_nums = 4;
  3372. sample_s = sample_size[dmabuf->fmt] >> 1;
  3373. swptr = dmabuf->swptr;
  3374. if ((i = state->multi_channels_adjust_count) > 0) {
  3375. if (i == 1) {
  3376. if (copy_from_user(dmabuf->rawbuf + swptr,
  3377. buffer, sample_s))
  3378. return -EFAULT;
  3379. seek_offset(swptr, buffer, cnt_for_multi_channel,
  3380. sample_s, *copy_count);
  3381. i--;
  3382. (*state_cnt) += sample_s;
  3383. state->multi_channels_adjust_count++;
  3384. } else
  3385. i = i - (state->chans_num - other_dma_nums);
  3386. for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) {
  3387. dmabuf_temp = &state->other_states[i]->dmabuf;
  3388. if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
  3389. buffer, sample_s))
  3390. return -EFAULT;
  3391. seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
  3392. sample_s, *copy_count);
  3393. }
  3394. if (cnt_for_multi_channel == 0)
  3395. state->multi_channels_adjust_count += i;
  3396. }
  3397. if (cnt_for_multi_channel > 0) {
  3398. loop = cnt_for_multi_channel / (state->chans_num * sample_s);
  3399. for (i = 0; i < loop; i++) {
  3400. if (copy_from_user(dmabuf->rawbuf + swptr, buffer,
  3401. sample_s * 2))
  3402. return -EFAULT;
  3403. seek_offset(swptr, buffer, cnt_for_multi_channel,
  3404. sample_s * 2, *copy_count);
  3405. (*state_cnt) += (sample_s * 2);
  3406. dmabuf_temp = &state->other_states[0]->dmabuf;
  3407. if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
  3408. buffer, sample_s))
  3409. return -EFAULT;
  3410. seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
  3411. sample_s, *copy_count);
  3412. dmabuf_temp = &state->other_states[1]->dmabuf;
  3413. if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
  3414. buffer, sample_s))
  3415. return -EFAULT;
  3416. seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
  3417. sample_s, *copy_count);
  3418. dmabuf_temp = &state->other_states[2]->dmabuf;
  3419. if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
  3420. buffer, sample_s))
  3421. return -EFAULT;
  3422. seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
  3423. sample_s, *copy_count);
  3424. dmabuf_temp = &state->other_states[3]->dmabuf;
  3425. if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
  3426. buffer, sample_s))
  3427. return -EFAULT;
  3428. seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
  3429. sample_s, *copy_count);
  3430. }
  3431. if (cnt_for_multi_channel > 0) {
  3432. state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s;
  3433. if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
  3434. return -EFAULT;
  3435. seek_offset(swptr, buffer, cnt_for_multi_channel,
  3436. sample_s, *copy_count);
  3437. (*state_cnt) += sample_s;
  3438. if (cnt_for_multi_channel > 0) {
  3439. if (copy_from_user(dmabuf->rawbuf + swptr,
  3440. buffer, sample_s))
  3441. return -EFAULT;
  3442. seek_offset(swptr, buffer, cnt_for_multi_channel,
  3443. sample_s, *copy_count);
  3444. (*state_cnt) += sample_s;
  3445. if (cnt_for_multi_channel > 0) {
  3446. int diff = state->chans_num - other_dma_nums;
  3447. loop = state->multi_channels_adjust_count - diff;
  3448. for (i = 0; i < loop; i++) {
  3449. dmabuf_temp = &state->other_states[i]->dmabuf;
  3450. if (copy_from_user(dmabuf_temp->rawbuf +
  3451. dmabuf_temp->swptr,
  3452. buffer, sample_s))
  3453. return -EFAULT;
  3454. seek_offset(dmabuf_temp->swptr, buffer,
  3455. cnt_for_multi_channel,
  3456. sample_s, *copy_count);
  3457. }
  3458. }
  3459. }
  3460. } else
  3461. state->multi_channels_adjust_count = 0;
  3462. }
  3463. for (i = 0; i < other_dma_nums; i++) {
  3464. dmabuf_temp = &state->other_states[i]->dmabuf;
  3465. dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize;
  3466. }
  3467. return *state_cnt;
  3468. }
  3469. static void
  3470. ali_free_other_states_resources(struct trident_state *state)
  3471. {
  3472. int i;
  3473. struct trident_card *card = state->card;
  3474. struct trident_state *s;
  3475. unsigned other_states_count;
  3476. other_states_count = state->chans_num - 2; /* except PCM L/R channels */
  3477. for (i = 0; i < other_states_count; i++) {
  3478. s = state->other_states[i];
  3479. dealloc_dmabuf(&s->dmabuf, card->pci_dev);
  3480. ali_disable_special_channel(s->card, s->dmabuf.channel->num);
  3481. state->card->free_pcm_channel(s->card, s->dmabuf.channel->num);
  3482. card->states[s->virt] = NULL;
  3483. kfree(s);
  3484. }
  3485. }
  3486. static struct proc_dir_entry *res;
  3487. static int
  3488. ali_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data)
  3489. {
  3490. struct trident_card *card = (struct trident_card *) data;
  3491. unsigned long flags;
  3492. char c;
  3493. if (count < 0)
  3494. return -EINVAL;
  3495. if (count == 0)
  3496. return 0;
  3497. if (get_user(c, buffer))
  3498. return -EFAULT;
  3499. spin_lock_irqsave(&card->lock, flags);
  3500. switch (c) {
  3501. case '0':
  3502. ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
  3503. ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
  3504. break;
  3505. case '1':
  3506. ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT |
  3507. ALI_SPDIF_OUT_PCM);
  3508. break;
  3509. case '2':
  3510. ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT |
  3511. ALI_SPDIF_OUT_NON_PCM);
  3512. break;
  3513. case '3':
  3514. ali_disable_spdif_in(card); //default
  3515. break;
  3516. case '4':
  3517. ali_setup_spdif_in(card);
  3518. break;
  3519. }
  3520. spin_unlock_irqrestore(&card->lock, flags);
  3521. return count;
  3522. }
  3523. /* OSS /dev/mixer file operation methods */
  3524. static int
  3525. trident_open_mixdev(struct inode *inode, struct file *file)
  3526. {
  3527. int i = 0;
  3528. int minor = iminor(inode);
  3529. struct trident_card *card = devs;
  3530. for (card = devs; card != NULL; card = card->next)
  3531. for (i = 0; i < NR_AC97; i++)
  3532. if (card->ac97_codec[i] != NULL &&
  3533. card->ac97_codec[i]->dev_mixer == minor)
  3534. goto match;
  3535. if (!card) {
  3536. return -ENODEV;
  3537. }
  3538. match:
  3539. file->private_data = card->ac97_codec[i];
  3540. return nonseekable_open(inode, file);
  3541. }
  3542. static int
  3543. trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
  3544. unsigned long arg)
  3545. {
  3546. struct ac97_codec *codec = (struct ac97_codec *) file->private_data;
  3547. return codec->mixer_ioctl(codec, cmd, arg);
  3548. }
  3549. static /*const */ struct file_operations trident_mixer_fops = {
  3550. .owner = THIS_MODULE,
  3551. .llseek = no_llseek,
  3552. .ioctl = trident_ioctl_mixdev,
  3553. .open = trident_open_mixdev,
  3554. };
  3555. static int
  3556. ali_reset_5451(struct trident_card *card)
  3557. {
  3558. struct pci_dev *pci_dev = NULL;
  3559. unsigned int dwVal;
  3560. unsigned short wCount, wReg;
  3561. pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
  3562. pci_dev);
  3563. if (pci_dev == NULL)
  3564. return -1;
  3565. pci_read_config_dword(pci_dev, 0x7c, &dwVal);
  3566. pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
  3567. udelay(5000);
  3568. pci_read_config_dword(pci_dev, 0x7c, &dwVal);
  3569. pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
  3570. udelay(5000);
  3571. pci_dev = card->pci_dev;
  3572. if (pci_dev == NULL)
  3573. return -1;
  3574. pci_read_config_dword(pci_dev, 0x44, &dwVal);
  3575. pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000);
  3576. udelay(500);
  3577. pci_read_config_dword(pci_dev, 0x44, &dwVal);
  3578. pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff);
  3579. udelay(5000);
  3580. /* TODO: recognize if we have a PM capable codec and only do this */
  3581. /* if the codec is PM capable */
  3582. wCount = 2000;
  3583. while (wCount--) {
  3584. wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
  3585. if ((wReg & 0x000f) == 0x000f)
  3586. return 0;
  3587. udelay(5000);
  3588. }
  3589. /* This is non fatal if you have a non PM capable codec.. */
  3590. return 0;
  3591. }
  3592. /* AC97 codec initialisation. */
  3593. static int __devinit
  3594. trident_ac97_init(struct trident_card *card)
  3595. {
  3596. int num_ac97 = 0;
  3597. unsigned long ready_2nd = 0;
  3598. struct ac97_codec *codec;
  3599. int i = 0;
  3600. /* initialize controller side of AC link, and find out if secondary codes
  3601. really exist */
  3602. switch (card->pci_id) {
  3603. case PCI_DEVICE_ID_ALI_5451:
  3604. if (ali_reset_5451(card)) {
  3605. printk(KERN_ERR "trident_ac97_init: error "
  3606. "resetting 5451.\n");
  3607. return -1;
  3608. }
  3609. outl(0x80000001, TRID_REG(card, ALI_GLOBAL_CONTROL));
  3610. outl(0x00000000, TRID_REG(card, T4D_AINTEN_A));
  3611. outl(0xffffffff, TRID_REG(card, T4D_AINT_A));
  3612. outl(0x00000000, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
  3613. outb(0x10, TRID_REG(card, ALI_MPUR2));
  3614. ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
  3615. ready_2nd &= 0x3fff;
  3616. outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL));
  3617. ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
  3618. ready_2nd &= SI_AC97_SECONDARY_READY;
  3619. if (card->revision < ALI_5451_V02)
  3620. ready_2nd = 0;
  3621. break;
  3622. case PCI_DEVICE_ID_SI_7018:
  3623. /* disable AC97 GPIO interrupt */
  3624. outl(0x00, TRID_REG(card, SI_AC97_GPIO));
  3625. /* when power up the AC link is in cold reset mode so stop it */
  3626. outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT | SECONDARY_ID,
  3627. TRID_REG(card, SI_SERIAL_INTF_CTRL));
  3628. /* it take a long time to recover from a cold reset */
  3629. /* (especially when you have more than one codec) */
  3630. udelay(2000);
  3631. ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
  3632. ready_2nd &= SI_AC97_SECONDARY_READY;
  3633. break;
  3634. case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
  3635. /* playback on */
  3636. outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
  3637. break;
  3638. case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
  3639. /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
  3640. outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
  3641. ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
  3642. ready_2nd &= NX_AC97_SECONDARY_READY;
  3643. break;
  3644. case PCI_DEVICE_ID_INTERG_5050:
  3645. /* disable AC97 GPIO interrupt */
  3646. outl(0x00, TRID_REG(card, SI_AC97_GPIO));
  3647. /* when power up, the AC link is in cold reset mode, so stop it */
  3648. outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT,
  3649. TRID_REG(card, SI_SERIAL_INTF_CTRL));
  3650. /* it take a long time to recover from a cold reset (especially */
  3651. /* when you have more than one codec) */
  3652. udelay(2000);
  3653. ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
  3654. ready_2nd &= SI_AC97_SECONDARY_READY;
  3655. break;
  3656. }
  3657. for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
  3658. if ((codec = ac97_alloc_codec()) == NULL)
  3659. return -ENOMEM;
  3660. /* initialize some basic codec information, other fields */
  3661. /* will be filled in ac97_probe_codec */
  3662. codec->private_data = card;
  3663. codec->id = num_ac97;
  3664. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3665. codec->codec_read = ali_ac97_read;
  3666. codec->codec_write = ali_ac97_write;
  3667. } else {
  3668. codec->codec_read = trident_ac97_get;
  3669. codec->codec_write = trident_ac97_set;
  3670. }
  3671. if (ac97_probe_codec(codec) == 0)
  3672. break;
  3673. codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1);
  3674. if (codec->dev_mixer < 0) {
  3675. printk(KERN_ERR "trident: couldn't register mixer!\n");
  3676. ac97_release_codec(codec);
  3677. break;
  3678. }
  3679. card->ac97_codec[num_ac97] = codec;
  3680. /* if there is no secondary codec at all, don't probe any more */
  3681. if (!ready_2nd)
  3682. break;
  3683. }
  3684. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3685. for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
  3686. if (card->ac97_codec[num_ac97] == NULL)
  3687. break;
  3688. for (i = 0; i < 64; i++) {
  3689. u16 reg = ali_ac97_get(card, num_ac97, i * 2);
  3690. card->mixer_regs[i][num_ac97] = reg;
  3691. }
  3692. }
  3693. }
  3694. return num_ac97 + 1;
  3695. }
  3696. #ifdef SUPPORT_JOYSTICK
  3697. /* Gameport functions for the cards ADC gameport */
  3698. static unsigned char trident_game_read(struct gameport *gameport)
  3699. {
  3700. struct trident_card *card = gameport->port_data;
  3701. return inb(TRID_REG(card, T4D_GAME_LEG));
  3702. }
  3703. static void trident_game_trigger(struct gameport *gameport)
  3704. {
  3705. struct trident_card *card = gameport->port_data;
  3706. outb(0xff, TRID_REG(card, T4D_GAME_LEG));
  3707. }
  3708. static int trident_game_cooked_read(struct gameport *gameport,
  3709. int *axes, int *buttons)
  3710. {
  3711. struct trident_card *card = gameport->port_data;
  3712. int i;
  3713. *buttons = (~inb(TRID_REG(card, T4D_GAME_LEG)) >> 4) & 0xf;
  3714. for (i = 0; i < 4; i++) {
  3715. axes[i] = inw(TRID_REG(card, T4D_GAME_AXD) + i * sizeof (u16));
  3716. if (axes[i] == 0xffff)
  3717. axes[i] = -1;
  3718. }
  3719. return 0;
  3720. }
  3721. static int trident_game_open(struct gameport *gameport, int mode)
  3722. {
  3723. struct trident_card *card = gameport->port_data;
  3724. switch (mode) {
  3725. case GAMEPORT_MODE_COOKED:
  3726. outb(0x80, TRID_REG(card, T4D_GAME_CR));
  3727. msleep(20);
  3728. return 0;
  3729. case GAMEPORT_MODE_RAW:
  3730. outb(0x00, TRID_REG(card, T4D_GAME_CR));
  3731. return 0;
  3732. default:
  3733. return -1;
  3734. }
  3735. return 0;
  3736. }
  3737. static int __devinit trident_register_gameport(struct trident_card *card)
  3738. {
  3739. struct gameport *gp;
  3740. card->gameport = gp = gameport_allocate_port();
  3741. if (!gp) {
  3742. printk(KERN_ERR "trident: can not allocate memory for gameport\n");
  3743. return -ENOMEM;
  3744. }
  3745. gameport_set_name(gp, "Trident 4DWave");
  3746. gameport_set_phys(gp, "pci%s/gameport0", pci_name(card->pci_dev));
  3747. gp->read = trident_game_read;
  3748. gp->trigger = trident_game_trigger;
  3749. gp->cooked_read = trident_game_cooked_read;
  3750. gp->open = trident_game_open;
  3751. gp->fuzz = 64;
  3752. gp->port_data = card;
  3753. gameport_register_port(gp);
  3754. return 0;
  3755. }
  3756. static inline void trident_unregister_gameport(struct trident_card *card)
  3757. {
  3758. if (card->gameport)
  3759. gameport_unregister_port(card->gameport);
  3760. }
  3761. #else
  3762. static inline int trident_register_gameport(struct trident_card *card) { return -ENOSYS; }
  3763. static inline void trident_unregister_gameport(struct trident_card *card) { }
  3764. #endif /* SUPPORT_JOYSTICK */
  3765. /* install the driver, we do not allocate hardware channel nor DMA buffer */
  3766. /* now, they are defered until "ACCESS" time (in prog_dmabuf called by */
  3767. /* open/read/write/ioctl/mmap) */
  3768. static int __devinit
  3769. trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
  3770. {
  3771. unsigned long iobase;
  3772. struct trident_card *card;
  3773. u8 bits;
  3774. u8 revision;
  3775. int i = 0;
  3776. u16 temp;
  3777. struct pci_dev *pci_dev_m1533 = NULL;
  3778. int rc = -ENODEV;
  3779. u64 dma_mask;
  3780. if (pci_enable_device(pci_dev))
  3781. goto out;
  3782. if (pci_dev->device == PCI_DEVICE_ID_ALI_5451)
  3783. dma_mask = ALI_DMA_MASK;
  3784. else
  3785. dma_mask = TRIDENT_DMA_MASK;
  3786. if (pci_set_dma_mask(pci_dev, dma_mask)) {
  3787. printk(KERN_ERR "trident: architecture does not support"
  3788. " %s PCI busmaster DMA\n",
  3789. pci_dev->device == PCI_DEVICE_ID_ALI_5451 ?
  3790. "32-bit" : "30-bit");
  3791. goto out;
  3792. }
  3793. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
  3794. if (pci_id->device == PCI_DEVICE_ID_INTERG_5050)
  3795. iobase = pci_resource_start(pci_dev, 1);
  3796. else
  3797. iobase = pci_resource_start(pci_dev, 0);
  3798. if (!request_region(iobase, 256, card_names[pci_id->driver_data])) {
  3799. printk(KERN_ERR "trident: can't allocate I/O space at "
  3800. "0x%4.4lx\n", iobase);
  3801. goto out;
  3802. }
  3803. rc = -ENOMEM;
  3804. if ((card = kmalloc(sizeof(*card), GFP_KERNEL)) == NULL) {
  3805. printk(KERN_ERR "trident: out of memory\n");
  3806. goto out_release_region;
  3807. }
  3808. memset(card, 0, sizeof (*card));
  3809. init_timer(&card->timer);
  3810. card->iobase = iobase;
  3811. card->pci_dev = pci_dev;
  3812. card->pci_id = pci_id->device;
  3813. card->revision = revision;
  3814. card->irq = pci_dev->irq;
  3815. card->next = devs;
  3816. card->magic = TRIDENT_CARD_MAGIC;
  3817. card->banks[BANK_A].addresses = &bank_a_addrs;
  3818. card->banks[BANK_A].bitmap = 0UL;
  3819. card->banks[BANK_B].addresses = &bank_b_addrs;
  3820. card->banks[BANK_B].bitmap = 0UL;
  3821. mutex_init(&card->open_mutex);
  3822. spin_lock_init(&card->lock);
  3823. init_timer(&card->timer);
  3824. devs = card;
  3825. pci_set_master(pci_dev);
  3826. printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
  3827. card_names[pci_id->driver_data], card->iobase, card->irq);
  3828. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3829. /* ALi channel Management */
  3830. card->alloc_pcm_channel = ali_alloc_pcm_channel;
  3831. card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
  3832. card->free_pcm_channel = ali_free_pcm_channel;
  3833. card->address_interrupt = ali_address_interrupt;
  3834. /* Added by Matt Wu 01-05-2001 for spdif in */
  3835. card->multi_channel_use_count = 0;
  3836. card->rec_channel_use_count = 0;
  3837. /* ALi SPDIF OUT function */
  3838. if (card->revision == ALI_5451_V02) {
  3839. ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
  3840. res = create_proc_entry("ALi5451", 0, NULL);
  3841. if (res) {
  3842. res->write_proc = ali_write_proc;
  3843. res->data = card;
  3844. }
  3845. }
  3846. /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
  3847. card->hwvolctl = 0;
  3848. pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL,
  3849. PCI_DEVICE_ID_AL_M1533,
  3850. pci_dev_m1533);
  3851. rc = -ENODEV;
  3852. if (pci_dev_m1533 == NULL)
  3853. goto out_proc_fs;
  3854. pci_read_config_byte(pci_dev_m1533, 0x63, &bits);
  3855. if (bits & (1 << 5))
  3856. card->hwvolctl = 1;
  3857. if (card->hwvolctl) {
  3858. /* Clear m1533 pci cfg 78h bit 30 to zero, which makes
  3859. GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */
  3860. pci_read_config_byte(pci_dev_m1533, 0x7b, &bits);
  3861. bits &= 0xbf; /*clear bit 6 */
  3862. pci_write_config_byte(pci_dev_m1533, 0x7b, bits);
  3863. }
  3864. } else if (card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
  3865. card->alloc_pcm_channel = cyber_alloc_pcm_channel;
  3866. card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel;
  3867. card->free_pcm_channel = cyber_free_pcm_channel;
  3868. card->address_interrupt = cyber_address_interrupt;
  3869. cyber_init_ritual(card);
  3870. } else {
  3871. card->alloc_pcm_channel = trident_alloc_pcm_channel;
  3872. card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
  3873. card->free_pcm_channel = trident_free_pcm_channel;
  3874. card->address_interrupt = trident_address_interrupt;
  3875. }
  3876. /* claim our irq */
  3877. rc = -ENODEV;
  3878. if (request_irq(card->irq, &trident_interrupt, IRQF_SHARED,
  3879. card_names[pci_id->driver_data], card)) {
  3880. printk(KERN_ERR "trident: unable to allocate irq %d\n",
  3881. card->irq);
  3882. goto out_proc_fs;
  3883. }
  3884. /* register /dev/dsp */
  3885. if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
  3886. printk(KERN_ERR "trident: couldn't register DSP device!\n");
  3887. goto out_free_irq;
  3888. }
  3889. card->mixer_regs_ready = 0;
  3890. /* initialize AC97 codec and register /dev/mixer */
  3891. if (trident_ac97_init(card) <= 0) {
  3892. /* unregister audio devices */
  3893. for (i = 0; i < NR_AC97; i++) {
  3894. if (card->ac97_codec[i] != NULL) {
  3895. struct ac97_codec* codec = card->ac97_codec[i];
  3896. unregister_sound_mixer(codec->dev_mixer);
  3897. ac97_release_codec(codec);
  3898. }
  3899. }
  3900. goto out_unregister_sound_dsp;
  3901. }
  3902. card->mixer_regs_ready = 1;
  3903. outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
  3904. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3905. /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
  3906. if (card->hwvolctl) {
  3907. /* Enable GPIO IRQ (MISCINT bit 18h) */
  3908. temp = inw(TRID_REG(card, T4D_MISCINT + 2));
  3909. temp |= 0x0004;
  3910. outw(temp, TRID_REG(card, T4D_MISCINT + 2));
  3911. /* Enable H/W Volume Control GLOVAL CONTROL bit 0 */
  3912. temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
  3913. temp |= 0x0001;
  3914. outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL));
  3915. }
  3916. if (card->revision == ALI_5451_V02)
  3917. ali_close_multi_channels();
  3918. /* edited by HMSEO for GT sound */
  3919. #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
  3920. {
  3921. u16 ac97_data;
  3922. extern struct hwrpb_struct *hwrpb;
  3923. if ((hwrpb->sys_type) == 201) {
  3924. printk(KERN_INFO "trident: Running on Alpha system "
  3925. "type Nautilus\n");
  3926. ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
  3927. ali_ac97_set(card, 0, AC97_POWER_CONTROL,
  3928. ac97_data | ALI_EAPD_POWER_DOWN);
  3929. }
  3930. }
  3931. #endif /* CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC */
  3932. /* edited by HMSEO for GT sound */
  3933. }
  3934. rc = 0;
  3935. pci_set_drvdata(pci_dev, card);
  3936. /* Enable Address Engine Interrupts */
  3937. trident_enable_loop_interrupts(card);
  3938. /* Register gameport */
  3939. trident_register_gameport(card);
  3940. out:
  3941. return rc;
  3942. out_unregister_sound_dsp:
  3943. unregister_sound_dsp(card->dev_audio);
  3944. out_free_irq:
  3945. free_irq(card->irq, card);
  3946. out_proc_fs:
  3947. if (res) {
  3948. remove_proc_entry("ALi5451", NULL);
  3949. res = NULL;
  3950. }
  3951. kfree(card);
  3952. devs = NULL;
  3953. out_release_region:
  3954. release_region(iobase, 256);
  3955. return rc;
  3956. }
  3957. static void __devexit
  3958. trident_remove(struct pci_dev *pci_dev)
  3959. {
  3960. int i;
  3961. struct trident_card *card = pci_get_drvdata(pci_dev);
  3962. /*
  3963. * Kill running timers before unload. We can't have them
  3964. * going off after rmmod!
  3965. */
  3966. if (card->hwvolctl)
  3967. del_timer_sync(&card->timer);
  3968. /* ALi S/PDIF and Power Management */
  3969. if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
  3970. ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
  3971. ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
  3972. ali_disable_spdif_in(card);
  3973. remove_proc_entry("ALi5451", NULL);
  3974. }
  3975. /* Unregister gameport */
  3976. trident_unregister_gameport(card);
  3977. /* Kill interrupts, and SP/DIF */
  3978. trident_disable_loop_interrupts(card);
  3979. /* free hardware resources */
  3980. free_irq(card->irq, card);
  3981. release_region(card->iobase, 256);
  3982. /* unregister audio devices */
  3983. for (i = 0; i < NR_AC97; i++)
  3984. if (card->ac97_codec[i] != NULL) {
  3985. unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
  3986. ac97_release_codec(card->ac97_codec[i]);
  3987. }
  3988. unregister_sound_dsp(card->dev_audio);
  3989. kfree(card);
  3990. pci_set_drvdata(pci_dev, NULL);
  3991. }
  3992. MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee, Muli Ben-Yehuda");
  3993. MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI "
  3994. "Audio Driver");
  3995. MODULE_LICENSE("GPL");
  3996. #define TRIDENT_MODULE_NAME "trident"
  3997. static struct pci_driver trident_pci_driver = {
  3998. .name = TRIDENT_MODULE_NAME,
  3999. .id_table = trident_pci_tbl,
  4000. .probe = trident_probe,
  4001. .remove = __devexit_p(trident_remove),
  4002. .suspend = trident_suspend,
  4003. .resume = trident_resume
  4004. };
  4005. static int __init
  4006. trident_init_module(void)
  4007. {
  4008. printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro "
  4009. "5050 PCI Audio, version " DRIVER_VERSION ", " __TIME__ " "
  4010. __DATE__ "\n");
  4011. return pci_register_driver(&trident_pci_driver);
  4012. }
  4013. static void __exit
  4014. trident_cleanup_module(void)
  4015. {
  4016. pci_unregister_driver(&trident_pci_driver);
  4017. }
  4018. module_init(trident_init_module);
  4019. module_exit(trident_cleanup_module);