mad16.c 23 KB

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  1. /*
  2. * Copyright (C) by Hannu Savolainen 1993-1997
  3. *
  4. * mad16.c
  5. *
  6. * Initialization code for OPTi MAD16 compatible audio chips. Including
  7. *
  8. * OPTi 82C928 MAD16 (replaced by C929)
  9. * OAK OTI-601D Mozart
  10. * OAK OTI-605 Mozart (later version with MPU401 Midi)
  11. * OPTi 82C929 MAD16 Pro
  12. * OPTi 82C930
  13. * OPTi 82C924
  14. *
  15. * These audio interface chips don't produce sound themselves. They just
  16. * connect some other components (OPL-[234] and a WSS compatible codec)
  17. * to the PC bus and perform I/O, DMA and IRQ address decoding. There is
  18. * also a UART for the MPU-401 mode (not 82C928/Mozart).
  19. * The Mozart chip appears to be compatible with the 82C928, although later
  20. * issues of the card, using the OTI-605 chip, have an MPU-401 compatible Midi
  21. * port. This port is configured differently to that of the OPTi audio chips.
  22. *
  23. * Changes
  24. *
  25. * Alan Cox Clean up, added module selections.
  26. *
  27. * A. Wik Added support for Opti924 PnP.
  28. * Improved debugging support. 16-May-1998
  29. * Fixed bug. 16-Jun-1998
  30. *
  31. * Torsten Duwe Made Opti924 PnP support non-destructive
  32. * 23-Dec-1998
  33. *
  34. * Paul Grayson Added support for Midi on later Mozart cards.
  35. * 25-Nov-1999
  36. * Christoph Hellwig Adapted to module_init/module_exit.
  37. * Arnaldo C. de Melo got rid of attach_uart401 21-Sep-2000
  38. *
  39. * Pavel Rabel Clean up Nov-2000
  40. */
  41. #include <linux/config.h>
  42. #include <linux/init.h>
  43. #include <linux/module.h>
  44. #include <linux/gameport.h>
  45. #include <linux/spinlock.h>
  46. #include "sound_config.h"
  47. #include "ad1848.h"
  48. #include "sb.h"
  49. #include "mpu401.h"
  50. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  51. #define SUPPORT_JOYSTICK 1
  52. #endif
  53. static int mad16_conf;
  54. static int mad16_cdsel;
  55. static DEFINE_SPINLOCK(lock);
  56. #define C928 1
  57. #define MOZART 2
  58. #define C929 3
  59. #define C930 4
  60. #define C924 5
  61. /*
  62. * Registers
  63. *
  64. * The MAD16 occupies I/O ports 0xf8d to 0xf93 (fixed locations).
  65. * All ports are inactive by default. They can be activated by
  66. * writing 0xE2 or 0xE3 to the password register. The password is valid
  67. * only until the next I/O read or write.
  68. *
  69. * 82C930 uses 0xE4 as the password and indirect addressing to access
  70. * the config registers.
  71. */
  72. #define MC0_PORT 0xf8c /* Dummy port */
  73. #define MC1_PORT 0xf8d /* SB address, CD-ROM interface type, joystick */
  74. #define MC2_PORT 0xf8e /* CD-ROM address, IRQ, DMA, plus OPL4 bit */
  75. #define MC3_PORT 0xf8f
  76. #define PASSWD_REG 0xf8f
  77. #define MC4_PORT 0xf90
  78. #define MC5_PORT 0xf91
  79. #define MC6_PORT 0xf92
  80. #define MC7_PORT 0xf93
  81. #define MC8_PORT 0xf94
  82. #define MC9_PORT 0xf95
  83. #define MC10_PORT 0xf96
  84. #define MC11_PORT 0xf97
  85. #define MC12_PORT 0xf98
  86. static int board_type = C928;
  87. static int *mad16_osp;
  88. static int c931_detected; /* minor differences from C930 */
  89. static char c924pnp; /* " " " C924 */
  90. static int debug; /* debugging output */
  91. #ifdef DDB
  92. #undef DDB
  93. #endif
  94. #define DDB(x) do {if (debug) x;} while (0)
  95. static unsigned char mad_read(int port)
  96. {
  97. unsigned long flags;
  98. unsigned char tmp;
  99. spin_lock_irqsave(&lock,flags);
  100. switch (board_type) /* Output password */
  101. {
  102. case C928:
  103. case MOZART:
  104. outb((0xE2), PASSWD_REG);
  105. break;
  106. case C929:
  107. outb((0xE3), PASSWD_REG);
  108. break;
  109. case C930:
  110. /* outb(( 0xE4), PASSWD_REG); */
  111. break;
  112. case C924:
  113. /* the c924 has its ports relocated by -128 if
  114. PnP is enabled -aw */
  115. if (!c924pnp)
  116. outb((0xE5), PASSWD_REG); else
  117. outb((0xE5), PASSWD_REG - 0x80);
  118. break;
  119. }
  120. if (board_type == C930)
  121. {
  122. outb((port - MC0_PORT), 0xe0e); /* Write to index reg */
  123. tmp = inb(0xe0f); /* Read from data reg */
  124. }
  125. else
  126. if (!c924pnp)
  127. tmp = inb(port); else
  128. tmp = inb(port-0x80);
  129. spin_unlock_irqrestore(&lock,flags);
  130. return tmp;
  131. }
  132. static void mad_write(int port, int value)
  133. {
  134. unsigned long flags;
  135. spin_lock_irqsave(&lock,flags);
  136. switch (board_type) /* Output password */
  137. {
  138. case C928:
  139. case MOZART:
  140. outb((0xE2), PASSWD_REG);
  141. break;
  142. case C929:
  143. outb((0xE3), PASSWD_REG);
  144. break;
  145. case C930:
  146. /* outb(( 0xE4), PASSWD_REG); */
  147. break;
  148. case C924:
  149. if (!c924pnp)
  150. outb((0xE5), PASSWD_REG); else
  151. outb((0xE5), PASSWD_REG - 0x80);
  152. break;
  153. }
  154. if (board_type == C930)
  155. {
  156. outb((port - MC0_PORT), 0xe0e); /* Write to index reg */
  157. outb(((unsigned char) (value & 0xff)), 0xe0f);
  158. }
  159. else
  160. if (!c924pnp)
  161. outb(((unsigned char) (value & 0xff)), port); else
  162. outb(((unsigned char) (value & 0xff)), port-0x80);
  163. spin_unlock_irqrestore(&lock,flags);
  164. }
  165. static int __init detect_c930(void)
  166. {
  167. unsigned char tmp = mad_read(MC1_PORT);
  168. if ((tmp & 0x06) != 0x06)
  169. {
  170. DDB(printk("Wrong C930 signature (%x)\n", tmp));
  171. /* return 0; */
  172. }
  173. mad_write(MC1_PORT, 0);
  174. if (mad_read(MC1_PORT) != 0x06)
  175. {
  176. DDB(printk("Wrong C930 signature2 (%x)\n", tmp));
  177. /* return 0; */
  178. }
  179. mad_write(MC1_PORT, tmp); /* Restore bits */
  180. mad_write(MC7_PORT, 0);
  181. if ((tmp = mad_read(MC7_PORT)) != 0)
  182. {
  183. DDB(printk("MC7 not writable (%x)\n", tmp));
  184. return 0;
  185. }
  186. mad_write(MC7_PORT, 0xcb);
  187. if ((tmp = mad_read(MC7_PORT)) != 0xcb)
  188. {
  189. DDB(printk("MC7 not writable2 (%x)\n", tmp));
  190. return 0;
  191. }
  192. tmp = mad_read(MC0_PORT+18);
  193. if (tmp == 0xff || tmp == 0x00)
  194. return 1;
  195. /* We probably have a C931 */
  196. DDB(printk("Detected C931 config=0x%02x\n", tmp));
  197. c931_detected = 1;
  198. /*
  199. * We cannot configure the chip if it is in PnP mode.
  200. * If we have a CSN assigned (bit 8 in MC13) we first try
  201. * a software reset, then a software power off, finally
  202. * Clearing PnP mode. The last option is not
  203. * Bit 8 in MC13
  204. */
  205. if ((mad_read(MC0_PORT+13) & 0x80) == 0)
  206. return 1;
  207. /* Software reset */
  208. mad_write(MC9_PORT, 0x02);
  209. mad_write(MC9_PORT, 0x00);
  210. if ((mad_read(MC0_PORT+13) & 0x80) == 0)
  211. return 1;
  212. /* Power off, and on again */
  213. mad_write(MC9_PORT, 0xc2);
  214. mad_write(MC9_PORT, 0xc0);
  215. if ((mad_read(MC0_PORT+13) & 0x80) == 0)
  216. return 1;
  217. #if 0
  218. /* Force off PnP mode. This is not recommended because
  219. * the PnP bios will not recognize the chip on the next
  220. * warm boot and may assignd different resources to other
  221. * PnP/PCI cards.
  222. */
  223. mad_write(MC0_PORT+17, 0x04);
  224. #endif
  225. return 1;
  226. }
  227. static int __init detect_mad16(void)
  228. {
  229. unsigned char tmp, tmp2, bit;
  230. int i, port;
  231. /*
  232. * Check that reading a register doesn't return bus float (0xff)
  233. * when the card is accessed using password. This may fail in case
  234. * the card is in low power mode. Normally at least the power saving
  235. * mode bit should be 0.
  236. */
  237. if ((tmp = mad_read(MC1_PORT)) == 0xff)
  238. {
  239. DDB(printk("MC1_PORT returned 0xff\n"));
  240. return 0;
  241. }
  242. for (i = 0xf8d; i <= 0xf98; i++)
  243. if (!c924pnp)
  244. DDB(printk("Port %0x (init value) = %0x\n", i, mad_read(i)));
  245. else
  246. DDB(printk("Port %0x (init value) = %0x\n", i-0x80, mad_read(i)));
  247. if (board_type == C930)
  248. return detect_c930();
  249. /*
  250. * Now check that the gate is closed on first I/O after writing
  251. * the password. (This is how a MAD16 compatible card works).
  252. */
  253. if ((tmp2 = inb(MC1_PORT)) == tmp) /* It didn't close */
  254. {
  255. DDB(printk("MC1_PORT didn't close after read (0x%02x)\n", tmp2));
  256. return 0;
  257. }
  258. bit = (c924pnp) ? 0x20 : 0x80;
  259. port = (c924pnp) ? MC2_PORT : MC1_PORT;
  260. tmp = mad_read(port);
  261. mad_write(port, tmp ^ bit); /* Toggle a bit */
  262. if ((tmp2 = mad_read(port)) != (tmp ^ bit)) /* Compare the bit */
  263. {
  264. mad_write(port, tmp); /* Restore */
  265. DDB(printk("Bit revert test failed (0x%02x, 0x%02x)\n", tmp, tmp2));
  266. return 0;
  267. }
  268. mad_write(port, tmp); /* Restore */
  269. return 1; /* Bingo */
  270. }
  271. static int __init wss_init(struct address_info *hw_config)
  272. {
  273. /*
  274. * Check if the IO port returns valid signature. The original MS Sound
  275. * system returns 0x04 while some cards (AudioTrix Pro for example)
  276. * return 0x00.
  277. */
  278. if ((inb(hw_config->io_base + 3) & 0x3f) != 0x04 &&
  279. (inb(hw_config->io_base + 3) & 0x3f) != 0x00)
  280. {
  281. DDB(printk("No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, inb(hw_config->io_base + 3)));
  282. return 0;
  283. }
  284. /*
  285. * Check that DMA0 is not in use with a 8 bit board.
  286. */
  287. if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80)
  288. {
  289. printk("MSS: Can't use DMA0 with a 8 bit card/slot\n");
  290. return 0;
  291. }
  292. if (hw_config->irq > 9 && inb(hw_config->io_base + 3) & 0x80)
  293. printk(KERN_ERR "MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
  294. return 1;
  295. }
  296. static void __init init_c930(struct address_info *hw_config, int base)
  297. {
  298. unsigned char cfg = 0;
  299. cfg |= (0x0f & mad16_conf);
  300. if(c931_detected)
  301. {
  302. /* Bit 0 has reversd meaning. Bits 1 and 2 sese
  303. reversed on write.
  304. Support only IDE cdrom. IDE port programmed
  305. somewhere else. */
  306. cfg = (cfg & 0x09) ^ 0x07;
  307. }
  308. cfg |= base << 4;
  309. mad_write(MC1_PORT, cfg);
  310. /* MC2 is CD configuration. Don't touch it. */
  311. mad_write(MC3_PORT, 0); /* Disable SB mode IRQ and DMA */
  312. /* bit 2 of MC4 reverses it's meaning between the C930
  313. and the C931. */
  314. cfg = c931_detected ? 0x04 : 0x00;
  315. if(mad16_cdsel & 0x20)
  316. mad_write(MC4_PORT, 0x62|cfg); /* opl4 */
  317. else
  318. mad_write(MC4_PORT, 0x52|cfg); /* opl3 */
  319. mad_write(MC5_PORT, 0x3C); /* Init it into mode2 */
  320. mad_write(MC6_PORT, 0x02); /* Enable WSS, Disable MPU and SB */
  321. mad_write(MC7_PORT, 0xCB);
  322. mad_write(MC10_PORT, 0x11);
  323. }
  324. static int __init chip_detect(void)
  325. {
  326. int i;
  327. /*
  328. * Then try to detect with the old password
  329. */
  330. board_type = C924;
  331. DDB(printk("Detect using password = 0xE5\n"));
  332. if (detect_mad16()) {
  333. return 1;
  334. }
  335. board_type = C928;
  336. DDB(printk("Detect using password = 0xE2\n"));
  337. if (detect_mad16())
  338. {
  339. unsigned char model;
  340. if (((model = mad_read(MC3_PORT)) & 0x03) == 0x03) {
  341. DDB(printk("mad16.c: Mozart detected\n"));
  342. board_type = MOZART;
  343. } else {
  344. DDB(printk("mad16.c: 82C928 detected???\n"));
  345. board_type = C928;
  346. }
  347. return 1;
  348. }
  349. board_type = C929;
  350. DDB(printk("Detect using password = 0xE3\n"));
  351. if (detect_mad16())
  352. {
  353. DDB(printk("mad16.c: 82C929 detected\n"));
  354. return 1;
  355. }
  356. if (inb(PASSWD_REG) != 0xff)
  357. return 0;
  358. /*
  359. * First relocate MC# registers to 0xe0e/0xe0f, disable password
  360. */
  361. outb((0xE4), PASSWD_REG);
  362. outb((0x80), PASSWD_REG);
  363. board_type = C930;
  364. DDB(printk("Detect using password = 0xE4\n"));
  365. for (i = 0xf8d; i <= 0xf93; i++)
  366. DDB(printk("port %03x = %02x\n", i, mad_read(i)));
  367. if(detect_mad16()) {
  368. DDB(printk("mad16.c: 82C930 detected\n"));
  369. return 1;
  370. }
  371. /* The C931 has the password reg at F8D */
  372. outb((0xE4), 0xF8D);
  373. outb((0x80), 0xF8D);
  374. DDB(printk("Detect using password = 0xE4 for C931\n"));
  375. if (detect_mad16()) {
  376. return 1;
  377. }
  378. board_type = C924;
  379. c924pnp++;
  380. DDB(printk("Detect using password = 0xE5 (again), port offset -0x80\n"));
  381. if (detect_mad16()) {
  382. DDB(printk("mad16.c: 82C924 PnP detected\n"));
  383. return 1;
  384. }
  385. c924pnp=0;
  386. return 0;
  387. }
  388. static int __init probe_mad16(struct address_info *hw_config)
  389. {
  390. int i;
  391. unsigned char tmp;
  392. unsigned char cs4231_mode = 0;
  393. int ad_flags = 0;
  394. signed char bits;
  395. static char dma_bits[4] = {
  396. 1, 2, 0, 3
  397. };
  398. int config_port = hw_config->io_base + 0, version_port = hw_config->io_base + 3;
  399. int dma = hw_config->dma, dma2 = hw_config->dma2;
  400. unsigned char dma2_bit = 0;
  401. int base;
  402. struct resource *ports;
  403. mad16_osp = hw_config->osp;
  404. switch (hw_config->io_base) {
  405. case 0x530:
  406. base = 0;
  407. break;
  408. case 0xe80:
  409. base = 1;
  410. break;
  411. case 0xf40:
  412. base = 2;
  413. break;
  414. case 0x604:
  415. base = 3;
  416. break;
  417. default:
  418. printk(KERN_ERR "MAD16/Mozart: Bad WSS base address 0x%x\n", hw_config->io_base);
  419. return 0;
  420. }
  421. if (dma != 0 && dma != 1 && dma != 3) {
  422. printk(KERN_ERR "MSS: Bad DMA %d\n", dma);
  423. return 0;
  424. }
  425. /*
  426. * Check that all ports return 0xff (bus float) when no password
  427. * is written to the password register.
  428. */
  429. DDB(printk("--- Detecting MAD16 / Mozart ---\n"));
  430. if (!chip_detect())
  431. return 0;
  432. switch (hw_config->irq) {
  433. case 7:
  434. bits = 8;
  435. break;
  436. case 9:
  437. bits = 0x10;
  438. break;
  439. case 10:
  440. bits = 0x18;
  441. break;
  442. case 12:
  443. bits = 0x20;
  444. break;
  445. case 5: /* Also IRQ5 is possible on C930 */
  446. if (board_type == C930 || c924pnp) {
  447. bits = 0x28;
  448. break;
  449. }
  450. default:
  451. printk(KERN_ERR "MAD16/Mozart: Bad IRQ %d\n", hw_config->irq);
  452. return 0;
  453. }
  454. ports = request_region(hw_config->io_base + 4, 4, "ad1848");
  455. if (!ports) {
  456. printk(KERN_ERR "MSS: I/O port conflict\n");
  457. return 0;
  458. }
  459. if (!request_region(hw_config->io_base, 4, "mad16 WSS config")) {
  460. release_region(hw_config->io_base + 4, 4);
  461. printk(KERN_ERR "MSS: I/O port conflict\n");
  462. return 0;
  463. }
  464. if (board_type == C930) {
  465. init_c930(hw_config, base);
  466. goto got_it;
  467. }
  468. for (i = 0xf8d; i <= 0xf93; i++) {
  469. if (!c924pnp)
  470. DDB(printk("port %03x = %02x\n", i, mad_read(i)));
  471. else
  472. DDB(printk("port %03x = %02x\n", i-0x80, mad_read(i)));
  473. }
  474. /*
  475. * Set the WSS address
  476. */
  477. tmp = (mad_read(MC1_PORT) & 0x0f) | 0x80; /* Enable WSS, Disable SB */
  478. tmp |= base << 4; /* WSS port select bits */
  479. /*
  480. * Set optional CD-ROM and joystick settings.
  481. */
  482. tmp &= ~0x0f;
  483. tmp |= (mad16_conf & 0x0f); /* CD-ROM and joystick bits */
  484. mad_write(MC1_PORT, tmp);
  485. tmp = mad16_cdsel;
  486. mad_write(MC2_PORT, tmp);
  487. mad_write(MC3_PORT, 0xf0); /* Disable SB */
  488. if (board_type == C924) /* Specific C924 init values */
  489. {
  490. mad_write(MC4_PORT, 0xA0);
  491. mad_write(MC5_PORT, 0x05);
  492. mad_write(MC6_PORT, 0x03);
  493. }
  494. if (!ad1848_detect(ports, &ad_flags, mad16_osp))
  495. goto fail;
  496. if (ad_flags & (AD_F_CS4231 | AD_F_CS4248))
  497. cs4231_mode = 0x02; /* CS4248/CS4231 sync delay switch */
  498. if (board_type == C929)
  499. {
  500. mad_write(MC4_PORT, 0xa2);
  501. mad_write(MC5_PORT, 0xA5 | cs4231_mode);
  502. mad_write(MC6_PORT, 0x03); /* Disable MPU401 */
  503. }
  504. else
  505. {
  506. mad_write(MC4_PORT, 0x02);
  507. mad_write(MC5_PORT, 0x30 | cs4231_mode);
  508. }
  509. for (i = 0xf8d; i <= 0xf93; i++) {
  510. if (!c924pnp)
  511. DDB(printk("port %03x after init = %02x\n", i, mad_read(i)));
  512. else
  513. DDB(printk("port %03x after init = %02x\n", i-0x80, mad_read(i)));
  514. }
  515. got_it:
  516. ad_flags = 0;
  517. if (!ad1848_detect(ports, &ad_flags, mad16_osp))
  518. goto fail;
  519. if (!wss_init(hw_config))
  520. goto fail;
  521. /*
  522. * Set the IRQ and DMA addresses.
  523. */
  524. outb((bits | 0x40), config_port);
  525. if ((inb(version_port) & 0x40) == 0)
  526. printk(KERN_ERR "[IRQ Conflict?]\n");
  527. /*
  528. * Handle the capture DMA channel
  529. */
  530. if (ad_flags & AD_F_CS4231 && dma2 != -1 && dma2 != dma)
  531. {
  532. if (!((dma == 0 && dma2 == 1) ||
  533. (dma == 1 && dma2 == 0) ||
  534. (dma == 3 && dma2 == 0)))
  535. { /* Unsupported combination. Try to swap channels */
  536. int tmp = dma;
  537. dma = dma2;
  538. dma2 = tmp;
  539. }
  540. if ((dma == 0 && dma2 == 1) || (dma == 1 && dma2 == 0) ||
  541. (dma == 3 && dma2 == 0))
  542. {
  543. dma2_bit = 0x04; /* Enable capture DMA */
  544. }
  545. else
  546. {
  547. printk("MAD16: Invalid capture DMA\n");
  548. dma2 = dma;
  549. }
  550. }
  551. else dma2 = dma;
  552. outb((bits | dma_bits[dma] | dma2_bit), config_port); /* Write IRQ+DMA setup */
  553. hw_config->slots[0] = ad1848_init("mad16 WSS", ports,
  554. hw_config->irq,
  555. dma,
  556. dma2, 0,
  557. hw_config->osp,
  558. THIS_MODULE);
  559. return 1;
  560. fail:
  561. release_region(hw_config->io_base + 4, 4);
  562. release_region(hw_config->io_base, 4);
  563. return 0;
  564. }
  565. static int __init probe_mad16_mpu(struct address_info *hw_config)
  566. {
  567. unsigned char tmp;
  568. if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */
  569. {
  570. #ifdef CONFIG_MAD16_OLDCARD
  571. tmp = mad_read(MC3_PORT);
  572. /*
  573. * MAD16 SB base is defined by the WSS base. It cannot be changed
  574. * alone.
  575. * Ignore configured I/O base. Use the active setting.
  576. */
  577. if (mad_read(MC1_PORT) & 0x20)
  578. hw_config->io_base = 0x240;
  579. else
  580. hw_config->io_base = 0x220;
  581. switch (hw_config->irq)
  582. {
  583. case 5:
  584. tmp = (tmp & 0x3f) | 0x80;
  585. break;
  586. case 7:
  587. tmp = (tmp & 0x3f);
  588. break;
  589. case 11:
  590. tmp = (tmp & 0x3f) | 0x40;
  591. break;
  592. default:
  593. printk(KERN_ERR "mad16/Mozart: Invalid MIDI IRQ\n");
  594. return 0;
  595. }
  596. mad_write(MC3_PORT, tmp | 0x04);
  597. hw_config->driver_use_1 = SB_MIDI_ONLY;
  598. if (!request_region(hw_config->io_base, 16, "soundblaster"))
  599. return 0;
  600. if (!sb_dsp_detect(hw_config, 0, 0, NULL)) {
  601. release_region(hw_config->io_base, 16);
  602. return 0;
  603. }
  604. if (mad_read(MC1_PORT) & 0x20)
  605. hw_config->io_base = 0x240;
  606. else
  607. hw_config->io_base = 0x220;
  608. hw_config->name = "Mad16/Mozart";
  609. sb_dsp_init(hw_config, THIS_MODULE);
  610. return 1;
  611. #else
  612. /* assuming all later Mozart cards are identified as
  613. * either 82C928 or Mozart. If so, following code attempts
  614. * to set MPU register. TODO - add probing
  615. */
  616. tmp = mad_read(MC8_PORT);
  617. switch (hw_config->irq)
  618. {
  619. case 5:
  620. tmp |= 0x08;
  621. break;
  622. case 7:
  623. tmp |= 0x10;
  624. break;
  625. case 9:
  626. tmp |= 0x18;
  627. break;
  628. case 10:
  629. tmp |= 0x20;
  630. break;
  631. case 11:
  632. tmp |= 0x28;
  633. break;
  634. default:
  635. printk(KERN_ERR "mad16/MOZART: invalid mpu_irq\n");
  636. return 0;
  637. }
  638. switch (hw_config->io_base)
  639. {
  640. case 0x300:
  641. tmp |= 0x01;
  642. break;
  643. case 0x310:
  644. tmp |= 0x03;
  645. break;
  646. case 0x320:
  647. tmp |= 0x05;
  648. break;
  649. case 0x330:
  650. tmp |= 0x07;
  651. break;
  652. default:
  653. printk(KERN_ERR "mad16/MOZART: invalid mpu_io\n");
  654. return 0;
  655. }
  656. mad_write(MC8_PORT, tmp); /* write MPU port parameters */
  657. goto probe_401;
  658. #endif
  659. }
  660. tmp = mad_read(MC6_PORT) & 0x83;
  661. tmp |= 0x80; /* MPU-401 enable */
  662. /* Set the MPU base bits */
  663. switch (hw_config->io_base)
  664. {
  665. case 0x300:
  666. tmp |= 0x60;
  667. break;
  668. case 0x310:
  669. tmp |= 0x40;
  670. break;
  671. case 0x320:
  672. tmp |= 0x20;
  673. break;
  674. case 0x330:
  675. tmp |= 0x00;
  676. break;
  677. default:
  678. printk(KERN_ERR "MAD16: Invalid MIDI port 0x%x\n", hw_config->io_base);
  679. return 0;
  680. }
  681. /* Set the MPU IRQ bits */
  682. switch (hw_config->irq)
  683. {
  684. case 5:
  685. tmp |= 0x10;
  686. break;
  687. case 7:
  688. tmp |= 0x18;
  689. break;
  690. case 9:
  691. tmp |= 0x00;
  692. break;
  693. case 10:
  694. tmp |= 0x08;
  695. break;
  696. default:
  697. printk(KERN_ERR "MAD16: Invalid MIDI IRQ %d\n", hw_config->irq);
  698. break;
  699. }
  700. mad_write(MC6_PORT, tmp); /* Write MPU401 config */
  701. #ifndef CONFIG_MAD16_OLDCARD
  702. probe_401:
  703. #endif
  704. hw_config->driver_use_1 = SB_MIDI_ONLY;
  705. hw_config->name = "Mad16/Mozart";
  706. return probe_uart401(hw_config, THIS_MODULE);
  707. }
  708. static void __exit unload_mad16(struct address_info *hw_config)
  709. {
  710. ad1848_unload(hw_config->io_base + 4,
  711. hw_config->irq,
  712. hw_config->dma,
  713. hw_config->dma2, 0);
  714. release_region(hw_config->io_base, 4);
  715. sound_unload_audiodev(hw_config->slots[0]);
  716. }
  717. static void __exit unload_mad16_mpu(struct address_info *hw_config)
  718. {
  719. #ifdef CONFIG_MAD16_OLDCARD
  720. if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */
  721. {
  722. sb_dsp_unload(hw_config, 0);
  723. return;
  724. }
  725. #endif
  726. unload_uart401(hw_config);
  727. }
  728. static struct address_info cfg;
  729. static struct address_info cfg_mpu;
  730. static int found_mpu;
  731. static int __initdata mpu_io = 0;
  732. static int __initdata mpu_irq = 0;
  733. static int __initdata io = -1;
  734. static int __initdata dma = -1;
  735. static int __initdata dma16 = -1; /* Set this for modules that need it */
  736. static int __initdata irq = -1;
  737. static int __initdata cdtype = 0;
  738. static int __initdata cdirq = 0;
  739. static int __initdata cdport = 0x340;
  740. static int __initdata cddma = -1;
  741. static int __initdata opl4 = 0;
  742. static int __initdata joystick = 0;
  743. module_param(mpu_io, int, 0);
  744. module_param(mpu_irq, int, 0);
  745. module_param(io, int, 0);
  746. module_param(dma, int, 0);
  747. module_param(dma16, int, 0);
  748. module_param(irq, int, 0);
  749. module_param(cdtype, int, 0);
  750. module_param(cdirq, int, 0);
  751. module_param(cdport, int, 0);
  752. module_param(cddma, int, 0);
  753. module_param(opl4, int, 0);
  754. module_param(joystick, bool, 0);
  755. module_param(debug, bool, 0644);
  756. static int __initdata dma_map[2][8] =
  757. {
  758. {0x03, -1, -1, -1, -1, 0x00, 0x01, 0x02},
  759. {0x03, -1, 0x01, 0x00, -1, -1, -1, -1}
  760. };
  761. static int __initdata irq_map[16] =
  762. {
  763. 0x00, -1, -1, 0x0A,
  764. -1, 0x04, -1, 0x08,
  765. -1, 0x10, 0x14, 0x18,
  766. -1, -1, -1, -1
  767. };
  768. #ifdef SUPPORT_JOYSTICK
  769. static struct gameport *gameport;
  770. static int __devinit mad16_register_gameport(int io_port)
  771. {
  772. if (!request_region(io_port, 1, "mad16 gameport")) {
  773. printk(KERN_ERR "mad16: gameport address 0x%#x already in use\n", io_port);
  774. return -EBUSY;
  775. }
  776. gameport = gameport_allocate_port();
  777. if (!gameport) {
  778. printk(KERN_ERR "mad16: can not allocate memory for gameport\n");
  779. release_region(io_port, 1);
  780. return -ENOMEM;
  781. }
  782. gameport_set_name(gameport, "MAD16 Gameport");
  783. gameport_set_phys(gameport, "isa%04x/gameport0", io_port);
  784. gameport->io = io_port;
  785. gameport_register_port(gameport);
  786. return 0;
  787. }
  788. static inline void mad16_unregister_gameport(void)
  789. {
  790. if (gameport) {
  791. /* the gameport was initialized so we must free it up */
  792. gameport_unregister_port(gameport);
  793. gameport = NULL;
  794. release_region(0x201, 1);
  795. }
  796. }
  797. #else
  798. static inline int mad16_register_gameport(int io_port) { return -ENOSYS; }
  799. static inline void mad16_unregister_gameport(void) { }
  800. #endif
  801. static int __devinit init_mad16(void)
  802. {
  803. int dmatype = 0;
  804. printk(KERN_INFO "MAD16 audio driver Copyright (C) by Hannu Savolainen 1993-1996\n");
  805. printk(KERN_INFO "CDROM ");
  806. switch (cdtype)
  807. {
  808. case 0x00:
  809. printk("Disabled");
  810. cdirq = 0;
  811. break;
  812. case 0x02:
  813. printk("Sony CDU31A");
  814. dmatype = 1;
  815. if(cddma == -1) cddma = 3;
  816. break;
  817. case 0x04:
  818. printk("Mitsumi");
  819. dmatype = 0;
  820. if(cddma == -1) cddma = 5;
  821. break;
  822. case 0x06:
  823. printk("Panasonic Lasermate");
  824. dmatype = 1;
  825. if(cddma == -1) cddma = 3;
  826. break;
  827. case 0x08:
  828. printk("Secondary IDE");
  829. dmatype = 0;
  830. if(cddma == -1) cddma = 5;
  831. break;
  832. case 0x0A:
  833. printk("Primary IDE");
  834. dmatype = 0;
  835. if(cddma == -1) cddma = 5;
  836. break;
  837. default:
  838. printk("\n");
  839. printk(KERN_ERR "Invalid CDROM type\n");
  840. return -EINVAL;
  841. }
  842. /*
  843. * Build the config words
  844. */
  845. mad16_conf = (joystick ^ 1) | cdtype;
  846. mad16_cdsel = 0;
  847. if (opl4)
  848. mad16_cdsel |= 0x20;
  849. if(cdtype){
  850. if (cddma > 7 || cddma < 0 || dma_map[dmatype][cddma] == -1)
  851. {
  852. printk("\n");
  853. printk(KERN_ERR "Invalid CDROM DMA\n");
  854. return -EINVAL;
  855. }
  856. if (cddma)
  857. printk(", DMA %d", cddma);
  858. else
  859. printk(", no DMA");
  860. if (!cdirq)
  861. printk(", no IRQ");
  862. else if (cdirq < 0 || cdirq > 15 || irq_map[cdirq] == -1)
  863. {
  864. printk(", invalid IRQ (disabling)");
  865. cdirq = 0;
  866. }
  867. else printk(", IRQ %d", cdirq);
  868. mad16_cdsel |= dma_map[dmatype][cddma];
  869. if (cdtype < 0x08)
  870. {
  871. switch (cdport)
  872. {
  873. case 0x340:
  874. mad16_cdsel |= 0x00;
  875. break;
  876. case 0x330:
  877. mad16_cdsel |= 0x40;
  878. break;
  879. case 0x360:
  880. mad16_cdsel |= 0x80;
  881. break;
  882. case 0x320:
  883. mad16_cdsel |= 0xC0;
  884. break;
  885. default:
  886. printk(KERN_ERR "Unknown CDROM I/O base %d\n", cdport);
  887. return -EINVAL;
  888. }
  889. }
  890. mad16_cdsel |= irq_map[cdirq];
  891. }
  892. printk(".\n");
  893. cfg.io_base = io;
  894. cfg.irq = irq;
  895. cfg.dma = dma;
  896. cfg.dma2 = dma16;
  897. if (cfg.io_base == -1 || cfg.dma == -1 || cfg.irq == -1) {
  898. printk(KERN_ERR "I/O, DMA and irq are mandatory\n");
  899. return -EINVAL;
  900. }
  901. if (!request_region(MC0_PORT, 12, "mad16"))
  902. return -EBUSY;
  903. if (!probe_mad16(&cfg)) {
  904. release_region(MC0_PORT, 12);
  905. return -ENODEV;
  906. }
  907. cfg_mpu.io_base = mpu_io;
  908. cfg_mpu.irq = mpu_irq;
  909. found_mpu = probe_mad16_mpu(&cfg_mpu);
  910. if (joystick)
  911. mad16_register_gameport(0x201);
  912. return 0;
  913. }
  914. static void __exit cleanup_mad16(void)
  915. {
  916. if (found_mpu)
  917. unload_mad16_mpu(&cfg_mpu);
  918. mad16_unregister_gameport();
  919. unload_mad16(&cfg);
  920. release_region(MC0_PORT, 12);
  921. }
  922. module_init(init_mad16);
  923. module_exit(cleanup_mad16);
  924. #ifndef MODULE
  925. static int __init setup_mad16(char *str)
  926. {
  927. /* io, irq */
  928. int ints[8];
  929. str = get_options(str, ARRAY_SIZE(ints), ints);
  930. io = ints[1];
  931. irq = ints[2];
  932. dma = ints[3];
  933. dma16 = ints[4];
  934. mpu_io = ints[5];
  935. mpu_irq = ints[6];
  936. joystick = ints[7];
  937. return 1;
  938. }
  939. __setup("mad16=", setup_mad16);
  940. #endif
  941. MODULE_LICENSE("GPL");