sunsu.c 37 KB

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  1. /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/errno.h>
  22. #include <linux/tty.h>
  23. #include <linux/tty_flip.h>
  24. #include <linux/major.h>
  25. #include <linux/string.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/ioport.h>
  28. #include <linux/circ_buf.h>
  29. #include <linux/serial.h>
  30. #include <linux/sysrq.h>
  31. #include <linux/console.h>
  32. #ifdef CONFIG_SERIO
  33. #include <linux/serio.h>
  34. #endif
  35. #include <linux/serial_reg.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <asm/io.h>
  39. #include <asm/irq.h>
  40. #include <asm/prom.h>
  41. #include <asm/of_device.h>
  42. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  43. #define SUPPORT_SYSRQ
  44. #endif
  45. #include <linux/serial_core.h>
  46. #include "suncore.h"
  47. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  48. * in a UART clock of 1.8462 MHz.
  49. */
  50. #define SU_BASE_BAUD (1846200 / 16)
  51. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  52. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  53. /*
  54. * Here we define the default xmit fifo size used for each type of UART.
  55. */
  56. static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
  57. { "unknown", 1, 0 },
  58. { "8250", 1, 0 },
  59. { "16450", 1, 0 },
  60. { "16550", 1, 0 },
  61. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  62. { "Cirrus", 1, 0 },
  63. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  64. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  65. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  66. { "Startech", 1, 0 },
  67. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  68. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  69. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  70. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  71. };
  72. struct uart_sunsu_port {
  73. struct uart_port port;
  74. unsigned char acr;
  75. unsigned char ier;
  76. unsigned short rev;
  77. unsigned char lcr;
  78. unsigned int lsr_break_flag;
  79. unsigned int cflag;
  80. /* Probing information. */
  81. enum su_type su_type;
  82. unsigned int type_probed; /* XXX Stupid */
  83. unsigned long reg_size;
  84. #ifdef CONFIG_SERIO
  85. struct serio serio;
  86. int serio_open;
  87. #endif
  88. };
  89. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  90. {
  91. offset <<= up->port.regshift;
  92. switch (up->port.iotype) {
  93. case UPIO_HUB6:
  94. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  95. return inb(up->port.iobase + 1);
  96. case UPIO_MEM:
  97. return readb(up->port.membase + offset);
  98. default:
  99. return inb(up->port.iobase + offset);
  100. }
  101. }
  102. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  103. {
  104. #ifndef CONFIG_SPARC64
  105. /*
  106. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  107. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  108. * gate outputs a logical one. Since we use level triggered interrupts
  109. * we have lockup and watchdog reset. We cannot mask IRQ because
  110. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  111. * This problem is similar to what Alpha people suffer, see serial.c.
  112. */
  113. if (offset == UART_MCR)
  114. value |= UART_MCR_OUT2;
  115. #endif
  116. offset <<= up->port.regshift;
  117. switch (up->port.iotype) {
  118. case UPIO_HUB6:
  119. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  120. outb(value, up->port.iobase + 1);
  121. break;
  122. case UPIO_MEM:
  123. writeb(value, up->port.membase + offset);
  124. break;
  125. default:
  126. outb(value, up->port.iobase + offset);
  127. }
  128. }
  129. /*
  130. * We used to support using pause I/O for certain machines. We
  131. * haven't supported this for a while, but just in case it's badly
  132. * needed for certain old 386 machines, I've left these #define's
  133. * in....
  134. */
  135. #define serial_inp(up, offset) serial_in(up, offset)
  136. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  137. /*
  138. * For the 16C950
  139. */
  140. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  141. {
  142. serial_out(up, UART_SCR, offset);
  143. serial_out(up, UART_ICR, value);
  144. }
  145. #if 0 /* Unused currently */
  146. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  147. {
  148. unsigned int value;
  149. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  150. serial_out(up, UART_SCR, offset);
  151. value = serial_in(up, UART_ICR);
  152. serial_icr_write(up, UART_ACR, up->acr);
  153. return value;
  154. }
  155. #endif
  156. #ifdef CONFIG_SERIAL_8250_RSA
  157. /*
  158. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  159. * We set the port uart clock rate if we succeed.
  160. */
  161. static int __enable_rsa(struct uart_sunsu_port *up)
  162. {
  163. unsigned char mode;
  164. int result;
  165. mode = serial_inp(up, UART_RSA_MSR);
  166. result = mode & UART_RSA_MSR_FIFO;
  167. if (!result) {
  168. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  169. mode = serial_inp(up, UART_RSA_MSR);
  170. result = mode & UART_RSA_MSR_FIFO;
  171. }
  172. if (result)
  173. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  174. return result;
  175. }
  176. static void enable_rsa(struct uart_sunsu_port *up)
  177. {
  178. if (up->port.type == PORT_RSA) {
  179. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  180. spin_lock_irq(&up->port.lock);
  181. __enable_rsa(up);
  182. spin_unlock_irq(&up->port.lock);
  183. }
  184. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  185. serial_outp(up, UART_RSA_FRR, 0);
  186. }
  187. }
  188. /*
  189. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  190. * It is unknown why interrupts were disabled in here. However,
  191. * the caller is expected to preserve this behaviour by grabbing
  192. * the spinlock before calling this function.
  193. */
  194. static void disable_rsa(struct uart_sunsu_port *up)
  195. {
  196. unsigned char mode;
  197. int result;
  198. if (up->port.type == PORT_RSA &&
  199. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  200. spin_lock_irq(&up->port.lock);
  201. mode = serial_inp(up, UART_RSA_MSR);
  202. result = !(mode & UART_RSA_MSR_FIFO);
  203. if (!result) {
  204. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  205. mode = serial_inp(up, UART_RSA_MSR);
  206. result = !(mode & UART_RSA_MSR_FIFO);
  207. }
  208. if (result)
  209. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  210. spin_unlock_irq(&up->port.lock);
  211. }
  212. }
  213. #endif /* CONFIG_SERIAL_8250_RSA */
  214. static inline void __stop_tx(struct uart_sunsu_port *p)
  215. {
  216. if (p->ier & UART_IER_THRI) {
  217. p->ier &= ~UART_IER_THRI;
  218. serial_out(p, UART_IER, p->ier);
  219. }
  220. }
  221. static void sunsu_stop_tx(struct uart_port *port)
  222. {
  223. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  224. __stop_tx(up);
  225. /*
  226. * We really want to stop the transmitter from sending.
  227. */
  228. if (up->port.type == PORT_16C950) {
  229. up->acr |= UART_ACR_TXDIS;
  230. serial_icr_write(up, UART_ACR, up->acr);
  231. }
  232. }
  233. static void sunsu_start_tx(struct uart_port *port)
  234. {
  235. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  236. if (!(up->ier & UART_IER_THRI)) {
  237. up->ier |= UART_IER_THRI;
  238. serial_out(up, UART_IER, up->ier);
  239. }
  240. /*
  241. * Re-enable the transmitter if we disabled it.
  242. */
  243. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  244. up->acr &= ~UART_ACR_TXDIS;
  245. serial_icr_write(up, UART_ACR, up->acr);
  246. }
  247. }
  248. static void sunsu_stop_rx(struct uart_port *port)
  249. {
  250. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  251. up->ier &= ~UART_IER_RLSI;
  252. up->port.read_status_mask &= ~UART_LSR_DR;
  253. serial_out(up, UART_IER, up->ier);
  254. }
  255. static void sunsu_enable_ms(struct uart_port *port)
  256. {
  257. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  258. unsigned long flags;
  259. spin_lock_irqsave(&up->port.lock, flags);
  260. up->ier |= UART_IER_MSI;
  261. serial_out(up, UART_IER, up->ier);
  262. spin_unlock_irqrestore(&up->port.lock, flags);
  263. }
  264. static struct tty_struct *
  265. receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
  266. {
  267. struct tty_struct *tty = up->port.info->tty;
  268. unsigned char ch, flag;
  269. int max_count = 256;
  270. int saw_console_brk = 0;
  271. do {
  272. ch = serial_inp(up, UART_RX);
  273. flag = TTY_NORMAL;
  274. up->port.icount.rx++;
  275. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  276. UART_LSR_FE | UART_LSR_OE))) {
  277. /*
  278. * For statistics only
  279. */
  280. if (*status & UART_LSR_BI) {
  281. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  282. up->port.icount.brk++;
  283. if (up->port.cons != NULL &&
  284. up->port.line == up->port.cons->index)
  285. saw_console_brk = 1;
  286. /*
  287. * We do the SysRQ and SAK checking
  288. * here because otherwise the break
  289. * may get masked by ignore_status_mask
  290. * or read_status_mask.
  291. */
  292. if (uart_handle_break(&up->port))
  293. goto ignore_char;
  294. } else if (*status & UART_LSR_PE)
  295. up->port.icount.parity++;
  296. else if (*status & UART_LSR_FE)
  297. up->port.icount.frame++;
  298. if (*status & UART_LSR_OE)
  299. up->port.icount.overrun++;
  300. /*
  301. * Mask off conditions which should be ingored.
  302. */
  303. *status &= up->port.read_status_mask;
  304. if (up->port.cons != NULL &&
  305. up->port.line == up->port.cons->index) {
  306. /* Recover the break flag from console xmit */
  307. *status |= up->lsr_break_flag;
  308. up->lsr_break_flag = 0;
  309. }
  310. if (*status & UART_LSR_BI) {
  311. flag = TTY_BREAK;
  312. } else if (*status & UART_LSR_PE)
  313. flag = TTY_PARITY;
  314. else if (*status & UART_LSR_FE)
  315. flag = TTY_FRAME;
  316. }
  317. if (uart_handle_sysrq_char(&up->port, ch, regs))
  318. goto ignore_char;
  319. if ((*status & up->port.ignore_status_mask) == 0)
  320. tty_insert_flip_char(tty, ch, flag);
  321. if (*status & UART_LSR_OE)
  322. /*
  323. * Overrun is special, since it's reported
  324. * immediately, and doesn't affect the current
  325. * character.
  326. */
  327. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  328. ignore_char:
  329. *status = serial_inp(up, UART_LSR);
  330. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  331. if (saw_console_brk)
  332. sun_do_break();
  333. return tty;
  334. }
  335. static void transmit_chars(struct uart_sunsu_port *up)
  336. {
  337. struct circ_buf *xmit = &up->port.info->xmit;
  338. int count;
  339. if (up->port.x_char) {
  340. serial_outp(up, UART_TX, up->port.x_char);
  341. up->port.icount.tx++;
  342. up->port.x_char = 0;
  343. return;
  344. }
  345. if (uart_tx_stopped(&up->port)) {
  346. sunsu_stop_tx(&up->port);
  347. return;
  348. }
  349. if (uart_circ_empty(xmit)) {
  350. __stop_tx(up);
  351. return;
  352. }
  353. count = up->port.fifosize;
  354. do {
  355. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  356. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  357. up->port.icount.tx++;
  358. if (uart_circ_empty(xmit))
  359. break;
  360. } while (--count > 0);
  361. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  362. uart_write_wakeup(&up->port);
  363. if (uart_circ_empty(xmit))
  364. __stop_tx(up);
  365. }
  366. static void check_modem_status(struct uart_sunsu_port *up)
  367. {
  368. int status;
  369. status = serial_in(up, UART_MSR);
  370. if ((status & UART_MSR_ANY_DELTA) == 0)
  371. return;
  372. if (status & UART_MSR_TERI)
  373. up->port.icount.rng++;
  374. if (status & UART_MSR_DDSR)
  375. up->port.icount.dsr++;
  376. if (status & UART_MSR_DDCD)
  377. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  378. if (status & UART_MSR_DCTS)
  379. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  380. wake_up_interruptible(&up->port.info->delta_msr_wait);
  381. }
  382. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  383. {
  384. struct uart_sunsu_port *up = dev_id;
  385. unsigned long flags;
  386. unsigned char status;
  387. spin_lock_irqsave(&up->port.lock, flags);
  388. do {
  389. struct tty_struct *tty;
  390. status = serial_inp(up, UART_LSR);
  391. tty = NULL;
  392. if (status & UART_LSR_DR)
  393. tty = receive_chars(up, &status, regs);
  394. check_modem_status(up);
  395. if (status & UART_LSR_THRE)
  396. transmit_chars(up);
  397. spin_unlock_irqrestore(&up->port.lock, flags);
  398. if (tty)
  399. tty_flip_buffer_push(tty);
  400. spin_lock_irqsave(&up->port.lock, flags);
  401. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  402. spin_unlock_irqrestore(&up->port.lock, flags);
  403. return IRQ_HANDLED;
  404. }
  405. /* Separate interrupt handling path for keyboard/mouse ports. */
  406. static void
  407. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  408. unsigned int iflag, unsigned int quot);
  409. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  410. {
  411. unsigned int cur_cflag = up->cflag;
  412. int quot, new_baud;
  413. up->cflag &= ~CBAUD;
  414. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  415. quot = up->port.uartclk / (16 * new_baud);
  416. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  417. }
  418. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
  419. {
  420. do {
  421. unsigned char ch = serial_inp(up, UART_RX);
  422. /* Stop-A is handled by drivers/char/keyboard.c now. */
  423. if (up->su_type == SU_PORT_KBD) {
  424. #ifdef CONFIG_SERIO
  425. serio_interrupt(&up->serio, ch, 0, regs);
  426. #endif
  427. } else if (up->su_type == SU_PORT_MS) {
  428. int ret = suncore_mouse_baud_detection(ch, is_break);
  429. switch (ret) {
  430. case 2:
  431. sunsu_change_mouse_baud(up);
  432. /* fallthru */
  433. case 1:
  434. break;
  435. case 0:
  436. #ifdef CONFIG_SERIO
  437. serio_interrupt(&up->serio, ch, 0, regs);
  438. #endif
  439. break;
  440. };
  441. }
  442. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  443. }
  444. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  445. {
  446. struct uart_sunsu_port *up = dev_id;
  447. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  448. unsigned char status = serial_inp(up, UART_LSR);
  449. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  450. receive_kbd_ms_chars(up, regs,
  451. (status & UART_LSR_BI) != 0);
  452. }
  453. return IRQ_HANDLED;
  454. }
  455. static unsigned int sunsu_tx_empty(struct uart_port *port)
  456. {
  457. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  458. unsigned long flags;
  459. unsigned int ret;
  460. spin_lock_irqsave(&up->port.lock, flags);
  461. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  462. spin_unlock_irqrestore(&up->port.lock, flags);
  463. return ret;
  464. }
  465. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  466. {
  467. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  468. unsigned char status;
  469. unsigned int ret;
  470. status = serial_in(up, UART_MSR);
  471. ret = 0;
  472. if (status & UART_MSR_DCD)
  473. ret |= TIOCM_CAR;
  474. if (status & UART_MSR_RI)
  475. ret |= TIOCM_RNG;
  476. if (status & UART_MSR_DSR)
  477. ret |= TIOCM_DSR;
  478. if (status & UART_MSR_CTS)
  479. ret |= TIOCM_CTS;
  480. return ret;
  481. }
  482. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  483. {
  484. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  485. unsigned char mcr = 0;
  486. if (mctrl & TIOCM_RTS)
  487. mcr |= UART_MCR_RTS;
  488. if (mctrl & TIOCM_DTR)
  489. mcr |= UART_MCR_DTR;
  490. if (mctrl & TIOCM_OUT1)
  491. mcr |= UART_MCR_OUT1;
  492. if (mctrl & TIOCM_OUT2)
  493. mcr |= UART_MCR_OUT2;
  494. if (mctrl & TIOCM_LOOP)
  495. mcr |= UART_MCR_LOOP;
  496. serial_out(up, UART_MCR, mcr);
  497. }
  498. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  499. {
  500. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  501. unsigned long flags;
  502. spin_lock_irqsave(&up->port.lock, flags);
  503. if (break_state == -1)
  504. up->lcr |= UART_LCR_SBC;
  505. else
  506. up->lcr &= ~UART_LCR_SBC;
  507. serial_out(up, UART_LCR, up->lcr);
  508. spin_unlock_irqrestore(&up->port.lock, flags);
  509. }
  510. static int sunsu_startup(struct uart_port *port)
  511. {
  512. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  513. unsigned long flags;
  514. int retval;
  515. if (up->port.type == PORT_16C950) {
  516. /* Wake up and initialize UART */
  517. up->acr = 0;
  518. serial_outp(up, UART_LCR, 0xBF);
  519. serial_outp(up, UART_EFR, UART_EFR_ECB);
  520. serial_outp(up, UART_IER, 0);
  521. serial_outp(up, UART_LCR, 0);
  522. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  523. serial_outp(up, UART_LCR, 0xBF);
  524. serial_outp(up, UART_EFR, UART_EFR_ECB);
  525. serial_outp(up, UART_LCR, 0);
  526. }
  527. #ifdef CONFIG_SERIAL_8250_RSA
  528. /*
  529. * If this is an RSA port, see if we can kick it up to the
  530. * higher speed clock.
  531. */
  532. enable_rsa(up);
  533. #endif
  534. /*
  535. * Clear the FIFO buffers and disable them.
  536. * (they will be reenabled in set_termios())
  537. */
  538. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  539. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  540. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  541. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  542. serial_outp(up, UART_FCR, 0);
  543. }
  544. /*
  545. * Clear the interrupt registers.
  546. */
  547. (void) serial_inp(up, UART_LSR);
  548. (void) serial_inp(up, UART_RX);
  549. (void) serial_inp(up, UART_IIR);
  550. (void) serial_inp(up, UART_MSR);
  551. /*
  552. * At this point, there's no way the LSR could still be 0xff;
  553. * if it is, then bail out, because there's likely no UART
  554. * here.
  555. */
  556. if (!(up->port.flags & UPF_BUGGY_UART) &&
  557. (serial_inp(up, UART_LSR) == 0xff)) {
  558. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  559. return -ENODEV;
  560. }
  561. if (up->su_type != SU_PORT_PORT) {
  562. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  563. IRQF_SHARED, su_typev[up->su_type], up);
  564. } else {
  565. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  566. IRQF_SHARED, su_typev[up->su_type], up);
  567. }
  568. if (retval) {
  569. printk("su: Cannot register IRQ %d\n", up->port.irq);
  570. return retval;
  571. }
  572. /*
  573. * Now, initialize the UART
  574. */
  575. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  576. spin_lock_irqsave(&up->port.lock, flags);
  577. up->port.mctrl |= TIOCM_OUT2;
  578. sunsu_set_mctrl(&up->port, up->port.mctrl);
  579. spin_unlock_irqrestore(&up->port.lock, flags);
  580. /*
  581. * Finally, enable interrupts. Note: Modem status interrupts
  582. * are set via set_termios(), which will be occurring imminently
  583. * anyway, so we don't enable them here.
  584. */
  585. up->ier = UART_IER_RLSI | UART_IER_RDI;
  586. serial_outp(up, UART_IER, up->ier);
  587. if (up->port.flags & UPF_FOURPORT) {
  588. unsigned int icp;
  589. /*
  590. * Enable interrupts on the AST Fourport board
  591. */
  592. icp = (up->port.iobase & 0xfe0) | 0x01f;
  593. outb_p(0x80, icp);
  594. (void) inb_p(icp);
  595. }
  596. /*
  597. * And clear the interrupt registers again for luck.
  598. */
  599. (void) serial_inp(up, UART_LSR);
  600. (void) serial_inp(up, UART_RX);
  601. (void) serial_inp(up, UART_IIR);
  602. (void) serial_inp(up, UART_MSR);
  603. return 0;
  604. }
  605. static void sunsu_shutdown(struct uart_port *port)
  606. {
  607. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  608. unsigned long flags;
  609. /*
  610. * Disable interrupts from this port
  611. */
  612. up->ier = 0;
  613. serial_outp(up, UART_IER, 0);
  614. spin_lock_irqsave(&up->port.lock, flags);
  615. if (up->port.flags & UPF_FOURPORT) {
  616. /* reset interrupts on the AST Fourport board */
  617. inb((up->port.iobase & 0xfe0) | 0x1f);
  618. up->port.mctrl |= TIOCM_OUT1;
  619. } else
  620. up->port.mctrl &= ~TIOCM_OUT2;
  621. sunsu_set_mctrl(&up->port, up->port.mctrl);
  622. spin_unlock_irqrestore(&up->port.lock, flags);
  623. /*
  624. * Disable break condition and FIFOs
  625. */
  626. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  627. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  628. UART_FCR_CLEAR_RCVR |
  629. UART_FCR_CLEAR_XMIT);
  630. serial_outp(up, UART_FCR, 0);
  631. #ifdef CONFIG_SERIAL_8250_RSA
  632. /*
  633. * Reset the RSA board back to 115kbps compat mode.
  634. */
  635. disable_rsa(up);
  636. #endif
  637. /*
  638. * Read data port to reset things.
  639. */
  640. (void) serial_in(up, UART_RX);
  641. free_irq(up->port.irq, up);
  642. }
  643. static void
  644. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  645. unsigned int iflag, unsigned int quot)
  646. {
  647. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  648. unsigned char cval, fcr = 0;
  649. unsigned long flags;
  650. switch (cflag & CSIZE) {
  651. case CS5:
  652. cval = 0x00;
  653. break;
  654. case CS6:
  655. cval = 0x01;
  656. break;
  657. case CS7:
  658. cval = 0x02;
  659. break;
  660. default:
  661. case CS8:
  662. cval = 0x03;
  663. break;
  664. }
  665. if (cflag & CSTOPB)
  666. cval |= 0x04;
  667. if (cflag & PARENB)
  668. cval |= UART_LCR_PARITY;
  669. if (!(cflag & PARODD))
  670. cval |= UART_LCR_EPAR;
  671. #ifdef CMSPAR
  672. if (cflag & CMSPAR)
  673. cval |= UART_LCR_SPAR;
  674. #endif
  675. /*
  676. * Work around a bug in the Oxford Semiconductor 952 rev B
  677. * chip which causes it to seriously miscalculate baud rates
  678. * when DLL is 0.
  679. */
  680. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  681. up->rev == 0x5201)
  682. quot ++;
  683. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  684. if ((up->port.uartclk / quot) < (2400 * 16))
  685. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  686. #ifdef CONFIG_SERIAL_8250_RSA
  687. else if (up->port.type == PORT_RSA)
  688. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  689. #endif
  690. else
  691. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  692. }
  693. if (up->port.type == PORT_16750)
  694. fcr |= UART_FCR7_64BYTE;
  695. /*
  696. * Ok, we're now changing the port state. Do it with
  697. * interrupts disabled.
  698. */
  699. spin_lock_irqsave(&up->port.lock, flags);
  700. /*
  701. * Update the per-port timeout.
  702. */
  703. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  704. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  705. if (iflag & INPCK)
  706. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  707. if (iflag & (BRKINT | PARMRK))
  708. up->port.read_status_mask |= UART_LSR_BI;
  709. /*
  710. * Characteres to ignore
  711. */
  712. up->port.ignore_status_mask = 0;
  713. if (iflag & IGNPAR)
  714. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  715. if (iflag & IGNBRK) {
  716. up->port.ignore_status_mask |= UART_LSR_BI;
  717. /*
  718. * If we're ignoring parity and break indicators,
  719. * ignore overruns too (for real raw support).
  720. */
  721. if (iflag & IGNPAR)
  722. up->port.ignore_status_mask |= UART_LSR_OE;
  723. }
  724. /*
  725. * ignore all characters if CREAD is not set
  726. */
  727. if ((cflag & CREAD) == 0)
  728. up->port.ignore_status_mask |= UART_LSR_DR;
  729. /*
  730. * CTS flow control flag and modem status interrupts
  731. */
  732. up->ier &= ~UART_IER_MSI;
  733. if (UART_ENABLE_MS(&up->port, cflag))
  734. up->ier |= UART_IER_MSI;
  735. serial_out(up, UART_IER, up->ier);
  736. if (uart_config[up->port.type].flags & UART_STARTECH) {
  737. serial_outp(up, UART_LCR, 0xBF);
  738. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  739. }
  740. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  741. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  742. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  743. if (up->port.type == PORT_16750)
  744. serial_outp(up, UART_FCR, fcr); /* set fcr */
  745. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  746. up->lcr = cval; /* Save LCR */
  747. if (up->port.type != PORT_16750) {
  748. if (fcr & UART_FCR_ENABLE_FIFO) {
  749. /* emulated UARTs (Lucent Venus 167x) need two steps */
  750. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  751. }
  752. serial_outp(up, UART_FCR, fcr); /* set fcr */
  753. }
  754. up->cflag = cflag;
  755. spin_unlock_irqrestore(&up->port.lock, flags);
  756. }
  757. static void
  758. sunsu_set_termios(struct uart_port *port, struct termios *termios,
  759. struct termios *old)
  760. {
  761. unsigned int baud, quot;
  762. /*
  763. * Ask the core to calculate the divisor for us.
  764. */
  765. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  766. quot = uart_get_divisor(port, baud);
  767. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  768. }
  769. static void sunsu_release_port(struct uart_port *port)
  770. {
  771. }
  772. static int sunsu_request_port(struct uart_port *port)
  773. {
  774. return 0;
  775. }
  776. static void sunsu_config_port(struct uart_port *port, int flags)
  777. {
  778. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  779. if (flags & UART_CONFIG_TYPE) {
  780. /*
  781. * We are supposed to call autoconfig here, but this requires
  782. * splitting all the OBP probing crap from the UART probing.
  783. * We'll do it when we kill sunsu.c altogether.
  784. */
  785. port->type = up->type_probed; /* XXX */
  786. }
  787. }
  788. static int
  789. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  790. {
  791. return -EINVAL;
  792. }
  793. static const char *
  794. sunsu_type(struct uart_port *port)
  795. {
  796. int type = port->type;
  797. if (type >= ARRAY_SIZE(uart_config))
  798. type = 0;
  799. return uart_config[type].name;
  800. }
  801. static struct uart_ops sunsu_pops = {
  802. .tx_empty = sunsu_tx_empty,
  803. .set_mctrl = sunsu_set_mctrl,
  804. .get_mctrl = sunsu_get_mctrl,
  805. .stop_tx = sunsu_stop_tx,
  806. .start_tx = sunsu_start_tx,
  807. .stop_rx = sunsu_stop_rx,
  808. .enable_ms = sunsu_enable_ms,
  809. .break_ctl = sunsu_break_ctl,
  810. .startup = sunsu_startup,
  811. .shutdown = sunsu_shutdown,
  812. .set_termios = sunsu_set_termios,
  813. .type = sunsu_type,
  814. .release_port = sunsu_release_port,
  815. .request_port = sunsu_request_port,
  816. .config_port = sunsu_config_port,
  817. .verify_port = sunsu_verify_port,
  818. };
  819. #define UART_NR 4
  820. static struct uart_sunsu_port sunsu_ports[UART_NR];
  821. #ifdef CONFIG_SERIO
  822. static DEFINE_SPINLOCK(sunsu_serio_lock);
  823. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  824. {
  825. struct uart_sunsu_port *up = serio->port_data;
  826. unsigned long flags;
  827. int lsr;
  828. spin_lock_irqsave(&sunsu_serio_lock, flags);
  829. do {
  830. lsr = serial_in(up, UART_LSR);
  831. } while (!(lsr & UART_LSR_THRE));
  832. /* Send the character out. */
  833. serial_out(up, UART_TX, ch);
  834. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  835. return 0;
  836. }
  837. static int sunsu_serio_open(struct serio *serio)
  838. {
  839. struct uart_sunsu_port *up = serio->port_data;
  840. unsigned long flags;
  841. int ret;
  842. spin_lock_irqsave(&sunsu_serio_lock, flags);
  843. if (!up->serio_open) {
  844. up->serio_open = 1;
  845. ret = 0;
  846. } else
  847. ret = -EBUSY;
  848. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  849. return ret;
  850. }
  851. static void sunsu_serio_close(struct serio *serio)
  852. {
  853. struct uart_sunsu_port *up = serio->port_data;
  854. unsigned long flags;
  855. spin_lock_irqsave(&sunsu_serio_lock, flags);
  856. up->serio_open = 0;
  857. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  858. }
  859. #endif /* CONFIG_SERIO */
  860. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  861. {
  862. unsigned char status1, status2, scratch, scratch2, scratch3;
  863. unsigned char save_lcr, save_mcr;
  864. unsigned long flags;
  865. if (up->su_type == SU_PORT_NONE)
  866. return;
  867. up->type_probed = PORT_UNKNOWN;
  868. up->port.iotype = UPIO_MEM;
  869. spin_lock_irqsave(&up->port.lock, flags);
  870. if (!(up->port.flags & UPF_BUGGY_UART)) {
  871. /*
  872. * Do a simple existence test first; if we fail this, there's
  873. * no point trying anything else.
  874. *
  875. * 0x80 is used as a nonsense port to prevent against false
  876. * positives due to ISA bus float. The assumption is that
  877. * 0x80 is a non-existent port; which should be safe since
  878. * include/asm/io.h also makes this assumption.
  879. */
  880. scratch = serial_inp(up, UART_IER);
  881. serial_outp(up, UART_IER, 0);
  882. #ifdef __i386__
  883. outb(0xff, 0x080);
  884. #endif
  885. scratch2 = serial_inp(up, UART_IER);
  886. serial_outp(up, UART_IER, 0x0f);
  887. #ifdef __i386__
  888. outb(0, 0x080);
  889. #endif
  890. scratch3 = serial_inp(up, UART_IER);
  891. serial_outp(up, UART_IER, scratch);
  892. if (scratch2 != 0 || scratch3 != 0x0F)
  893. goto out; /* We failed; there's nothing here */
  894. }
  895. save_mcr = serial_in(up, UART_MCR);
  896. save_lcr = serial_in(up, UART_LCR);
  897. /*
  898. * Check to see if a UART is really there. Certain broken
  899. * internal modems based on the Rockwell chipset fail this
  900. * test, because they apparently don't implement the loopback
  901. * test mode. So this test is skipped on the COM 1 through
  902. * COM 4 ports. This *should* be safe, since no board
  903. * manufacturer would be stupid enough to design a board
  904. * that conflicts with COM 1-4 --- we hope!
  905. */
  906. if (!(up->port.flags & UPF_SKIP_TEST)) {
  907. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  908. status1 = serial_inp(up, UART_MSR) & 0xF0;
  909. serial_outp(up, UART_MCR, save_mcr);
  910. if (status1 != 0x90)
  911. goto out; /* We failed loopback test */
  912. }
  913. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  914. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  915. serial_outp(up, UART_LCR, 0);
  916. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  917. scratch = serial_in(up, UART_IIR) >> 6;
  918. switch (scratch) {
  919. case 0:
  920. up->port.type = PORT_16450;
  921. break;
  922. case 1:
  923. up->port.type = PORT_UNKNOWN;
  924. break;
  925. case 2:
  926. up->port.type = PORT_16550;
  927. break;
  928. case 3:
  929. up->port.type = PORT_16550A;
  930. break;
  931. }
  932. if (up->port.type == PORT_16550A) {
  933. /* Check for Startech UART's */
  934. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  935. if (serial_in(up, UART_EFR) == 0) {
  936. up->port.type = PORT_16650;
  937. } else {
  938. serial_outp(up, UART_LCR, 0xBF);
  939. if (serial_in(up, UART_EFR) == 0)
  940. up->port.type = PORT_16650V2;
  941. }
  942. }
  943. if (up->port.type == PORT_16550A) {
  944. /* Check for TI 16750 */
  945. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  946. serial_outp(up, UART_FCR,
  947. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  948. scratch = serial_in(up, UART_IIR) >> 5;
  949. if (scratch == 7) {
  950. /*
  951. * If this is a 16750, and not a cheap UART
  952. * clone, then it should only go into 64 byte
  953. * mode if the UART_FCR7_64BYTE bit was set
  954. * while UART_LCR_DLAB was latched.
  955. */
  956. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  957. serial_outp(up, UART_LCR, 0);
  958. serial_outp(up, UART_FCR,
  959. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  960. scratch = serial_in(up, UART_IIR) >> 5;
  961. if (scratch == 6)
  962. up->port.type = PORT_16750;
  963. }
  964. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  965. }
  966. serial_outp(up, UART_LCR, save_lcr);
  967. if (up->port.type == PORT_16450) {
  968. scratch = serial_in(up, UART_SCR);
  969. serial_outp(up, UART_SCR, 0xa5);
  970. status1 = serial_in(up, UART_SCR);
  971. serial_outp(up, UART_SCR, 0x5a);
  972. status2 = serial_in(up, UART_SCR);
  973. serial_outp(up, UART_SCR, scratch);
  974. if ((status1 != 0xa5) || (status2 != 0x5a))
  975. up->port.type = PORT_8250;
  976. }
  977. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  978. if (up->port.type == PORT_UNKNOWN)
  979. goto out;
  980. up->type_probed = up->port.type; /* XXX */
  981. /*
  982. * Reset the UART.
  983. */
  984. #ifdef CONFIG_SERIAL_8250_RSA
  985. if (up->port.type == PORT_RSA)
  986. serial_outp(up, UART_RSA_FRR, 0);
  987. #endif
  988. serial_outp(up, UART_MCR, save_mcr);
  989. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  990. UART_FCR_CLEAR_RCVR |
  991. UART_FCR_CLEAR_XMIT));
  992. serial_outp(up, UART_FCR, 0);
  993. (void)serial_in(up, UART_RX);
  994. serial_outp(up, UART_IER, 0);
  995. out:
  996. spin_unlock_irqrestore(&up->port.lock, flags);
  997. }
  998. static struct uart_driver sunsu_reg = {
  999. .owner = THIS_MODULE,
  1000. .driver_name = "serial",
  1001. .dev_name = "ttyS",
  1002. .major = TTY_MAJOR,
  1003. };
  1004. static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1005. {
  1006. int quot, baud;
  1007. #ifdef CONFIG_SERIO
  1008. struct serio *serio;
  1009. #endif
  1010. if (up->su_type == SU_PORT_KBD) {
  1011. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1012. baud = 1200;
  1013. } else {
  1014. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1015. baud = 4800;
  1016. }
  1017. quot = up->port.uartclk / (16 * baud);
  1018. sunsu_autoconfig(up);
  1019. if (up->port.type == PORT_UNKNOWN)
  1020. return -ENODEV;
  1021. printk("%s: %s port at %lx, irq %u\n",
  1022. to_of_device(up->port.dev)->node->full_name,
  1023. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1024. up->port.mapbase, up->port.irq);
  1025. #ifdef CONFIG_SERIO
  1026. serio = &up->serio;
  1027. serio->port_data = up;
  1028. serio->id.type = SERIO_RS232;
  1029. if (up->su_type == SU_PORT_KBD) {
  1030. serio->id.proto = SERIO_SUNKBD;
  1031. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1032. } else {
  1033. serio->id.proto = SERIO_SUN;
  1034. serio->id.extra = 1;
  1035. strlcpy(serio->name, "sums", sizeof(serio->name));
  1036. }
  1037. strlcpy(serio->phys,
  1038. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1039. sizeof(serio->phys));
  1040. serio->write = sunsu_serio_write;
  1041. serio->open = sunsu_serio_open;
  1042. serio->close = sunsu_serio_close;
  1043. serio->dev.parent = up->port.dev;
  1044. serio_register_port(serio);
  1045. #endif
  1046. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1047. sunsu_startup(&up->port);
  1048. return 0;
  1049. }
  1050. /*
  1051. * ------------------------------------------------------------
  1052. * Serial console driver
  1053. * ------------------------------------------------------------
  1054. */
  1055. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1056. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1057. /*
  1058. * Wait for transmitter & holding register to empty
  1059. */
  1060. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1061. {
  1062. unsigned int status, tmout = 10000;
  1063. /* Wait up to 10ms for the character(s) to be sent. */
  1064. do {
  1065. status = serial_in(up, UART_LSR);
  1066. if (status & UART_LSR_BI)
  1067. up->lsr_break_flag = UART_LSR_BI;
  1068. if (--tmout == 0)
  1069. break;
  1070. udelay(1);
  1071. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1072. /* Wait up to 1s for flow control if necessary */
  1073. if (up->port.flags & UPF_CONS_FLOW) {
  1074. tmout = 1000000;
  1075. while (--tmout &&
  1076. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1077. udelay(1);
  1078. }
  1079. }
  1080. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1081. {
  1082. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1083. wait_for_xmitr(up);
  1084. serial_out(up, UART_TX, ch);
  1085. }
  1086. /*
  1087. * Print a string to the serial port trying not to disturb
  1088. * any possible real use of the port...
  1089. */
  1090. static void sunsu_console_write(struct console *co, const char *s,
  1091. unsigned int count)
  1092. {
  1093. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1094. unsigned int ier;
  1095. /*
  1096. * First save the UER then disable the interrupts
  1097. */
  1098. ier = serial_in(up, UART_IER);
  1099. serial_out(up, UART_IER, 0);
  1100. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1101. /*
  1102. * Finally, wait for transmitter to become empty
  1103. * and restore the IER
  1104. */
  1105. wait_for_xmitr(up);
  1106. serial_out(up, UART_IER, ier);
  1107. }
  1108. /*
  1109. * Setup initial baud/bits/parity. We do two things here:
  1110. * - construct a cflag setting for the first su_open()
  1111. * - initialize the serial port
  1112. * Return non-zero if we didn't find a serial port.
  1113. */
  1114. static int sunsu_console_setup(struct console *co, char *options)
  1115. {
  1116. struct uart_port *port;
  1117. int baud = 9600;
  1118. int bits = 8;
  1119. int parity = 'n';
  1120. int flow = 'n';
  1121. printk("Console: ttyS%d (SU)\n",
  1122. (sunsu_reg.minor - 64) + co->index);
  1123. /*
  1124. * Check whether an invalid uart number has been specified, and
  1125. * if so, search for the first available port that does have
  1126. * console support.
  1127. */
  1128. if (co->index >= UART_NR)
  1129. co->index = 0;
  1130. port = &sunsu_ports[co->index].port;
  1131. /*
  1132. * Temporary fix.
  1133. */
  1134. spin_lock_init(&port->lock);
  1135. if (options)
  1136. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1137. return uart_set_options(port, co, baud, parity, bits, flow);
  1138. }
  1139. static struct console sunsu_cons = {
  1140. .name = "ttyS",
  1141. .write = sunsu_console_write,
  1142. .device = uart_console_device,
  1143. .setup = sunsu_console_setup,
  1144. .flags = CON_PRINTBUFFER,
  1145. .index = -1,
  1146. .data = &sunsu_reg,
  1147. };
  1148. /*
  1149. * Register console.
  1150. */
  1151. static inline struct console *SUNSU_CONSOLE(int num_uart)
  1152. {
  1153. int i;
  1154. if (con_is_present())
  1155. return NULL;
  1156. for (i = 0; i < num_uart; i++) {
  1157. int this_minor = sunsu_reg.minor + i;
  1158. if ((this_minor - 64) == (serial_console - 1))
  1159. break;
  1160. }
  1161. if (i == num_uart)
  1162. return NULL;
  1163. sunsu_cons.index = i;
  1164. return &sunsu_cons;
  1165. }
  1166. #else
  1167. #define SUNSU_CONSOLE(num_uart) (NULL)
  1168. #define sunsu_serial_console_init() do { } while (0)
  1169. #endif
  1170. static enum su_type __devinit su_get_type(struct device_node *dp)
  1171. {
  1172. struct device_node *ap = of_find_node_by_path("/aliases");
  1173. if (ap) {
  1174. char *keyb = of_get_property(ap, "keyboard", NULL);
  1175. char *ms = of_get_property(ap, "mouse", NULL);
  1176. if (keyb) {
  1177. if (dp == of_find_node_by_path(keyb))
  1178. return SU_PORT_KBD;
  1179. }
  1180. if (ms) {
  1181. if (dp == of_find_node_by_path(ms))
  1182. return SU_PORT_MS;
  1183. }
  1184. }
  1185. return SU_PORT_PORT;
  1186. }
  1187. static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
  1188. {
  1189. static int inst;
  1190. struct device_node *dp = op->node;
  1191. struct uart_sunsu_port *up;
  1192. struct resource *rp;
  1193. enum su_type type;
  1194. int err;
  1195. type = su_get_type(dp);
  1196. if (type == SU_PORT_PORT) {
  1197. if (inst >= UART_NR)
  1198. return -EINVAL;
  1199. up = &sunsu_ports[inst];
  1200. } else {
  1201. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1202. if (!up)
  1203. return -ENOMEM;
  1204. }
  1205. up->port.line = inst;
  1206. spin_lock_init(&up->port.lock);
  1207. up->su_type = type;
  1208. rp = &op->resource[0];
  1209. up->port.mapbase = rp->start;
  1210. up->reg_size = (rp->end - rp->start) + 1;
  1211. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1212. if (!up->port.membase) {
  1213. if (type != SU_PORT_PORT)
  1214. kfree(up);
  1215. return -ENOMEM;
  1216. }
  1217. up->port.irq = op->irqs[0];
  1218. up->port.dev = &op->dev;
  1219. up->port.type = PORT_UNKNOWN;
  1220. up->port.uartclk = (SU_BASE_BAUD * 16);
  1221. err = 0;
  1222. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1223. err = sunsu_kbd_ms_init(up);
  1224. if (err) {
  1225. kfree(up);
  1226. goto out_unmap;
  1227. }
  1228. dev_set_drvdata(&op->dev, up);
  1229. return 0;
  1230. }
  1231. up->port.flags |= UPF_BOOT_AUTOCONF;
  1232. sunsu_autoconfig(up);
  1233. err = -ENODEV;
  1234. if (up->port.type == PORT_UNKNOWN)
  1235. goto out_unmap;
  1236. up->port.ops = &sunsu_pops;
  1237. err = uart_add_one_port(&sunsu_reg, &up->port);
  1238. if (err)
  1239. goto out_unmap;
  1240. dev_set_drvdata(&op->dev, up);
  1241. inst++;
  1242. return 0;
  1243. out_unmap:
  1244. of_iounmap(up->port.membase, up->reg_size);
  1245. return err;
  1246. }
  1247. static int __devexit su_remove(struct of_device *dev)
  1248. {
  1249. struct uart_sunsu_port *up = dev_get_drvdata(&dev->dev);;
  1250. if (up->su_type == SU_PORT_MS ||
  1251. up->su_type == SU_PORT_KBD) {
  1252. #ifdef CONFIG_SERIO
  1253. serio_unregister_port(&up->serio);
  1254. #endif
  1255. kfree(up);
  1256. } else if (up->port.type != PORT_UNKNOWN) {
  1257. uart_remove_one_port(&sunsu_reg, &up->port);
  1258. }
  1259. dev_set_drvdata(&dev->dev, NULL);
  1260. return 0;
  1261. }
  1262. static struct of_device_id su_match[] = {
  1263. {
  1264. .name = "su",
  1265. },
  1266. {
  1267. .name = "su_pnp",
  1268. },
  1269. {
  1270. .name = "serial",
  1271. .compatible = "su",
  1272. },
  1273. {},
  1274. };
  1275. MODULE_DEVICE_TABLE(of, su_match);
  1276. static struct of_platform_driver su_driver = {
  1277. .name = "su",
  1278. .match_table = su_match,
  1279. .probe = su_probe,
  1280. .remove = __devexit_p(su_remove),
  1281. };
  1282. static int num_uart;
  1283. static int __init sunsu_init(void)
  1284. {
  1285. struct device_node *dp;
  1286. int err;
  1287. num_uart = 0;
  1288. for_each_node_by_name(dp, "su") {
  1289. if (su_get_type(dp) == SU_PORT_PORT)
  1290. num_uart++;
  1291. }
  1292. for_each_node_by_name(dp, "su_pnp") {
  1293. if (su_get_type(dp) == SU_PORT_PORT)
  1294. num_uart++;
  1295. }
  1296. for_each_node_by_name(dp, "serial") {
  1297. if (of_device_is_compatible(dp, "su")) {
  1298. if (su_get_type(dp) == SU_PORT_PORT)
  1299. num_uart++;
  1300. }
  1301. }
  1302. if (num_uart) {
  1303. sunsu_reg.minor = sunserial_current_minor;
  1304. sunsu_reg.nr = num_uart;
  1305. err = uart_register_driver(&sunsu_reg);
  1306. if (err)
  1307. return err;
  1308. sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
  1309. sunserial_current_minor += num_uart;
  1310. sunsu_reg.cons = SUNSU_CONSOLE(num_uart);
  1311. }
  1312. err = of_register_driver(&su_driver, &of_bus_type);
  1313. if (err && num_uart)
  1314. uart_unregister_driver(&sunsu_reg);
  1315. return err;
  1316. }
  1317. static void __exit sunsu_exit(void)
  1318. {
  1319. if (num_uart)
  1320. uart_unregister_driver(&sunsu_reg);
  1321. }
  1322. module_init(sunsu_init);
  1323. module_exit(sunsu_exit);
  1324. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1325. MODULE_DESCRIPTION("Sun SU serial port driver");
  1326. MODULE_VERSION("2.0");
  1327. MODULE_LICENSE("GPL");