arcmsr_hba.c 46 KB

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  1. /*
  2. *******************************************************************************
  3. ** O.S : Linux
  4. ** FILE NAME : arcmsr_hba.c
  5. ** BY : Erich Chen
  6. ** Description: SCSI RAID Device Driver for
  7. ** ARECA RAID Host adapter
  8. *******************************************************************************
  9. ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
  10. **
  11. ** Web site: www.areca.com.tw
  12. ** E-mail: erich@areca.com.tw
  13. **
  14. ** This program is free software; you can redistribute it and/or modify
  15. ** it under the terms of the GNU General Public License version 2 as
  16. ** published by the Free Software Foundation.
  17. ** This program is distributed in the hope that it will be useful,
  18. ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. ** GNU General Public License for more details.
  21. *******************************************************************************
  22. ** Redistribution and use in source and binary forms, with or without
  23. ** modification, are permitted provided that the following conditions
  24. ** are met:
  25. ** 1. Redistributions of source code must retain the above copyright
  26. ** notice, this list of conditions and the following disclaimer.
  27. ** 2. Redistributions in binary form must reproduce the above copyright
  28. ** notice, this list of conditions and the following disclaimer in the
  29. ** documentation and/or other materials provided with the distribution.
  30. ** 3. The name of the author may not be used to endorse or promote products
  31. ** derived from this software without specific prior written permission.
  32. **
  33. ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  34. ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  35. ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  36. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  37. ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  38. ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  39. ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  40. ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  41. ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  42. ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  43. *******************************************************************************
  44. ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  45. ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  46. *******************************************************************************
  47. */
  48. #include <linux/module.h>
  49. #include <linux/reboot.h>
  50. #include <linux/spinlock.h>
  51. #include <linux/pci_ids.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/errno.h>
  55. #include <linux/types.h>
  56. #include <linux/delay.h>
  57. #include <linux/dma-mapping.h>
  58. #include <linux/timer.h>
  59. #include <linux/pci.h>
  60. #include <asm/dma.h>
  61. #include <asm/io.h>
  62. #include <asm/system.h>
  63. #include <asm/uaccess.h>
  64. #include <scsi/scsi_host.h>
  65. #include <scsi/scsi.h>
  66. #include <scsi/scsi_cmnd.h>
  67. #include <scsi/scsi_tcq.h>
  68. #include <scsi/scsi_device.h>
  69. #include <scsi/scsi_transport.h>
  70. #include <scsi/scsicam.h>
  71. #include "arcmsr.h"
  72. MODULE_AUTHOR("Erich Chen <erich@areca.com.tw>");
  73. MODULE_DESCRIPTION("ARECA (ARC11xx/12xx) SATA RAID HOST Adapter");
  74. MODULE_LICENSE("Dual BSD/GPL");
  75. MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  76. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd);
  77. static int arcmsr_abort(struct scsi_cmnd *);
  78. static int arcmsr_bus_reset(struct scsi_cmnd *);
  79. static int arcmsr_bios_param(struct scsi_device *sdev,
  80. struct block_device *bdev, sector_t capacity, int *info);
  81. static int arcmsr_queue_command(struct scsi_cmnd * cmd,
  82. void (*done) (struct scsi_cmnd *));
  83. static int arcmsr_probe(struct pci_dev *pdev,
  84. const struct pci_device_id *id);
  85. static void arcmsr_remove(struct pci_dev *pdev);
  86. static void arcmsr_shutdown(struct pci_dev *pdev);
  87. static void arcmsr_iop_init(struct AdapterControlBlock *acb);
  88. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
  89. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
  90. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb);
  91. static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb);
  92. static const char *arcmsr_info(struct Scsi_Host *);
  93. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
  94. static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
  95. {
  96. if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
  97. queue_depth = ARCMSR_MAX_CMD_PERLUN;
  98. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
  99. return queue_depth;
  100. }
  101. static struct scsi_host_template arcmsr_scsi_host_template = {
  102. .module = THIS_MODULE,
  103. .name = "ARCMSR ARECA SATA RAID HOST Adapter" ARCMSR_DRIVER_VERSION,
  104. .info = arcmsr_info,
  105. .queuecommand = arcmsr_queue_command,
  106. .eh_abort_handler = arcmsr_abort,
  107. .eh_bus_reset_handler = arcmsr_bus_reset,
  108. .bios_param = arcmsr_bios_param,
  109. .change_queue_depth = arcmsr_adjust_disk_queue_depth,
  110. .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
  111. .this_id = ARCMSR_SCSI_INITIATOR_ID,
  112. .sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
  113. .max_sectors = ARCMSR_MAX_XFER_SECTORS,
  114. .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
  115. .use_clustering = ENABLE_CLUSTERING,
  116. .shost_attrs = arcmsr_host_attrs,
  117. };
  118. static struct pci_device_id arcmsr_device_id_table[] = {
  119. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
  120. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
  121. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
  122. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
  123. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
  124. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
  125. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
  126. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
  127. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
  128. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
  129. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
  130. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
  131. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
  132. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
  133. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
  134. {0, 0}, /* Terminating entry */
  135. };
  136. MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
  137. static struct pci_driver arcmsr_pci_driver = {
  138. .name = "arcmsr",
  139. .id_table = arcmsr_device_id_table,
  140. .probe = arcmsr_probe,
  141. .remove = arcmsr_remove,
  142. .shutdown = arcmsr_shutdown
  143. };
  144. static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id,
  145. struct pt_regs *regs)
  146. {
  147. irqreturn_t handle_state;
  148. struct AdapterControlBlock *acb;
  149. unsigned long flags;
  150. acb = (struct AdapterControlBlock *)dev_id;
  151. spin_lock_irqsave(acb->host->host_lock, flags);
  152. handle_state = arcmsr_interrupt(acb);
  153. spin_unlock_irqrestore(acb->host->host_lock, flags);
  154. return handle_state;
  155. }
  156. static int arcmsr_bios_param(struct scsi_device *sdev,
  157. struct block_device *bdev, sector_t capacity, int *geom)
  158. {
  159. int ret, heads, sectors, cylinders, total_capacity;
  160. unsigned char *buffer;/* return copy of block device's partition table */
  161. buffer = scsi_bios_ptable(bdev);
  162. if (buffer) {
  163. ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
  164. kfree(buffer);
  165. if (ret != -1)
  166. return ret;
  167. }
  168. total_capacity = capacity;
  169. heads = 64;
  170. sectors = 32;
  171. cylinders = total_capacity / (heads * sectors);
  172. if (cylinders > 1024) {
  173. heads = 255;
  174. sectors = 63;
  175. cylinders = total_capacity / (heads * sectors);
  176. }
  177. geom[0] = heads;
  178. geom[1] = sectors;
  179. geom[2] = cylinders;
  180. return 0;
  181. }
  182. static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
  183. {
  184. struct pci_dev *pdev = acb->pdev;
  185. struct MessageUnit __iomem *reg = acb->pmu;
  186. u32 ccb_phyaddr_hi32;
  187. void *dma_coherent;
  188. dma_addr_t dma_coherent_handle, dma_addr;
  189. struct CommandControlBlock *ccb_tmp;
  190. int i, j;
  191. dma_coherent = dma_alloc_coherent(&pdev->dev,
  192. ARCMSR_MAX_FREECCB_NUM *
  193. sizeof (struct CommandControlBlock) + 0x20,
  194. &dma_coherent_handle, GFP_KERNEL);
  195. if (!dma_coherent)
  196. return -ENOMEM;
  197. acb->dma_coherent = dma_coherent;
  198. acb->dma_coherent_handle = dma_coherent_handle;
  199. if (((unsigned long)dma_coherent & 0x1F)) {
  200. dma_coherent = dma_coherent +
  201. (0x20 - ((unsigned long)dma_coherent & 0x1F));
  202. dma_coherent_handle = dma_coherent_handle +
  203. (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
  204. }
  205. dma_addr = dma_coherent_handle;
  206. ccb_tmp = (struct CommandControlBlock *)dma_coherent;
  207. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  208. ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
  209. ccb_tmp->acb = acb;
  210. acb->pccb_pool[i] = ccb_tmp;
  211. list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
  212. dma_addr = dma_addr + sizeof (struct CommandControlBlock);
  213. ccb_tmp++;
  214. }
  215. acb->vir2phy_offset = (unsigned long)ccb_tmp -
  216. (unsigned long)dma_addr;
  217. for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
  218. for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
  219. acb->devstate[i][j] = ARECA_RAID_GOOD;
  220. /*
  221. ** here we need to tell iop 331 our ccb_tmp.HighPart
  222. ** if ccb_tmp.HighPart is not zero
  223. */
  224. ccb_phyaddr_hi32 = (uint32_t) ((dma_coherent_handle >> 16) >> 16);
  225. if (ccb_phyaddr_hi32 != 0) {
  226. writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->message_rwbuffer[0]);
  227. writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]);
  228. writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
  229. if (arcmsr_wait_msgint_ready(acb))
  230. printk(KERN_NOTICE "arcmsr%d: "
  231. "'set ccb high part physical address' timeout\n",
  232. acb->host->host_no);
  233. }
  234. writel(readl(&reg->outbound_intmask) |
  235. ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  236. &reg->outbound_intmask);
  237. return 0;
  238. }
  239. static int arcmsr_probe(struct pci_dev *pdev,
  240. const struct pci_device_id *id)
  241. {
  242. struct Scsi_Host *host;
  243. struct AdapterControlBlock *acb;
  244. uint8_t bus, dev_fun;
  245. int error;
  246. error = pci_enable_device(pdev);
  247. if (error)
  248. goto out;
  249. pci_set_master(pdev);
  250. host = scsi_host_alloc(&arcmsr_scsi_host_template,
  251. sizeof(struct AdapterControlBlock));
  252. if (!host) {
  253. error = -ENOMEM;
  254. goto out_disable_device;
  255. }
  256. acb = (struct AdapterControlBlock *)host->hostdata;
  257. memset(acb, 0, sizeof (struct AdapterControlBlock));
  258. error = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  259. if (error) {
  260. error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  261. if (error) {
  262. printk(KERN_WARNING
  263. "scsi%d: No suitable DMA mask available\n",
  264. host->host_no);
  265. goto out_host_put;
  266. }
  267. }
  268. bus = pdev->bus->number;
  269. dev_fun = pdev->devfn;
  270. acb->host = host;
  271. acb->pdev = pdev;
  272. host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
  273. host->max_lun = ARCMSR_MAX_TARGETLUN;
  274. host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
  275. host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
  276. host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
  277. host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
  278. host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
  279. host->this_id = ARCMSR_SCSI_INITIATOR_ID;
  280. host->unique_id = (bus << 8) | dev_fun;
  281. host->irq = pdev->irq;
  282. error = pci_request_regions(pdev, "arcmsr");
  283. if (error)
  284. goto out_host_put;
  285. acb->pmu = ioremap(pci_resource_start(pdev, 0),
  286. pci_resource_len(pdev, 0));
  287. if (!acb->pmu) {
  288. printk(KERN_NOTICE "arcmsr%d: memory"
  289. " mapping region fail \n", acb->host->host_no);
  290. goto out_release_regions;
  291. }
  292. acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  293. ACB_F_MESSAGE_RQBUFFER_CLEARED |
  294. ACB_F_MESSAGE_WQBUFFER_READED);
  295. acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
  296. INIT_LIST_HEAD(&acb->ccb_free_list);
  297. error = arcmsr_alloc_ccb_pool(acb);
  298. if (error)
  299. goto out_iounmap;
  300. error = request_irq(pdev->irq, arcmsr_do_interrupt,
  301. SA_INTERRUPT | SA_SHIRQ, "arcmsr", acb);
  302. if (error)
  303. goto out_free_ccb_pool;
  304. arcmsr_iop_init(acb);
  305. pci_set_drvdata(pdev, host);
  306. error = scsi_add_host(host, &pdev->dev);
  307. if (error)
  308. goto out_free_irq;
  309. error = arcmsr_alloc_sysfs_attr(acb);
  310. if (error)
  311. goto out_free_sysfs;
  312. scsi_scan_host(host);
  313. return 0;
  314. out_free_sysfs:
  315. out_free_irq:
  316. free_irq(pdev->irq, acb);
  317. out_free_ccb_pool:
  318. arcmsr_free_ccb_pool(acb);
  319. out_iounmap:
  320. iounmap(acb->pmu);
  321. out_release_regions:
  322. pci_release_regions(pdev);
  323. out_host_put:
  324. scsi_host_put(host);
  325. out_disable_device:
  326. pci_disable_device(pdev);
  327. out:
  328. return error;
  329. }
  330. static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
  331. {
  332. struct MessageUnit __iomem *reg = acb->pmu;
  333. writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
  334. if (arcmsr_wait_msgint_ready(acb))
  335. printk(KERN_NOTICE
  336. "arcmsr%d: wait 'abort all outstanding command' timeout \n"
  337. , acb->host->host_no);
  338. }
  339. static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
  340. {
  341. struct AdapterControlBlock *acb = ccb->acb;
  342. struct scsi_cmnd *pcmd = ccb->pcmd;
  343. if (pcmd->use_sg != 0) {
  344. struct scatterlist *sl;
  345. sl = (struct scatterlist *)pcmd->request_buffer;
  346. pci_unmap_sg(acb->pdev, sl, pcmd->use_sg, pcmd->sc_data_direction);
  347. }
  348. else if (pcmd->request_bufflen != 0)
  349. pci_unmap_single(acb->pdev,
  350. pcmd->SCp.dma_handle,
  351. pcmd->request_bufflen, pcmd->sc_data_direction);
  352. }
  353. static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
  354. {
  355. struct AdapterControlBlock *acb = ccb->acb;
  356. struct scsi_cmnd *pcmd = ccb->pcmd;
  357. arcmsr_pci_unmap_dma(ccb);
  358. if (stand_flag == 1)
  359. atomic_dec(&acb->ccboutstandingcount);
  360. ccb->startdone = ARCMSR_CCB_DONE;
  361. ccb->ccb_flags = 0;
  362. list_add_tail(&ccb->list, &acb->ccb_free_list);
  363. pcmd->scsi_done(pcmd);
  364. }
  365. static void arcmsr_remove(struct pci_dev *pdev)
  366. {
  367. struct Scsi_Host *host = pci_get_drvdata(pdev);
  368. struct AdapterControlBlock *acb =
  369. (struct AdapterControlBlock *) host->hostdata;
  370. struct MessageUnit __iomem *reg = acb->pmu;
  371. int poll_count = 0;
  372. arcmsr_free_sysfs_attr(acb);
  373. scsi_remove_host(host);
  374. arcmsr_stop_adapter_bgrb(acb);
  375. arcmsr_flush_adapter_cache(acb);
  376. writel(readl(&reg->outbound_intmask) |
  377. ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  378. &reg->outbound_intmask);
  379. acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
  380. acb->acb_flags &= ~ACB_F_IOP_INITED;
  381. for (poll_count = 0; poll_count < 256; poll_count++) {
  382. if (!atomic_read(&acb->ccboutstandingcount))
  383. break;
  384. arcmsr_interrupt(acb);
  385. msleep(25);
  386. }
  387. if (atomic_read(&acb->ccboutstandingcount)) {
  388. int i;
  389. arcmsr_abort_allcmd(acb);
  390. for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++)
  391. readl(&reg->outbound_queueport);
  392. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  393. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  394. if (ccb->startdone == ARCMSR_CCB_START) {
  395. ccb->startdone = ARCMSR_CCB_ABORTED;
  396. ccb->pcmd->result = DID_ABORT << 16;
  397. arcmsr_ccb_complete(ccb, 1);
  398. }
  399. }
  400. }
  401. free_irq(pdev->irq, acb);
  402. iounmap(acb->pmu);
  403. arcmsr_free_ccb_pool(acb);
  404. pci_release_regions(pdev);
  405. scsi_host_put(host);
  406. pci_disable_device(pdev);
  407. pci_set_drvdata(pdev, NULL);
  408. }
  409. static void arcmsr_shutdown(struct pci_dev *pdev)
  410. {
  411. struct Scsi_Host *host = pci_get_drvdata(pdev);
  412. struct AdapterControlBlock *acb =
  413. (struct AdapterControlBlock *)host->hostdata;
  414. arcmsr_stop_adapter_bgrb(acb);
  415. arcmsr_flush_adapter_cache(acb);
  416. }
  417. static int arcmsr_module_init(void)
  418. {
  419. int error = 0;
  420. error = pci_register_driver(&arcmsr_pci_driver);
  421. return error;
  422. }
  423. static void arcmsr_module_exit(void)
  424. {
  425. pci_unregister_driver(&arcmsr_pci_driver);
  426. }
  427. module_init(arcmsr_module_init);
  428. module_exit(arcmsr_module_exit);
  429. static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
  430. {
  431. struct MessageUnit __iomem *reg = acb->pmu;
  432. u32 orig_mask = readl(&reg->outbound_intmask);
  433. writel(orig_mask | ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  434. &reg->outbound_intmask);
  435. return orig_mask;
  436. }
  437. static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
  438. u32 orig_mask)
  439. {
  440. struct MessageUnit __iomem *reg = acb->pmu;
  441. u32 mask;
  442. mask = orig_mask & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
  443. ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
  444. writel(mask, &reg->outbound_intmask);
  445. }
  446. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
  447. {
  448. struct MessageUnit __iomem *reg=acb->pmu;
  449. writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
  450. if (arcmsr_wait_msgint_ready(acb))
  451. printk(KERN_NOTICE
  452. "arcmsr%d: wait 'flush adapter cache' timeout \n"
  453. , acb->host->host_no);
  454. }
  455. static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
  456. {
  457. struct scsi_cmnd *pcmd = ccb->pcmd;
  458. struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
  459. pcmd->result = DID_OK << 16;
  460. if (sensebuffer) {
  461. int sense_data_length =
  462. sizeof (struct SENSE_DATA) < sizeof (pcmd->sense_buffer)
  463. ? sizeof (struct SENSE_DATA) : sizeof (pcmd->sense_buffer);
  464. memset(sensebuffer, 0, sizeof (pcmd->sense_buffer));
  465. memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
  466. sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
  467. sensebuffer->Valid = 1;
  468. }
  469. }
  470. static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb)
  471. {
  472. struct MessageUnit __iomem *reg = acb->pmu;
  473. uint32_t Index;
  474. uint8_t Retries = 0x00;
  475. do {
  476. for (Index = 0; Index < 100; Index++) {
  477. if (readl(&reg->outbound_intstatus)
  478. & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
  479. writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT
  480. , &reg->outbound_intstatus);
  481. return 0x00;
  482. }
  483. msleep_interruptible(10);
  484. }/*max 1 seconds*/
  485. } while (Retries++ < 20);/*max 20 sec*/
  486. return 0xff;
  487. }
  488. static void arcmsr_build_ccb(struct AdapterControlBlock *acb,
  489. struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
  490. {
  491. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  492. int8_t *psge = (int8_t *)&arcmsr_cdb->u;
  493. uint32_t address_lo, address_hi;
  494. int arccdbsize = 0x30;
  495. ccb->pcmd = pcmd;
  496. memset(arcmsr_cdb, 0, sizeof (struct ARCMSR_CDB));
  497. arcmsr_cdb->Bus = 0;
  498. arcmsr_cdb->TargetID = pcmd->device->id;
  499. arcmsr_cdb->LUN = pcmd->device->lun;
  500. arcmsr_cdb->Function = 1;
  501. arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
  502. arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
  503. memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
  504. if (pcmd->use_sg) {
  505. int length, sgcount, i, cdb_sgcount = 0;
  506. struct scatterlist *sl;
  507. /* Get Scatter Gather List from scsiport. */
  508. sl = (struct scatterlist *) pcmd->request_buffer;
  509. sgcount = pci_map_sg(acb->pdev, sl, pcmd->use_sg,
  510. pcmd->sc_data_direction);
  511. /* map stor port SG list to our iop SG List. */
  512. for (i = 0; i < sgcount; i++) {
  513. /* Get the physical address of the current data pointer */
  514. length = cpu_to_le32(sg_dma_len(sl));
  515. address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sl)));
  516. address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sl)));
  517. if (address_hi == 0) {
  518. struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
  519. pdma_sg->address = address_lo;
  520. pdma_sg->length = length;
  521. psge += sizeof (struct SG32ENTRY);
  522. arccdbsize += sizeof (struct SG32ENTRY);
  523. } else {
  524. struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
  525. pdma_sg->addresshigh = address_hi;
  526. pdma_sg->address = address_lo;
  527. pdma_sg->length = length|IS_SG64_ADDR;
  528. psge += sizeof (struct SG64ENTRY);
  529. arccdbsize += sizeof (struct SG64ENTRY);
  530. }
  531. sl++;
  532. cdb_sgcount++;
  533. }
  534. arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
  535. arcmsr_cdb->DataLength = pcmd->request_bufflen;
  536. if ( arccdbsize > 256)
  537. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
  538. } else if (pcmd->request_bufflen) {
  539. dma_addr_t dma_addr;
  540. dma_addr = pci_map_single(acb->pdev, pcmd->request_buffer,
  541. pcmd->request_bufflen, pcmd->sc_data_direction);
  542. pcmd->SCp.dma_handle = dma_addr;
  543. address_lo = cpu_to_le32(dma_addr_lo32(dma_addr));
  544. address_hi = cpu_to_le32(dma_addr_hi32(dma_addr));
  545. if (address_hi == 0) {
  546. struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
  547. pdma_sg->address = address_lo;
  548. pdma_sg->length = pcmd->request_bufflen;
  549. } else {
  550. struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
  551. pdma_sg->addresshigh = address_hi;
  552. pdma_sg->address = address_lo;
  553. pdma_sg->length = pcmd->request_bufflen|IS_SG64_ADDR;
  554. }
  555. arcmsr_cdb->sgcount = 1;
  556. arcmsr_cdb->DataLength = pcmd->request_bufflen;
  557. }
  558. if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
  559. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
  560. ccb->ccb_flags |= CCB_FLAG_WRITE;
  561. }
  562. }
  563. static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
  564. {
  565. struct MessageUnit __iomem *reg = acb->pmu;
  566. uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
  567. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  568. atomic_inc(&acb->ccboutstandingcount);
  569. ccb->startdone = ARCMSR_CCB_START;
  570. if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
  571. writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
  572. &reg->inbound_queueport);
  573. else
  574. writel(cdb_shifted_phyaddr, &reg->inbound_queueport);
  575. }
  576. void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb)
  577. {
  578. struct MessageUnit __iomem *reg = acb->pmu;
  579. struct QBUFFER __iomem *pwbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
  580. uint8_t __iomem *iop_data = (uint8_t __iomem *) pwbuffer->data;
  581. int32_t allxfer_len = 0;
  582. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
  583. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  584. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
  585. && (allxfer_len < 124)) {
  586. writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data);
  587. acb->wqbuf_firstindex++;
  588. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  589. iop_data++;
  590. allxfer_len++;
  591. }
  592. writel(allxfer_len, &pwbuffer->data_len);
  593. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK
  594. , &reg->inbound_doorbell);
  595. }
  596. }
  597. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
  598. {
  599. struct MessageUnit __iomem *reg = acb->pmu;
  600. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  601. writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
  602. if (arcmsr_wait_msgint_ready(acb))
  603. printk(KERN_NOTICE
  604. "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
  605. , acb->host->host_no);
  606. }
  607. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
  608. {
  609. dma_free_coherent(&acb->pdev->dev,
  610. ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
  611. acb->dma_coherent,
  612. acb->dma_coherent_handle);
  613. }
  614. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
  615. {
  616. struct MessageUnit __iomem *reg = acb->pmu;
  617. struct CommandControlBlock *ccb;
  618. uint32_t flag_ccb, outbound_intstatus, outbound_doorbell;
  619. outbound_intstatus = readl(&reg->outbound_intstatus)
  620. & acb->outbound_int_enable;
  621. writel(outbound_intstatus, &reg->outbound_intstatus);
  622. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
  623. outbound_doorbell = readl(&reg->outbound_doorbell);
  624. writel(outbound_doorbell, &reg->outbound_doorbell);
  625. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
  626. struct QBUFFER __iomem * prbuffer =
  627. (struct QBUFFER __iomem *) &reg->message_rbuffer;
  628. uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data;
  629. int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
  630. rqbuf_lastindex = acb->rqbuf_lastindex;
  631. rqbuf_firstindex = acb->rqbuf_firstindex;
  632. iop_len = readl(&prbuffer->data_len);
  633. my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1)
  634. &(ARCMSR_MAX_QBUFFER - 1);
  635. if (my_empty_len >= iop_len) {
  636. while (iop_len > 0) {
  637. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  638. acb->rqbuf_lastindex++;
  639. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  640. iop_data++;
  641. iop_len--;
  642. }
  643. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  644. &reg->inbound_doorbell);
  645. } else
  646. acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
  647. }
  648. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
  649. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
  650. if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
  651. struct QBUFFER __iomem * pwbuffer =
  652. (struct QBUFFER __iomem *) &reg->message_wbuffer;
  653. uint8_t __iomem * iop_data = (uint8_t __iomem *) pwbuffer->data;
  654. int32_t allxfer_len = 0;
  655. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  656. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
  657. && (allxfer_len < 124)) {
  658. writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data);
  659. acb->wqbuf_firstindex++;
  660. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  661. iop_data++;
  662. allxfer_len++;
  663. }
  664. writel(allxfer_len, &pwbuffer->data_len);
  665. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK,
  666. &reg->inbound_doorbell);
  667. }
  668. if (acb->wqbuf_firstindex == acb->wqbuf_lastindex)
  669. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
  670. }
  671. }
  672. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
  673. int id, lun;
  674. /*
  675. ****************************************************************
  676. ** areca cdb command done
  677. ****************************************************************
  678. */
  679. while (1) {
  680. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF)
  681. break;/*chip FIFO no ccb for completion already*/
  682. /* check if command done with no error*/
  683. ccb = (struct CommandControlBlock *)(acb->vir2phy_offset +
  684. (flag_ccb << 5));
  685. if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
  686. if (ccb->startdone == ARCMSR_CCB_ABORTED) {
  687. struct scsi_cmnd *abortcmd=ccb->pcmd;
  688. if (abortcmd) {
  689. abortcmd->result |= DID_ABORT >> 16;
  690. arcmsr_ccb_complete(ccb, 1);
  691. printk(KERN_NOTICE
  692. "arcmsr%d: ccb='0x%p' isr got aborted command \n"
  693. , acb->host->host_no, ccb);
  694. }
  695. continue;
  696. }
  697. printk(KERN_NOTICE
  698. "arcmsr%d: isr get an illegal ccb command done acb='0x%p'"
  699. "ccb='0x%p' ccbacb='0x%p' startdone = 0x%x"
  700. " ccboutstandingcount=%d \n"
  701. , acb->host->host_no
  702. , acb
  703. , ccb
  704. , ccb->acb
  705. , ccb->startdone
  706. , atomic_read(&acb->ccboutstandingcount));
  707. continue;
  708. }
  709. id = ccb->pcmd->device->id;
  710. lun = ccb->pcmd->device->lun;
  711. if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
  712. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  713. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  714. ccb->pcmd->result = DID_OK << 16;
  715. arcmsr_ccb_complete(ccb, 1);
  716. } else {
  717. switch(ccb->arcmsr_cdb.DeviceStatus) {
  718. case ARCMSR_DEV_SELECT_TIMEOUT: {
  719. acb->devstate[id][lun] = ARECA_RAID_GONE;
  720. ccb->pcmd->result = DID_TIME_OUT << 16;
  721. arcmsr_ccb_complete(ccb, 1);
  722. }
  723. break;
  724. case ARCMSR_DEV_ABORTED:
  725. case ARCMSR_DEV_INIT_FAIL: {
  726. acb->devstate[id][lun] = ARECA_RAID_GONE;
  727. ccb->pcmd->result = DID_BAD_TARGET << 16;
  728. arcmsr_ccb_complete(ccb, 1);
  729. }
  730. break;
  731. case ARCMSR_DEV_CHECK_CONDITION: {
  732. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  733. arcmsr_report_sense_info(ccb);
  734. arcmsr_ccb_complete(ccb, 1);
  735. }
  736. break;
  737. default:
  738. printk(KERN_NOTICE
  739. "arcmsr%d: scsi id=%d lun=%d"
  740. " isr get command error done,"
  741. "but got unknown DeviceStatus = 0x%x \n"
  742. , acb->host->host_no
  743. , id
  744. , lun
  745. , ccb->arcmsr_cdb.DeviceStatus);
  746. acb->devstate[id][lun] = ARECA_RAID_GONE;
  747. ccb->pcmd->result = DID_NO_CONNECT << 16;
  748. arcmsr_ccb_complete(ccb, 1);
  749. break;
  750. }
  751. }
  752. }/*drain reply FIFO*/
  753. }
  754. if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
  755. return IRQ_NONE;
  756. return IRQ_HANDLED;
  757. }
  758. static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
  759. {
  760. if (acb) {
  761. /* stop adapter background rebuild */
  762. if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
  763. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  764. arcmsr_stop_adapter_bgrb(acb);
  765. arcmsr_flush_adapter_cache(acb);
  766. }
  767. }
  768. }
  769. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd)
  770. {
  771. struct MessageUnit __iomem *reg = acb->pmu;
  772. struct CMD_MESSAGE_FIELD *pcmdmessagefld;
  773. int retvalue = 0, transfer_len = 0;
  774. char *buffer;
  775. uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
  776. (uint32_t ) cmd->cmnd[6] << 16 |
  777. (uint32_t ) cmd->cmnd[7] << 8 |
  778. (uint32_t ) cmd->cmnd[8];
  779. /* 4 bytes: Areca io control code */
  780. if (cmd->use_sg) {
  781. struct scatterlist *sg = (struct scatterlist *)cmd->request_buffer;
  782. buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  783. if (cmd->use_sg > 1) {
  784. retvalue = ARCMSR_MESSAGE_FAIL;
  785. goto message_out;
  786. }
  787. transfer_len += sg->length;
  788. } else {
  789. buffer = cmd->request_buffer;
  790. transfer_len = cmd->request_bufflen;
  791. }
  792. if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
  793. retvalue = ARCMSR_MESSAGE_FAIL;
  794. goto message_out;
  795. }
  796. pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
  797. switch(controlcode) {
  798. case ARCMSR_MESSAGE_READ_RQBUFFER: {
  799. unsigned long *ver_addr;
  800. dma_addr_t buf_handle;
  801. uint8_t *pQbuffer, *ptmpQbuffer;
  802. int32_t allxfer_len = 0;
  803. ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
  804. if (!ver_addr) {
  805. retvalue = ARCMSR_MESSAGE_FAIL;
  806. goto message_out;
  807. }
  808. ptmpQbuffer = (uint8_t *) ver_addr;
  809. while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
  810. && (allxfer_len < 1031)) {
  811. pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
  812. memcpy(ptmpQbuffer, pQbuffer, 1);
  813. acb->rqbuf_firstindex++;
  814. acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  815. ptmpQbuffer++;
  816. allxfer_len++;
  817. }
  818. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  819. struct QBUFFER __iomem * prbuffer = (struct QBUFFER __iomem *)
  820. &reg->message_rbuffer;
  821. uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data;
  822. int32_t iop_len;
  823. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  824. iop_len = readl(&prbuffer->data_len);
  825. while (iop_len > 0) {
  826. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  827. acb->rqbuf_lastindex++;
  828. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  829. iop_data++;
  830. iop_len--;
  831. }
  832. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  833. &reg->inbound_doorbell);
  834. }
  835. memcpy(pcmdmessagefld->messagedatabuffer,
  836. (uint8_t *)ver_addr, allxfer_len);
  837. pcmdmessagefld->cmdmessage.Length = allxfer_len;
  838. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  839. pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
  840. }
  841. break;
  842. case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
  843. unsigned long *ver_addr;
  844. dma_addr_t buf_handle;
  845. int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
  846. uint8_t *pQbuffer, *ptmpuserbuffer;
  847. ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
  848. if (!ver_addr) {
  849. retvalue = ARCMSR_MESSAGE_FAIL;
  850. goto message_out;
  851. }
  852. ptmpuserbuffer = (uint8_t *)ver_addr;
  853. user_len = pcmdmessagefld->cmdmessage.Length;
  854. memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
  855. wqbuf_lastindex = acb->wqbuf_lastindex;
  856. wqbuf_firstindex = acb->wqbuf_firstindex;
  857. if (wqbuf_lastindex != wqbuf_firstindex) {
  858. struct SENSE_DATA *sensebuffer =
  859. (struct SENSE_DATA *)cmd->sense_buffer;
  860. arcmsr_post_Qbuffer(acb);
  861. /* has error report sensedata */
  862. sensebuffer->ErrorCode = 0x70;
  863. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  864. sensebuffer->AdditionalSenseLength = 0x0A;
  865. sensebuffer->AdditionalSenseCode = 0x20;
  866. sensebuffer->Valid = 1;
  867. retvalue = ARCMSR_MESSAGE_FAIL;
  868. } else {
  869. my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
  870. &(ARCMSR_MAX_QBUFFER - 1);
  871. if (my_empty_len >= user_len) {
  872. while (user_len > 0) {
  873. pQbuffer =
  874. &acb->wqbuffer[acb->wqbuf_lastindex];
  875. memcpy(pQbuffer, ptmpuserbuffer, 1);
  876. acb->wqbuf_lastindex++;
  877. acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  878. ptmpuserbuffer++;
  879. user_len--;
  880. }
  881. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
  882. acb->acb_flags &=
  883. ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
  884. arcmsr_post_Qbuffer(acb);
  885. }
  886. } else {
  887. /* has error report sensedata */
  888. struct SENSE_DATA *sensebuffer =
  889. (struct SENSE_DATA *)cmd->sense_buffer;
  890. sensebuffer->ErrorCode = 0x70;
  891. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  892. sensebuffer->AdditionalSenseLength = 0x0A;
  893. sensebuffer->AdditionalSenseCode = 0x20;
  894. sensebuffer->Valid = 1;
  895. retvalue = ARCMSR_MESSAGE_FAIL;
  896. }
  897. }
  898. pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
  899. }
  900. break;
  901. case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
  902. uint8_t *pQbuffer = acb->rqbuffer;
  903. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  904. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  905. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  906. &reg->inbound_doorbell);
  907. }
  908. acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
  909. acb->rqbuf_firstindex = 0;
  910. acb->rqbuf_lastindex = 0;
  911. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  912. pcmdmessagefld->cmdmessage.ReturnCode =
  913. ARCMSR_MESSAGE_RETURNCODE_OK;
  914. }
  915. break;
  916. case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
  917. uint8_t *pQbuffer = acb->wqbuffer;
  918. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  919. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  920. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK
  921. , &reg->inbound_doorbell);
  922. }
  923. acb->acb_flags |=
  924. (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  925. ACB_F_MESSAGE_WQBUFFER_READED);
  926. acb->wqbuf_firstindex = 0;
  927. acb->wqbuf_lastindex = 0;
  928. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  929. pcmdmessagefld->cmdmessage.ReturnCode =
  930. ARCMSR_MESSAGE_RETURNCODE_OK;
  931. }
  932. break;
  933. case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
  934. uint8_t *pQbuffer;
  935. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  936. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  937. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK
  938. , &reg->inbound_doorbell);
  939. }
  940. acb->acb_flags |=
  941. (ACB_F_MESSAGE_WQBUFFER_CLEARED
  942. | ACB_F_MESSAGE_RQBUFFER_CLEARED
  943. | ACB_F_MESSAGE_WQBUFFER_READED);
  944. acb->rqbuf_firstindex = 0;
  945. acb->rqbuf_lastindex = 0;
  946. acb->wqbuf_firstindex = 0;
  947. acb->wqbuf_lastindex = 0;
  948. pQbuffer = acb->rqbuffer;
  949. memset(pQbuffer, 0, sizeof (struct QBUFFER));
  950. pQbuffer = acb->wqbuffer;
  951. memset(pQbuffer, 0, sizeof (struct QBUFFER));
  952. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  953. }
  954. break;
  955. case ARCMSR_MESSAGE_RETURN_CODE_3F: {
  956. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
  957. }
  958. break;
  959. case ARCMSR_MESSAGE_SAY_HELLO: {
  960. int8_t * hello_string = "Hello! I am ARCMSR";
  961. memcpy(pcmdmessagefld->messagedatabuffer, hello_string
  962. , (int16_t)strlen(hello_string));
  963. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  964. }
  965. break;
  966. case ARCMSR_MESSAGE_SAY_GOODBYE:
  967. arcmsr_iop_parking(acb);
  968. break;
  969. case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
  970. arcmsr_flush_adapter_cache(acb);
  971. break;
  972. default:
  973. retvalue = ARCMSR_MESSAGE_FAIL;
  974. }
  975. message_out:
  976. if (cmd->use_sg) {
  977. struct scatterlist *sg;
  978. sg = (struct scatterlist *) cmd->request_buffer;
  979. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  980. }
  981. return retvalue;
  982. }
  983. static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
  984. {
  985. struct list_head *head = &acb->ccb_free_list;
  986. struct CommandControlBlock *ccb = NULL;
  987. if (!list_empty(head)) {
  988. ccb = list_entry(head->next, struct CommandControlBlock, list);
  989. list_del(head->next);
  990. }
  991. return ccb;
  992. }
  993. static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
  994. struct scsi_cmnd *cmd)
  995. {
  996. switch (cmd->cmnd[0]) {
  997. case INQUIRY: {
  998. unsigned char inqdata[36];
  999. char *buffer;
  1000. if (cmd->device->lun) {
  1001. cmd->result = (DID_TIME_OUT << 16);
  1002. cmd->scsi_done(cmd);
  1003. return;
  1004. }
  1005. inqdata[0] = TYPE_PROCESSOR;
  1006. /* Periph Qualifier & Periph Dev Type */
  1007. inqdata[1] = 0;
  1008. /* rem media bit & Dev Type Modifier */
  1009. inqdata[2] = 0;
  1010. /* ISO,ECMA,& ANSI versions */
  1011. inqdata[4] = 31;
  1012. /* length of additional data */
  1013. strncpy(&inqdata[8], "Areca ", 8);
  1014. /* Vendor Identification */
  1015. strncpy(&inqdata[16], "RAID controller ", 16);
  1016. /* Product Identification */
  1017. strncpy(&inqdata[32], "R001", 4); /* Product Revision */
  1018. if (cmd->use_sg) {
  1019. struct scatterlist *sg;
  1020. sg = (struct scatterlist *) cmd->request_buffer;
  1021. buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  1022. } else {
  1023. buffer = cmd->request_buffer;
  1024. }
  1025. memcpy(buffer, inqdata, sizeof(inqdata));
  1026. if (cmd->use_sg) {
  1027. struct scatterlist *sg;
  1028. sg = (struct scatterlist *) cmd->request_buffer;
  1029. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  1030. }
  1031. cmd->scsi_done(cmd);
  1032. }
  1033. break;
  1034. case WRITE_BUFFER:
  1035. case READ_BUFFER: {
  1036. if (arcmsr_iop_message_xfer(acb, cmd))
  1037. cmd->result = (DID_ERROR << 16);
  1038. cmd->scsi_done(cmd);
  1039. }
  1040. break;
  1041. default:
  1042. cmd->scsi_done(cmd);
  1043. }
  1044. }
  1045. static int arcmsr_queue_command(struct scsi_cmnd *cmd,
  1046. void (* done)(struct scsi_cmnd *))
  1047. {
  1048. struct Scsi_Host *host = cmd->device->host;
  1049. struct AdapterControlBlock *acb =
  1050. (struct AdapterControlBlock *) host->hostdata;
  1051. struct CommandControlBlock *ccb;
  1052. int target = cmd->device->id;
  1053. int lun = cmd->device->lun;
  1054. cmd->scsi_done = done;
  1055. cmd->host_scribble = NULL;
  1056. cmd->result = 0;
  1057. if (acb->acb_flags & ACB_F_BUS_RESET) {
  1058. printk(KERN_NOTICE "arcmsr%d: bus reset"
  1059. " and return busy \n"
  1060. , acb->host->host_no);
  1061. return SCSI_MLQUEUE_HOST_BUSY;
  1062. }
  1063. if(target == 16) {
  1064. /* virtual device for iop message transfer */
  1065. arcmsr_handle_virtual_command(acb, cmd);
  1066. return 0;
  1067. }
  1068. if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
  1069. uint8_t block_cmd;
  1070. block_cmd = cmd->cmnd[0] & 0x0f;
  1071. if (block_cmd == 0x08 || block_cmd == 0x0a) {
  1072. printk(KERN_NOTICE
  1073. "arcmsr%d: block 'read/write'"
  1074. "command with gone raid volume"
  1075. " Cmd=%2x, TargetId=%d, Lun=%d \n"
  1076. , acb->host->host_no
  1077. , cmd->cmnd[0]
  1078. , target, lun);
  1079. cmd->result = (DID_NO_CONNECT << 16);
  1080. cmd->scsi_done(cmd);
  1081. return 0;
  1082. }
  1083. }
  1084. if (atomic_read(&acb->ccboutstandingcount) >=
  1085. ARCMSR_MAX_OUTSTANDING_CMD)
  1086. return SCSI_MLQUEUE_HOST_BUSY;
  1087. ccb = arcmsr_get_freeccb(acb);
  1088. if (!ccb)
  1089. return SCSI_MLQUEUE_HOST_BUSY;
  1090. arcmsr_build_ccb(acb, ccb, cmd);
  1091. arcmsr_post_ccb(acb, ccb);
  1092. return 0;
  1093. }
  1094. static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
  1095. {
  1096. struct MessageUnit __iomem *reg = acb->pmu;
  1097. char *acb_firm_model = acb->firm_model;
  1098. char *acb_firm_version = acb->firm_version;
  1099. char __iomem *iop_firm_model = (char __iomem *) &reg->message_rwbuffer[15];
  1100. char __iomem *iop_firm_version = (char __iomem *) &reg->message_rwbuffer[17];
  1101. int count;
  1102. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  1103. if (arcmsr_wait_msgint_ready(acb))
  1104. printk(KERN_NOTICE
  1105. "arcmsr%d: wait "
  1106. "'get adapter firmware miscellaneous data' timeout \n"
  1107. , acb->host->host_no);
  1108. count = 8;
  1109. while (count) {
  1110. *acb_firm_model = readb(iop_firm_model);
  1111. acb_firm_model++;
  1112. iop_firm_model++;
  1113. count--;
  1114. }
  1115. count = 16;
  1116. while (count) {
  1117. *acb_firm_version = readb(iop_firm_version);
  1118. acb_firm_version++;
  1119. iop_firm_version++;
  1120. count--;
  1121. }
  1122. printk(KERN_INFO
  1123. "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
  1124. , acb->host->host_no
  1125. , acb->firm_version);
  1126. acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
  1127. acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
  1128. acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
  1129. acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
  1130. }
  1131. static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
  1132. struct CommandControlBlock *poll_ccb)
  1133. {
  1134. struct MessageUnit __iomem *reg = acb->pmu;
  1135. struct CommandControlBlock *ccb;
  1136. uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
  1137. int id, lun;
  1138. polling_ccb_retry:
  1139. poll_count++;
  1140. outbound_intstatus = readl(&reg->outbound_intstatus)
  1141. & acb->outbound_int_enable;
  1142. writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
  1143. while (1) {
  1144. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
  1145. if (poll_ccb_done)
  1146. break;
  1147. else {
  1148. msleep(25);
  1149. if (poll_count > 100)
  1150. break;
  1151. goto polling_ccb_retry;
  1152. }
  1153. }
  1154. ccb = (struct CommandControlBlock *)
  1155. (acb->vir2phy_offset + (flag_ccb << 5));
  1156. if ((ccb->acb != acb) ||
  1157. (ccb->startdone != ARCMSR_CCB_START)) {
  1158. if ((ccb->startdone == ARCMSR_CCB_ABORTED) ||
  1159. (ccb == poll_ccb)) {
  1160. printk(KERN_NOTICE
  1161. "arcmsr%d: scsi id=%d lun=%d ccb='0x%p'"
  1162. " poll command abort successfully \n"
  1163. , acb->host->host_no
  1164. , ccb->pcmd->device->id
  1165. , ccb->pcmd->device->lun
  1166. , ccb);
  1167. ccb->pcmd->result = DID_ABORT << 16;
  1168. arcmsr_ccb_complete(ccb, 1);
  1169. poll_ccb_done = 1;
  1170. continue;
  1171. }
  1172. printk(KERN_NOTICE
  1173. "arcmsr%d: polling get an illegal ccb"
  1174. " command done ccb='0x%p'"
  1175. "ccboutstandingcount=%d \n"
  1176. , acb->host->host_no
  1177. , ccb
  1178. , atomic_read(&acb->ccboutstandingcount));
  1179. continue;
  1180. }
  1181. id = ccb->pcmd->device->id;
  1182. lun = ccb->pcmd->device->lun;
  1183. if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
  1184. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  1185. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  1186. ccb->pcmd->result = DID_OK << 16;
  1187. arcmsr_ccb_complete(ccb, 1);
  1188. } else {
  1189. switch(ccb->arcmsr_cdb.DeviceStatus) {
  1190. case ARCMSR_DEV_SELECT_TIMEOUT: {
  1191. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1192. ccb->pcmd->result = DID_TIME_OUT << 16;
  1193. arcmsr_ccb_complete(ccb, 1);
  1194. }
  1195. break;
  1196. case ARCMSR_DEV_ABORTED:
  1197. case ARCMSR_DEV_INIT_FAIL: {
  1198. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1199. ccb->pcmd->result = DID_BAD_TARGET << 16;
  1200. arcmsr_ccb_complete(ccb, 1);
  1201. }
  1202. break;
  1203. case ARCMSR_DEV_CHECK_CONDITION: {
  1204. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  1205. arcmsr_report_sense_info(ccb);
  1206. arcmsr_ccb_complete(ccb, 1);
  1207. }
  1208. break;
  1209. default:
  1210. printk(KERN_NOTICE
  1211. "arcmsr%d: scsi id=%d lun=%d"
  1212. " polling and getting command error done"
  1213. "but got unknown DeviceStatus = 0x%x \n"
  1214. , acb->host->host_no
  1215. , id
  1216. , lun
  1217. , ccb->arcmsr_cdb.DeviceStatus);
  1218. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1219. ccb->pcmd->result = DID_BAD_TARGET << 16;
  1220. arcmsr_ccb_complete(ccb, 1);
  1221. break;
  1222. }
  1223. }
  1224. }
  1225. }
  1226. static void arcmsr_iop_init(struct AdapterControlBlock *acb)
  1227. {
  1228. struct MessageUnit __iomem *reg = acb->pmu;
  1229. uint32_t intmask_org, mask, outbound_doorbell, firmware_state = 0;
  1230. do {
  1231. firmware_state = readl(&reg->outbound_msgaddr1);
  1232. } while (!(firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK));
  1233. intmask_org = readl(&reg->outbound_intmask)
  1234. | ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
  1235. arcmsr_get_firmware_spec(acb);
  1236. acb->acb_flags |= ACB_F_MSG_START_BGRB;
  1237. writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
  1238. if (arcmsr_wait_msgint_ready(acb)) {
  1239. printk(KERN_NOTICE "arcmsr%d: "
  1240. "wait 'start adapter background rebulid' timeout\n",
  1241. acb->host->host_no);
  1242. }
  1243. outbound_doorbell = readl(&reg->outbound_doorbell);
  1244. writel(outbound_doorbell, &reg->outbound_doorbell);
  1245. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
  1246. mask = ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE
  1247. | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
  1248. writel(intmask_org & mask, &reg->outbound_intmask);
  1249. acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
  1250. acb->acb_flags |= ACB_F_IOP_INITED;
  1251. }
  1252. static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
  1253. {
  1254. struct MessageUnit __iomem *reg = acb->pmu;
  1255. struct CommandControlBlock *ccb;
  1256. uint32_t intmask_org;
  1257. int i = 0;
  1258. if (atomic_read(&acb->ccboutstandingcount) != 0) {
  1259. /* talk to iop 331 outstanding command aborted */
  1260. arcmsr_abort_allcmd(acb);
  1261. /* wait for 3 sec for all command aborted*/
  1262. msleep_interruptible(3000);
  1263. /* disable all outbound interrupt */
  1264. intmask_org = arcmsr_disable_outbound_ints(acb);
  1265. /* clear all outbound posted Q */
  1266. for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++)
  1267. readl(&reg->outbound_queueport);
  1268. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  1269. ccb = acb->pccb_pool[i];
  1270. if ((ccb->startdone == ARCMSR_CCB_START) ||
  1271. (ccb->startdone == ARCMSR_CCB_ABORTED)) {
  1272. ccb->startdone = ARCMSR_CCB_ABORTED;
  1273. ccb->pcmd->result = DID_ABORT << 16;
  1274. arcmsr_ccb_complete(ccb, 1);
  1275. }
  1276. }
  1277. /* enable all outbound interrupt */
  1278. arcmsr_enable_outbound_ints(acb, intmask_org);
  1279. }
  1280. atomic_set(&acb->ccboutstandingcount, 0);
  1281. }
  1282. static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
  1283. {
  1284. struct AdapterControlBlock *acb =
  1285. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  1286. int i;
  1287. acb->num_resets++;
  1288. acb->acb_flags |= ACB_F_BUS_RESET;
  1289. for (i = 0; i < 400; i++) {
  1290. if (!atomic_read(&acb->ccboutstandingcount))
  1291. break;
  1292. arcmsr_interrupt(acb);
  1293. msleep(25);
  1294. }
  1295. arcmsr_iop_reset(acb);
  1296. acb->acb_flags &= ~ACB_F_BUS_RESET;
  1297. return SUCCESS;
  1298. }
  1299. static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
  1300. struct CommandControlBlock *ccb)
  1301. {
  1302. u32 intmask;
  1303. ccb->startdone = ARCMSR_CCB_ABORTED;
  1304. /*
  1305. ** Wait for 3 sec for all command done.
  1306. */
  1307. msleep_interruptible(3000);
  1308. intmask = arcmsr_disable_outbound_ints(acb);
  1309. arcmsr_polling_ccbdone(acb, ccb);
  1310. arcmsr_enable_outbound_ints(acb, intmask);
  1311. }
  1312. static int arcmsr_abort(struct scsi_cmnd *cmd)
  1313. {
  1314. struct AdapterControlBlock *acb =
  1315. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  1316. int i = 0;
  1317. printk(KERN_NOTICE
  1318. "arcmsr%d: abort device command of scsi id=%d lun=%d \n",
  1319. acb->host->host_no, cmd->device->id, cmd->device->lun);
  1320. acb->num_aborts++;
  1321. /*
  1322. ************************************************
  1323. ** the all interrupt service routine is locked
  1324. ** we need to handle it as soon as possible and exit
  1325. ************************************************
  1326. */
  1327. if (!atomic_read(&acb->ccboutstandingcount))
  1328. return SUCCESS;
  1329. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  1330. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  1331. if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
  1332. arcmsr_abort_one_cmd(acb, ccb);
  1333. break;
  1334. }
  1335. }
  1336. return SUCCESS;
  1337. }
  1338. static const char *arcmsr_info(struct Scsi_Host *host)
  1339. {
  1340. struct AdapterControlBlock *acb =
  1341. (struct AdapterControlBlock *) host->hostdata;
  1342. static char buf[256];
  1343. char *type;
  1344. int raid6 = 1;
  1345. switch (acb->pdev->device) {
  1346. case PCI_DEVICE_ID_ARECA_1110:
  1347. case PCI_DEVICE_ID_ARECA_1210:
  1348. raid6 = 0;
  1349. /*FALLTHRU*/
  1350. case PCI_DEVICE_ID_ARECA_1120:
  1351. case PCI_DEVICE_ID_ARECA_1130:
  1352. case PCI_DEVICE_ID_ARECA_1160:
  1353. case PCI_DEVICE_ID_ARECA_1170:
  1354. case PCI_DEVICE_ID_ARECA_1220:
  1355. case PCI_DEVICE_ID_ARECA_1230:
  1356. case PCI_DEVICE_ID_ARECA_1260:
  1357. case PCI_DEVICE_ID_ARECA_1270:
  1358. case PCI_DEVICE_ID_ARECA_1280:
  1359. type = "SATA";
  1360. break;
  1361. case PCI_DEVICE_ID_ARECA_1380:
  1362. case PCI_DEVICE_ID_ARECA_1381:
  1363. case PCI_DEVICE_ID_ARECA_1680:
  1364. case PCI_DEVICE_ID_ARECA_1681:
  1365. type = "SAS";
  1366. break;
  1367. default:
  1368. type = "X-TYPE";
  1369. break;
  1370. }
  1371. sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
  1372. type, raid6 ? "( RAID6 capable)" : "",
  1373. ARCMSR_DRIVER_VERSION);
  1374. return buf;
  1375. }