commsup.c 44 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545
  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * commsup.c
  26. *
  27. * Abstract: Contain all routines that are required for FSA host/adapter
  28. * communication.
  29. *
  30. */
  31. #include <linux/kernel.h>
  32. #include <linux/init.h>
  33. #include <linux/types.h>
  34. #include <linux/sched.h>
  35. #include <linux/pci.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/slab.h>
  38. #include <linux/completion.h>
  39. #include <linux/blkdev.h>
  40. #include <linux/delay.h>
  41. #include <linux/kthread.h>
  42. #include <linux/interrupt.h>
  43. #include <scsi/scsi.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_device.h>
  46. #include <scsi/scsi_cmnd.h>
  47. #include <asm/semaphore.h>
  48. #include "aacraid.h"
  49. /**
  50. * fib_map_alloc - allocate the fib objects
  51. * @dev: Adapter to allocate for
  52. *
  53. * Allocate and map the shared PCI space for the FIB blocks used to
  54. * talk to the Adaptec firmware.
  55. */
  56. static int fib_map_alloc(struct aac_dev *dev)
  57. {
  58. dprintk((KERN_INFO
  59. "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
  60. dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
  61. AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
  62. if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, dev->max_fib_size
  63. * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB),
  64. &dev->hw_fib_pa))==NULL)
  65. return -ENOMEM;
  66. return 0;
  67. }
  68. /**
  69. * aac_fib_map_free - free the fib objects
  70. * @dev: Adapter to free
  71. *
  72. * Free the PCI mappings and the memory allocated for FIB blocks
  73. * on this adapter.
  74. */
  75. void aac_fib_map_free(struct aac_dev *dev)
  76. {
  77. pci_free_consistent(dev->pdev, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), dev->hw_fib_va, dev->hw_fib_pa);
  78. }
  79. /**
  80. * aac_fib_setup - setup the fibs
  81. * @dev: Adapter to set up
  82. *
  83. * Allocate the PCI space for the fibs, map it and then intialise the
  84. * fib area, the unmapped fib data and also the free list
  85. */
  86. int aac_fib_setup(struct aac_dev * dev)
  87. {
  88. struct fib *fibptr;
  89. struct hw_fib *hw_fib_va;
  90. dma_addr_t hw_fib_pa;
  91. int i;
  92. while (((i = fib_map_alloc(dev)) == -ENOMEM)
  93. && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
  94. dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
  95. dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
  96. }
  97. if (i<0)
  98. return -ENOMEM;
  99. hw_fib_va = dev->hw_fib_va;
  100. hw_fib_pa = dev->hw_fib_pa;
  101. memset(hw_fib_va, 0, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
  102. /*
  103. * Initialise the fibs
  104. */
  105. for (i = 0, fibptr = &dev->fibs[i]; i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); i++, fibptr++)
  106. {
  107. fibptr->dev = dev;
  108. fibptr->hw_fib = hw_fib_va;
  109. fibptr->data = (void *) fibptr->hw_fib->data;
  110. fibptr->next = fibptr+1; /* Forward chain the fibs */
  111. init_MUTEX_LOCKED(&fibptr->event_wait);
  112. spin_lock_init(&fibptr->event_lock);
  113. hw_fib_va->header.XferState = cpu_to_le32(0xffffffff);
  114. hw_fib_va->header.SenderSize = cpu_to_le16(dev->max_fib_size);
  115. fibptr->hw_fib_pa = hw_fib_pa;
  116. hw_fib_va = (struct hw_fib *)((unsigned char *)hw_fib_va + dev->max_fib_size);
  117. hw_fib_pa = hw_fib_pa + dev->max_fib_size;
  118. }
  119. /*
  120. * Add the fib chain to the free list
  121. */
  122. dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
  123. /*
  124. * Enable this to debug out of queue space
  125. */
  126. dev->free_fib = &dev->fibs[0];
  127. return 0;
  128. }
  129. /**
  130. * aac_fib_alloc - allocate a fib
  131. * @dev: Adapter to allocate the fib for
  132. *
  133. * Allocate a fib from the adapter fib pool. If the pool is empty we
  134. * return NULL.
  135. */
  136. struct fib *aac_fib_alloc(struct aac_dev *dev)
  137. {
  138. struct fib * fibptr;
  139. unsigned long flags;
  140. spin_lock_irqsave(&dev->fib_lock, flags);
  141. fibptr = dev->free_fib;
  142. if(!fibptr){
  143. spin_unlock_irqrestore(&dev->fib_lock, flags);
  144. return fibptr;
  145. }
  146. dev->free_fib = fibptr->next;
  147. spin_unlock_irqrestore(&dev->fib_lock, flags);
  148. /*
  149. * Set the proper node type code and node byte size
  150. */
  151. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  152. fibptr->size = sizeof(struct fib);
  153. /*
  154. * Null out fields that depend on being zero at the start of
  155. * each I/O
  156. */
  157. fibptr->hw_fib->header.XferState = 0;
  158. fibptr->callback = NULL;
  159. fibptr->callback_data = NULL;
  160. return fibptr;
  161. }
  162. /**
  163. * aac_fib_free - free a fib
  164. * @fibptr: fib to free up
  165. *
  166. * Frees up a fib and places it on the appropriate queue
  167. * (either free or timed out)
  168. */
  169. void aac_fib_free(struct fib *fibptr)
  170. {
  171. unsigned long flags;
  172. spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
  173. if (fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT) {
  174. aac_config.fib_timeouts++;
  175. fibptr->next = fibptr->dev->timeout_fib;
  176. fibptr->dev->timeout_fib = fibptr;
  177. } else {
  178. if (fibptr->hw_fib->header.XferState != 0) {
  179. printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
  180. (void*)fibptr,
  181. le32_to_cpu(fibptr->hw_fib->header.XferState));
  182. }
  183. fibptr->next = fibptr->dev->free_fib;
  184. fibptr->dev->free_fib = fibptr;
  185. }
  186. spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
  187. }
  188. /**
  189. * aac_fib_init - initialise a fib
  190. * @fibptr: The fib to initialize
  191. *
  192. * Set up the generic fib fields ready for use
  193. */
  194. void aac_fib_init(struct fib *fibptr)
  195. {
  196. struct hw_fib *hw_fib = fibptr->hw_fib;
  197. hw_fib->header.StructType = FIB_MAGIC;
  198. hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
  199. hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
  200. hw_fib->header.SenderFibAddress = 0; /* Filled in later if needed */
  201. hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
  202. hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
  203. }
  204. /**
  205. * fib_deallocate - deallocate a fib
  206. * @fibptr: fib to deallocate
  207. *
  208. * Will deallocate and return to the free pool the FIB pointed to by the
  209. * caller.
  210. */
  211. static void fib_dealloc(struct fib * fibptr)
  212. {
  213. struct hw_fib *hw_fib = fibptr->hw_fib;
  214. BUG_ON(hw_fib->header.StructType != FIB_MAGIC);
  215. hw_fib->header.XferState = 0;
  216. }
  217. /*
  218. * Commuication primitives define and support the queuing method we use to
  219. * support host to adapter commuication. All queue accesses happen through
  220. * these routines and are the only routines which have a knowledge of the
  221. * how these queues are implemented.
  222. */
  223. /**
  224. * aac_get_entry - get a queue entry
  225. * @dev: Adapter
  226. * @qid: Queue Number
  227. * @entry: Entry return
  228. * @index: Index return
  229. * @nonotify: notification control
  230. *
  231. * With a priority the routine returns a queue entry if the queue has free entries. If the queue
  232. * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
  233. * returned.
  234. */
  235. static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
  236. {
  237. struct aac_queue * q;
  238. unsigned long idx;
  239. /*
  240. * All of the queues wrap when they reach the end, so we check
  241. * to see if they have reached the end and if they have we just
  242. * set the index back to zero. This is a wrap. You could or off
  243. * the high bits in all updates but this is a bit faster I think.
  244. */
  245. q = &dev->queues->queue[qid];
  246. idx = *index = le32_to_cpu(*(q->headers.producer));
  247. /* Interrupt Moderation, only interrupt for first two entries */
  248. if (idx != le32_to_cpu(*(q->headers.consumer))) {
  249. if (--idx == 0) {
  250. if (qid == AdapNormCmdQueue)
  251. idx = ADAP_NORM_CMD_ENTRIES;
  252. else
  253. idx = ADAP_NORM_RESP_ENTRIES;
  254. }
  255. if (idx != le32_to_cpu(*(q->headers.consumer)))
  256. *nonotify = 1;
  257. }
  258. if (qid == AdapNormCmdQueue) {
  259. if (*index >= ADAP_NORM_CMD_ENTRIES)
  260. *index = 0; /* Wrap to front of the Producer Queue. */
  261. } else {
  262. if (*index >= ADAP_NORM_RESP_ENTRIES)
  263. *index = 0; /* Wrap to front of the Producer Queue. */
  264. }
  265. if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */
  266. printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
  267. qid, q->numpending);
  268. return 0;
  269. } else {
  270. *entry = q->base + *index;
  271. return 1;
  272. }
  273. }
  274. /**
  275. * aac_queue_get - get the next free QE
  276. * @dev: Adapter
  277. * @index: Returned index
  278. * @priority: Priority of fib
  279. * @fib: Fib to associate with the queue entry
  280. * @wait: Wait if queue full
  281. * @fibptr: Driver fib object to go with fib
  282. * @nonotify: Don't notify the adapter
  283. *
  284. * Gets the next free QE off the requested priorty adapter command
  285. * queue and associates the Fib with the QE. The QE represented by
  286. * index is ready to insert on the queue when this routine returns
  287. * success.
  288. */
  289. static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
  290. {
  291. struct aac_entry * entry = NULL;
  292. int map = 0;
  293. if (qid == AdapNormCmdQueue) {
  294. /* if no entries wait for some if caller wants to */
  295. while (!aac_get_entry(dev, qid, &entry, index, nonotify))
  296. {
  297. printk(KERN_ERR "GetEntries failed\n");
  298. }
  299. /*
  300. * Setup queue entry with a command, status and fib mapped
  301. */
  302. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  303. map = 1;
  304. } else {
  305. while(!aac_get_entry(dev, qid, &entry, index, nonotify))
  306. {
  307. /* if no entries wait for some if caller wants to */
  308. }
  309. /*
  310. * Setup queue entry with command, status and fib mapped
  311. */
  312. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  313. entry->addr = hw_fib->header.SenderFibAddress;
  314. /* Restore adapters pointer to the FIB */
  315. hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
  316. map = 0;
  317. }
  318. /*
  319. * If MapFib is true than we need to map the Fib and put pointers
  320. * in the queue entry.
  321. */
  322. if (map)
  323. entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
  324. return 0;
  325. }
  326. /*
  327. * Define the highest level of host to adapter communication routines.
  328. * These routines will support host to adapter FS commuication. These
  329. * routines have no knowledge of the commuication method used. This level
  330. * sends and receives FIBs. This level has no knowledge of how these FIBs
  331. * get passed back and forth.
  332. */
  333. /**
  334. * aac_fib_send - send a fib to the adapter
  335. * @command: Command to send
  336. * @fibptr: The fib
  337. * @size: Size of fib data area
  338. * @priority: Priority of Fib
  339. * @wait: Async/sync select
  340. * @reply: True if a reply is wanted
  341. * @callback: Called with reply
  342. * @callback_data: Passed to callback
  343. *
  344. * Sends the requested FIB to the adapter and optionally will wait for a
  345. * response FIB. If the caller does not wish to wait for a response than
  346. * an event to wait on must be supplied. This event will be set when a
  347. * response FIB is received from the adapter.
  348. */
  349. int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
  350. int priority, int wait, int reply, fib_callback callback,
  351. void *callback_data)
  352. {
  353. struct aac_dev * dev = fibptr->dev;
  354. struct hw_fib * hw_fib = fibptr->hw_fib;
  355. struct aac_queue * q;
  356. unsigned long flags = 0;
  357. unsigned long qflags;
  358. if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
  359. return -EBUSY;
  360. /*
  361. * There are 5 cases with the wait and reponse requested flags.
  362. * The only invalid cases are if the caller requests to wait and
  363. * does not request a response and if the caller does not want a
  364. * response and the Fib is not allocated from pool. If a response
  365. * is not requesed the Fib will just be deallocaed by the DPC
  366. * routine when the response comes back from the adapter. No
  367. * further processing will be done besides deleting the Fib. We
  368. * will have a debug mode where the adapter can notify the host
  369. * it had a problem and the host can log that fact.
  370. */
  371. if (wait && !reply) {
  372. return -EINVAL;
  373. } else if (!wait && reply) {
  374. hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
  375. FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
  376. } else if (!wait && !reply) {
  377. hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
  378. FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
  379. } else if (wait && reply) {
  380. hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
  381. FIB_COUNTER_INCREMENT(aac_config.NormalSent);
  382. }
  383. /*
  384. * Map the fib into 32bits by using the fib number
  385. */
  386. hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
  387. hw_fib->header.SenderData = (u32)(fibptr - dev->fibs);
  388. /*
  389. * Set FIB state to indicate where it came from and if we want a
  390. * response from the adapter. Also load the command from the
  391. * caller.
  392. *
  393. * Map the hw fib pointer as a 32bit value
  394. */
  395. hw_fib->header.Command = cpu_to_le16(command);
  396. hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
  397. fibptr->hw_fib->header.Flags = 0; /* 0 the flags field - internal only*/
  398. /*
  399. * Set the size of the Fib we want to send to the adapter
  400. */
  401. hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
  402. if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
  403. return -EMSGSIZE;
  404. }
  405. /*
  406. * Get a queue entry connect the FIB to it and send an notify
  407. * the adapter a command is ready.
  408. */
  409. hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
  410. /*
  411. * Fill in the Callback and CallbackContext if we are not
  412. * going to wait.
  413. */
  414. if (!wait) {
  415. fibptr->callback = callback;
  416. fibptr->callback_data = callback_data;
  417. }
  418. fibptr->done = 0;
  419. fibptr->flags = 0;
  420. FIB_COUNTER_INCREMENT(aac_config.FibsSent);
  421. dprintk((KERN_DEBUG "Fib contents:.\n"));
  422. dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
  423. dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
  424. dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
  425. dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib));
  426. dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
  427. dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
  428. if (!dev->queues)
  429. return -EBUSY;
  430. q = &dev->queues->queue[AdapNormCmdQueue];
  431. if(wait)
  432. spin_lock_irqsave(&fibptr->event_lock, flags);
  433. spin_lock_irqsave(q->lock, qflags);
  434. if (dev->new_comm_interface) {
  435. unsigned long count = 10000000L; /* 50 seconds */
  436. q->numpending++;
  437. spin_unlock_irqrestore(q->lock, qflags);
  438. while (aac_adapter_send(fibptr) != 0) {
  439. if (--count == 0) {
  440. if (wait)
  441. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  442. spin_lock_irqsave(q->lock, qflags);
  443. q->numpending--;
  444. spin_unlock_irqrestore(q->lock, qflags);
  445. return -ETIMEDOUT;
  446. }
  447. udelay(5);
  448. }
  449. } else {
  450. u32 index;
  451. unsigned long nointr = 0;
  452. aac_queue_get( dev, &index, AdapNormCmdQueue, hw_fib, 1, fibptr, &nointr);
  453. q->numpending++;
  454. *(q->headers.producer) = cpu_to_le32(index + 1);
  455. spin_unlock_irqrestore(q->lock, qflags);
  456. dprintk((KERN_DEBUG "aac_fib_send: inserting a queue entry at index %d.\n",index));
  457. if (!(nointr & aac_config.irq_mod))
  458. aac_adapter_notify(dev, AdapNormCmdQueue);
  459. }
  460. /*
  461. * If the caller wanted us to wait for response wait now.
  462. */
  463. if (wait) {
  464. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  465. /* Only set for first known interruptable command */
  466. if (wait < 0) {
  467. /*
  468. * *VERY* Dangerous to time out a command, the
  469. * assumption is made that we have no hope of
  470. * functioning because an interrupt routing or other
  471. * hardware failure has occurred.
  472. */
  473. unsigned long count = 36000000L; /* 3 minutes */
  474. while (down_trylock(&fibptr->event_wait)) {
  475. if (--count == 0) {
  476. spin_lock_irqsave(q->lock, qflags);
  477. q->numpending--;
  478. spin_unlock_irqrestore(q->lock, qflags);
  479. if (wait == -1) {
  480. printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
  481. "Usually a result of a PCI interrupt routing problem;\n"
  482. "update mother board BIOS or consider utilizing one of\n"
  483. "the SAFE mode kernel options (acpi, apic etc)\n");
  484. }
  485. return -ETIMEDOUT;
  486. }
  487. udelay(5);
  488. }
  489. } else if (down_interruptible(&fibptr->event_wait)) {
  490. spin_lock_irqsave(&fibptr->event_lock, flags);
  491. if (fibptr->done == 0) {
  492. fibptr->done = 2; /* Tell interrupt we aborted */
  493. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  494. return -EINTR;
  495. }
  496. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  497. }
  498. BUG_ON(fibptr->done == 0);
  499. if((fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)){
  500. return -ETIMEDOUT;
  501. } else {
  502. return 0;
  503. }
  504. }
  505. /*
  506. * If the user does not want a response than return success otherwise
  507. * return pending
  508. */
  509. if (reply)
  510. return -EINPROGRESS;
  511. else
  512. return 0;
  513. }
  514. /**
  515. * aac_consumer_get - get the top of the queue
  516. * @dev: Adapter
  517. * @q: Queue
  518. * @entry: Return entry
  519. *
  520. * Will return a pointer to the entry on the top of the queue requested that
  521. * we are a consumer of, and return the address of the queue entry. It does
  522. * not change the state of the queue.
  523. */
  524. int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
  525. {
  526. u32 index;
  527. int status;
  528. if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
  529. status = 0;
  530. } else {
  531. /*
  532. * The consumer index must be wrapped if we have reached
  533. * the end of the queue, else we just use the entry
  534. * pointed to by the header index
  535. */
  536. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  537. index = 0;
  538. else
  539. index = le32_to_cpu(*q->headers.consumer);
  540. *entry = q->base + index;
  541. status = 1;
  542. }
  543. return(status);
  544. }
  545. /**
  546. * aac_consumer_free - free consumer entry
  547. * @dev: Adapter
  548. * @q: Queue
  549. * @qid: Queue ident
  550. *
  551. * Frees up the current top of the queue we are a consumer of. If the
  552. * queue was full notify the producer that the queue is no longer full.
  553. */
  554. void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
  555. {
  556. int wasfull = 0;
  557. u32 notify;
  558. if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
  559. wasfull = 1;
  560. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  561. *q->headers.consumer = cpu_to_le32(1);
  562. else
  563. *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1);
  564. if (wasfull) {
  565. switch (qid) {
  566. case HostNormCmdQueue:
  567. notify = HostNormCmdNotFull;
  568. break;
  569. case HostNormRespQueue:
  570. notify = HostNormRespNotFull;
  571. break;
  572. default:
  573. BUG();
  574. return;
  575. }
  576. aac_adapter_notify(dev, notify);
  577. }
  578. }
  579. /**
  580. * aac_fib_adapter_complete - complete adapter issued fib
  581. * @fibptr: fib to complete
  582. * @size: size of fib
  583. *
  584. * Will do all necessary work to complete a FIB that was sent from
  585. * the adapter.
  586. */
  587. int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
  588. {
  589. struct hw_fib * hw_fib = fibptr->hw_fib;
  590. struct aac_dev * dev = fibptr->dev;
  591. struct aac_queue * q;
  592. unsigned long nointr = 0;
  593. unsigned long qflags;
  594. if (hw_fib->header.XferState == 0) {
  595. if (dev->new_comm_interface)
  596. kfree (hw_fib);
  597. return 0;
  598. }
  599. /*
  600. * If we plan to do anything check the structure type first.
  601. */
  602. if ( hw_fib->header.StructType != FIB_MAGIC ) {
  603. if (dev->new_comm_interface)
  604. kfree (hw_fib);
  605. return -EINVAL;
  606. }
  607. /*
  608. * This block handles the case where the adapter had sent us a
  609. * command and we have finished processing the command. We
  610. * call completeFib when we are done processing the command
  611. * and want to send a response back to the adapter. This will
  612. * send the completed cdb to the adapter.
  613. */
  614. if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
  615. if (dev->new_comm_interface) {
  616. kfree (hw_fib);
  617. } else {
  618. u32 index;
  619. hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
  620. if (size) {
  621. size += sizeof(struct aac_fibhdr);
  622. if (size > le16_to_cpu(hw_fib->header.SenderSize))
  623. return -EMSGSIZE;
  624. hw_fib->header.Size = cpu_to_le16(size);
  625. }
  626. q = &dev->queues->queue[AdapNormRespQueue];
  627. spin_lock_irqsave(q->lock, qflags);
  628. aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
  629. *(q->headers.producer) = cpu_to_le32(index + 1);
  630. spin_unlock_irqrestore(q->lock, qflags);
  631. if (!(nointr & (int)aac_config.irq_mod))
  632. aac_adapter_notify(dev, AdapNormRespQueue);
  633. }
  634. }
  635. else
  636. {
  637. printk(KERN_WARNING "aac_fib_adapter_complete: Unknown xferstate detected.\n");
  638. BUG();
  639. }
  640. return 0;
  641. }
  642. /**
  643. * aac_fib_complete - fib completion handler
  644. * @fib: FIB to complete
  645. *
  646. * Will do all necessary work to complete a FIB.
  647. */
  648. int aac_fib_complete(struct fib *fibptr)
  649. {
  650. struct hw_fib * hw_fib = fibptr->hw_fib;
  651. /*
  652. * Check for a fib which has already been completed
  653. */
  654. if (hw_fib->header.XferState == 0)
  655. return 0;
  656. /*
  657. * If we plan to do anything check the structure type first.
  658. */
  659. if (hw_fib->header.StructType != FIB_MAGIC)
  660. return -EINVAL;
  661. /*
  662. * This block completes a cdb which orginated on the host and we
  663. * just need to deallocate the cdb or reinit it. At this point the
  664. * command is complete that we had sent to the adapter and this
  665. * cdb could be reused.
  666. */
  667. if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
  668. (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
  669. {
  670. fib_dealloc(fibptr);
  671. }
  672. else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
  673. {
  674. /*
  675. * This handles the case when the host has aborted the I/O
  676. * to the adapter because the adapter is not responding
  677. */
  678. fib_dealloc(fibptr);
  679. } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
  680. fib_dealloc(fibptr);
  681. } else {
  682. BUG();
  683. }
  684. return 0;
  685. }
  686. /**
  687. * aac_printf - handle printf from firmware
  688. * @dev: Adapter
  689. * @val: Message info
  690. *
  691. * Print a message passed to us by the controller firmware on the
  692. * Adaptec board
  693. */
  694. void aac_printf(struct aac_dev *dev, u32 val)
  695. {
  696. char *cp = dev->printfbuf;
  697. if (dev->printf_enabled)
  698. {
  699. int length = val & 0xffff;
  700. int level = (val >> 16) & 0xffff;
  701. /*
  702. * The size of the printfbuf is set in port.c
  703. * There is no variable or define for it
  704. */
  705. if (length > 255)
  706. length = 255;
  707. if (cp[length] != 0)
  708. cp[length] = 0;
  709. if (level == LOG_AAC_HIGH_ERROR)
  710. printk(KERN_WARNING "%s:%s", dev->name, cp);
  711. else
  712. printk(KERN_INFO "%s:%s", dev->name, cp);
  713. }
  714. memset(cp, 0, 256);
  715. }
  716. /**
  717. * aac_handle_aif - Handle a message from the firmware
  718. * @dev: Which adapter this fib is from
  719. * @fibptr: Pointer to fibptr from adapter
  720. *
  721. * This routine handles a driver notify fib from the adapter and
  722. * dispatches it to the appropriate routine for handling.
  723. */
  724. #define AIF_SNIFF_TIMEOUT (30*HZ)
  725. static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
  726. {
  727. struct hw_fib * hw_fib = fibptr->hw_fib;
  728. struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
  729. int busy;
  730. u32 container;
  731. struct scsi_device *device;
  732. enum {
  733. NOTHING,
  734. DELETE,
  735. ADD,
  736. CHANGE
  737. } device_config_needed;
  738. /* Sniff for container changes */
  739. if (!dev || !dev->fsa_dev)
  740. return;
  741. container = (u32)-1;
  742. /*
  743. * We have set this up to try and minimize the number of
  744. * re-configures that take place. As a result of this when
  745. * certain AIF's come in we will set a flag waiting for another
  746. * type of AIF before setting the re-config flag.
  747. */
  748. switch (le32_to_cpu(aifcmd->command)) {
  749. case AifCmdDriverNotify:
  750. switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
  751. /*
  752. * Morph or Expand complete
  753. */
  754. case AifDenMorphComplete:
  755. case AifDenVolumeExtendComplete:
  756. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  757. if (container >= dev->maximum_num_containers)
  758. break;
  759. /*
  760. * Find the scsi_device associated with the SCSI
  761. * address. Make sure we have the right array, and if
  762. * so set the flag to initiate a new re-config once we
  763. * see an AifEnConfigChange AIF come through.
  764. */
  765. if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
  766. device = scsi_device_lookup(dev->scsi_host_ptr,
  767. CONTAINER_TO_CHANNEL(container),
  768. CONTAINER_TO_ID(container),
  769. CONTAINER_TO_LUN(container));
  770. if (device) {
  771. dev->fsa_dev[container].config_needed = CHANGE;
  772. dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
  773. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  774. scsi_device_put(device);
  775. }
  776. }
  777. }
  778. /*
  779. * If we are waiting on something and this happens to be
  780. * that thing then set the re-configure flag.
  781. */
  782. if (container != (u32)-1) {
  783. if (container >= dev->maximum_num_containers)
  784. break;
  785. if ((dev->fsa_dev[container].config_waiting_on ==
  786. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  787. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  788. dev->fsa_dev[container].config_waiting_on = 0;
  789. } else for (container = 0;
  790. container < dev->maximum_num_containers; ++container) {
  791. if ((dev->fsa_dev[container].config_waiting_on ==
  792. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  793. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  794. dev->fsa_dev[container].config_waiting_on = 0;
  795. }
  796. break;
  797. case AifCmdEventNotify:
  798. switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
  799. /*
  800. * Add an Array.
  801. */
  802. case AifEnAddContainer:
  803. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  804. if (container >= dev->maximum_num_containers)
  805. break;
  806. dev->fsa_dev[container].config_needed = ADD;
  807. dev->fsa_dev[container].config_waiting_on =
  808. AifEnConfigChange;
  809. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  810. break;
  811. /*
  812. * Delete an Array.
  813. */
  814. case AifEnDeleteContainer:
  815. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  816. if (container >= dev->maximum_num_containers)
  817. break;
  818. dev->fsa_dev[container].config_needed = DELETE;
  819. dev->fsa_dev[container].config_waiting_on =
  820. AifEnConfigChange;
  821. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  822. break;
  823. /*
  824. * Container change detected. If we currently are not
  825. * waiting on something else, setup to wait on a Config Change.
  826. */
  827. case AifEnContainerChange:
  828. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  829. if (container >= dev->maximum_num_containers)
  830. break;
  831. if (dev->fsa_dev[container].config_waiting_on &&
  832. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  833. break;
  834. dev->fsa_dev[container].config_needed = CHANGE;
  835. dev->fsa_dev[container].config_waiting_on =
  836. AifEnConfigChange;
  837. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  838. break;
  839. case AifEnConfigChange:
  840. break;
  841. }
  842. /*
  843. * If we are waiting on something and this happens to be
  844. * that thing then set the re-configure flag.
  845. */
  846. if (container != (u32)-1) {
  847. if (container >= dev->maximum_num_containers)
  848. break;
  849. if ((dev->fsa_dev[container].config_waiting_on ==
  850. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  851. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  852. dev->fsa_dev[container].config_waiting_on = 0;
  853. } else for (container = 0;
  854. container < dev->maximum_num_containers; ++container) {
  855. if ((dev->fsa_dev[container].config_waiting_on ==
  856. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  857. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  858. dev->fsa_dev[container].config_waiting_on = 0;
  859. }
  860. break;
  861. case AifCmdJobProgress:
  862. /*
  863. * These are job progress AIF's. When a Clear is being
  864. * done on a container it is initially created then hidden from
  865. * the OS. When the clear completes we don't get a config
  866. * change so we monitor the job status complete on a clear then
  867. * wait for a container change.
  868. */
  869. if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
  870. && ((((u32 *)aifcmd->data)[6] == ((u32 *)aifcmd->data)[5])
  871. || (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess)))) {
  872. for (container = 0;
  873. container < dev->maximum_num_containers;
  874. ++container) {
  875. /*
  876. * Stomp on all config sequencing for all
  877. * containers?
  878. */
  879. dev->fsa_dev[container].config_waiting_on =
  880. AifEnContainerChange;
  881. dev->fsa_dev[container].config_needed = ADD;
  882. dev->fsa_dev[container].config_waiting_stamp =
  883. jiffies;
  884. }
  885. }
  886. if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
  887. && (((u32 *)aifcmd->data)[6] == 0)
  888. && (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning))) {
  889. for (container = 0;
  890. container < dev->maximum_num_containers;
  891. ++container) {
  892. /*
  893. * Stomp on all config sequencing for all
  894. * containers?
  895. */
  896. dev->fsa_dev[container].config_waiting_on =
  897. AifEnContainerChange;
  898. dev->fsa_dev[container].config_needed = DELETE;
  899. dev->fsa_dev[container].config_waiting_stamp =
  900. jiffies;
  901. }
  902. }
  903. break;
  904. }
  905. device_config_needed = NOTHING;
  906. for (container = 0; container < dev->maximum_num_containers;
  907. ++container) {
  908. if ((dev->fsa_dev[container].config_waiting_on == 0) &&
  909. (dev->fsa_dev[container].config_needed != NOTHING) &&
  910. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
  911. device_config_needed =
  912. dev->fsa_dev[container].config_needed;
  913. dev->fsa_dev[container].config_needed = NOTHING;
  914. break;
  915. }
  916. }
  917. if (device_config_needed == NOTHING)
  918. return;
  919. /*
  920. * If we decided that a re-configuration needs to be done,
  921. * schedule it here on the way out the door, please close the door
  922. * behind you.
  923. */
  924. busy = 0;
  925. /*
  926. * Find the scsi_device associated with the SCSI address,
  927. * and mark it as changed, invalidating the cache. This deals
  928. * with changes to existing device IDs.
  929. */
  930. if (!dev || !dev->scsi_host_ptr)
  931. return;
  932. /*
  933. * force reload of disk info via aac_probe_container
  934. */
  935. if ((device_config_needed == CHANGE)
  936. && (dev->fsa_dev[container].valid == 1))
  937. dev->fsa_dev[container].valid = 2;
  938. if ((device_config_needed == CHANGE) ||
  939. (device_config_needed == ADD))
  940. aac_probe_container(dev, container);
  941. device = scsi_device_lookup(dev->scsi_host_ptr,
  942. CONTAINER_TO_CHANNEL(container),
  943. CONTAINER_TO_ID(container),
  944. CONTAINER_TO_LUN(container));
  945. if (device) {
  946. switch (device_config_needed) {
  947. case DELETE:
  948. case CHANGE:
  949. scsi_rescan_device(&device->sdev_gendev);
  950. default:
  951. break;
  952. }
  953. scsi_device_put(device);
  954. }
  955. if (device_config_needed == ADD) {
  956. scsi_add_device(dev->scsi_host_ptr,
  957. CONTAINER_TO_CHANNEL(container),
  958. CONTAINER_TO_ID(container),
  959. CONTAINER_TO_LUN(container));
  960. }
  961. }
  962. static int _aac_reset_adapter(struct aac_dev *aac)
  963. {
  964. int index, quirks;
  965. u32 ret;
  966. int retval;
  967. struct Scsi_Host *host;
  968. struct scsi_device *dev;
  969. struct scsi_cmnd *command;
  970. struct scsi_cmnd *command_list;
  971. /*
  972. * Assumptions:
  973. * - host is locked.
  974. * - in_reset is asserted, so no new i/o is getting to the
  975. * card.
  976. * - The card is dead.
  977. */
  978. host = aac->scsi_host_ptr;
  979. scsi_block_requests(host);
  980. aac_adapter_disable_int(aac);
  981. spin_unlock_irq(host->host_lock);
  982. kthread_stop(aac->thread);
  983. /*
  984. * If a positive health, means in a known DEAD PANIC
  985. * state and the adapter could be reset to `try again'.
  986. */
  987. retval = aac_adapter_check_health(aac);
  988. if (retval == 0)
  989. retval = aac_adapter_sync_cmd(aac, IOP_RESET_ALWAYS,
  990. 0, 0, 0, 0, 0, 0, &ret, NULL, NULL, NULL, NULL);
  991. if (retval)
  992. retval = aac_adapter_sync_cmd(aac, IOP_RESET,
  993. 0, 0, 0, 0, 0, 0, &ret, NULL, NULL, NULL, NULL);
  994. if (retval)
  995. goto out;
  996. if (ret != 0x00000001) {
  997. retval = -ENODEV;
  998. goto out;
  999. }
  1000. index = aac->cardtype;
  1001. /*
  1002. * Re-initialize the adapter, first free resources, then carefully
  1003. * apply the initialization sequence to come back again. Only risk
  1004. * is a change in Firmware dropping cache, it is assumed the caller
  1005. * will ensure that i/o is queisced and the card is flushed in that
  1006. * case.
  1007. */
  1008. aac_fib_map_free(aac);
  1009. aac->hw_fib_va = NULL;
  1010. aac->hw_fib_pa = 0;
  1011. pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
  1012. aac->comm_addr = NULL;
  1013. aac->comm_phys = 0;
  1014. kfree(aac->queues);
  1015. aac->queues = NULL;
  1016. free_irq(aac->pdev->irq, aac);
  1017. kfree(aac->fsa_dev);
  1018. aac->fsa_dev = NULL;
  1019. if (aac_get_driver_ident(index)->quirks & AAC_QUIRK_31BIT) {
  1020. if (((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK))) ||
  1021. ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_32BIT_MASK))))
  1022. goto out;
  1023. } else {
  1024. if (((retval = pci_set_dma_mask(aac->pdev, 0x7FFFFFFFULL))) ||
  1025. ((retval = pci_set_consistent_dma_mask(aac->pdev, 0x7FFFFFFFULL))))
  1026. goto out;
  1027. }
  1028. if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
  1029. goto out;
  1030. if (aac_get_driver_ident(index)->quirks & AAC_QUIRK_31BIT)
  1031. if ((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK)))
  1032. goto out;
  1033. aac->thread = kthread_run(aac_command_thread, aac, aac->name);
  1034. if (IS_ERR(aac->thread)) {
  1035. retval = PTR_ERR(aac->thread);
  1036. goto out;
  1037. }
  1038. (void)aac_get_adapter_info(aac);
  1039. quirks = aac_get_driver_ident(index)->quirks;
  1040. if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
  1041. host->sg_tablesize = 34;
  1042. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1043. }
  1044. if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
  1045. host->sg_tablesize = 17;
  1046. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1047. }
  1048. aac_get_config_status(aac, 1);
  1049. aac_get_containers(aac);
  1050. /*
  1051. * This is where the assumption that the Adapter is quiesced
  1052. * is important.
  1053. */
  1054. command_list = NULL;
  1055. __shost_for_each_device(dev, host) {
  1056. unsigned long flags;
  1057. spin_lock_irqsave(&dev->list_lock, flags);
  1058. list_for_each_entry(command, &dev->cmd_list, list)
  1059. if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
  1060. command->SCp.buffer = (struct scatterlist *)command_list;
  1061. command_list = command;
  1062. }
  1063. spin_unlock_irqrestore(&dev->list_lock, flags);
  1064. }
  1065. while ((command = command_list)) {
  1066. command_list = (struct scsi_cmnd *)command->SCp.buffer;
  1067. command->SCp.buffer = NULL;
  1068. command->result = DID_OK << 16
  1069. | COMMAND_COMPLETE << 8
  1070. | SAM_STAT_TASK_SET_FULL;
  1071. command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
  1072. command->scsi_done(command);
  1073. }
  1074. retval = 0;
  1075. out:
  1076. aac->in_reset = 0;
  1077. scsi_unblock_requests(host);
  1078. spin_lock_irq(host->host_lock);
  1079. return retval;
  1080. }
  1081. int aac_check_health(struct aac_dev * aac)
  1082. {
  1083. int BlinkLED;
  1084. unsigned long time_now, flagv = 0;
  1085. struct list_head * entry;
  1086. struct Scsi_Host * host;
  1087. /* Extending the scope of fib_lock slightly to protect aac->in_reset */
  1088. if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
  1089. return 0;
  1090. if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
  1091. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1092. return 0; /* OK */
  1093. }
  1094. aac->in_reset = 1;
  1095. /* Fake up an AIF:
  1096. * aac_aifcmd.command = AifCmdEventNotify = 1
  1097. * aac_aifcmd.seqnum = 0xFFFFFFFF
  1098. * aac_aifcmd.data[0] = AifEnExpEvent = 23
  1099. * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
  1100. * aac.aifcmd.data[2] = AifHighPriority = 3
  1101. * aac.aifcmd.data[3] = BlinkLED
  1102. */
  1103. time_now = jiffies/HZ;
  1104. entry = aac->fib_list.next;
  1105. /*
  1106. * For each Context that is on the
  1107. * fibctxList, make a copy of the
  1108. * fib, and then set the event to wake up the
  1109. * thread that is waiting for it.
  1110. */
  1111. while (entry != &aac->fib_list) {
  1112. /*
  1113. * Extract the fibctx
  1114. */
  1115. struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
  1116. struct hw_fib * hw_fib;
  1117. struct fib * fib;
  1118. /*
  1119. * Check if the queue is getting
  1120. * backlogged
  1121. */
  1122. if (fibctx->count > 20) {
  1123. /*
  1124. * It's *not* jiffies folks,
  1125. * but jiffies / HZ, so do not
  1126. * panic ...
  1127. */
  1128. u32 time_last = fibctx->jiffies;
  1129. /*
  1130. * Has it been > 2 minutes
  1131. * since the last read off
  1132. * the queue?
  1133. */
  1134. if ((time_now - time_last) > aif_timeout) {
  1135. entry = entry->next;
  1136. aac_close_fib_context(aac, fibctx);
  1137. continue;
  1138. }
  1139. }
  1140. /*
  1141. * Warning: no sleep allowed while
  1142. * holding spinlock
  1143. */
  1144. hw_fib = kmalloc(sizeof(struct hw_fib), GFP_ATOMIC);
  1145. fib = kmalloc(sizeof(struct fib), GFP_ATOMIC);
  1146. if (fib && hw_fib) {
  1147. struct aac_aifcmd * aif;
  1148. memset(hw_fib, 0, sizeof(struct hw_fib));
  1149. memset(fib, 0, sizeof(struct fib));
  1150. fib->hw_fib = hw_fib;
  1151. fib->dev = aac;
  1152. aac_fib_init(fib);
  1153. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1154. fib->size = sizeof (struct fib);
  1155. fib->data = hw_fib->data;
  1156. aif = (struct aac_aifcmd *)hw_fib->data;
  1157. aif->command = cpu_to_le32(AifCmdEventNotify);
  1158. aif->seqnum = cpu_to_le32(0xFFFFFFFF);
  1159. aif->data[0] = cpu_to_le32(AifEnExpEvent);
  1160. aif->data[1] = cpu_to_le32(AifExeFirmwarePanic);
  1161. aif->data[2] = cpu_to_le32(AifHighPriority);
  1162. aif->data[3] = cpu_to_le32(BlinkLED);
  1163. /*
  1164. * Put the FIB onto the
  1165. * fibctx's fibs
  1166. */
  1167. list_add_tail(&fib->fiblink, &fibctx->fib_list);
  1168. fibctx->count++;
  1169. /*
  1170. * Set the event to wake up the
  1171. * thread that will waiting.
  1172. */
  1173. up(&fibctx->wait_sem);
  1174. } else {
  1175. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1176. kfree(fib);
  1177. kfree(hw_fib);
  1178. }
  1179. entry = entry->next;
  1180. }
  1181. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1182. if (BlinkLED < 0) {
  1183. printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
  1184. goto out;
  1185. }
  1186. printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
  1187. host = aac->scsi_host_ptr;
  1188. spin_lock_irqsave(host->host_lock, flagv);
  1189. BlinkLED = _aac_reset_adapter(aac);
  1190. spin_unlock_irqrestore(host->host_lock, flagv);
  1191. return BlinkLED;
  1192. out:
  1193. aac->in_reset = 0;
  1194. return BlinkLED;
  1195. }
  1196. /**
  1197. * aac_command_thread - command processing thread
  1198. * @dev: Adapter to monitor
  1199. *
  1200. * Waits on the commandready event in it's queue. When the event gets set
  1201. * it will pull FIBs off it's queue. It will continue to pull FIBs off
  1202. * until the queue is empty. When the queue is empty it will wait for
  1203. * more FIBs.
  1204. */
  1205. int aac_command_thread(void *data)
  1206. {
  1207. struct aac_dev *dev = data;
  1208. struct hw_fib *hw_fib, *hw_newfib;
  1209. struct fib *fib, *newfib;
  1210. struct aac_fib_context *fibctx;
  1211. unsigned long flags;
  1212. DECLARE_WAITQUEUE(wait, current);
  1213. /*
  1214. * We can only have one thread per adapter for AIF's.
  1215. */
  1216. if (dev->aif_thread)
  1217. return -EINVAL;
  1218. /*
  1219. * Let the DPC know it has a place to send the AIF's to.
  1220. */
  1221. dev->aif_thread = 1;
  1222. add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1223. set_current_state(TASK_INTERRUPTIBLE);
  1224. dprintk ((KERN_INFO "aac_command_thread start\n"));
  1225. while(1)
  1226. {
  1227. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1228. while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
  1229. struct list_head *entry;
  1230. struct aac_aifcmd * aifcmd;
  1231. set_current_state(TASK_RUNNING);
  1232. entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
  1233. list_del(entry);
  1234. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1235. fib = list_entry(entry, struct fib, fiblink);
  1236. /*
  1237. * We will process the FIB here or pass it to a
  1238. * worker thread that is TBD. We Really can't
  1239. * do anything at this point since we don't have
  1240. * anything defined for this thread to do.
  1241. */
  1242. hw_fib = fib->hw_fib;
  1243. memset(fib, 0, sizeof(struct fib));
  1244. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1245. fib->size = sizeof( struct fib );
  1246. fib->hw_fib = hw_fib;
  1247. fib->data = hw_fib->data;
  1248. fib->dev = dev;
  1249. /*
  1250. * We only handle AifRequest fibs from the adapter.
  1251. */
  1252. aifcmd = (struct aac_aifcmd *) hw_fib->data;
  1253. if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
  1254. /* Handle Driver Notify Events */
  1255. aac_handle_aif(dev, fib);
  1256. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1257. aac_fib_adapter_complete(fib, (u16)sizeof(u32));
  1258. } else {
  1259. struct list_head *entry;
  1260. /* The u32 here is important and intended. We are using
  1261. 32bit wrapping time to fit the adapter field */
  1262. u32 time_now, time_last;
  1263. unsigned long flagv;
  1264. unsigned num;
  1265. struct hw_fib ** hw_fib_pool, ** hw_fib_p;
  1266. struct fib ** fib_pool, ** fib_p;
  1267. /* Sniff events */
  1268. if ((aifcmd->command ==
  1269. cpu_to_le32(AifCmdEventNotify)) ||
  1270. (aifcmd->command ==
  1271. cpu_to_le32(AifCmdJobProgress))) {
  1272. aac_handle_aif(dev, fib);
  1273. }
  1274. time_now = jiffies/HZ;
  1275. /*
  1276. * Warning: no sleep allowed while
  1277. * holding spinlock. We take the estimate
  1278. * and pre-allocate a set of fibs outside the
  1279. * lock.
  1280. */
  1281. num = le32_to_cpu(dev->init->AdapterFibsSize)
  1282. / sizeof(struct hw_fib); /* some extra */
  1283. spin_lock_irqsave(&dev->fib_lock, flagv);
  1284. entry = dev->fib_list.next;
  1285. while (entry != &dev->fib_list) {
  1286. entry = entry->next;
  1287. ++num;
  1288. }
  1289. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1290. hw_fib_pool = NULL;
  1291. fib_pool = NULL;
  1292. if (num
  1293. && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
  1294. && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
  1295. hw_fib_p = hw_fib_pool;
  1296. fib_p = fib_pool;
  1297. while (hw_fib_p < &hw_fib_pool[num]) {
  1298. if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
  1299. --hw_fib_p;
  1300. break;
  1301. }
  1302. if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
  1303. kfree(*(--hw_fib_p));
  1304. break;
  1305. }
  1306. }
  1307. if ((num = hw_fib_p - hw_fib_pool) == 0) {
  1308. kfree(fib_pool);
  1309. fib_pool = NULL;
  1310. kfree(hw_fib_pool);
  1311. hw_fib_pool = NULL;
  1312. }
  1313. } else {
  1314. kfree(hw_fib_pool);
  1315. hw_fib_pool = NULL;
  1316. }
  1317. spin_lock_irqsave(&dev->fib_lock, flagv);
  1318. entry = dev->fib_list.next;
  1319. /*
  1320. * For each Context that is on the
  1321. * fibctxList, make a copy of the
  1322. * fib, and then set the event to wake up the
  1323. * thread that is waiting for it.
  1324. */
  1325. hw_fib_p = hw_fib_pool;
  1326. fib_p = fib_pool;
  1327. while (entry != &dev->fib_list) {
  1328. /*
  1329. * Extract the fibctx
  1330. */
  1331. fibctx = list_entry(entry, struct aac_fib_context, next);
  1332. /*
  1333. * Check if the queue is getting
  1334. * backlogged
  1335. */
  1336. if (fibctx->count > 20)
  1337. {
  1338. /*
  1339. * It's *not* jiffies folks,
  1340. * but jiffies / HZ so do not
  1341. * panic ...
  1342. */
  1343. time_last = fibctx->jiffies;
  1344. /*
  1345. * Has it been > 2 minutes
  1346. * since the last read off
  1347. * the queue?
  1348. */
  1349. if ((time_now - time_last) > aif_timeout) {
  1350. entry = entry->next;
  1351. aac_close_fib_context(dev, fibctx);
  1352. continue;
  1353. }
  1354. }
  1355. /*
  1356. * Warning: no sleep allowed while
  1357. * holding spinlock
  1358. */
  1359. if (hw_fib_p < &hw_fib_pool[num]) {
  1360. hw_newfib = *hw_fib_p;
  1361. *(hw_fib_p++) = NULL;
  1362. newfib = *fib_p;
  1363. *(fib_p++) = NULL;
  1364. /*
  1365. * Make the copy of the FIB
  1366. */
  1367. memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
  1368. memcpy(newfib, fib, sizeof(struct fib));
  1369. newfib->hw_fib = hw_newfib;
  1370. /*
  1371. * Put the FIB onto the
  1372. * fibctx's fibs
  1373. */
  1374. list_add_tail(&newfib->fiblink, &fibctx->fib_list);
  1375. fibctx->count++;
  1376. /*
  1377. * Set the event to wake up the
  1378. * thread that is waiting.
  1379. */
  1380. up(&fibctx->wait_sem);
  1381. } else {
  1382. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1383. }
  1384. entry = entry->next;
  1385. }
  1386. /*
  1387. * Set the status of this FIB
  1388. */
  1389. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1390. aac_fib_adapter_complete(fib, sizeof(u32));
  1391. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1392. /* Free up the remaining resources */
  1393. hw_fib_p = hw_fib_pool;
  1394. fib_p = fib_pool;
  1395. while (hw_fib_p < &hw_fib_pool[num]) {
  1396. kfree(*hw_fib_p);
  1397. kfree(*fib_p);
  1398. ++fib_p;
  1399. ++hw_fib_p;
  1400. }
  1401. kfree(hw_fib_pool);
  1402. kfree(fib_pool);
  1403. }
  1404. kfree(fib);
  1405. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1406. }
  1407. /*
  1408. * There are no more AIF's
  1409. */
  1410. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1411. schedule();
  1412. if (kthread_should_stop())
  1413. break;
  1414. set_current_state(TASK_INTERRUPTIBLE);
  1415. }
  1416. if (dev->queues)
  1417. remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1418. dev->aif_thread = 0;
  1419. return 0;
  1420. }