cpqphp_core.c 38 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. *
  30. */
  31. #include <linux/module.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/kernel.h>
  34. #include <linux/types.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/slab.h>
  37. #include <linux/workqueue.h>
  38. #include <linux/pci.h>
  39. #include <linux/init.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include "cpqphp.h"
  43. #include "cpqphp_nvram.h"
  44. #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  45. /* Global variables */
  46. int cpqhp_debug;
  47. int cpqhp_legacy_mode;
  48. struct controller *cpqhp_ctrl_list; /* = NULL */
  49. struct pci_func *cpqhp_slot_list[256];
  50. /* local variables */
  51. static void __iomem *smbios_table;
  52. static void __iomem *smbios_start;
  53. static void __iomem *cpqhp_rom_start;
  54. static int power_mode;
  55. static int debug;
  56. static int initialized;
  57. #define DRIVER_VERSION "0.9.8"
  58. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  59. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  60. MODULE_AUTHOR(DRIVER_AUTHOR);
  61. MODULE_DESCRIPTION(DRIVER_DESC);
  62. MODULE_LICENSE("GPL");
  63. module_param(power_mode, bool, 0644);
  64. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  65. module_param(debug, bool, 0644);
  66. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  67. #define CPQHPC_MODULE_MINOR 208
  68. static int one_time_init (void);
  69. static int set_attention_status (struct hotplug_slot *slot, u8 value);
  70. static int process_SI (struct hotplug_slot *slot);
  71. static int process_SS (struct hotplug_slot *slot);
  72. static int hardware_test (struct hotplug_slot *slot, u32 value);
  73. static int get_power_status (struct hotplug_slot *slot, u8 *value);
  74. static int get_attention_status (struct hotplug_slot *slot, u8 *value);
  75. static int get_latch_status (struct hotplug_slot *slot, u8 *value);
  76. static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
  77. static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  78. static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  79. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  80. .owner = THIS_MODULE,
  81. .set_attention_status = set_attention_status,
  82. .enable_slot = process_SI,
  83. .disable_slot = process_SS,
  84. .hardware_test = hardware_test,
  85. .get_power_status = get_power_status,
  86. .get_attention_status = get_attention_status,
  87. .get_latch_status = get_latch_status,
  88. .get_adapter_status = get_adapter_status,
  89. .get_max_bus_speed = get_max_bus_speed,
  90. .get_cur_bus_speed = get_cur_bus_speed,
  91. };
  92. static inline int is_slot64bit(struct slot *slot)
  93. {
  94. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  95. }
  96. static inline int is_slot66mhz(struct slot *slot)
  97. {
  98. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  99. }
  100. /**
  101. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  102. *
  103. * @begin: begin pointer for region to be scanned.
  104. * @end: end pointer for region to be scanned.
  105. *
  106. * Returns pointer to the head of the SMBIOS tables (or NULL)
  107. *
  108. */
  109. static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  110. {
  111. void __iomem *fp;
  112. void __iomem *endp;
  113. u8 temp1, temp2, temp3, temp4;
  114. int status = 0;
  115. endp = (end - sizeof(u32) + 1);
  116. for (fp = begin; fp <= endp; fp += 16) {
  117. temp1 = readb(fp);
  118. temp2 = readb(fp+1);
  119. temp3 = readb(fp+2);
  120. temp4 = readb(fp+3);
  121. if (temp1 == '_' &&
  122. temp2 == 'S' &&
  123. temp3 == 'M' &&
  124. temp4 == '_') {
  125. status = 1;
  126. break;
  127. }
  128. }
  129. if (!status)
  130. fp = NULL;
  131. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  132. return fp;
  133. }
  134. /**
  135. * init_SERR - Initializes the per slot SERR generation.
  136. *
  137. * For unexpected switch opens
  138. *
  139. */
  140. static int init_SERR(struct controller * ctrl)
  141. {
  142. u32 tempdword;
  143. u32 number_of_slots;
  144. u8 physical_slot;
  145. if (!ctrl)
  146. return 1;
  147. tempdword = ctrl->first_slot;
  148. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  149. // Loop through slots
  150. while (number_of_slots) {
  151. physical_slot = tempdword;
  152. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  153. tempdword++;
  154. number_of_slots--;
  155. }
  156. return 0;
  157. }
  158. /* nice debugging output */
  159. static int pci_print_IRQ_route (void)
  160. {
  161. struct irq_routing_table *routing_table;
  162. int len;
  163. int loop;
  164. u8 tbus, tdevice, tslot;
  165. routing_table = pcibios_get_irq_routing_table();
  166. if (routing_table == NULL) {
  167. err("No BIOS Routing Table??? Not good\n");
  168. return -ENOMEM;
  169. }
  170. len = (routing_table->size - sizeof(struct irq_routing_table)) /
  171. sizeof(struct irq_info);
  172. // Make sure I got at least one entry
  173. if (len == 0) {
  174. kfree(routing_table);
  175. return -1;
  176. }
  177. dbg("bus dev func slot\n");
  178. for (loop = 0; loop < len; ++loop) {
  179. tbus = routing_table->slots[loop].bus;
  180. tdevice = routing_table->slots[loop].devfn;
  181. tslot = routing_table->slots[loop].slot;
  182. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  183. }
  184. kfree(routing_table);
  185. return 0;
  186. }
  187. /**
  188. * get_subsequent_smbios_entry: get the next entry from bios table.
  189. *
  190. * Gets the first entry if previous == NULL
  191. * Otherwise, returns the next entry
  192. * Uses global SMBIOS Table pointer
  193. *
  194. * @curr: %NULL or pointer to previously returned structure
  195. *
  196. * returns a pointer to an SMBIOS structure or NULL if none found
  197. */
  198. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  199. void __iomem *smbios_table,
  200. void __iomem *curr)
  201. {
  202. u8 bail = 0;
  203. u8 previous_byte = 1;
  204. void __iomem *p_temp;
  205. void __iomem *p_max;
  206. if (!smbios_table || !curr)
  207. return(NULL);
  208. // set p_max to the end of the table
  209. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  210. p_temp = curr;
  211. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  212. while ((p_temp < p_max) && !bail) {
  213. /* Look for the double NULL terminator
  214. * The first condition is the previous byte
  215. * and the second is the curr */
  216. if (!previous_byte && !(readb(p_temp))) {
  217. bail = 1;
  218. }
  219. previous_byte = readb(p_temp);
  220. p_temp++;
  221. }
  222. if (p_temp < p_max) {
  223. return p_temp;
  224. } else {
  225. return NULL;
  226. }
  227. }
  228. /**
  229. * get_SMBIOS_entry
  230. *
  231. * @type:SMBIOS structure type to be returned
  232. * @previous: %NULL or pointer to previously returned structure
  233. *
  234. * Gets the first entry of the specified type if previous == NULL
  235. * Otherwise, returns the next entry of the given type.
  236. * Uses global SMBIOS Table pointer
  237. * Uses get_subsequent_smbios_entry
  238. *
  239. * returns a pointer to an SMBIOS structure or %NULL if none found
  240. */
  241. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  242. void __iomem *smbios_table,
  243. u8 type,
  244. void __iomem *previous)
  245. {
  246. if (!smbios_table)
  247. return NULL;
  248. if (!previous) {
  249. previous = smbios_start;
  250. } else {
  251. previous = get_subsequent_smbios_entry(smbios_start,
  252. smbios_table, previous);
  253. }
  254. while (previous) {
  255. if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
  256. previous = get_subsequent_smbios_entry(smbios_start,
  257. smbios_table, previous);
  258. } else {
  259. break;
  260. }
  261. }
  262. return previous;
  263. }
  264. static void release_slot(struct hotplug_slot *hotplug_slot)
  265. {
  266. struct slot *slot = hotplug_slot->private;
  267. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  268. kfree(slot->hotplug_slot->info);
  269. kfree(slot->hotplug_slot->name);
  270. kfree(slot->hotplug_slot);
  271. kfree(slot);
  272. }
  273. static int ctrl_slot_setup(struct controller *ctrl,
  274. void __iomem *smbios_start,
  275. void __iomem *smbios_table)
  276. {
  277. struct slot *slot;
  278. struct hotplug_slot *hotplug_slot;
  279. struct hotplug_slot_info *hotplug_slot_info;
  280. u8 number_of_slots;
  281. u8 slot_device;
  282. u8 slot_number;
  283. u8 ctrl_slot;
  284. u32 tempdword;
  285. void __iomem *slot_entry= NULL;
  286. int result = -ENOMEM;
  287. dbg("%s\n", __FUNCTION__);
  288. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  289. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  290. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  291. slot_number = ctrl->first_slot;
  292. while (number_of_slots) {
  293. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  294. if (!slot)
  295. goto error;
  296. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  297. GFP_KERNEL);
  298. if (!slot->hotplug_slot)
  299. goto error_slot;
  300. hotplug_slot = slot->hotplug_slot;
  301. hotplug_slot->info =
  302. kzalloc(sizeof(*(hotplug_slot->info)),
  303. GFP_KERNEL);
  304. if (!hotplug_slot->info)
  305. goto error_hpslot;
  306. hotplug_slot_info = hotplug_slot->info;
  307. hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
  308. if (!hotplug_slot->name)
  309. goto error_info;
  310. slot->ctrl = ctrl;
  311. slot->bus = ctrl->bus;
  312. slot->device = slot_device;
  313. slot->number = slot_number;
  314. dbg("slot->number = %d\n", slot->number);
  315. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  316. slot_entry);
  317. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  318. slot->number)) {
  319. slot_entry = get_SMBIOS_entry(smbios_start,
  320. smbios_table, 9, slot_entry);
  321. }
  322. slot->p_sm_slot = slot_entry;
  323. init_timer(&slot->task_event);
  324. slot->task_event.expires = jiffies + 5 * HZ;
  325. slot->task_event.function = cpqhp_pushbutton_thread;
  326. //FIXME: these capabilities aren't used but if they are
  327. // they need to be correctly implemented
  328. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  329. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  330. if (is_slot64bit(slot))
  331. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  332. if (is_slot66mhz(slot))
  333. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  334. if (ctrl->speed == PCI_SPEED_66MHz)
  335. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  336. ctrl_slot =
  337. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  338. // Check presence
  339. slot->capabilities |=
  340. ((((~tempdword) >> 23) |
  341. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  342. // Check the switch state
  343. slot->capabilities |=
  344. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  345. // Check the slot enable
  346. slot->capabilities |=
  347. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  348. /* register this slot with the hotplug pci core */
  349. hotplug_slot->release = &release_slot;
  350. hotplug_slot->private = slot;
  351. make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot);
  352. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  353. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  354. hotplug_slot_info->attention_status =
  355. cpq_get_attention_status(ctrl, slot);
  356. hotplug_slot_info->latch_status =
  357. cpq_get_latch_status(ctrl, slot);
  358. hotplug_slot_info->adapter_status =
  359. get_presence_status(ctrl, slot);
  360. dbg("registering bus %d, dev %d, number %d, "
  361. "ctrl->slot_device_offset %d, slot %d\n",
  362. slot->bus, slot->device,
  363. slot->number, ctrl->slot_device_offset,
  364. slot_number);
  365. result = pci_hp_register(hotplug_slot);
  366. if (result) {
  367. err("pci_hp_register failed with error %d\n", result);
  368. goto error_name;
  369. }
  370. slot->next = ctrl->slot;
  371. ctrl->slot = slot;
  372. number_of_slots--;
  373. slot_device++;
  374. slot_number++;
  375. }
  376. return 0;
  377. error_name:
  378. kfree(hotplug_slot->name);
  379. error_info:
  380. kfree(hotplug_slot_info);
  381. error_hpslot:
  382. kfree(hotplug_slot);
  383. error_slot:
  384. kfree(slot);
  385. error:
  386. return result;
  387. }
  388. static int ctrl_slot_cleanup (struct controller * ctrl)
  389. {
  390. struct slot *old_slot, *next_slot;
  391. old_slot = ctrl->slot;
  392. ctrl->slot = NULL;
  393. while (old_slot) {
  394. /* memory will be freed by the release_slot callback */
  395. next_slot = old_slot->next;
  396. pci_hp_deregister (old_slot->hotplug_slot);
  397. old_slot = next_slot;
  398. }
  399. cpqhp_remove_debugfs_files(ctrl);
  400. //Free IRQ associated with hot plug device
  401. free_irq(ctrl->interrupt, ctrl);
  402. //Unmap the memory
  403. iounmap(ctrl->hpc_reg);
  404. //Finally reclaim PCI mem
  405. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  406. pci_resource_len(ctrl->pci_dev, 0));
  407. return(0);
  408. }
  409. //============================================================================
  410. // function: get_slot_mapping
  411. //
  412. // Description: Attempts to determine a logical slot mapping for a PCI
  413. // device. Won't work for more than one PCI-PCI bridge
  414. // in a slot.
  415. //
  416. // Input: u8 bus_num - bus number of PCI device
  417. // u8 dev_num - device number of PCI device
  418. // u8 *slot - Pointer to u8 where slot number will
  419. // be returned
  420. //
  421. // Output: SUCCESS or FAILURE
  422. //=============================================================================
  423. static int
  424. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  425. {
  426. struct irq_routing_table *PCIIRQRoutingInfoLength;
  427. u32 work;
  428. long len;
  429. long loop;
  430. u8 tbus, tdevice, tslot, bridgeSlot;
  431. dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
  432. bridgeSlot = 0xFF;
  433. PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
  434. if (!PCIIRQRoutingInfoLength)
  435. return -1;
  436. len = (PCIIRQRoutingInfoLength->size -
  437. sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
  438. // Make sure I got at least one entry
  439. if (len == 0) {
  440. kfree(PCIIRQRoutingInfoLength);
  441. return -1;
  442. }
  443. for (loop = 0; loop < len; ++loop) {
  444. tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
  445. tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
  446. tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
  447. if ((tbus == bus_num) && (tdevice == dev_num)) {
  448. *slot = tslot;
  449. kfree(PCIIRQRoutingInfoLength);
  450. return 0;
  451. } else {
  452. /* Did not get a match on the target PCI device. Check
  453. * if the current IRQ table entry is a PCI-to-PCI bridge
  454. * device. If so, and it's secondary bus matches the
  455. * bus number for the target device, I need to save the
  456. * bridge's slot number. If I can not find an entry for
  457. * the target device, I will have to assume it's on the
  458. * other side of the bridge, and assign it the bridge's
  459. * slot. */
  460. bus->number = tbus;
  461. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  462. PCI_REVISION_ID, &work);
  463. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  464. pci_bus_read_config_dword(bus,
  465. PCI_DEVFN(tdevice, 0),
  466. PCI_PRIMARY_BUS, &work);
  467. // See if bridge's secondary bus matches target bus.
  468. if (((work >> 8) & 0x000000FF) == (long) bus_num) {
  469. bridgeSlot = tslot;
  470. }
  471. }
  472. }
  473. }
  474. // If we got here, we didn't find an entry in the IRQ mapping table
  475. // for the target PCI device. If we did determine that the target
  476. // device is on the other side of a PCI-to-PCI bridge, return the
  477. // slot number for the bridge.
  478. if (bridgeSlot != 0xFF) {
  479. *slot = bridgeSlot;
  480. kfree(PCIIRQRoutingInfoLength);
  481. return 0;
  482. }
  483. kfree(PCIIRQRoutingInfoLength);
  484. // Couldn't find an entry in the routing table for this PCI device
  485. return -1;
  486. }
  487. /**
  488. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  489. *
  490. */
  491. static int
  492. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  493. u32 status)
  494. {
  495. u8 hp_slot;
  496. if (func == NULL)
  497. return(1);
  498. hp_slot = func->device - ctrl->slot_device_offset;
  499. // Wait for exclusive access to hardware
  500. mutex_lock(&ctrl->crit_sect);
  501. if (status == 1) {
  502. amber_LED_on (ctrl, hp_slot);
  503. } else if (status == 0) {
  504. amber_LED_off (ctrl, hp_slot);
  505. } else {
  506. // Done with exclusive hardware access
  507. mutex_unlock(&ctrl->crit_sect);
  508. return(1);
  509. }
  510. set_SOGO(ctrl);
  511. // Wait for SOBS to be unset
  512. wait_for_ctrl_irq (ctrl);
  513. // Done with exclusive hardware access
  514. mutex_unlock(&ctrl->crit_sect);
  515. return(0);
  516. }
  517. /**
  518. * set_attention_status - Turns the Amber LED for a slot on or off
  519. *
  520. */
  521. static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
  522. {
  523. struct pci_func *slot_func;
  524. struct slot *slot = hotplug_slot->private;
  525. struct controller *ctrl = slot->ctrl;
  526. u8 bus;
  527. u8 devfn;
  528. u8 device;
  529. u8 function;
  530. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  531. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  532. return -ENODEV;
  533. device = devfn >> 3;
  534. function = devfn & 0x7;
  535. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  536. slot_func = cpqhp_slot_find(bus, device, function);
  537. if (!slot_func)
  538. return -ENODEV;
  539. return cpqhp_set_attention_status(ctrl, slot_func, status);
  540. }
  541. static int process_SI(struct hotplug_slot *hotplug_slot)
  542. {
  543. struct pci_func *slot_func;
  544. struct slot *slot = hotplug_slot->private;
  545. struct controller *ctrl = slot->ctrl;
  546. u8 bus;
  547. u8 devfn;
  548. u8 device;
  549. u8 function;
  550. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  551. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  552. return -ENODEV;
  553. device = devfn >> 3;
  554. function = devfn & 0x7;
  555. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  556. slot_func = cpqhp_slot_find(bus, device, function);
  557. if (!slot_func)
  558. return -ENODEV;
  559. slot_func->bus = bus;
  560. slot_func->device = device;
  561. slot_func->function = function;
  562. slot_func->configured = 0;
  563. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  564. return cpqhp_process_SI(ctrl, slot_func);
  565. }
  566. static int process_SS(struct hotplug_slot *hotplug_slot)
  567. {
  568. struct pci_func *slot_func;
  569. struct slot *slot = hotplug_slot->private;
  570. struct controller *ctrl = slot->ctrl;
  571. u8 bus;
  572. u8 devfn;
  573. u8 device;
  574. u8 function;
  575. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  576. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  577. return -ENODEV;
  578. device = devfn >> 3;
  579. function = devfn & 0x7;
  580. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  581. slot_func = cpqhp_slot_find(bus, device, function);
  582. if (!slot_func)
  583. return -ENODEV;
  584. dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
  585. return cpqhp_process_SS(ctrl, slot_func);
  586. }
  587. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  588. {
  589. struct slot *slot = hotplug_slot->private;
  590. struct controller *ctrl = slot->ctrl;
  591. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  592. return cpqhp_hardware_test(ctrl, value);
  593. }
  594. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  595. {
  596. struct slot *slot = hotplug_slot->private;
  597. struct controller *ctrl = slot->ctrl;
  598. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  599. *value = get_slot_enabled(ctrl, slot);
  600. return 0;
  601. }
  602. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  603. {
  604. struct slot *slot = hotplug_slot->private;
  605. struct controller *ctrl = slot->ctrl;
  606. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  607. *value = cpq_get_attention_status(ctrl, slot);
  608. return 0;
  609. }
  610. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  611. {
  612. struct slot *slot = hotplug_slot->private;
  613. struct controller *ctrl = slot->ctrl;
  614. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  615. *value = cpq_get_latch_status(ctrl, slot);
  616. return 0;
  617. }
  618. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  619. {
  620. struct slot *slot = hotplug_slot->private;
  621. struct controller *ctrl = slot->ctrl;
  622. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  623. *value = get_presence_status(ctrl, slot);
  624. return 0;
  625. }
  626. static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  627. {
  628. struct slot *slot = hotplug_slot->private;
  629. struct controller *ctrl = slot->ctrl;
  630. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  631. *value = ctrl->speed_capability;
  632. return 0;
  633. }
  634. static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  635. {
  636. struct slot *slot = hotplug_slot->private;
  637. struct controller *ctrl = slot->ctrl;
  638. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  639. *value = ctrl->speed;
  640. return 0;
  641. }
  642. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  643. {
  644. u8 num_of_slots = 0;
  645. u8 hp_slot = 0;
  646. u8 device;
  647. u8 rev;
  648. u8 bus_cap;
  649. u16 temp_word;
  650. u16 vendor_id;
  651. u16 subsystem_vid;
  652. u16 subsystem_deviceid;
  653. u32 rc;
  654. struct controller *ctrl;
  655. struct pci_func *func;
  656. int err;
  657. err = pci_enable_device(pdev);
  658. if (err) {
  659. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  660. pci_name(pdev), err);
  661. return err;
  662. }
  663. // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
  664. rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
  665. if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
  666. err(msg_HPC_non_compaq_or_intel);
  667. rc = -ENODEV;
  668. goto err_disable_device;
  669. }
  670. dbg("Vendor ID: %x\n", vendor_id);
  671. rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  672. dbg("revision: %d\n", rev);
  673. if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
  674. err(msg_HPC_rev_error);
  675. rc = -ENODEV;
  676. goto err_disable_device;
  677. }
  678. /* Check for the proper subsytem ID's
  679. * Intel uses a different SSID programming model than Compaq.
  680. * For Intel, each SSID bit identifies a PHP capability.
  681. * Also Intel HPC's may have RID=0.
  682. */
  683. if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
  684. // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
  685. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
  686. if (rc) {
  687. err("%s : pci_read_config_word failed\n", __FUNCTION__);
  688. goto err_disable_device;
  689. }
  690. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  691. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  692. err(msg_HPC_non_compaq_or_intel);
  693. rc = -ENODEV;
  694. goto err_disable_device;
  695. }
  696. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  697. if (!ctrl) {
  698. err("%s : out of memory\n", __FUNCTION__);
  699. rc = -ENOMEM;
  700. goto err_disable_device;
  701. }
  702. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
  703. if (rc) {
  704. err("%s : pci_read_config_word failed\n", __FUNCTION__);
  705. goto err_free_ctrl;
  706. }
  707. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  708. /* Set Vendor ID, so it can be accessed later from other functions */
  709. ctrl->vendor_id = vendor_id;
  710. switch (subsystem_vid) {
  711. case PCI_VENDOR_ID_COMPAQ:
  712. if (rev >= 0x13) { /* CIOBX */
  713. ctrl->push_flag = 1;
  714. ctrl->slot_switch_type = 1;
  715. ctrl->push_button = 1;
  716. ctrl->pci_config_space = 1;
  717. ctrl->defeature_PHP = 1;
  718. ctrl->pcix_support = 1;
  719. ctrl->pcix_speed_capability = 1;
  720. pci_read_config_byte(pdev, 0x41, &bus_cap);
  721. if (bus_cap & 0x80) {
  722. dbg("bus max supports 133MHz PCI-X\n");
  723. ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
  724. break;
  725. }
  726. if (bus_cap & 0x40) {
  727. dbg("bus max supports 100MHz PCI-X\n");
  728. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  729. break;
  730. }
  731. if (bus_cap & 20) {
  732. dbg("bus max supports 66MHz PCI-X\n");
  733. ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
  734. break;
  735. }
  736. if (bus_cap & 10) {
  737. dbg("bus max supports 66MHz PCI\n");
  738. ctrl->speed_capability = PCI_SPEED_66MHz;
  739. break;
  740. }
  741. break;
  742. }
  743. switch (subsystem_deviceid) {
  744. case PCI_SUB_HPC_ID:
  745. /* Original 6500/7000 implementation */
  746. ctrl->slot_switch_type = 1;
  747. ctrl->speed_capability = PCI_SPEED_33MHz;
  748. ctrl->push_button = 0;
  749. ctrl->pci_config_space = 1;
  750. ctrl->defeature_PHP = 1;
  751. ctrl->pcix_support = 0;
  752. ctrl->pcix_speed_capability = 0;
  753. break;
  754. case PCI_SUB_HPC_ID2:
  755. /* First Pushbutton implementation */
  756. ctrl->push_flag = 1;
  757. ctrl->slot_switch_type = 1;
  758. ctrl->speed_capability = PCI_SPEED_33MHz;
  759. ctrl->push_button = 1;
  760. ctrl->pci_config_space = 1;
  761. ctrl->defeature_PHP = 1;
  762. ctrl->pcix_support = 0;
  763. ctrl->pcix_speed_capability = 0;
  764. break;
  765. case PCI_SUB_HPC_ID_INTC:
  766. /* Third party (6500/7000) */
  767. ctrl->slot_switch_type = 1;
  768. ctrl->speed_capability = PCI_SPEED_33MHz;
  769. ctrl->push_button = 0;
  770. ctrl->pci_config_space = 1;
  771. ctrl->defeature_PHP = 1;
  772. ctrl->pcix_support = 0;
  773. ctrl->pcix_speed_capability = 0;
  774. break;
  775. case PCI_SUB_HPC_ID3:
  776. /* First 66 Mhz implementation */
  777. ctrl->push_flag = 1;
  778. ctrl->slot_switch_type = 1;
  779. ctrl->speed_capability = PCI_SPEED_66MHz;
  780. ctrl->push_button = 1;
  781. ctrl->pci_config_space = 1;
  782. ctrl->defeature_PHP = 1;
  783. ctrl->pcix_support = 0;
  784. ctrl->pcix_speed_capability = 0;
  785. break;
  786. case PCI_SUB_HPC_ID4:
  787. /* First PCI-X implementation, 100MHz */
  788. ctrl->push_flag = 1;
  789. ctrl->slot_switch_type = 1;
  790. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  791. ctrl->push_button = 1;
  792. ctrl->pci_config_space = 1;
  793. ctrl->defeature_PHP = 1;
  794. ctrl->pcix_support = 1;
  795. ctrl->pcix_speed_capability = 0;
  796. break;
  797. default:
  798. err(msg_HPC_not_supported);
  799. rc = -ENODEV;
  800. goto err_free_ctrl;
  801. }
  802. break;
  803. case PCI_VENDOR_ID_INTEL:
  804. /* Check for speed capability (0=33, 1=66) */
  805. if (subsystem_deviceid & 0x0001) {
  806. ctrl->speed_capability = PCI_SPEED_66MHz;
  807. } else {
  808. ctrl->speed_capability = PCI_SPEED_33MHz;
  809. }
  810. /* Check for push button */
  811. if (subsystem_deviceid & 0x0002) {
  812. /* no push button */
  813. ctrl->push_button = 0;
  814. } else {
  815. /* push button supported */
  816. ctrl->push_button = 1;
  817. }
  818. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  819. if (subsystem_deviceid & 0x0004) {
  820. /* no switch */
  821. ctrl->slot_switch_type = 0;
  822. } else {
  823. /* switch */
  824. ctrl->slot_switch_type = 1;
  825. }
  826. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  827. if (subsystem_deviceid & 0x0008) {
  828. ctrl->defeature_PHP = 1; // PHP supported
  829. } else {
  830. ctrl->defeature_PHP = 0; // PHP not supported
  831. }
  832. /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
  833. if (subsystem_deviceid & 0x0010) {
  834. ctrl->alternate_base_address = 1; // supported
  835. } else {
  836. ctrl->alternate_base_address = 0; // not supported
  837. }
  838. /* PCI Config Space Index (0=not supported, 1=supported) */
  839. if (subsystem_deviceid & 0x0020) {
  840. ctrl->pci_config_space = 1; // supported
  841. } else {
  842. ctrl->pci_config_space = 0; // not supported
  843. }
  844. /* PCI-X support */
  845. if (subsystem_deviceid & 0x0080) {
  846. /* PCI-X capable */
  847. ctrl->pcix_support = 1;
  848. /* Frequency of operation in PCI-X mode */
  849. if (subsystem_deviceid & 0x0040) {
  850. /* 133MHz PCI-X if bit 7 is 1 */
  851. ctrl->pcix_speed_capability = 1;
  852. } else {
  853. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  854. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  855. ctrl->pcix_speed_capability = 0;
  856. }
  857. } else {
  858. /* Conventional PCI */
  859. ctrl->pcix_support = 0;
  860. ctrl->pcix_speed_capability = 0;
  861. }
  862. break;
  863. default:
  864. err(msg_HPC_not_supported);
  865. rc = -ENODEV;
  866. goto err_free_ctrl;
  867. }
  868. } else {
  869. err(msg_HPC_not_supported);
  870. return -ENODEV;
  871. }
  872. // Tell the user that we found one.
  873. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  874. pdev->bus->number);
  875. dbg("Hotplug controller capabilities:\n");
  876. dbg(" speed_capability %d\n", ctrl->speed_capability);
  877. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  878. "switch present" : "no switch");
  879. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  880. "PHP supported" : "PHP not supported");
  881. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  882. "supported" : "not supported");
  883. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  884. "supported" : "not supported");
  885. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  886. "supported" : "not supported");
  887. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  888. "supported" : "not supported");
  889. ctrl->pci_dev = pdev;
  890. pci_set_drvdata(pdev, ctrl);
  891. /* make our own copy of the pci bus structure,
  892. * as we like tweaking it a lot */
  893. ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
  894. if (!ctrl->pci_bus) {
  895. err("out of memory\n");
  896. rc = -ENOMEM;
  897. goto err_free_ctrl;
  898. }
  899. memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
  900. ctrl->bus = pdev->bus->number;
  901. ctrl->rev = rev;
  902. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  903. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  904. mutex_init(&ctrl->crit_sect);
  905. init_waitqueue_head(&ctrl->queue);
  906. /* initialize our threads if they haven't already been started up */
  907. rc = one_time_init();
  908. if (rc) {
  909. goto err_free_bus;
  910. }
  911. dbg("pdev = %p\n", pdev);
  912. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  913. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  914. if (!request_mem_region(pci_resource_start(pdev, 0),
  915. pci_resource_len(pdev, 0), MY_NAME)) {
  916. err("cannot reserve MMIO region\n");
  917. rc = -ENOMEM;
  918. goto err_free_bus;
  919. }
  920. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  921. pci_resource_len(pdev, 0));
  922. if (!ctrl->hpc_reg) {
  923. err("cannot remap MMIO region %llx @ %llx\n",
  924. (unsigned long long)pci_resource_len(pdev, 0),
  925. (unsigned long long)pci_resource_start(pdev, 0));
  926. rc = -ENODEV;
  927. goto err_free_mem_region;
  928. }
  929. // Check for 66Mhz operation
  930. ctrl->speed = get_controller_speed(ctrl);
  931. /********************************************************
  932. *
  933. * Save configuration headers for this and
  934. * subordinate PCI buses
  935. *
  936. ********************************************************/
  937. // find the physical slot number of the first hot plug slot
  938. /* Get slot won't work for devices behind bridges, but
  939. * in this case it will always be called for the "base"
  940. * bus/dev/func of a slot.
  941. * CS: this is leveraging the PCIIRQ routing code from the kernel
  942. * (pci-pc.c: get_irq_routing_table) */
  943. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  944. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  945. &(ctrl->first_slot));
  946. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  947. ctrl->first_slot, rc);
  948. if (rc) {
  949. err(msg_initialization_err, rc);
  950. goto err_iounmap;
  951. }
  952. // Store PCI Config Space for all devices on this bus
  953. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  954. if (rc) {
  955. err("%s: unable to save PCI configuration data, error %d\n",
  956. __FUNCTION__, rc);
  957. goto err_iounmap;
  958. }
  959. /*
  960. * Get IO, memory, and IRQ resources for new devices
  961. */
  962. // The next line is required for cpqhp_find_available_resources
  963. ctrl->interrupt = pdev->irq;
  964. if (ctrl->interrupt < 0x10) {
  965. cpqhp_legacy_mode = 1;
  966. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  967. }
  968. ctrl->cfgspc_irq = 0;
  969. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  970. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  971. ctrl->add_support = !rc;
  972. if (rc) {
  973. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  974. err("unable to locate PCI configuration resources for hot plug add.\n");
  975. goto err_iounmap;
  976. }
  977. /*
  978. * Finish setting up the hot plug ctrl device
  979. */
  980. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  981. dbg("NumSlots %d \n", ctrl->slot_device_offset);
  982. ctrl->next_event = 0;
  983. /* Setup the slot information structures */
  984. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  985. if (rc) {
  986. err(msg_initialization_err, 6);
  987. err("%s: unable to save PCI configuration data, error %d\n",
  988. __FUNCTION__, rc);
  989. goto err_iounmap;
  990. }
  991. /* Mask all general input interrupts */
  992. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  993. /* set up the interrupt */
  994. dbg("HPC interrupt = %d \n", ctrl->interrupt);
  995. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  996. IRQF_SHARED, MY_NAME, ctrl)) {
  997. err("Can't get irq %d for the hotplug pci controller\n",
  998. ctrl->interrupt);
  999. rc = -ENODEV;
  1000. goto err_iounmap;
  1001. }
  1002. /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
  1003. temp_word = readw(ctrl->hpc_reg + MISC);
  1004. temp_word |= 0x4006;
  1005. writew(temp_word, ctrl->hpc_reg + MISC);
  1006. // Changed 05/05/97 to clear all interrupts at start
  1007. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1008. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1009. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1010. if (!cpqhp_ctrl_list) {
  1011. cpqhp_ctrl_list = ctrl;
  1012. ctrl->next = NULL;
  1013. } else {
  1014. ctrl->next = cpqhp_ctrl_list;
  1015. cpqhp_ctrl_list = ctrl;
  1016. }
  1017. // turn off empty slots here unless command line option "ON" set
  1018. // Wait for exclusive access to hardware
  1019. mutex_lock(&ctrl->crit_sect);
  1020. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1021. // find first device number for the ctrl
  1022. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1023. while (num_of_slots) {
  1024. dbg("num_of_slots: %d\n", num_of_slots);
  1025. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1026. if (!func)
  1027. break;
  1028. hp_slot = func->device - ctrl->slot_device_offset;
  1029. dbg("hp_slot: %d\n", hp_slot);
  1030. // We have to save the presence info for these slots
  1031. temp_word = ctrl->ctrl_int_comp >> 16;
  1032. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1033. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1034. if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
  1035. func->switch_save = 0;
  1036. } else {
  1037. func->switch_save = 0x10;
  1038. }
  1039. if (!power_mode) {
  1040. if (!func->is_a_board) {
  1041. green_LED_off(ctrl, hp_slot);
  1042. slot_disable(ctrl, hp_slot);
  1043. }
  1044. }
  1045. device++;
  1046. num_of_slots--;
  1047. }
  1048. if (!power_mode) {
  1049. set_SOGO(ctrl);
  1050. // Wait for SOBS to be unset
  1051. wait_for_ctrl_irq(ctrl);
  1052. }
  1053. rc = init_SERR(ctrl);
  1054. if (rc) {
  1055. err("init_SERR failed\n");
  1056. mutex_unlock(&ctrl->crit_sect);
  1057. goto err_free_irq;
  1058. }
  1059. // Done with exclusive hardware access
  1060. mutex_unlock(&ctrl->crit_sect);
  1061. cpqhp_create_debugfs_files(ctrl);
  1062. return 0;
  1063. err_free_irq:
  1064. free_irq(ctrl->interrupt, ctrl);
  1065. err_iounmap:
  1066. iounmap(ctrl->hpc_reg);
  1067. err_free_mem_region:
  1068. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1069. err_free_bus:
  1070. kfree(ctrl->pci_bus);
  1071. err_free_ctrl:
  1072. kfree(ctrl);
  1073. err_disable_device:
  1074. pci_disable_device(pdev);
  1075. return rc;
  1076. }
  1077. static int one_time_init(void)
  1078. {
  1079. int loop;
  1080. int retval = 0;
  1081. if (initialized)
  1082. return 0;
  1083. power_mode = 0;
  1084. retval = pci_print_IRQ_route();
  1085. if (retval)
  1086. goto error;
  1087. dbg("Initialize + Start the notification mechanism \n");
  1088. retval = cpqhp_event_start_thread();
  1089. if (retval)
  1090. goto error;
  1091. dbg("Initialize slot lists\n");
  1092. for (loop = 0; loop < 256; loop++) {
  1093. cpqhp_slot_list[loop] = NULL;
  1094. }
  1095. // FIXME: We also need to hook the NMI handler eventually.
  1096. // this also needs to be worked with Christoph
  1097. // register_NMI_handler();
  1098. // Map rom address
  1099. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  1100. if (!cpqhp_rom_start) {
  1101. err ("Could not ioremap memory region for ROM\n");
  1102. retval = -EIO;
  1103. goto error;
  1104. }
  1105. /* Now, map the int15 entry point if we are on compaq specific hardware */
  1106. compaq_nvram_init(cpqhp_rom_start);
  1107. /* Map smbios table entry point structure */
  1108. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  1109. cpqhp_rom_start + ROM_PHY_LEN);
  1110. if (!smbios_table) {
  1111. err ("Could not find the SMBIOS pointer in memory\n");
  1112. retval = -EIO;
  1113. goto error_rom_start;
  1114. }
  1115. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  1116. readw(smbios_table + ST_LENGTH));
  1117. if (!smbios_start) {
  1118. err ("Could not ioremap memory region taken from SMBIOS values\n");
  1119. retval = -EIO;
  1120. goto error_smbios_start;
  1121. }
  1122. initialized = 1;
  1123. return retval;
  1124. error_smbios_start:
  1125. iounmap(smbios_start);
  1126. error_rom_start:
  1127. iounmap(cpqhp_rom_start);
  1128. error:
  1129. return retval;
  1130. }
  1131. static void __exit unload_cpqphpd(void)
  1132. {
  1133. struct pci_func *next;
  1134. struct pci_func *TempSlot;
  1135. int loop;
  1136. u32 rc;
  1137. struct controller *ctrl;
  1138. struct controller *tctrl;
  1139. struct pci_resource *res;
  1140. struct pci_resource *tres;
  1141. rc = compaq_nvram_store(cpqhp_rom_start);
  1142. ctrl = cpqhp_ctrl_list;
  1143. while (ctrl) {
  1144. if (ctrl->hpc_reg) {
  1145. u16 misc;
  1146. rc = read_slot_enable (ctrl);
  1147. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1148. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1149. misc = readw(ctrl->hpc_reg + MISC);
  1150. misc &= 0xFFFD;
  1151. writew(misc, ctrl->hpc_reg + MISC);
  1152. }
  1153. ctrl_slot_cleanup(ctrl);
  1154. res = ctrl->io_head;
  1155. while (res) {
  1156. tres = res;
  1157. res = res->next;
  1158. kfree(tres);
  1159. }
  1160. res = ctrl->mem_head;
  1161. while (res) {
  1162. tres = res;
  1163. res = res->next;
  1164. kfree(tres);
  1165. }
  1166. res = ctrl->p_mem_head;
  1167. while (res) {
  1168. tres = res;
  1169. res = res->next;
  1170. kfree(tres);
  1171. }
  1172. res = ctrl->bus_head;
  1173. while (res) {
  1174. tres = res;
  1175. res = res->next;
  1176. kfree(tres);
  1177. }
  1178. kfree (ctrl->pci_bus);
  1179. tctrl = ctrl;
  1180. ctrl = ctrl->next;
  1181. kfree(tctrl);
  1182. }
  1183. for (loop = 0; loop < 256; loop++) {
  1184. next = cpqhp_slot_list[loop];
  1185. while (next != NULL) {
  1186. res = next->io_head;
  1187. while (res) {
  1188. tres = res;
  1189. res = res->next;
  1190. kfree(tres);
  1191. }
  1192. res = next->mem_head;
  1193. while (res) {
  1194. tres = res;
  1195. res = res->next;
  1196. kfree(tres);
  1197. }
  1198. res = next->p_mem_head;
  1199. while (res) {
  1200. tres = res;
  1201. res = res->next;
  1202. kfree(tres);
  1203. }
  1204. res = next->bus_head;
  1205. while (res) {
  1206. tres = res;
  1207. res = res->next;
  1208. kfree(tres);
  1209. }
  1210. TempSlot = next;
  1211. next = next->next;
  1212. kfree(TempSlot);
  1213. }
  1214. }
  1215. // Stop the notification mechanism
  1216. if (initialized)
  1217. cpqhp_event_stop_thread();
  1218. //unmap the rom address
  1219. if (cpqhp_rom_start)
  1220. iounmap(cpqhp_rom_start);
  1221. if (smbios_start)
  1222. iounmap(smbios_start);
  1223. }
  1224. static struct pci_device_id hpcd_pci_tbl[] = {
  1225. {
  1226. /* handle any PCI Hotplug controller */
  1227. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1228. .class_mask = ~0,
  1229. /* no matter who makes it */
  1230. .vendor = PCI_ANY_ID,
  1231. .device = PCI_ANY_ID,
  1232. .subvendor = PCI_ANY_ID,
  1233. .subdevice = PCI_ANY_ID,
  1234. }, { /* end: all zeroes */ }
  1235. };
  1236. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1237. static struct pci_driver cpqhpc_driver = {
  1238. .name = "compaq_pci_hotplug",
  1239. .id_table = hpcd_pci_tbl,
  1240. .probe = cpqhpc_probe,
  1241. /* remove: cpqhpc_remove_one, */
  1242. };
  1243. static int __init cpqhpc_init(void)
  1244. {
  1245. int result;
  1246. cpqhp_debug = debug;
  1247. info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1248. cpqhp_initialize_debugfs();
  1249. result = pci_register_driver(&cpqhpc_driver);
  1250. dbg("pci_register_driver = %d\n", result);
  1251. return result;
  1252. }
  1253. static void __exit cpqhpc_cleanup(void)
  1254. {
  1255. dbg("unload_cpqphpd()\n");
  1256. unload_cpqphpd();
  1257. dbg("pci_unregister_driver\n");
  1258. pci_unregister_driver(&cpqhpc_driver);
  1259. cpqhp_shutdown_debugfs();
  1260. }
  1261. module_init(cpqhpc_init);
  1262. module_exit(cpqhpc_cleanup);