ixgb_main.c 62 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. char ixgb_driver_name[] = "ixgb";
  22. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  23. #ifndef CONFIG_IXGB_NAPI
  24. #define DRIVERNAPI
  25. #else
  26. #define DRIVERNAPI "-NAPI"
  27. #endif
  28. #define DRV_VERSION "1.0.112-k2"DRIVERNAPI
  29. char ixgb_driver_version[] = DRV_VERSION;
  30. static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  31. /* ixgb_pci_tbl - PCI Device ID Table
  32. *
  33. * Wildcard entries (PCI_ANY_ID) should come last
  34. * Last entry must be all 0s
  35. *
  36. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  37. * Class, Class Mask, private data (not used) }
  38. */
  39. static struct pci_device_id ixgb_pci_tbl[] = {
  40. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  41. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  42. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
  43. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  44. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  45. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  46. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  47. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  48. /* required last entry */
  49. {0,}
  50. };
  51. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  52. /* Local Function Prototypes */
  53. int ixgb_up(struct ixgb_adapter *adapter);
  54. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  55. void ixgb_reset(struct ixgb_adapter *adapter);
  56. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  57. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  58. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  59. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  60. void ixgb_update_stats(struct ixgb_adapter *adapter);
  61. static int ixgb_init_module(void);
  62. static void ixgb_exit_module(void);
  63. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  64. static void __devexit ixgb_remove(struct pci_dev *pdev);
  65. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  66. static int ixgb_open(struct net_device *netdev);
  67. static int ixgb_close(struct net_device *netdev);
  68. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  69. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  70. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  71. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  72. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  73. static void ixgb_set_multi(struct net_device *netdev);
  74. static void ixgb_watchdog(unsigned long data);
  75. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  76. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  77. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  78. static int ixgb_set_mac(struct net_device *netdev, void *p);
  79. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  80. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  81. #ifdef CONFIG_IXGB_NAPI
  82. static int ixgb_clean(struct net_device *netdev, int *budget);
  83. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  84. int *work_done, int work_to_do);
  85. #else
  86. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  87. #endif
  88. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  89. void ixgb_set_ethtool_ops(struct net_device *netdev);
  90. static void ixgb_tx_timeout(struct net_device *dev);
  91. static void ixgb_tx_timeout_task(struct net_device *dev);
  92. static void ixgb_vlan_rx_register(struct net_device *netdev,
  93. struct vlan_group *grp);
  94. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  95. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  96. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  97. #ifdef CONFIG_NET_POLL_CONTROLLER
  98. /* for netdump / net console */
  99. static void ixgb_netpoll(struct net_device *dev);
  100. #endif
  101. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  102. enum pci_channel_state state);
  103. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
  104. static void ixgb_io_resume (struct pci_dev *pdev);
  105. /* Exported from other modules */
  106. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  107. static struct pci_error_handlers ixgb_err_handler = {
  108. .error_detected = ixgb_io_error_detected,
  109. .slot_reset = ixgb_io_slot_reset,
  110. .resume = ixgb_io_resume,
  111. };
  112. static struct pci_driver ixgb_driver = {
  113. .name = ixgb_driver_name,
  114. .id_table = ixgb_pci_tbl,
  115. .probe = ixgb_probe,
  116. .remove = __devexit_p(ixgb_remove),
  117. .err_handler = &ixgb_err_handler
  118. };
  119. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  120. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  121. MODULE_LICENSE("GPL");
  122. MODULE_VERSION(DRV_VERSION);
  123. #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  124. static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
  125. module_param(debug, int, 0);
  126. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  127. /* some defines for controlling descriptor fetches in h/w */
  128. #define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
  129. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  130. * this */
  131. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  132. * is pushed this many descriptors
  133. * from head */
  134. /**
  135. * ixgb_init_module - Driver Registration Routine
  136. *
  137. * ixgb_init_module is the first routine called when the driver is
  138. * loaded. All it does is register with the PCI subsystem.
  139. **/
  140. static int __init
  141. ixgb_init_module(void)
  142. {
  143. printk(KERN_INFO "%s - version %s\n",
  144. ixgb_driver_string, ixgb_driver_version);
  145. printk(KERN_INFO "%s\n", ixgb_copyright);
  146. return pci_register_driver(&ixgb_driver);
  147. }
  148. module_init(ixgb_init_module);
  149. /**
  150. * ixgb_exit_module - Driver Exit Cleanup Routine
  151. *
  152. * ixgb_exit_module is called just before the driver is removed
  153. * from memory.
  154. **/
  155. static void __exit
  156. ixgb_exit_module(void)
  157. {
  158. pci_unregister_driver(&ixgb_driver);
  159. }
  160. module_exit(ixgb_exit_module);
  161. /**
  162. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  163. * @adapter: board private structure
  164. **/
  165. static void
  166. ixgb_irq_disable(struct ixgb_adapter *adapter)
  167. {
  168. atomic_inc(&adapter->irq_sem);
  169. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  170. IXGB_WRITE_FLUSH(&adapter->hw);
  171. synchronize_irq(adapter->pdev->irq);
  172. }
  173. /**
  174. * ixgb_irq_enable - Enable default interrupt generation settings
  175. * @adapter: board private structure
  176. **/
  177. static void
  178. ixgb_irq_enable(struct ixgb_adapter *adapter)
  179. {
  180. if(atomic_dec_and_test(&adapter->irq_sem)) {
  181. IXGB_WRITE_REG(&adapter->hw, IMS,
  182. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  183. IXGB_INT_LSC);
  184. IXGB_WRITE_FLUSH(&adapter->hw);
  185. }
  186. }
  187. int
  188. ixgb_up(struct ixgb_adapter *adapter)
  189. {
  190. struct net_device *netdev = adapter->netdev;
  191. int err;
  192. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  193. struct ixgb_hw *hw = &adapter->hw;
  194. /* hardware has been reset, we need to reload some things */
  195. ixgb_rar_set(hw, netdev->dev_addr, 0);
  196. ixgb_set_multi(netdev);
  197. ixgb_restore_vlan(adapter);
  198. ixgb_configure_tx(adapter);
  199. ixgb_setup_rctl(adapter);
  200. ixgb_configure_rx(adapter);
  201. ixgb_alloc_rx_buffers(adapter);
  202. /* disable interrupts and get the hardware into a known state */
  203. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  204. #ifdef CONFIG_PCI_MSI
  205. {
  206. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  207. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  208. adapter->have_msi = TRUE;
  209. if (!pcix)
  210. adapter->have_msi = FALSE;
  211. else if((err = pci_enable_msi(adapter->pdev))) {
  212. DPRINTK(PROBE, ERR,
  213. "Unable to allocate MSI interrupt Error: %d\n", err);
  214. adapter->have_msi = FALSE;
  215. /* proceed to try to request regular interrupt */
  216. }
  217. }
  218. #endif
  219. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  220. IRQF_SHARED | IRQF_SAMPLE_RANDOM,
  221. netdev->name, netdev))) {
  222. DPRINTK(PROBE, ERR,
  223. "Unable to allocate interrupt Error: %d\n", err);
  224. return err;
  225. }
  226. if((hw->max_frame_size != max_frame) ||
  227. (hw->max_frame_size !=
  228. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  229. hw->max_frame_size = max_frame;
  230. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  231. if(hw->max_frame_size >
  232. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  233. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  234. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  235. ctrl0 |= IXGB_CTRL0_JFE;
  236. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  237. }
  238. }
  239. }
  240. mod_timer(&adapter->watchdog_timer, jiffies);
  241. #ifdef CONFIG_IXGB_NAPI
  242. netif_poll_enable(netdev);
  243. #endif
  244. ixgb_irq_enable(adapter);
  245. return 0;
  246. }
  247. void
  248. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  249. {
  250. struct net_device *netdev = adapter->netdev;
  251. ixgb_irq_disable(adapter);
  252. free_irq(adapter->pdev->irq, netdev);
  253. #ifdef CONFIG_PCI_MSI
  254. if(adapter->have_msi == TRUE)
  255. pci_disable_msi(adapter->pdev);
  256. #endif
  257. if(kill_watchdog)
  258. del_timer_sync(&adapter->watchdog_timer);
  259. #ifdef CONFIG_IXGB_NAPI
  260. netif_poll_disable(netdev);
  261. #endif
  262. adapter->link_speed = 0;
  263. adapter->link_duplex = 0;
  264. netif_carrier_off(netdev);
  265. netif_stop_queue(netdev);
  266. ixgb_reset(adapter);
  267. ixgb_clean_tx_ring(adapter);
  268. ixgb_clean_rx_ring(adapter);
  269. }
  270. void
  271. ixgb_reset(struct ixgb_adapter *adapter)
  272. {
  273. ixgb_adapter_stop(&adapter->hw);
  274. if(!ixgb_init_hw(&adapter->hw))
  275. DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
  276. }
  277. /**
  278. * ixgb_probe - Device Initialization Routine
  279. * @pdev: PCI device information struct
  280. * @ent: entry in ixgb_pci_tbl
  281. *
  282. * Returns 0 on success, negative on failure
  283. *
  284. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  285. * The OS initialization, configuring of the adapter private structure,
  286. * and a hardware reset occur.
  287. **/
  288. static int __devinit
  289. ixgb_probe(struct pci_dev *pdev,
  290. const struct pci_device_id *ent)
  291. {
  292. struct net_device *netdev = NULL;
  293. struct ixgb_adapter *adapter;
  294. static int cards_found = 0;
  295. unsigned long mmio_start;
  296. int mmio_len;
  297. int pci_using_dac;
  298. int i;
  299. int err;
  300. if((err = pci_enable_device(pdev)))
  301. return err;
  302. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  303. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  304. pci_using_dac = 1;
  305. } else {
  306. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
  307. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  308. printk(KERN_ERR
  309. "ixgb: No usable DMA configuration, aborting\n");
  310. goto err_dma_mask;
  311. }
  312. pci_using_dac = 0;
  313. }
  314. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  315. goto err_request_regions;
  316. pci_set_master(pdev);
  317. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  318. if(!netdev) {
  319. err = -ENOMEM;
  320. goto err_alloc_etherdev;
  321. }
  322. SET_MODULE_OWNER(netdev);
  323. SET_NETDEV_DEV(netdev, &pdev->dev);
  324. pci_set_drvdata(pdev, netdev);
  325. adapter = netdev_priv(netdev);
  326. adapter->netdev = netdev;
  327. adapter->pdev = pdev;
  328. adapter->hw.back = adapter;
  329. adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
  330. mmio_start = pci_resource_start(pdev, BAR_0);
  331. mmio_len = pci_resource_len(pdev, BAR_0);
  332. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  333. if(!adapter->hw.hw_addr) {
  334. err = -EIO;
  335. goto err_ioremap;
  336. }
  337. for(i = BAR_1; i <= BAR_5; i++) {
  338. if(pci_resource_len(pdev, i) == 0)
  339. continue;
  340. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  341. adapter->hw.io_base = pci_resource_start(pdev, i);
  342. break;
  343. }
  344. }
  345. netdev->open = &ixgb_open;
  346. netdev->stop = &ixgb_close;
  347. netdev->hard_start_xmit = &ixgb_xmit_frame;
  348. netdev->get_stats = &ixgb_get_stats;
  349. netdev->set_multicast_list = &ixgb_set_multi;
  350. netdev->set_mac_address = &ixgb_set_mac;
  351. netdev->change_mtu = &ixgb_change_mtu;
  352. ixgb_set_ethtool_ops(netdev);
  353. netdev->tx_timeout = &ixgb_tx_timeout;
  354. netdev->watchdog_timeo = 5 * HZ;
  355. #ifdef CONFIG_IXGB_NAPI
  356. netdev->poll = &ixgb_clean;
  357. netdev->weight = 64;
  358. #endif
  359. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  360. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  361. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  362. #ifdef CONFIG_NET_POLL_CONTROLLER
  363. netdev->poll_controller = ixgb_netpoll;
  364. #endif
  365. strcpy(netdev->name, pci_name(pdev));
  366. netdev->mem_start = mmio_start;
  367. netdev->mem_end = mmio_start + mmio_len;
  368. netdev->base_addr = adapter->hw.io_base;
  369. adapter->bd_number = cards_found;
  370. adapter->link_speed = 0;
  371. adapter->link_duplex = 0;
  372. /* setup the private structure */
  373. if((err = ixgb_sw_init(adapter)))
  374. goto err_sw_init;
  375. netdev->features = NETIF_F_SG |
  376. NETIF_F_HW_CSUM |
  377. NETIF_F_HW_VLAN_TX |
  378. NETIF_F_HW_VLAN_RX |
  379. NETIF_F_HW_VLAN_FILTER;
  380. #ifdef NETIF_F_TSO
  381. netdev->features |= NETIF_F_TSO;
  382. #endif
  383. #ifdef NETIF_F_LLTX
  384. netdev->features |= NETIF_F_LLTX;
  385. #endif
  386. if(pci_using_dac)
  387. netdev->features |= NETIF_F_HIGHDMA;
  388. /* make sure the EEPROM is good */
  389. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  390. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  391. err = -EIO;
  392. goto err_eeprom;
  393. }
  394. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  395. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  396. if(!is_valid_ether_addr(netdev->perm_addr)) {
  397. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  398. err = -EIO;
  399. goto err_eeprom;
  400. }
  401. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  402. init_timer(&adapter->watchdog_timer);
  403. adapter->watchdog_timer.function = &ixgb_watchdog;
  404. adapter->watchdog_timer.data = (unsigned long)adapter;
  405. INIT_WORK(&adapter->tx_timeout_task,
  406. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  407. strcpy(netdev->name, "eth%d");
  408. if((err = register_netdev(netdev)))
  409. goto err_register;
  410. /* we're going to reset, so assume we have no link for now */
  411. netif_carrier_off(netdev);
  412. netif_stop_queue(netdev);
  413. DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
  414. ixgb_check_options(adapter);
  415. /* reset the hardware with the new settings */
  416. ixgb_reset(adapter);
  417. cards_found++;
  418. return 0;
  419. err_register:
  420. err_sw_init:
  421. err_eeprom:
  422. iounmap(adapter->hw.hw_addr);
  423. err_ioremap:
  424. free_netdev(netdev);
  425. err_alloc_etherdev:
  426. pci_release_regions(pdev);
  427. err_request_regions:
  428. err_dma_mask:
  429. pci_disable_device(pdev);
  430. return err;
  431. }
  432. /**
  433. * ixgb_remove - Device Removal Routine
  434. * @pdev: PCI device information struct
  435. *
  436. * ixgb_remove is called by the PCI subsystem to alert the driver
  437. * that it should release a PCI device. The could be caused by a
  438. * Hot-Plug event, or because the driver is going to be removed from
  439. * memory.
  440. **/
  441. static void __devexit
  442. ixgb_remove(struct pci_dev *pdev)
  443. {
  444. struct net_device *netdev = pci_get_drvdata(pdev);
  445. struct ixgb_adapter *adapter = netdev_priv(netdev);
  446. unregister_netdev(netdev);
  447. iounmap(adapter->hw.hw_addr);
  448. pci_release_regions(pdev);
  449. free_netdev(netdev);
  450. }
  451. /**
  452. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  453. * @adapter: board private structure to initialize
  454. *
  455. * ixgb_sw_init initializes the Adapter private data structure.
  456. * Fields are initialized based on PCI device information and
  457. * OS network device settings (MTU size).
  458. **/
  459. static int __devinit
  460. ixgb_sw_init(struct ixgb_adapter *adapter)
  461. {
  462. struct ixgb_hw *hw = &adapter->hw;
  463. struct net_device *netdev = adapter->netdev;
  464. struct pci_dev *pdev = adapter->pdev;
  465. /* PCI config space info */
  466. hw->vendor_id = pdev->vendor;
  467. hw->device_id = pdev->device;
  468. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  469. hw->subsystem_id = pdev->subsystem_device;
  470. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  471. adapter->rx_buffer_len = hw->max_frame_size;
  472. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  473. || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
  474. || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  475. || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  476. hw->mac_type = ixgb_82597;
  477. else {
  478. /* should never have loaded on this device */
  479. DPRINTK(PROBE, ERR, "unsupported device id\n");
  480. }
  481. /* enable flow control to be programmed */
  482. hw->fc.send_xon = 1;
  483. atomic_set(&adapter->irq_sem, 1);
  484. spin_lock_init(&adapter->tx_lock);
  485. return 0;
  486. }
  487. /**
  488. * ixgb_open - Called when a network interface is made active
  489. * @netdev: network interface device structure
  490. *
  491. * Returns 0 on success, negative value on failure
  492. *
  493. * The open entry point is called when a network interface is made
  494. * active by the system (IFF_UP). At this point all resources needed
  495. * for transmit and receive operations are allocated, the interrupt
  496. * handler is registered with the OS, the watchdog timer is started,
  497. * and the stack is notified that the interface is ready.
  498. **/
  499. static int
  500. ixgb_open(struct net_device *netdev)
  501. {
  502. struct ixgb_adapter *adapter = netdev_priv(netdev);
  503. int err;
  504. /* allocate transmit descriptors */
  505. if((err = ixgb_setup_tx_resources(adapter)))
  506. goto err_setup_tx;
  507. /* allocate receive descriptors */
  508. if((err = ixgb_setup_rx_resources(adapter)))
  509. goto err_setup_rx;
  510. if((err = ixgb_up(adapter)))
  511. goto err_up;
  512. return 0;
  513. err_up:
  514. ixgb_free_rx_resources(adapter);
  515. err_setup_rx:
  516. ixgb_free_tx_resources(adapter);
  517. err_setup_tx:
  518. ixgb_reset(adapter);
  519. return err;
  520. }
  521. /**
  522. * ixgb_close - Disables a network interface
  523. * @netdev: network interface device structure
  524. *
  525. * Returns 0, this is not allowed to fail
  526. *
  527. * The close entry point is called when an interface is de-activated
  528. * by the OS. The hardware is still under the drivers control, but
  529. * needs to be disabled. A global MAC reset is issued to stop the
  530. * hardware, and all transmit and receive resources are freed.
  531. **/
  532. static int
  533. ixgb_close(struct net_device *netdev)
  534. {
  535. struct ixgb_adapter *adapter = netdev_priv(netdev);
  536. ixgb_down(adapter, TRUE);
  537. ixgb_free_tx_resources(adapter);
  538. ixgb_free_rx_resources(adapter);
  539. return 0;
  540. }
  541. /**
  542. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  543. * @adapter: board private structure
  544. *
  545. * Return 0 on success, negative on failure
  546. **/
  547. int
  548. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  549. {
  550. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  551. struct pci_dev *pdev = adapter->pdev;
  552. int size;
  553. size = sizeof(struct ixgb_buffer) * txdr->count;
  554. txdr->buffer_info = vmalloc(size);
  555. if(!txdr->buffer_info) {
  556. DPRINTK(PROBE, ERR,
  557. "Unable to allocate transmit descriptor ring memory\n");
  558. return -ENOMEM;
  559. }
  560. memset(txdr->buffer_info, 0, size);
  561. /* round up to nearest 4K */
  562. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  563. IXGB_ROUNDUP(txdr->size, 4096);
  564. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  565. if(!txdr->desc) {
  566. vfree(txdr->buffer_info);
  567. DPRINTK(PROBE, ERR,
  568. "Unable to allocate transmit descriptor memory\n");
  569. return -ENOMEM;
  570. }
  571. memset(txdr->desc, 0, txdr->size);
  572. txdr->next_to_use = 0;
  573. txdr->next_to_clean = 0;
  574. return 0;
  575. }
  576. /**
  577. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  578. * @adapter: board private structure
  579. *
  580. * Configure the Tx unit of the MAC after a reset.
  581. **/
  582. static void
  583. ixgb_configure_tx(struct ixgb_adapter *adapter)
  584. {
  585. uint64_t tdba = adapter->tx_ring.dma;
  586. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  587. uint32_t tctl;
  588. struct ixgb_hw *hw = &adapter->hw;
  589. /* Setup the Base and Length of the Tx Descriptor Ring
  590. * tx_ring.dma can be either a 32 or 64 bit value
  591. */
  592. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  593. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  594. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  595. /* Setup the HW Tx Head and Tail descriptor pointers */
  596. IXGB_WRITE_REG(hw, TDH, 0);
  597. IXGB_WRITE_REG(hw, TDT, 0);
  598. /* don't set up txdctl, it induces performance problems if configured
  599. * incorrectly */
  600. /* Set the Tx Interrupt Delay register */
  601. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  602. /* Program the Transmit Control Register */
  603. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  604. IXGB_WRITE_REG(hw, TCTL, tctl);
  605. /* Setup Transmit Descriptor Settings for this adapter */
  606. adapter->tx_cmd_type =
  607. IXGB_TX_DESC_TYPE
  608. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  609. }
  610. /**
  611. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  612. * @adapter: board private structure
  613. *
  614. * Returns 0 on success, negative on failure
  615. **/
  616. int
  617. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  618. {
  619. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  620. struct pci_dev *pdev = adapter->pdev;
  621. int size;
  622. size = sizeof(struct ixgb_buffer) * rxdr->count;
  623. rxdr->buffer_info = vmalloc(size);
  624. if(!rxdr->buffer_info) {
  625. DPRINTK(PROBE, ERR,
  626. "Unable to allocate receive descriptor ring\n");
  627. return -ENOMEM;
  628. }
  629. memset(rxdr->buffer_info, 0, size);
  630. /* Round up to nearest 4K */
  631. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  632. IXGB_ROUNDUP(rxdr->size, 4096);
  633. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  634. if(!rxdr->desc) {
  635. vfree(rxdr->buffer_info);
  636. DPRINTK(PROBE, ERR,
  637. "Unable to allocate receive descriptors\n");
  638. return -ENOMEM;
  639. }
  640. memset(rxdr->desc, 0, rxdr->size);
  641. rxdr->next_to_clean = 0;
  642. rxdr->next_to_use = 0;
  643. return 0;
  644. }
  645. /**
  646. * ixgb_setup_rctl - configure the receive control register
  647. * @adapter: Board private structure
  648. **/
  649. static void
  650. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  651. {
  652. uint32_t rctl;
  653. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  654. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  655. rctl |=
  656. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  657. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  658. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  659. rctl |= IXGB_RCTL_SECRC;
  660. if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
  661. rctl |= IXGB_RCTL_BSIZE_2048;
  662. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
  663. rctl |= IXGB_RCTL_BSIZE_4096;
  664. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
  665. rctl |= IXGB_RCTL_BSIZE_8192;
  666. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
  667. rctl |= IXGB_RCTL_BSIZE_16384;
  668. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  669. }
  670. /**
  671. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  672. * @adapter: board private structure
  673. *
  674. * Configure the Rx unit of the MAC after a reset.
  675. **/
  676. static void
  677. ixgb_configure_rx(struct ixgb_adapter *adapter)
  678. {
  679. uint64_t rdba = adapter->rx_ring.dma;
  680. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  681. struct ixgb_hw *hw = &adapter->hw;
  682. uint32_t rctl;
  683. uint32_t rxcsum;
  684. uint32_t rxdctl;
  685. /* make sure receives are disabled while setting up the descriptors */
  686. rctl = IXGB_READ_REG(hw, RCTL);
  687. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  688. /* set the Receive Delay Timer Register */
  689. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  690. /* Setup the Base and Length of the Rx Descriptor Ring */
  691. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  692. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  693. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  694. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  695. IXGB_WRITE_REG(hw, RDH, 0);
  696. IXGB_WRITE_REG(hw, RDT, 0);
  697. /* set up pre-fetching of receive buffers so we get some before we
  698. * run out (default hardware behavior is to run out before fetching
  699. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  700. * and the descriptors in hw cache are below PTHRESH. This avoids
  701. * the hardware behavior of fetching <=512 descriptors in a single
  702. * burst that pre-empts all other activity, usually causing fifo
  703. * overflows. */
  704. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  705. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  706. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  707. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  708. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  709. /* Enable Receive Checksum Offload for TCP and UDP */
  710. if(adapter->rx_csum == TRUE) {
  711. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  712. rxcsum |= IXGB_RXCSUM_TUOFL;
  713. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  714. }
  715. /* Enable Receives */
  716. IXGB_WRITE_REG(hw, RCTL, rctl);
  717. }
  718. /**
  719. * ixgb_free_tx_resources - Free Tx Resources
  720. * @adapter: board private structure
  721. *
  722. * Free all transmit software resources
  723. **/
  724. void
  725. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  726. {
  727. struct pci_dev *pdev = adapter->pdev;
  728. ixgb_clean_tx_ring(adapter);
  729. vfree(adapter->tx_ring.buffer_info);
  730. adapter->tx_ring.buffer_info = NULL;
  731. pci_free_consistent(pdev, adapter->tx_ring.size,
  732. adapter->tx_ring.desc, adapter->tx_ring.dma);
  733. adapter->tx_ring.desc = NULL;
  734. }
  735. static void
  736. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  737. struct ixgb_buffer *buffer_info)
  738. {
  739. struct pci_dev *pdev = adapter->pdev;
  740. if (buffer_info->dma)
  741. pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
  742. PCI_DMA_TODEVICE);
  743. if (buffer_info->skb)
  744. dev_kfree_skb_any(buffer_info->skb);
  745. buffer_info->skb = NULL;
  746. buffer_info->dma = 0;
  747. buffer_info->time_stamp = 0;
  748. /* these fields must always be initialized in tx
  749. * buffer_info->length = 0;
  750. * buffer_info->next_to_watch = 0; */
  751. }
  752. /**
  753. * ixgb_clean_tx_ring - Free Tx Buffers
  754. * @adapter: board private structure
  755. **/
  756. static void
  757. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  758. {
  759. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  760. struct ixgb_buffer *buffer_info;
  761. unsigned long size;
  762. unsigned int i;
  763. /* Free all the Tx ring sk_buffs */
  764. for(i = 0; i < tx_ring->count; i++) {
  765. buffer_info = &tx_ring->buffer_info[i];
  766. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  767. }
  768. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  769. memset(tx_ring->buffer_info, 0, size);
  770. /* Zero out the descriptor ring */
  771. memset(tx_ring->desc, 0, tx_ring->size);
  772. tx_ring->next_to_use = 0;
  773. tx_ring->next_to_clean = 0;
  774. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  775. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  776. }
  777. /**
  778. * ixgb_free_rx_resources - Free Rx Resources
  779. * @adapter: board private structure
  780. *
  781. * Free all receive software resources
  782. **/
  783. void
  784. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  785. {
  786. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  787. struct pci_dev *pdev = adapter->pdev;
  788. ixgb_clean_rx_ring(adapter);
  789. vfree(rx_ring->buffer_info);
  790. rx_ring->buffer_info = NULL;
  791. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  792. rx_ring->desc = NULL;
  793. }
  794. /**
  795. * ixgb_clean_rx_ring - Free Rx Buffers
  796. * @adapter: board private structure
  797. **/
  798. static void
  799. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  800. {
  801. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  802. struct ixgb_buffer *buffer_info;
  803. struct pci_dev *pdev = adapter->pdev;
  804. unsigned long size;
  805. unsigned int i;
  806. /* Free all the Rx ring sk_buffs */
  807. for(i = 0; i < rx_ring->count; i++) {
  808. buffer_info = &rx_ring->buffer_info[i];
  809. if(buffer_info->skb) {
  810. pci_unmap_single(pdev,
  811. buffer_info->dma,
  812. buffer_info->length,
  813. PCI_DMA_FROMDEVICE);
  814. dev_kfree_skb(buffer_info->skb);
  815. buffer_info->skb = NULL;
  816. }
  817. }
  818. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  819. memset(rx_ring->buffer_info, 0, size);
  820. /* Zero out the descriptor ring */
  821. memset(rx_ring->desc, 0, rx_ring->size);
  822. rx_ring->next_to_clean = 0;
  823. rx_ring->next_to_use = 0;
  824. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  825. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  826. }
  827. /**
  828. * ixgb_set_mac - Change the Ethernet Address of the NIC
  829. * @netdev: network interface device structure
  830. * @p: pointer to an address structure
  831. *
  832. * Returns 0 on success, negative on failure
  833. **/
  834. static int
  835. ixgb_set_mac(struct net_device *netdev, void *p)
  836. {
  837. struct ixgb_adapter *adapter = netdev_priv(netdev);
  838. struct sockaddr *addr = p;
  839. if(!is_valid_ether_addr(addr->sa_data))
  840. return -EADDRNOTAVAIL;
  841. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  842. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  843. return 0;
  844. }
  845. /**
  846. * ixgb_set_multi - Multicast and Promiscuous mode set
  847. * @netdev: network interface device structure
  848. *
  849. * The set_multi entry point is called whenever the multicast address
  850. * list or the network interface flags are updated. This routine is
  851. * responsible for configuring the hardware for proper multicast,
  852. * promiscuous mode, and all-multi behavior.
  853. **/
  854. static void
  855. ixgb_set_multi(struct net_device *netdev)
  856. {
  857. struct ixgb_adapter *adapter = netdev_priv(netdev);
  858. struct ixgb_hw *hw = &adapter->hw;
  859. struct dev_mc_list *mc_ptr;
  860. uint32_t rctl;
  861. int i;
  862. /* Check for Promiscuous and All Multicast modes */
  863. rctl = IXGB_READ_REG(hw, RCTL);
  864. if(netdev->flags & IFF_PROMISC) {
  865. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  866. } else if(netdev->flags & IFF_ALLMULTI) {
  867. rctl |= IXGB_RCTL_MPE;
  868. rctl &= ~IXGB_RCTL_UPE;
  869. } else {
  870. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  871. }
  872. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  873. rctl |= IXGB_RCTL_MPE;
  874. IXGB_WRITE_REG(hw, RCTL, rctl);
  875. } else {
  876. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  877. IXGB_WRITE_REG(hw, RCTL, rctl);
  878. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  879. i++, mc_ptr = mc_ptr->next)
  880. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  881. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  882. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  883. }
  884. }
  885. /**
  886. * ixgb_watchdog - Timer Call-back
  887. * @data: pointer to netdev cast into an unsigned long
  888. **/
  889. static void
  890. ixgb_watchdog(unsigned long data)
  891. {
  892. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  893. struct net_device *netdev = adapter->netdev;
  894. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  895. ixgb_check_for_link(&adapter->hw);
  896. if (ixgb_check_for_bad_link(&adapter->hw)) {
  897. /* force the reset path */
  898. netif_stop_queue(netdev);
  899. }
  900. if(adapter->hw.link_up) {
  901. if(!netif_carrier_ok(netdev)) {
  902. DPRINTK(LINK, INFO,
  903. "NIC Link is Up 10000 Mbps Full Duplex\n");
  904. adapter->link_speed = 10000;
  905. adapter->link_duplex = FULL_DUPLEX;
  906. netif_carrier_on(netdev);
  907. netif_wake_queue(netdev);
  908. }
  909. } else {
  910. if(netif_carrier_ok(netdev)) {
  911. adapter->link_speed = 0;
  912. adapter->link_duplex = 0;
  913. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  914. netif_carrier_off(netdev);
  915. netif_stop_queue(netdev);
  916. }
  917. }
  918. ixgb_update_stats(adapter);
  919. if(!netif_carrier_ok(netdev)) {
  920. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  921. /* We've lost link, so the controller stops DMA,
  922. * but we've got queued Tx work that's never going
  923. * to get done, so reset controller to flush Tx.
  924. * (Do the reset outside of interrupt context). */
  925. schedule_work(&adapter->tx_timeout_task);
  926. }
  927. }
  928. /* Force detection of hung controller every watchdog period */
  929. adapter->detect_tx_hung = TRUE;
  930. /* generate an interrupt to force clean up of any stragglers */
  931. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  932. /* Reset the timer */
  933. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  934. }
  935. #define IXGB_TX_FLAGS_CSUM 0x00000001
  936. #define IXGB_TX_FLAGS_VLAN 0x00000002
  937. #define IXGB_TX_FLAGS_TSO 0x00000004
  938. static int
  939. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  940. {
  941. #ifdef NETIF_F_TSO
  942. struct ixgb_context_desc *context_desc;
  943. unsigned int i;
  944. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  945. uint16_t ipcse, tucse, mss;
  946. int err;
  947. if (likely(skb_is_gso(skb))) {
  948. struct ixgb_buffer *buffer_info;
  949. if (skb_header_cloned(skb)) {
  950. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  951. if (err)
  952. return err;
  953. }
  954. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  955. mss = skb_shinfo(skb)->gso_size;
  956. skb->nh.iph->tot_len = 0;
  957. skb->nh.iph->check = 0;
  958. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  959. skb->nh.iph->daddr,
  960. 0, IPPROTO_TCP, 0);
  961. ipcss = skb->nh.raw - skb->data;
  962. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  963. ipcse = skb->h.raw - skb->data - 1;
  964. tucss = skb->h.raw - skb->data;
  965. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  966. tucse = 0;
  967. i = adapter->tx_ring.next_to_use;
  968. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  969. buffer_info = &adapter->tx_ring.buffer_info[i];
  970. WARN_ON(buffer_info->dma != 0);
  971. context_desc->ipcss = ipcss;
  972. context_desc->ipcso = ipcso;
  973. context_desc->ipcse = cpu_to_le16(ipcse);
  974. context_desc->tucss = tucss;
  975. context_desc->tucso = tucso;
  976. context_desc->tucse = cpu_to_le16(tucse);
  977. context_desc->mss = cpu_to_le16(mss);
  978. context_desc->hdr_len = hdr_len;
  979. context_desc->status = 0;
  980. context_desc->cmd_type_len = cpu_to_le32(
  981. IXGB_CONTEXT_DESC_TYPE
  982. | IXGB_CONTEXT_DESC_CMD_TSE
  983. | IXGB_CONTEXT_DESC_CMD_IP
  984. | IXGB_CONTEXT_DESC_CMD_TCP
  985. | IXGB_CONTEXT_DESC_CMD_IDE
  986. | (skb->len - (hdr_len)));
  987. if(++i == adapter->tx_ring.count) i = 0;
  988. adapter->tx_ring.next_to_use = i;
  989. return 1;
  990. }
  991. #endif
  992. return 0;
  993. }
  994. static boolean_t
  995. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  996. {
  997. struct ixgb_context_desc *context_desc;
  998. unsigned int i;
  999. uint8_t css, cso;
  1000. if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1001. struct ixgb_buffer *buffer_info;
  1002. css = skb->h.raw - skb->data;
  1003. cso = (skb->h.raw + skb->csum) - skb->data;
  1004. i = adapter->tx_ring.next_to_use;
  1005. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  1006. buffer_info = &adapter->tx_ring.buffer_info[i];
  1007. WARN_ON(buffer_info->dma != 0);
  1008. context_desc->tucss = css;
  1009. context_desc->tucso = cso;
  1010. context_desc->tucse = 0;
  1011. /* zero out any previously existing data in one instruction */
  1012. *(uint32_t *)&(context_desc->ipcss) = 0;
  1013. context_desc->status = 0;
  1014. context_desc->hdr_len = 0;
  1015. context_desc->mss = 0;
  1016. context_desc->cmd_type_len =
  1017. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1018. | IXGB_TX_DESC_CMD_IDE);
  1019. if(++i == adapter->tx_ring.count) i = 0;
  1020. adapter->tx_ring.next_to_use = i;
  1021. return TRUE;
  1022. }
  1023. return FALSE;
  1024. }
  1025. #define IXGB_MAX_TXD_PWR 14
  1026. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1027. static int
  1028. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1029. unsigned int first)
  1030. {
  1031. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1032. struct ixgb_buffer *buffer_info;
  1033. int len = skb->len;
  1034. unsigned int offset = 0, size, count = 0, i;
  1035. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1036. unsigned int f;
  1037. len -= skb->data_len;
  1038. i = tx_ring->next_to_use;
  1039. while(len) {
  1040. buffer_info = &tx_ring->buffer_info[i];
  1041. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1042. buffer_info->length = size;
  1043. WARN_ON(buffer_info->dma != 0);
  1044. buffer_info->dma =
  1045. pci_map_single(adapter->pdev,
  1046. skb->data + offset,
  1047. size,
  1048. PCI_DMA_TODEVICE);
  1049. buffer_info->time_stamp = jiffies;
  1050. buffer_info->next_to_watch = 0;
  1051. len -= size;
  1052. offset += size;
  1053. count++;
  1054. if(++i == tx_ring->count) i = 0;
  1055. }
  1056. for(f = 0; f < nr_frags; f++) {
  1057. struct skb_frag_struct *frag;
  1058. frag = &skb_shinfo(skb)->frags[f];
  1059. len = frag->size;
  1060. offset = 0;
  1061. while(len) {
  1062. buffer_info = &tx_ring->buffer_info[i];
  1063. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1064. buffer_info->length = size;
  1065. buffer_info->dma =
  1066. pci_map_page(adapter->pdev,
  1067. frag->page,
  1068. frag->page_offset + offset,
  1069. size,
  1070. PCI_DMA_TODEVICE);
  1071. buffer_info->time_stamp = jiffies;
  1072. buffer_info->next_to_watch = 0;
  1073. len -= size;
  1074. offset += size;
  1075. count++;
  1076. if(++i == tx_ring->count) i = 0;
  1077. }
  1078. }
  1079. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1080. tx_ring->buffer_info[i].skb = skb;
  1081. tx_ring->buffer_info[first].next_to_watch = i;
  1082. return count;
  1083. }
  1084. static void
  1085. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1086. {
  1087. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1088. struct ixgb_tx_desc *tx_desc = NULL;
  1089. struct ixgb_buffer *buffer_info;
  1090. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1091. uint8_t status = 0;
  1092. uint8_t popts = 0;
  1093. unsigned int i;
  1094. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1095. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1096. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1097. }
  1098. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1099. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1100. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1101. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1102. }
  1103. i = tx_ring->next_to_use;
  1104. while(count--) {
  1105. buffer_info = &tx_ring->buffer_info[i];
  1106. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1107. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1108. tx_desc->cmd_type_len =
  1109. cpu_to_le32(cmd_type_len | buffer_info->length);
  1110. tx_desc->status = status;
  1111. tx_desc->popts = popts;
  1112. tx_desc->vlan = cpu_to_le16(vlan_id);
  1113. if(++i == tx_ring->count) i = 0;
  1114. }
  1115. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1116. | IXGB_TX_DESC_CMD_RS );
  1117. /* Force memory writes to complete before letting h/w
  1118. * know there are new descriptors to fetch. (Only
  1119. * applicable for weak-ordered memory model archs,
  1120. * such as IA-64). */
  1121. wmb();
  1122. tx_ring->next_to_use = i;
  1123. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1124. }
  1125. /* Tx Descriptors needed, worst case */
  1126. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1127. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1128. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1129. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1130. static int
  1131. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1132. {
  1133. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1134. unsigned int first;
  1135. unsigned int tx_flags = 0;
  1136. unsigned long flags;
  1137. int vlan_id = 0;
  1138. int tso;
  1139. if(skb->len <= 0) {
  1140. dev_kfree_skb_any(skb);
  1141. return 0;
  1142. }
  1143. #ifdef NETIF_F_LLTX
  1144. local_irq_save(flags);
  1145. if (!spin_trylock(&adapter->tx_lock)) {
  1146. /* Collision - tell upper layer to requeue */
  1147. local_irq_restore(flags);
  1148. return NETDEV_TX_LOCKED;
  1149. }
  1150. #else
  1151. spin_lock_irqsave(&adapter->tx_lock, flags);
  1152. #endif
  1153. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1154. netif_stop_queue(netdev);
  1155. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1156. return NETDEV_TX_BUSY;
  1157. }
  1158. #ifndef NETIF_F_LLTX
  1159. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1160. #endif
  1161. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1162. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1163. vlan_id = vlan_tx_tag_get(skb);
  1164. }
  1165. first = adapter->tx_ring.next_to_use;
  1166. tso = ixgb_tso(adapter, skb);
  1167. if (tso < 0) {
  1168. dev_kfree_skb_any(skb);
  1169. #ifdef NETIF_F_LLTX
  1170. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1171. #endif
  1172. return NETDEV_TX_OK;
  1173. }
  1174. if (likely(tso))
  1175. tx_flags |= IXGB_TX_FLAGS_TSO;
  1176. else if(ixgb_tx_csum(adapter, skb))
  1177. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1178. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1179. tx_flags);
  1180. netdev->trans_start = jiffies;
  1181. #ifdef NETIF_F_LLTX
  1182. /* Make sure there is space in the ring for the next send. */
  1183. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
  1184. netif_stop_queue(netdev);
  1185. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1186. #endif
  1187. return NETDEV_TX_OK;
  1188. }
  1189. /**
  1190. * ixgb_tx_timeout - Respond to a Tx Hang
  1191. * @netdev: network interface device structure
  1192. **/
  1193. static void
  1194. ixgb_tx_timeout(struct net_device *netdev)
  1195. {
  1196. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1197. /* Do the reset outside of interrupt context */
  1198. schedule_work(&adapter->tx_timeout_task);
  1199. }
  1200. static void
  1201. ixgb_tx_timeout_task(struct net_device *netdev)
  1202. {
  1203. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1204. adapter->tx_timeout_count++;
  1205. ixgb_down(adapter, TRUE);
  1206. ixgb_up(adapter);
  1207. }
  1208. /**
  1209. * ixgb_get_stats - Get System Network Statistics
  1210. * @netdev: network interface device structure
  1211. *
  1212. * Returns the address of the device statistics structure.
  1213. * The statistics are actually updated from the timer callback.
  1214. **/
  1215. static struct net_device_stats *
  1216. ixgb_get_stats(struct net_device *netdev)
  1217. {
  1218. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1219. return &adapter->net_stats;
  1220. }
  1221. /**
  1222. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1223. * @netdev: network interface device structure
  1224. * @new_mtu: new value for maximum frame size
  1225. *
  1226. * Returns 0 on success, negative on failure
  1227. **/
  1228. static int
  1229. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1230. {
  1231. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1232. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1233. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1234. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1235. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1236. DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
  1237. return -EINVAL;
  1238. }
  1239. adapter->rx_buffer_len = max_frame;
  1240. netdev->mtu = new_mtu;
  1241. if ((old_max_frame != max_frame) && netif_running(netdev)) {
  1242. ixgb_down(adapter, TRUE);
  1243. ixgb_up(adapter);
  1244. }
  1245. return 0;
  1246. }
  1247. /**
  1248. * ixgb_update_stats - Update the board statistics counters.
  1249. * @adapter: board private structure
  1250. **/
  1251. void
  1252. ixgb_update_stats(struct ixgb_adapter *adapter)
  1253. {
  1254. struct net_device *netdev = adapter->netdev;
  1255. struct pci_dev *pdev = adapter->pdev;
  1256. /* Prevent stats update while adapter is being reset */
  1257. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  1258. return;
  1259. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1260. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1261. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1262. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1263. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1264. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1265. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1266. /* fix up multicast stats by removing broadcasts */
  1267. if(multi >= bcast)
  1268. multi -= bcast;
  1269. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1270. adapter->stats.mprch += (multi >> 32);
  1271. adapter->stats.bprcl += bcast_l;
  1272. adapter->stats.bprch += bcast_h;
  1273. } else {
  1274. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1275. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1276. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1277. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1278. }
  1279. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1280. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1281. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1282. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1283. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1284. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1285. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1286. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1287. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1288. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1289. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1290. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1291. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1292. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1293. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1294. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1295. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1296. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1297. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1298. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1299. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1300. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1301. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1302. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1303. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1304. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1305. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1306. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1307. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1308. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1309. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1310. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1311. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1312. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1313. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1314. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1315. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1316. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1317. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1318. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1319. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1320. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1321. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1322. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1323. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1324. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1325. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1326. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1327. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1328. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1329. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1330. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1331. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1332. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1333. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1334. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1335. /* Fill out the OS statistics structure */
  1336. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1337. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1338. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1339. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1340. adapter->net_stats.multicast = adapter->stats.mprcl;
  1341. adapter->net_stats.collisions = 0;
  1342. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1343. * with a length in the type/len field */
  1344. adapter->net_stats.rx_errors =
  1345. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1346. adapter->stats.ruc +
  1347. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1348. adapter->stats.icbc +
  1349. adapter->stats.ecbc + adapter->stats.mpc;
  1350. /* see above
  1351. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1352. */
  1353. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1354. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1355. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1356. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1357. adapter->net_stats.tx_errors = 0;
  1358. adapter->net_stats.rx_frame_errors = 0;
  1359. adapter->net_stats.tx_aborted_errors = 0;
  1360. adapter->net_stats.tx_carrier_errors = 0;
  1361. adapter->net_stats.tx_fifo_errors = 0;
  1362. adapter->net_stats.tx_heartbeat_errors = 0;
  1363. adapter->net_stats.tx_window_errors = 0;
  1364. }
  1365. #define IXGB_MAX_INTR 10
  1366. /**
  1367. * ixgb_intr - Interrupt Handler
  1368. * @irq: interrupt number
  1369. * @data: pointer to a network interface device structure
  1370. * @pt_regs: CPU registers structure
  1371. **/
  1372. static irqreturn_t
  1373. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1374. {
  1375. struct net_device *netdev = data;
  1376. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1377. struct ixgb_hw *hw = &adapter->hw;
  1378. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1379. #ifndef CONFIG_IXGB_NAPI
  1380. unsigned int i;
  1381. #endif
  1382. if(unlikely(!icr))
  1383. return IRQ_NONE; /* Not our interrupt */
  1384. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1385. mod_timer(&adapter->watchdog_timer, jiffies);
  1386. }
  1387. #ifdef CONFIG_IXGB_NAPI
  1388. if(netif_rx_schedule_prep(netdev)) {
  1389. /* Disable interrupts and register for poll. The flush
  1390. of the posted write is intentionally left out.
  1391. */
  1392. atomic_inc(&adapter->irq_sem);
  1393. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1394. __netif_rx_schedule(netdev);
  1395. }
  1396. #else
  1397. /* yes, that is actually a & and it is meant to make sure that
  1398. * every pass through this for loop checks both receive and
  1399. * transmit queues for completed descriptors, intended to
  1400. * avoid starvation issues and assist tx/rx fairness. */
  1401. for(i = 0; i < IXGB_MAX_INTR; i++)
  1402. if(!ixgb_clean_rx_irq(adapter) &
  1403. !ixgb_clean_tx_irq(adapter))
  1404. break;
  1405. #endif
  1406. return IRQ_HANDLED;
  1407. }
  1408. #ifdef CONFIG_IXGB_NAPI
  1409. /**
  1410. * ixgb_clean - NAPI Rx polling callback
  1411. * @adapter: board private structure
  1412. **/
  1413. static int
  1414. ixgb_clean(struct net_device *netdev, int *budget)
  1415. {
  1416. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1417. int work_to_do = min(*budget, netdev->quota);
  1418. int tx_cleaned;
  1419. int work_done = 0;
  1420. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1421. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1422. *budget -= work_done;
  1423. netdev->quota -= work_done;
  1424. /* if no Tx and not enough Rx work done, exit the polling mode */
  1425. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1426. netif_rx_complete(netdev);
  1427. ixgb_irq_enable(adapter);
  1428. return 0;
  1429. }
  1430. return 1;
  1431. }
  1432. #endif
  1433. /**
  1434. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1435. * @adapter: board private structure
  1436. **/
  1437. static boolean_t
  1438. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1439. {
  1440. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1441. struct net_device *netdev = adapter->netdev;
  1442. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1443. struct ixgb_buffer *buffer_info;
  1444. unsigned int i, eop;
  1445. boolean_t cleaned = FALSE;
  1446. i = tx_ring->next_to_clean;
  1447. eop = tx_ring->buffer_info[i].next_to_watch;
  1448. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1449. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1450. for(cleaned = FALSE; !cleaned; ) {
  1451. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1452. buffer_info = &tx_ring->buffer_info[i];
  1453. if (tx_desc->popts
  1454. & (IXGB_TX_DESC_POPTS_TXSM |
  1455. IXGB_TX_DESC_POPTS_IXSM))
  1456. adapter->hw_csum_tx_good++;
  1457. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1458. *(uint32_t *)&(tx_desc->status) = 0;
  1459. cleaned = (i == eop);
  1460. if(++i == tx_ring->count) i = 0;
  1461. }
  1462. eop = tx_ring->buffer_info[i].next_to_watch;
  1463. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1464. }
  1465. tx_ring->next_to_clean = i;
  1466. if (unlikely(netif_queue_stopped(netdev))) {
  1467. spin_lock(&adapter->tx_lock);
  1468. if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1469. (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
  1470. netif_wake_queue(netdev);
  1471. spin_unlock(&adapter->tx_lock);
  1472. }
  1473. if(adapter->detect_tx_hung) {
  1474. /* detect a transmit hang in hardware, this serializes the
  1475. * check with the clearing of time_stamp and movement of i */
  1476. adapter->detect_tx_hung = FALSE;
  1477. if (tx_ring->buffer_info[eop].dma &&
  1478. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
  1479. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1480. IXGB_STATUS_TXOFF)) {
  1481. /* detected Tx unit hang */
  1482. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  1483. " TDH <%x>\n"
  1484. " TDT <%x>\n"
  1485. " next_to_use <%x>\n"
  1486. " next_to_clean <%x>\n"
  1487. "buffer_info[next_to_clean]\n"
  1488. " time_stamp <%lx>\n"
  1489. " next_to_watch <%x>\n"
  1490. " jiffies <%lx>\n"
  1491. " next_to_watch.status <%x>\n",
  1492. IXGB_READ_REG(&adapter->hw, TDH),
  1493. IXGB_READ_REG(&adapter->hw, TDT),
  1494. tx_ring->next_to_use,
  1495. tx_ring->next_to_clean,
  1496. tx_ring->buffer_info[eop].time_stamp,
  1497. eop,
  1498. jiffies,
  1499. eop_desc->status);
  1500. netif_stop_queue(netdev);
  1501. }
  1502. }
  1503. return cleaned;
  1504. }
  1505. /**
  1506. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1507. * @adapter: board private structure
  1508. * @rx_desc: receive descriptor
  1509. * @sk_buff: socket buffer with received data
  1510. **/
  1511. static void
  1512. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1513. struct ixgb_rx_desc *rx_desc,
  1514. struct sk_buff *skb)
  1515. {
  1516. /* Ignore Checksum bit is set OR
  1517. * TCP Checksum has not been calculated
  1518. */
  1519. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1520. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1521. skb->ip_summed = CHECKSUM_NONE;
  1522. return;
  1523. }
  1524. /* At this point we know the hardware did the TCP checksum */
  1525. /* now look at the TCP checksum error bit */
  1526. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1527. /* let the stack verify checksum errors */
  1528. skb->ip_summed = CHECKSUM_NONE;
  1529. adapter->hw_csum_rx_error++;
  1530. } else {
  1531. /* TCP checksum is good */
  1532. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1533. adapter->hw_csum_rx_good++;
  1534. }
  1535. }
  1536. /**
  1537. * ixgb_clean_rx_irq - Send received data up the network stack,
  1538. * @adapter: board private structure
  1539. **/
  1540. static boolean_t
  1541. #ifdef CONFIG_IXGB_NAPI
  1542. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1543. #else
  1544. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1545. #endif
  1546. {
  1547. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1548. struct net_device *netdev = adapter->netdev;
  1549. struct pci_dev *pdev = adapter->pdev;
  1550. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1551. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1552. uint32_t length;
  1553. unsigned int i, j;
  1554. boolean_t cleaned = FALSE;
  1555. i = rx_ring->next_to_clean;
  1556. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1557. buffer_info = &rx_ring->buffer_info[i];
  1558. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1559. struct sk_buff *skb, *next_skb;
  1560. u8 status;
  1561. #ifdef CONFIG_IXGB_NAPI
  1562. if(*work_done >= work_to_do)
  1563. break;
  1564. (*work_done)++;
  1565. #endif
  1566. status = rx_desc->status;
  1567. skb = buffer_info->skb;
  1568. buffer_info->skb = NULL;
  1569. prefetch(skb->data);
  1570. if(++i == rx_ring->count) i = 0;
  1571. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1572. prefetch(next_rxd);
  1573. if((j = i + 1) == rx_ring->count) j = 0;
  1574. next2_buffer = &rx_ring->buffer_info[j];
  1575. prefetch(next2_buffer);
  1576. next_buffer = &rx_ring->buffer_info[i];
  1577. next_skb = next_buffer->skb;
  1578. prefetch(next_skb);
  1579. cleaned = TRUE;
  1580. pci_unmap_single(pdev,
  1581. buffer_info->dma,
  1582. buffer_info->length,
  1583. PCI_DMA_FROMDEVICE);
  1584. length = le16_to_cpu(rx_desc->length);
  1585. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1586. /* All receives must fit into a single buffer */
  1587. IXGB_DBG("Receive packet consumed multiple buffers "
  1588. "length<%x>\n", length);
  1589. dev_kfree_skb_irq(skb);
  1590. goto rxdesc_done;
  1591. }
  1592. if (unlikely(rx_desc->errors
  1593. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1594. | IXGB_RX_DESC_ERRORS_P |
  1595. IXGB_RX_DESC_ERRORS_RXE))) {
  1596. dev_kfree_skb_irq(skb);
  1597. goto rxdesc_done;
  1598. }
  1599. /* code added for copybreak, this should improve
  1600. * performance for small packets with large amounts
  1601. * of reassembly being done in the stack */
  1602. #define IXGB_CB_LENGTH 256
  1603. if (length < IXGB_CB_LENGTH) {
  1604. struct sk_buff *new_skb =
  1605. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  1606. if (new_skb) {
  1607. skb_reserve(new_skb, NET_IP_ALIGN);
  1608. memcpy(new_skb->data - NET_IP_ALIGN,
  1609. skb->data - NET_IP_ALIGN,
  1610. length + NET_IP_ALIGN);
  1611. /* save the skb in buffer_info as good */
  1612. buffer_info->skb = skb;
  1613. skb = new_skb;
  1614. }
  1615. }
  1616. /* end copybreak code */
  1617. /* Good Receive */
  1618. skb_put(skb, length);
  1619. /* Receive Checksum Offload */
  1620. ixgb_rx_checksum(adapter, rx_desc, skb);
  1621. skb->protocol = eth_type_trans(skb, netdev);
  1622. #ifdef CONFIG_IXGB_NAPI
  1623. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1624. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1625. le16_to_cpu(rx_desc->special) &
  1626. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1627. } else {
  1628. netif_receive_skb(skb);
  1629. }
  1630. #else /* CONFIG_IXGB_NAPI */
  1631. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1632. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1633. le16_to_cpu(rx_desc->special) &
  1634. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1635. } else {
  1636. netif_rx(skb);
  1637. }
  1638. #endif /* CONFIG_IXGB_NAPI */
  1639. netdev->last_rx = jiffies;
  1640. rxdesc_done:
  1641. /* clean up descriptor, might be written over by hw */
  1642. rx_desc->status = 0;
  1643. /* use prefetched values */
  1644. rx_desc = next_rxd;
  1645. buffer_info = next_buffer;
  1646. }
  1647. rx_ring->next_to_clean = i;
  1648. ixgb_alloc_rx_buffers(adapter);
  1649. return cleaned;
  1650. }
  1651. /**
  1652. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1653. * @adapter: address of board private structure
  1654. **/
  1655. static void
  1656. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1657. {
  1658. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1659. struct net_device *netdev = adapter->netdev;
  1660. struct pci_dev *pdev = adapter->pdev;
  1661. struct ixgb_rx_desc *rx_desc;
  1662. struct ixgb_buffer *buffer_info;
  1663. struct sk_buff *skb;
  1664. unsigned int i;
  1665. int num_group_tail_writes;
  1666. long cleancount;
  1667. i = rx_ring->next_to_use;
  1668. buffer_info = &rx_ring->buffer_info[i];
  1669. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1670. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1671. /* leave three descriptors unused */
  1672. while(--cleancount > 2) {
  1673. /* recycle! its good for you */
  1674. skb = buffer_info->skb;
  1675. if (skb) {
  1676. skb_trim(skb, 0);
  1677. goto map_skb;
  1678. }
  1679. skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
  1680. + NET_IP_ALIGN);
  1681. if (unlikely(!skb)) {
  1682. /* Better luck next round */
  1683. adapter->alloc_rx_buff_failed++;
  1684. break;
  1685. }
  1686. /* Make buffer alignment 2 beyond a 16 byte boundary
  1687. * this will result in a 16 byte aligned IP header after
  1688. * the 14 byte MAC header is removed
  1689. */
  1690. skb_reserve(skb, NET_IP_ALIGN);
  1691. buffer_info->skb = skb;
  1692. buffer_info->length = adapter->rx_buffer_len;
  1693. map_skb:
  1694. buffer_info->dma = pci_map_single(pdev,
  1695. skb->data,
  1696. adapter->rx_buffer_len,
  1697. PCI_DMA_FROMDEVICE);
  1698. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1699. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1700. /* guarantee DD bit not set now before h/w gets descriptor
  1701. * this is the rest of the workaround for h/w double
  1702. * writeback. */
  1703. rx_desc->status = 0;
  1704. if(++i == rx_ring->count) i = 0;
  1705. buffer_info = &rx_ring->buffer_info[i];
  1706. }
  1707. if (likely(rx_ring->next_to_use != i)) {
  1708. rx_ring->next_to_use = i;
  1709. if (unlikely(i-- == 0))
  1710. i = (rx_ring->count - 1);
  1711. /* Force memory writes to complete before letting h/w
  1712. * know there are new descriptors to fetch. (Only
  1713. * applicable for weak-ordered memory model archs, such
  1714. * as IA-64). */
  1715. wmb();
  1716. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1717. }
  1718. }
  1719. /**
  1720. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1721. *
  1722. * @param netdev network interface device structure
  1723. * @param grp indicates to enable or disable tagging/stripping
  1724. **/
  1725. static void
  1726. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1727. {
  1728. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1729. uint32_t ctrl, rctl;
  1730. ixgb_irq_disable(adapter);
  1731. adapter->vlgrp = grp;
  1732. if(grp) {
  1733. /* enable VLAN tag insert/strip */
  1734. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1735. ctrl |= IXGB_CTRL0_VME;
  1736. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1737. /* enable VLAN receive filtering */
  1738. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1739. rctl |= IXGB_RCTL_VFE;
  1740. rctl &= ~IXGB_RCTL_CFIEN;
  1741. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1742. } else {
  1743. /* disable VLAN tag insert/strip */
  1744. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1745. ctrl &= ~IXGB_CTRL0_VME;
  1746. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1747. /* disable VLAN filtering */
  1748. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1749. rctl &= ~IXGB_RCTL_VFE;
  1750. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1751. }
  1752. ixgb_irq_enable(adapter);
  1753. }
  1754. static void
  1755. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1756. {
  1757. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1758. uint32_t vfta, index;
  1759. /* add VID to filter table */
  1760. index = (vid >> 5) & 0x7F;
  1761. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1762. vfta |= (1 << (vid & 0x1F));
  1763. ixgb_write_vfta(&adapter->hw, index, vfta);
  1764. }
  1765. static void
  1766. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1767. {
  1768. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1769. uint32_t vfta, index;
  1770. ixgb_irq_disable(adapter);
  1771. if(adapter->vlgrp)
  1772. adapter->vlgrp->vlan_devices[vid] = NULL;
  1773. ixgb_irq_enable(adapter);
  1774. /* remove VID from filter table*/
  1775. index = (vid >> 5) & 0x7F;
  1776. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1777. vfta &= ~(1 << (vid & 0x1F));
  1778. ixgb_write_vfta(&adapter->hw, index, vfta);
  1779. }
  1780. static void
  1781. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1782. {
  1783. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1784. if(adapter->vlgrp) {
  1785. uint16_t vid;
  1786. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1787. if(!adapter->vlgrp->vlan_devices[vid])
  1788. continue;
  1789. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1790. }
  1791. }
  1792. }
  1793. #ifdef CONFIG_NET_POLL_CONTROLLER
  1794. /*
  1795. * Polling 'interrupt' - used by things like netconsole to send skbs
  1796. * without having to re-enable interrupts. It's not called while
  1797. * the interrupt routine is executing.
  1798. */
  1799. static void ixgb_netpoll(struct net_device *dev)
  1800. {
  1801. struct ixgb_adapter *adapter = netdev_priv(dev);
  1802. disable_irq(adapter->pdev->irq);
  1803. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1804. enable_irq(adapter->pdev->irq);
  1805. }
  1806. #endif
  1807. /**
  1808. * ixgb_io_error_detected() - called when PCI error is detected
  1809. * @pdev pointer to pci device with error
  1810. * @state pci channel state after error
  1811. *
  1812. * This callback is called by the PCI subsystem whenever
  1813. * a PCI bus error is detected.
  1814. */
  1815. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  1816. enum pci_channel_state state)
  1817. {
  1818. struct net_device *netdev = pci_get_drvdata(pdev);
  1819. struct ixgb_adapter *adapter = netdev->priv;
  1820. if(netif_running(netdev))
  1821. ixgb_down(adapter, TRUE);
  1822. pci_disable_device(pdev);
  1823. /* Request a slot reset. */
  1824. return PCI_ERS_RESULT_NEED_RESET;
  1825. }
  1826. /**
  1827. * ixgb_io_slot_reset - called after the pci bus has been reset.
  1828. * @pdev pointer to pci device with error
  1829. *
  1830. * This callback is called after the PCI buss has been reset.
  1831. * Basically, this tries to restart the card from scratch.
  1832. * This is a shortened version of the device probe/discovery code,
  1833. * it resembles the first-half of the ixgb_probe() routine.
  1834. */
  1835. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
  1836. {
  1837. struct net_device *netdev = pci_get_drvdata(pdev);
  1838. struct ixgb_adapter *adapter = netdev->priv;
  1839. if(pci_enable_device(pdev)) {
  1840. DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
  1841. return PCI_ERS_RESULT_DISCONNECT;
  1842. }
  1843. /* Perform card reset only on one instance of the card */
  1844. if (0 != PCI_FUNC (pdev->devfn))
  1845. return PCI_ERS_RESULT_RECOVERED;
  1846. pci_set_master(pdev);
  1847. netif_carrier_off(netdev);
  1848. netif_stop_queue(netdev);
  1849. ixgb_reset(adapter);
  1850. /* Make sure the EEPROM is good */
  1851. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  1852. DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
  1853. return PCI_ERS_RESULT_DISCONNECT;
  1854. }
  1855. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  1856. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  1857. if(!is_valid_ether_addr(netdev->perm_addr)) {
  1858. DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
  1859. return PCI_ERS_RESULT_DISCONNECT;
  1860. }
  1861. return PCI_ERS_RESULT_RECOVERED;
  1862. }
  1863. /**
  1864. * ixgb_io_resume - called when its OK to resume normal operations
  1865. * @pdev pointer to pci device with error
  1866. *
  1867. * The error recovery driver tells us that its OK to resume
  1868. * normal operation. Implementation resembles the second-half
  1869. * of the ixgb_probe() routine.
  1870. */
  1871. static void ixgb_io_resume (struct pci_dev *pdev)
  1872. {
  1873. struct net_device *netdev = pci_get_drvdata(pdev);
  1874. struct ixgb_adapter *adapter = netdev->priv;
  1875. pci_set_master(pdev);
  1876. if(netif_running(netdev)) {
  1877. if(ixgb_up(adapter)) {
  1878. printk ("ixgb: can't bring device back up after reset\n");
  1879. return;
  1880. }
  1881. }
  1882. netif_device_attach(netdev);
  1883. mod_timer(&adapter->watchdog_timer, jiffies);
  1884. }
  1885. /* ixgb_main.c */