pmc551.c 25 KB

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  1. /*
  2. * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
  3. *
  4. * PMC551 PCI Mezzanine Ram Device
  5. *
  6. * Author:
  7. * Mark Ferrell <mferrell@mvista.com>
  8. * Copyright 1999,2000 Nortel Networks
  9. *
  10. * License:
  11. * As part of this driver was derived from the slram.c driver it
  12. * falls under the same license, which is GNU General Public
  13. * License v2
  14. *
  15. * Description:
  16. * This driver is intended to support the PMC551 PCI Ram device
  17. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  18. * cPCI embedded systems. The device contains a single SROM
  19. * that initially programs the V370PDC chipset onboard the
  20. * device, and various banks of DRAM/SDRAM onboard. This driver
  21. * implements this PCI Ram device as an MTD (Memory Technology
  22. * Device) so that it can be used to hold a file system, or for
  23. * added swap space in embedded systems. Since the memory on
  24. * this board isn't as fast as main memory we do not try to hook
  25. * it into main memory as that would simply reduce performance
  26. * on the system. Using it as a block device allows us to use
  27. * it as high speed swap or for a high speed disk device of some
  28. * sort. Which becomes very useful on diskless systems in the
  29. * embedded market I might add.
  30. *
  31. * Notes:
  32. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  33. * have available claims that all 4 of it's DRAM banks have 64M
  34. * of ram configured (making a grand total of 256M onboard).
  35. * This is slightly annoying since the BAR0 size reflects the
  36. * aperture size, not the dram size, and the V370PDC supplies no
  37. * other method for memory size discovery. This problem is
  38. * mostly only relevant when compiled as a module, as the
  39. * unloading of the module with an aperture size smaller then
  40. * the ram will cause the driver to detect the onboard memory
  41. * size to be equal to the aperture size when the module is
  42. * reloaded. Soooo, to help, the module supports an msize
  43. * option to allow the specification of the onboard memory, and
  44. * an asize option, to allow the specification of the aperture
  45. * size. The aperture must be equal to or less then the memory
  46. * size, the driver will correct this if you screw it up. This
  47. * problem is not relevant for compiled in drivers as compiled
  48. * in drivers only init once.
  49. *
  50. * Credits:
  51. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  52. * initial example code of how to initialize this device and for
  53. * help with questions I had concerning operation of the device.
  54. *
  55. * Most of the MTD code for this driver was originally written
  56. * for the slram.o module in the MTD drivers package which
  57. * allows the mapping of system memory into an MTD device.
  58. * Since the PMC551 memory module is accessed in the same
  59. * fashion as system memory, the slram.c code became a very nice
  60. * fit to the needs of this driver. All we added was PCI
  61. * detection/initialization to the driver and automatically figure
  62. * out the size via the PCI detection.o, later changes by Corey
  63. * Minyard set up the card to utilize a 1M sliding apature.
  64. *
  65. * Corey Minyard <minyard@nortelnetworks.com>
  66. * * Modified driver to utilize a sliding aperture instead of
  67. * mapping all memory into kernel space which turned out to
  68. * be very wasteful.
  69. * * Located a bug in the SROM's initialization sequence that
  70. * made the memory unusable, added a fix to code to touch up
  71. * the DRAM some.
  72. *
  73. * Bugs/FIXME's:
  74. * * MUST fix the init function to not spin on a register
  75. * waiting for it to set .. this does not safely handle busted
  76. * devices that never reset the register correctly which will
  77. * cause the system to hang w/ a reboot being the only chance at
  78. * recover. [sort of fixed, could be better]
  79. * * Add I2C handling of the SROM so we can read the SROM's information
  80. * about the aperture size. This should always accurately reflect the
  81. * onboard memory size.
  82. * * Comb the init routine. It's still a bit cludgy on a few things.
  83. */
  84. #include <linux/kernel.h>
  85. #include <linux/module.h>
  86. #include <asm/uaccess.h>
  87. #include <linux/types.h>
  88. #include <linux/sched.h>
  89. #include <linux/init.h>
  90. #include <linux/ptrace.h>
  91. #include <linux/slab.h>
  92. #include <linux/string.h>
  93. #include <linux/timer.h>
  94. #include <linux/major.h>
  95. #include <linux/fs.h>
  96. #include <linux/ioctl.h>
  97. #include <asm/io.h>
  98. #include <asm/system.h>
  99. #include <linux/pci.h>
  100. #include <linux/mtd/mtd.h>
  101. #include <linux/mtd/pmc551.h>
  102. #include <linux/mtd/compatmac.h>
  103. static struct mtd_info *pmc551list;
  104. static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
  105. {
  106. struct mypriv *priv = mtd->priv;
  107. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  108. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  109. unsigned long end;
  110. u_char *ptr;
  111. size_t retlen;
  112. #ifdef CONFIG_MTD_PMC551_DEBUG
  113. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
  114. (long)instr->len);
  115. #endif
  116. end = instr->addr + instr->len - 1;
  117. /* Is it past the end? */
  118. if (end > mtd->size) {
  119. #ifdef CONFIG_MTD_PMC551_DEBUG
  120. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n",
  121. (long)end, (long)mtd->size);
  122. #endif
  123. return -EINVAL;
  124. }
  125. eoff_hi = end & ~(priv->asize - 1);
  126. soff_hi = instr->addr & ~(priv->asize - 1);
  127. eoff_lo = end & (priv->asize - 1);
  128. soff_lo = instr->addr & (priv->asize - 1);
  129. pmc551_point(mtd, instr->addr, instr->len, &retlen, &ptr);
  130. if (soff_hi == eoff_hi || mtd->size == priv->asize) {
  131. /* The whole thing fits within one access, so just one shot
  132. will do it. */
  133. memset(ptr, 0xff, instr->len);
  134. } else {
  135. /* We have to do multiple writes to get all the data
  136. written. */
  137. while (soff_hi != eoff_hi) {
  138. #ifdef CONFIG_MTD_PMC551_DEBUG
  139. printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
  140. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  141. #endif
  142. memset(ptr, 0xff, priv->asize);
  143. if (soff_hi + priv->asize >= mtd->size) {
  144. goto out;
  145. }
  146. soff_hi += priv->asize;
  147. pmc551_point(mtd, (priv->base_map0 | soff_hi),
  148. priv->asize, &retlen, &ptr);
  149. }
  150. memset(ptr, 0xff, eoff_lo);
  151. }
  152. out:
  153. instr->state = MTD_ERASE_DONE;
  154. #ifdef CONFIG_MTD_PMC551_DEBUG
  155. printk(KERN_DEBUG "pmc551_erase() done\n");
  156. #endif
  157. mtd_erase_callback(instr);
  158. return 0;
  159. }
  160. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  161. size_t * retlen, u_char ** mtdbuf)
  162. {
  163. struct mypriv *priv = mtd->priv;
  164. u32 soff_hi;
  165. u32 soff_lo;
  166. #ifdef CONFIG_MTD_PMC551_DEBUG
  167. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  168. #endif
  169. if (from + len > mtd->size) {
  170. #ifdef CONFIG_MTD_PMC551_DEBUG
  171. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n",
  172. (long)from + len, (long)mtd->size);
  173. #endif
  174. return -EINVAL;
  175. }
  176. soff_hi = from & ~(priv->asize - 1);
  177. soff_lo = from & (priv->asize - 1);
  178. /* Cheap hack optimization */
  179. if (priv->curr_map0 != from) {
  180. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  181. (priv->base_map0 | soff_hi));
  182. priv->curr_map0 = soff_hi;
  183. }
  184. *mtdbuf = priv->start + soff_lo;
  185. *retlen = len;
  186. return 0;
  187. }
  188. static void pmc551_unpoint(struct mtd_info *mtd, u_char * addr, loff_t from,
  189. size_t len)
  190. {
  191. #ifdef CONFIG_MTD_PMC551_DEBUG
  192. printk(KERN_DEBUG "pmc551_unpoint()\n");
  193. #endif
  194. }
  195. static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
  196. size_t * retlen, u_char * buf)
  197. {
  198. struct mypriv *priv = mtd->priv;
  199. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  200. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  201. unsigned long end;
  202. u_char *ptr;
  203. u_char *copyto = buf;
  204. #ifdef CONFIG_MTD_PMC551_DEBUG
  205. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
  206. (long)from, (long)len, (long)priv->asize);
  207. #endif
  208. end = from + len - 1;
  209. /* Is it past the end? */
  210. if (end > mtd->size) {
  211. #ifdef CONFIG_MTD_PMC551_DEBUG
  212. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n",
  213. (long)end, (long)mtd->size);
  214. #endif
  215. return -EINVAL;
  216. }
  217. soff_hi = from & ~(priv->asize - 1);
  218. eoff_hi = end & ~(priv->asize - 1);
  219. soff_lo = from & (priv->asize - 1);
  220. eoff_lo = end & (priv->asize - 1);
  221. pmc551_point(mtd, from, len, retlen, &ptr);
  222. if (soff_hi == eoff_hi) {
  223. /* The whole thing fits within one access, so just one shot
  224. will do it. */
  225. memcpy(copyto, ptr, len);
  226. copyto += len;
  227. } else {
  228. /* We have to do multiple writes to get all the data
  229. written. */
  230. while (soff_hi != eoff_hi) {
  231. #ifdef CONFIG_MTD_PMC551_DEBUG
  232. printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
  233. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  234. #endif
  235. memcpy(copyto, ptr, priv->asize);
  236. copyto += priv->asize;
  237. if (soff_hi + priv->asize >= mtd->size) {
  238. goto out;
  239. }
  240. soff_hi += priv->asize;
  241. pmc551_point(mtd, soff_hi, priv->asize, retlen, &ptr);
  242. }
  243. memcpy(copyto, ptr, eoff_lo);
  244. copyto += eoff_lo;
  245. }
  246. out:
  247. #ifdef CONFIG_MTD_PMC551_DEBUG
  248. printk(KERN_DEBUG "pmc551_read() done\n");
  249. #endif
  250. *retlen = copyto - buf;
  251. return 0;
  252. }
  253. static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
  254. size_t * retlen, const u_char * buf)
  255. {
  256. struct mypriv *priv = mtd->priv;
  257. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  258. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  259. unsigned long end;
  260. u_char *ptr;
  261. const u_char *copyfrom = buf;
  262. #ifdef CONFIG_MTD_PMC551_DEBUG
  263. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
  264. (long)to, (long)len, (long)priv->asize);
  265. #endif
  266. end = to + len - 1;
  267. /* Is it past the end? or did the u32 wrap? */
  268. if (end > mtd->size) {
  269. #ifdef CONFIG_MTD_PMC551_DEBUG
  270. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, "
  271. "size: %ld, to: %ld)\n", (long)end, (long)mtd->size,
  272. (long)to);
  273. #endif
  274. return -EINVAL;
  275. }
  276. soff_hi = to & ~(priv->asize - 1);
  277. eoff_hi = end & ~(priv->asize - 1);
  278. soff_lo = to & (priv->asize - 1);
  279. eoff_lo = end & (priv->asize - 1);
  280. pmc551_point(mtd, to, len, retlen, &ptr);
  281. if (soff_hi == eoff_hi) {
  282. /* The whole thing fits within one access, so just one shot
  283. will do it. */
  284. memcpy(ptr, copyfrom, len);
  285. copyfrom += len;
  286. } else {
  287. /* We have to do multiple writes to get all the data
  288. written. */
  289. while (soff_hi != eoff_hi) {
  290. #ifdef CONFIG_MTD_PMC551_DEBUG
  291. printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
  292. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  293. #endif
  294. memcpy(ptr, copyfrom, priv->asize);
  295. copyfrom += priv->asize;
  296. if (soff_hi >= mtd->size) {
  297. goto out;
  298. }
  299. soff_hi += priv->asize;
  300. pmc551_point(mtd, soff_hi, priv->asize, retlen, &ptr);
  301. }
  302. memcpy(ptr, copyfrom, eoff_lo);
  303. copyfrom += eoff_lo;
  304. }
  305. out:
  306. #ifdef CONFIG_MTD_PMC551_DEBUG
  307. printk(KERN_DEBUG "pmc551_write() done\n");
  308. #endif
  309. *retlen = copyfrom - buf;
  310. return 0;
  311. }
  312. /*
  313. * Fixup routines for the V370PDC
  314. * PCI device ID 0x020011b0
  315. *
  316. * This function basicly kick starts the DRAM oboard the card and gets it
  317. * ready to be used. Before this is done the device reads VERY erratic, so
  318. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  319. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  320. * register. FIXME: stop spinning on registers .. must implement a timeout
  321. * mechanism
  322. * returns the size of the memory region found.
  323. */
  324. static u32 fixup_pmc551(struct pci_dev *dev)
  325. {
  326. #ifdef CONFIG_MTD_PMC551_BUGFIX
  327. u32 dram_data;
  328. #endif
  329. u32 size, dcmd, cfg, dtmp;
  330. u16 cmd, tmp, i;
  331. u8 bcmd, counter;
  332. /* Sanity Check */
  333. if (!dev) {
  334. return -ENODEV;
  335. }
  336. /*
  337. * Attempt to reset the card
  338. * FIXME: Stop Spinning registers
  339. */
  340. counter = 0;
  341. /* unlock registers */
  342. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
  343. /* read in old data */
  344. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  345. /* bang the reset line up and down for a few */
  346. for (i = 0; i < 10; i++) {
  347. counter = 0;
  348. bcmd &= ~0x80;
  349. while (counter++ < 100) {
  350. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  351. }
  352. counter = 0;
  353. bcmd |= 0x80;
  354. while (counter++ < 100) {
  355. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  356. }
  357. }
  358. bcmd |= (0x40 | 0x20);
  359. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  360. /*
  361. * Take care and turn off the memory on the device while we
  362. * tweak the configurations
  363. */
  364. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  365. tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  366. pci_write_config_word(dev, PCI_COMMAND, tmp);
  367. /*
  368. * Disable existing aperture before probing memory size
  369. */
  370. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  371. dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
  372. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  373. /*
  374. * Grab old BAR0 config so that we can figure out memory size
  375. * This is another bit of kludge going on. The reason for the
  376. * redundancy is I am hoping to retain the original configuration
  377. * previously assigned to the card by the BIOS or some previous
  378. * fixup routine in the kernel. So we read the old config into cfg,
  379. * then write all 1's to the memory space, read back the result into
  380. * "size", and then write back all the old config.
  381. */
  382. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
  383. #ifndef CONFIG_MTD_PMC551_BUGFIX
  384. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
  385. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
  386. size = (size & PCI_BASE_ADDRESS_MEM_MASK);
  387. size &= ~(size - 1);
  388. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
  389. #else
  390. /*
  391. * Get the size of the memory by reading all the DRAM size values
  392. * and adding them up.
  393. *
  394. * KLUDGE ALERT: the boards we are using have invalid column and
  395. * row mux values. We fix them here, but this will break other
  396. * memory configurations.
  397. */
  398. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  399. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  400. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  401. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  402. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  403. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  404. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  405. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  406. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  407. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  408. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  409. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  410. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  411. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  412. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  413. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  414. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  415. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  416. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  417. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  418. /*
  419. * Oops .. something went wrong
  420. */
  421. if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  422. return -ENODEV;
  423. }
  424. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  425. if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  426. return -ENODEV;
  427. }
  428. /*
  429. * Precharge Dram
  430. */
  431. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
  432. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
  433. /*
  434. * Wait until command has gone through
  435. * FIXME: register spinning issue
  436. */
  437. do {
  438. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  439. if (counter++ > 100)
  440. break;
  441. } while ((PCI_COMMAND_IO) & cmd);
  442. /*
  443. * Turn on auto refresh
  444. * The loop is taken directly from Ramix's example code. I assume that
  445. * this must be held high for some duration of time, but I can find no
  446. * documentation refrencing the reasons why.
  447. */
  448. for (i = 1; i <= 8; i++) {
  449. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
  450. /*
  451. * Make certain command has gone through
  452. * FIXME: register spinning issue
  453. */
  454. counter = 0;
  455. do {
  456. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  457. if (counter++ > 100)
  458. break;
  459. } while ((PCI_COMMAND_IO) & cmd);
  460. }
  461. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
  462. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
  463. /*
  464. * Wait until command completes
  465. * FIXME: register spinning issue
  466. */
  467. counter = 0;
  468. do {
  469. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  470. if (counter++ > 100)
  471. break;
  472. } while ((PCI_COMMAND_IO) & cmd);
  473. pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
  474. dcmd |= 0x02000000;
  475. pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
  476. /*
  477. * Check to make certain fast back-to-back, if not
  478. * then set it so
  479. */
  480. pci_read_config_word(dev, PCI_STATUS, &cmd);
  481. if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
  482. cmd |= PCI_COMMAND_FAST_BACK;
  483. pci_write_config_word(dev, PCI_STATUS, cmd);
  484. }
  485. /*
  486. * Check to make certain the DEVSEL is set correctly, this device
  487. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  488. * to the memory when memory is read-only
  489. */
  490. if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
  491. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  492. pci_write_config_word(dev, PCI_STATUS, cmd);
  493. }
  494. /*
  495. * Set to be prefetchable and put everything back based on old cfg.
  496. * it's possible that the reset of the V370PDC nuked the original
  497. * setup
  498. */
  499. /*
  500. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  501. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  502. */
  503. /*
  504. * Turn PCI memory and I/O bus access back on
  505. */
  506. pci_write_config_word(dev, PCI_COMMAND,
  507. PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
  508. #ifdef CONFIG_MTD_PMC551_DEBUG
  509. /*
  510. * Some screen fun
  511. */
  512. printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at "
  513. "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
  514. size >> 10 : size >> 20,
  515. (size < 1024) ? 'B' : (size < 1048576) ? 'K' : 'M', size,
  516. ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
  517. (unsigned long long)pci_resource_start(dev, 0));
  518. /*
  519. * Check to see the state of the memory
  520. */
  521. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
  522. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  523. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  524. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  525. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  526. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  527. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  528. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  529. ((dcmd >> 9) & 0xF));
  530. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
  531. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  532. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  533. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  534. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  535. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  536. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  537. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  538. ((dcmd >> 9) & 0xF));
  539. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
  540. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  541. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  542. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  543. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  544. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  545. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  546. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  547. ((dcmd >> 9) & 0xF));
  548. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
  549. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  550. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  551. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  552. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  553. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  554. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  555. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  556. ((dcmd >> 9) & 0xF));
  557. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  558. printk(KERN_DEBUG "pmc551: Memory Access %s\n",
  559. (((0x1 << 1) & cmd) == 0) ? "off" : "on");
  560. printk(KERN_DEBUG "pmc551: I/O Access %s\n",
  561. (((0x1 << 0) & cmd) == 0) ? "off" : "on");
  562. pci_read_config_word(dev, PCI_STATUS, &cmd);
  563. printk(KERN_DEBUG "pmc551: Devsel %s\n",
  564. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
  565. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
  566. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
  567. printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  568. ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
  569. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  570. printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  571. "pmc551: System Control Register is %slocked to PCI access\n"
  572. "pmc551: System Control Register is %slocked to EEPROM access\n",
  573. (bcmd & 0x1) ? "software" : "hardware",
  574. (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
  575. #endif
  576. return size;
  577. }
  578. /*
  579. * Kernel version specific module stuffages
  580. */
  581. MODULE_LICENSE("GPL");
  582. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  583. MODULE_DESCRIPTION(PMC551_VERSION);
  584. /*
  585. * Stuff these outside the ifdef so as to not bust compiled in driver support
  586. */
  587. static int msize = 0;
  588. #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
  589. static int asize = CONFIG_MTD_PMC551_APERTURE_SIZE
  590. #else
  591. static int asize = 0;
  592. #endif
  593. module_param(msize, int, 0);
  594. MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
  595. module_param(asize, int, 0);
  596. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  597. /*
  598. * PMC551 Card Initialization
  599. */
  600. static int __init init_pmc551(void)
  601. {
  602. struct pci_dev *PCI_Device = NULL;
  603. struct mypriv *priv;
  604. int count, found = 0;
  605. struct mtd_info *mtd;
  606. u32 length = 0;
  607. if (msize) {
  608. msize = (1 << (ffs(msize) - 1)) << 20;
  609. if (msize > (1 << 30)) {
  610. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
  611. msize);
  612. return -EINVAL;
  613. }
  614. }
  615. if (asize) {
  616. asize = (1 << (ffs(asize) - 1)) << 20;
  617. if (asize > (1 << 30)) {
  618. printk(KERN_NOTICE "pmc551: Invalid aperture size "
  619. "[%d]\n", asize);
  620. return -EINVAL;
  621. }
  622. }
  623. printk(KERN_INFO PMC551_VERSION);
  624. /*
  625. * PCU-bus chipset probe.
  626. */
  627. for (count = 0; count < MAX_MTD_DEVICES; count++) {
  628. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  629. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  630. PCI_Device)) == NULL) {
  631. break;
  632. }
  633. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  634. (unsigned long long)pci_resource_start(PCI_Device, 0));
  635. /*
  636. * The PMC551 device acts VERY weird if you don't init it
  637. * first. i.e. it will not correctly report devsel. If for
  638. * some reason the sdram is in a wrote-protected state the
  639. * device will DEVSEL when it is written to causing problems
  640. * with the oldproc.c driver in
  641. * some kernels (2.2.*)
  642. */
  643. if ((length = fixup_pmc551(PCI_Device)) <= 0) {
  644. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  645. break;
  646. }
  647. /*
  648. * This is needed until the driver is capable of reading the
  649. * onboard I2C SROM to discover the "real" memory size.
  650. */
  651. if (msize) {
  652. length = msize;
  653. printk(KERN_NOTICE "pmc551: Using specified memory "
  654. "size 0x%x\n", length);
  655. } else {
  656. msize = length;
  657. }
  658. mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
  659. if (!mtd) {
  660. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  661. "device.\n");
  662. break;
  663. }
  664. priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
  665. if (!priv) {
  666. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  667. "device.\n");
  668. kfree(mtd);
  669. break;
  670. }
  671. mtd->priv = priv;
  672. priv->dev = PCI_Device;
  673. if (asize > length) {
  674. printk(KERN_NOTICE "pmc551: reducing aperture size to "
  675. "fit %dM\n", length >> 20);
  676. priv->asize = asize = length;
  677. } else if (asize == 0 || asize == length) {
  678. printk(KERN_NOTICE "pmc551: Using existing aperture "
  679. "size %dM\n", length >> 20);
  680. priv->asize = asize = length;
  681. } else {
  682. printk(KERN_NOTICE "pmc551: Using specified aperture "
  683. "size %dM\n", asize >> 20);
  684. priv->asize = asize;
  685. }
  686. priv->start = pci_iomap(PCI_Device, 0, priv->asize);
  687. if (!priv->start) {
  688. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  689. kfree(mtd->priv);
  690. kfree(mtd);
  691. break;
  692. }
  693. #ifdef CONFIG_MTD_PMC551_DEBUG
  694. printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
  695. ffs(priv->asize >> 20) - 1);
  696. #endif
  697. priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
  698. | PMC551_PCI_MEM_MAP_ENABLE
  699. | (ffs(priv->asize >> 20) - 1) << 4);
  700. priv->curr_map0 = priv->base_map0;
  701. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  702. priv->curr_map0);
  703. #ifdef CONFIG_MTD_PMC551_DEBUG
  704. printk(KERN_DEBUG "pmc551: aperture set to %d\n",
  705. (priv->base_map0 & 0xF0) >> 4);
  706. #endif
  707. mtd->size = msize;
  708. mtd->flags = MTD_CAP_RAM;
  709. mtd->erase = pmc551_erase;
  710. mtd->read = pmc551_read;
  711. mtd->write = pmc551_write;
  712. mtd->point = pmc551_point;
  713. mtd->unpoint = pmc551_unpoint;
  714. mtd->type = MTD_RAM;
  715. mtd->name = "PMC551 RAM board";
  716. mtd->erasesize = 0x10000;
  717. mtd->writesize = 1;
  718. mtd->owner = THIS_MODULE;
  719. if (add_mtd_device(mtd)) {
  720. printk(KERN_NOTICE "pmc551: Failed to register new "
  721. "device\n");
  722. pci_iounmap(PCI_Device, priv->start);
  723. kfree(mtd->priv);
  724. kfree(mtd);
  725. break;
  726. }
  727. /* Keep a reference as the add_mtd_device worked */
  728. pci_dev_get(PCI_Device);
  729. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  730. printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
  731. priv->asize >> 20,
  732. priv->start, priv->start + priv->asize);
  733. printk(KERN_NOTICE "Total memory is %d%c\n",
  734. (length < 1024) ? length :
  735. (length < 1048576) ? length >> 10 : length >> 20,
  736. (length < 1024) ? 'B' : (length < 1048576) ? 'K' : 'M');
  737. priv->nextpmc551 = pmc551list;
  738. pmc551list = mtd;
  739. found++;
  740. }
  741. /* Exited early, reference left over */
  742. if (PCI_Device)
  743. pci_dev_put(PCI_Device);
  744. if (!pmc551list) {
  745. printk(KERN_NOTICE "pmc551: not detected\n");
  746. return -ENODEV;
  747. } else {
  748. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  749. return 0;
  750. }
  751. }
  752. /*
  753. * PMC551 Card Cleanup
  754. */
  755. static void __exit cleanup_pmc551(void)
  756. {
  757. int found = 0;
  758. struct mtd_info *mtd;
  759. struct mypriv *priv;
  760. while ((mtd = pmc551list)) {
  761. priv = mtd->priv;
  762. pmc551list = priv->nextpmc551;
  763. if (priv->start) {
  764. printk(KERN_DEBUG "pmc551: unmapping %dM starting at "
  765. "0x%p\n", priv->asize >> 20, priv->start);
  766. pci_iounmap(priv->dev, priv->start);
  767. }
  768. pci_dev_put(priv->dev);
  769. kfree(mtd->priv);
  770. del_mtd_device(mtd);
  771. kfree(mtd);
  772. found++;
  773. }
  774. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  775. }
  776. module_init(init_pmc551);
  777. module_exit(cleanup_pmc551);