qd65xx.c 13 KB

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  1. /*
  2. * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
  3. *
  4. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  5. */
  6. /*
  7. * Version 0.03 Cleaned auto-tune, added probe
  8. * Version 0.04 Added second channel tuning
  9. * Version 0.05 Enhanced tuning ; added qd6500 support
  10. * Version 0.06 Added dos driver's list
  11. * Version 0.07 Second channel bug fix
  12. *
  13. * QDI QD6500/QD6580 EIDE controller fast support
  14. *
  15. * Please set local bus speed using kernel parameter idebus
  16. * for example, "idebus=33" stands for 33Mhz VLbus
  17. * To activate controller support, use "ide0=qd65xx"
  18. * To enable tuning, use "ide0=autotune"
  19. * To enable second channel tuning (qd6580 only), use "ide1=autotune"
  20. */
  21. /*
  22. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  23. * Samuel Thibault <samuel.thibault@fnac.net>
  24. */
  25. #undef REALLY_SLOW_IO /* most systems can safely undef this */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/kernel.h>
  29. #include <linux/delay.h>
  30. #include <linux/timer.h>
  31. #include <linux/mm.h>
  32. #include <linux/ioport.h>
  33. #include <linux/blkdev.h>
  34. #include <linux/hdreg.h>
  35. #include <linux/ide.h>
  36. #include <linux/init.h>
  37. #include <asm/system.h>
  38. #include <asm/io.h>
  39. #include "qd65xx.h"
  40. /*
  41. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  42. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  43. * -- qd6500 is a single IDE interface
  44. * -- qd6580 is a dual IDE interface
  45. *
  46. * More research on qd6580 being done by willmore@cig.mot.com (David)
  47. * More Information given by Petr Soucek (petr@ryston.cz)
  48. * http://www.ryston.cz/petr/vlb
  49. */
  50. /*
  51. * base: Timer1
  52. *
  53. *
  54. * base+0x01: Config (R/O)
  55. *
  56. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  57. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  58. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  59. * bit 3: qd6500: 1 = disabled, 0 = enabled
  60. * qd6580: 1
  61. * upper nibble:
  62. * qd6500: 1100
  63. * qd6580: either 1010 or 0101
  64. *
  65. *
  66. * base+0x02: Timer2 (qd6580 only)
  67. *
  68. *
  69. * base+0x03: Control (qd6580 only)
  70. *
  71. * bits 0-3 must always be set 1
  72. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  73. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  74. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  75. * channel 1 for hdc & hdd
  76. * bit 1 : 1 = only disks on primary port
  77. * 0 = disks & ATAPI devices on primary port
  78. * bit 2-4 : always 0
  79. * bit 5 : status, but of what ?
  80. * bit 6 : always set 1 by dos driver
  81. * bit 7 : set 1 for non-ATAPI devices on primary port
  82. * (maybe read-ahead and post-write buffer ?)
  83. */
  84. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  85. static void qd_write_reg (u8 content, unsigned long reg)
  86. {
  87. unsigned long flags;
  88. spin_lock_irqsave(&ide_lock, flags);
  89. outb(content,reg);
  90. spin_unlock_irqrestore(&ide_lock, flags);
  91. }
  92. static u8 __init qd_read_reg (unsigned long reg)
  93. {
  94. unsigned long flags;
  95. u8 read;
  96. spin_lock_irqsave(&ide_lock, flags);
  97. read = inb(reg);
  98. spin_unlock_irqrestore(&ide_lock, flags);
  99. return read;
  100. }
  101. /*
  102. * qd_select:
  103. *
  104. * This routine is invoked from ide.c to prepare for access to a given drive.
  105. */
  106. static void qd_select (ide_drive_t *drive)
  107. {
  108. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  109. (QD_TIMREG(drive) & 0x02);
  110. if (timings[index] != QD_TIMING(drive))
  111. qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  112. }
  113. /*
  114. * qd6500_compute_timing
  115. *
  116. * computes the timing value where
  117. * lower nibble represents active time, in count of VLB clocks
  118. * upper nibble represents recovery time, in count of VLB clocks
  119. */
  120. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  121. {
  122. u8 active_cycle,recovery_cycle;
  123. if (system_bus_clock()<=33) {
  124. active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
  125. recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
  126. } else {
  127. active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
  128. recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
  129. }
  130. return((recovery_cycle<<4) | 0x08 | active_cycle);
  131. }
  132. /*
  133. * qd6580_compute_timing
  134. *
  135. * idem for qd6580
  136. */
  137. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  138. {
  139. u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
  140. u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
  141. return((recovery_cycle<<4) | active_cycle);
  142. }
  143. /*
  144. * qd_find_disk_type
  145. *
  146. * tries to find timing from dos driver's table
  147. */
  148. static int qd_find_disk_type (ide_drive_t *drive,
  149. int *active_time, int *recovery_time)
  150. {
  151. struct qd65xx_timing_s *p;
  152. char model[40];
  153. if (!*drive->id->model) return 0;
  154. strncpy(model,drive->id->model,40);
  155. ide_fixstring(model,40,1); /* byte-swap */
  156. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  157. if (!strncmp(p->model, model+p->offset, 4)) {
  158. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  159. *active_time = p->active;
  160. *recovery_time = p->recovery;
  161. return 1;
  162. }
  163. }
  164. return 0;
  165. }
  166. /*
  167. * qd_timing_ok:
  168. *
  169. * check whether timings don't conflict
  170. */
  171. static int qd_timing_ok (ide_drive_t drives[])
  172. {
  173. return (IDE_IMPLY(drives[0].present && drives[1].present,
  174. IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
  175. QD_TIMING(drives) == QD_TIMING(drives+1))));
  176. /* if same timing register, must be same timing */
  177. }
  178. /*
  179. * qd_set_timing:
  180. *
  181. * records the timing, and enables selectproc as needed
  182. */
  183. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  184. {
  185. ide_hwif_t *hwif = HWIF(drive);
  186. drive->drive_data &= 0xff00;
  187. drive->drive_data |= timing;
  188. if (qd_timing_ok(hwif->drives)) {
  189. qd_select(drive); /* selects once */
  190. hwif->selectproc = NULL;
  191. } else
  192. hwif->selectproc = &qd_select;
  193. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  194. }
  195. /*
  196. * qd6500_tune_drive
  197. */
  198. static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
  199. {
  200. int active_time = 175;
  201. int recovery_time = 415; /* worst case values from the dos driver */
  202. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  203. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  204. && drive->id->eide_pio >= 240) {
  205. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  206. drive->id->tPIO);
  207. active_time = 110;
  208. recovery_time = drive->id->eide_pio - 120;
  209. }
  210. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  211. }
  212. /*
  213. * qd6580_tune_drive
  214. */
  215. static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
  216. {
  217. ide_pio_data_t d;
  218. int base = HWIF(drive)->select_data;
  219. int active_time = 175;
  220. int recovery_time = 415; /* worst case values from the dos driver */
  221. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  222. pio = ide_get_best_pio_mode(drive, pio, 255, &d);
  223. pio = min_t(u8, pio, 4);
  224. switch (pio) {
  225. case 0: break;
  226. case 3:
  227. if (d.cycle_time >= 110) {
  228. active_time = 86;
  229. recovery_time = d.cycle_time - 102;
  230. } else
  231. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  232. break;
  233. case 4:
  234. if (d.cycle_time >= 69) {
  235. active_time = 70;
  236. recovery_time = d.cycle_time - 61;
  237. } else
  238. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  239. break;
  240. default:
  241. if (d.cycle_time >= 180) {
  242. active_time = 110;
  243. recovery_time = d.cycle_time - 120;
  244. } else {
  245. active_time = ide_pio_timings[pio].active_time;
  246. recovery_time = d.cycle_time
  247. -active_time;
  248. }
  249. }
  250. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  251. }
  252. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  253. qd_write_reg(0x5f, QD_CONTROL_PORT);
  254. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  255. "and post-write buffer on %s.\n",
  256. drive->name, HWIF(drive)->name);
  257. }
  258. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  259. }
  260. /*
  261. * qd_testreg
  262. *
  263. * tests if the given port is a register
  264. */
  265. static int __init qd_testreg(int port)
  266. {
  267. u8 savereg;
  268. u8 readreg;
  269. unsigned long flags;
  270. spin_lock_irqsave(&ide_lock, flags);
  271. savereg = inb_p(port);
  272. outb_p(QD_TESTVAL, port); /* safe value */
  273. readreg = inb_p(port);
  274. outb(savereg, port);
  275. spin_unlock_irqrestore(&ide_lock, flags);
  276. if (savereg == QD_TESTVAL) {
  277. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  278. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  279. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  280. return 1;
  281. }
  282. return (readreg != QD_TESTVAL);
  283. }
  284. /*
  285. * qd_setup:
  286. *
  287. * called to setup an ata channel : adjusts attributes & links for tuning
  288. */
  289. static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
  290. unsigned int data0, unsigned int data1,
  291. void (*tuneproc) (ide_drive_t *, u8 pio))
  292. {
  293. hwif->chipset = ide_qd65xx;
  294. hwif->channel = hwif->index;
  295. hwif->select_data = base;
  296. hwif->config_data = config;
  297. hwif->drives[0].drive_data = data0;
  298. hwif->drives[1].drive_data = data1;
  299. hwif->drives[0].io_32bit =
  300. hwif->drives[1].io_32bit = 1;
  301. hwif->tuneproc = tuneproc;
  302. probe_hwif_init(hwif);
  303. }
  304. /*
  305. * qd_unsetup:
  306. *
  307. * called to unsetup an ata channel : back to default values, unlinks tuning
  308. */
  309. /*
  310. static void __exit qd_unsetup(ide_hwif_t *hwif)
  311. {
  312. u8 config = hwif->config_data;
  313. int base = hwif->select_data;
  314. void *tuneproc = (void *) hwif->tuneproc;
  315. if (hwif->chipset != ide_qd65xx)
  316. return;
  317. printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
  318. hwif->selectproc = NULL;
  319. hwif->tuneproc = NULL;
  320. if (tuneproc == (void *) qd6500_tune_drive) {
  321. // will do it for both
  322. qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  323. } else if (tuneproc == (void *) qd6580_tune_drive) {
  324. if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
  325. qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  326. qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
  327. } else {
  328. qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  329. }
  330. } else {
  331. printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
  332. printk(KERN_WARNING "keeping settings !\n");
  333. }
  334. }
  335. */
  336. /*
  337. * qd_probe:
  338. *
  339. * looks at the specified baseport, and if qd found, registers & initialises it
  340. * return 1 if another qd may be probed
  341. */
  342. static int __init qd_probe(int base)
  343. {
  344. ide_hwif_t *hwif;
  345. u8 config;
  346. u8 unit;
  347. config = qd_read_reg(QD_CONFIG_PORT);
  348. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  349. return 1;
  350. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  351. if ((config & 0xf0) == QD_CONFIG_QD6500) {
  352. if (qd_testreg(base)) return 1; /* bad register */
  353. /* qd6500 found */
  354. hwif = &ide_hwifs[unit];
  355. printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
  356. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  357. config, QD_ID3);
  358. if (config & QD_CONFIG_DISABLED) {
  359. printk(KERN_WARNING "qd6500 is disabled !\n");
  360. return 1;
  361. }
  362. qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
  363. &qd6500_tune_drive);
  364. create_proc_ide_interfaces();
  365. return 1;
  366. }
  367. if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
  368. ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
  369. u8 control;
  370. if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
  371. /* bad registers */
  372. /* qd6580 found */
  373. control = qd_read_reg(QD_CONTROL_PORT);
  374. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  375. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  376. config, control, QD_ID3);
  377. if (control & QD_CONTR_SEC_DISABLED) {
  378. /* secondary disabled */
  379. hwif = &ide_hwifs[unit];
  380. printk(KERN_INFO "%s: qd6580: single IDE board\n",
  381. hwif->name);
  382. qd_setup(hwif, base, config | (control << 8),
  383. QD6580_DEF_DATA, QD6580_DEF_DATA2,
  384. &qd6580_tune_drive);
  385. qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
  386. create_proc_ide_interfaces();
  387. return 1;
  388. } else {
  389. ide_hwif_t *mate;
  390. hwif = &ide_hwifs[0];
  391. mate = &ide_hwifs[1];
  392. /* secondary enabled */
  393. printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
  394. hwif->name, mate->name);
  395. qd_setup(hwif, base, config | (control << 8),
  396. QD6580_DEF_DATA, QD6580_DEF_DATA,
  397. &qd6580_tune_drive);
  398. qd_setup(mate, base, config | (control << 8),
  399. QD6580_DEF_DATA2, QD6580_DEF_DATA2,
  400. &qd6580_tune_drive);
  401. qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
  402. create_proc_ide_interfaces();
  403. return 0; /* no other qd65xx possible */
  404. }
  405. }
  406. /* no qd65xx found */
  407. return 1;
  408. }
  409. /* Can be called directly from ide.c. */
  410. int __init qd65xx_init(void)
  411. {
  412. if (qd_probe(0x30))
  413. qd_probe(0xb0);
  414. if (ide_hwifs[0].chipset != ide_qd65xx &&
  415. ide_hwifs[1].chipset != ide_qd65xx)
  416. return -ENODEV;
  417. return 0;
  418. }
  419. #ifdef MODULE
  420. module_init(qd65xx_init);
  421. #endif
  422. MODULE_AUTHOR("Samuel Thibault");
  423. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  424. MODULE_LICENSE("GPL");