it8172_setup.c 9.0 KB

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  1. /*
  2. * BRIEF MODULE DESCRIPTION
  3. * IT8172/QED5231 board setup.
  4. *
  5. * Copyright 2000 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ppopov@mvista.com or source@mvista.com
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  20. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. *
  25. * You should have received a copy of the GNU General Public License along
  26. * with this program; if not, write to the Free Software Foundation, Inc.,
  27. * 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. #include <linux/init.h>
  30. #include <linux/sched.h>
  31. #include <linux/ioport.h>
  32. #include <linux/irq.h>
  33. #include <linux/serial_reg.h>
  34. #include <linux/major.h>
  35. #include <linux/kdev_t.h>
  36. #include <linux/root_dev.h>
  37. #include <linux/pm.h>
  38. #include <asm/cpu.h>
  39. #include <asm/time.h>
  40. #include <asm/io.h>
  41. #include <asm/bootinfo.h>
  42. #include <asm/irq.h>
  43. #include <asm/mipsregs.h>
  44. #include <asm/reboot.h>
  45. #include <asm/traps.h>
  46. #include <asm/it8172/it8172.h>
  47. #include <asm/it8712.h>
  48. extern struct resource ioport_resource;
  49. #ifdef CONFIG_SERIO_I8042
  50. int init_8712_keyboard(void);
  51. #endif
  52. extern int SearchIT8712(void);
  53. extern void InitLPCInterface(void);
  54. extern char * __init prom_getcmdline(void);
  55. extern void it8172_restart(char *command);
  56. extern void it8172_halt(void);
  57. extern void it8172_power_off(void);
  58. extern void it8172_time_init(void);
  59. #ifdef CONFIG_IT8172_REVC
  60. struct {
  61. struct resource ram;
  62. struct resource pci_mem;
  63. struct resource pci_io;
  64. struct resource flash;
  65. struct resource boot;
  66. } it8172_resources = {
  67. {
  68. .start = 0, /* to be initted */
  69. .end = 0,
  70. .name = "RAM",
  71. .flags = IORESOURCE_MEM
  72. }, {
  73. .start = 0x10000000,
  74. .end = 0x13FFFFFF,
  75. .name = "PCI Mem",
  76. .flags = IORESOURCE_MEM
  77. }, {
  78. .start = 0x14000000,
  79. .end = 0x17FFFFFF
  80. .name = "PCI I/O",
  81. }, {
  82. .start = 0x08000000,
  83. .end = 0x0CFFFFFF
  84. .name = "Flash",
  85. }, {
  86. .start = 0x1FC00000,
  87. .end = 0x1FFFFFFF
  88. .name = "Boot ROM",
  89. }
  90. };
  91. #else
  92. struct {
  93. struct resource ram;
  94. struct resource pci_mem0;
  95. struct resource pci_mem1;
  96. struct resource pci_io;
  97. struct resource pci_mem2;
  98. struct resource pci_mem3;
  99. struct resource flash;
  100. struct resource boot;
  101. } it8172_resources = {
  102. {
  103. .start = 0, /* to be initted */
  104. .end = 0,
  105. .name = "RAM",
  106. .flags = IORESOURCE_MEM
  107. }, {
  108. .start = 0x0C000000,
  109. .end = 0x0FFFFFFF,
  110. .name = "PCI Mem0",
  111. .flags = IORESOURCE_MEM
  112. }, {
  113. .start = 0x10000000,
  114. .end = 0x13FFFFFF,
  115. .name = "PCI Mem1",
  116. .flags = IORESOURCE_MEM
  117. }, {
  118. .start = 0x14000000,
  119. .end = 0x17FFFFFF
  120. .name = "PCI I/O",
  121. }, {
  122. .start = 0x1A000000,
  123. .end = 0x1BFFFFFF,
  124. .name = "PCI Mem2",
  125. .flags = IORESOURCE_MEM
  126. }, {
  127. .start = 0x1C000000,
  128. .end = 0x1FBFFFFF,
  129. .name = "PCI Mem3",
  130. .flags = IORESOURCE_MEM
  131. }, {
  132. .start = 0x08000000,
  133. .end = 0x0CFFFFFF
  134. .name = "Flash",
  135. }, {
  136. .start = 0x1FC00000,
  137. .end = 0x1FFFFFFF
  138. .name = "Boot ROM",
  139. }
  140. };
  141. #endif
  142. void __init it8172_init_ram_resource(unsigned long memsize)
  143. {
  144. it8172_resources.ram.end = memsize;
  145. }
  146. void __init plat_mem_setup(void)
  147. {
  148. unsigned short dsr;
  149. char *argptr;
  150. argptr = prom_getcmdline();
  151. #ifdef CONFIG_SERIAL_CONSOLE
  152. if ((argptr = strstr(argptr, "console=")) == NULL) {
  153. argptr = prom_getcmdline();
  154. strcat(argptr, " console=ttyS0,115200");
  155. }
  156. #endif
  157. clear_c0_status(ST0_FR);
  158. board_time_init = it8172_time_init;
  159. _machine_restart = it8172_restart;
  160. _machine_halt = it8172_halt;
  161. pm_power_off = it8172_power_off;
  162. /*
  163. * IO/MEM resources.
  164. *
  165. * revisit this area.
  166. */
  167. set_io_port_base(KSEG1);
  168. ioport_resource.start = it8172_resources.pci_io.start;
  169. ioport_resource.end = it8172_resources.pci_io.end;
  170. #ifdef CONFIG_IT8172_REVC
  171. iomem_resource.start = it8172_resources.pci_mem.start;
  172. iomem_resource.end = it8172_resources.pci_mem.end;
  173. #else
  174. iomem_resource.start = it8172_resources.pci_mem0.start;
  175. iomem_resource.end = it8172_resources.pci_mem3.end;
  176. #endif
  177. #ifdef CONFIG_BLK_DEV_INITRD
  178. ROOT_DEV = Root_RAM0;
  179. #endif
  180. /*
  181. * Pull enabled devices out of standby
  182. */
  183. IT_IO_READ16(IT_PM_DSR, dsr);
  184. /*
  185. * Fixme: This breaks when these drivers are modules!!!
  186. */
  187. #ifdef CONFIG_SOUND_IT8172
  188. dsr &= ~IT_PM_DSR_ACSB;
  189. #else
  190. dsr |= IT_PM_DSR_ACSB;
  191. #endif
  192. #ifdef CONFIG_BLK_DEV_IT8172
  193. dsr &= ~IT_PM_DSR_IDESB;
  194. #else
  195. dsr |= IT_PM_DSR_IDESB;
  196. #endif
  197. IT_IO_WRITE16(IT_PM_DSR, dsr);
  198. InitLPCInterface();
  199. #ifdef CONFIG_MIPS_ITE8172
  200. if (SearchIT8712()) {
  201. printk("Found IT8712 Super IO\n");
  202. /* enable IT8712 serial port */
  203. LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
  204. LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
  205. #ifdef CONFIG_SERIO_I8042
  206. if (init_8712_keyboard()) {
  207. printk("Unable to initialize keyboard\n");
  208. LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
  209. } else {
  210. LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
  211. LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
  212. LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
  213. LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
  214. LPCSetConfig(0x4, 0x30, 0x1);
  215. LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
  216. if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
  217. (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
  218. printk("Error: keyboard or mouse not enabled\n");
  219. }
  220. #endif
  221. }
  222. else {
  223. printk("IT8712 Super IO not found\n");
  224. }
  225. #endif
  226. #ifdef CONFIG_IT8172_CIR
  227. {
  228. unsigned long data;
  229. //printk("Enabling CIR0\n");
  230. IT_IO_READ16(IT_PM_DSR, data);
  231. data &= ~IT_PM_DSR_CIR0SB;
  232. IT_IO_WRITE16(IT_PM_DSR, data);
  233. //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
  234. }
  235. #endif
  236. #ifdef CONFIG_IT8172_SCR0
  237. {
  238. unsigned i;
  239. /* Enable Smart Card Reader 0 */
  240. /* First power it up */
  241. IT_IO_READ16(IT_PM_DSR, i);
  242. i &= ~IT_PM_DSR_SCR0SB;
  243. IT_IO_WRITE16(IT_PM_DSR, i);
  244. /* Then initialize its registers */
  245. outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
  246. |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
  247. |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
  248. |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
  249. |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
  250. IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
  251. outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
  252. IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
  253. }
  254. #endif /* CONFIG_IT8172_SCR0 */
  255. #ifdef CONFIG_IT8172_SCR1
  256. {
  257. unsigned i;
  258. /* Enable Smart Card Reader 1 */
  259. /* First power it up */
  260. IT_IO_READ16(IT_PM_DSR, i);
  261. i &= ~IT_PM_DSR_SCR1SB;
  262. IT_IO_WRITE16(IT_PM_DSR, i);
  263. /* Then initialize its registers */
  264. outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
  265. |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
  266. |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
  267. |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
  268. |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
  269. IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
  270. outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
  271. IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
  272. }
  273. #endif /* CONFIG_IT8172_SCR1 */
  274. }
  275. #ifdef CONFIG_SERIO_I8042
  276. /*
  277. * According to the ITE Special BIOS Note for waking up the
  278. * keyboard controller...
  279. */
  280. static int init_8712_keyboard(void)
  281. {
  282. unsigned int cmd_port = 0x14000064;
  283. unsigned int data_port = 0x14000060;
  284. ^^^^^^^^^^^
  285. Somebody here doesn't grok the concept of io ports.
  286. unsigned char data;
  287. int i;
  288. outb(0xaa, cmd_port); /* send self-test cmd */
  289. i = 0;
  290. while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
  291. i++;
  292. if (i > 0xffffff)
  293. return 1;
  294. }
  295. data = inb(data_port);
  296. outb(0xcb, cmd_port); /* set ps2 mode */
  297. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  298. i++;
  299. if (i > 0xffffff)
  300. return 1;
  301. }
  302. outb(0x01, data_port);
  303. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  304. i++;
  305. if (i > 0xffffff)
  306. return 1;
  307. }
  308. outb(0x60, cmd_port); /* write 8042 command byte */
  309. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  310. i++;
  311. if (i > 0xffffff)
  312. return 1;
  313. }
  314. outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
  315. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  316. i++;
  317. if (i > 0xffffff)
  318. return 1;
  319. }
  320. outb(0xae, cmd_port); /* enable interface */
  321. return 0;
  322. }
  323. #endif