entry.S 4.1 KB

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  1. /*
  2. * Copyright 2010 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/linkage.h>
  15. #include <linux/unistd.h>
  16. #include <asm/irqflags.h>
  17. #include <arch/abi.h>
  18. #ifdef __tilegx__
  19. #define bnzt bnezt
  20. #endif
  21. STD_ENTRY(current_text_addr)
  22. { move r0, lr; jrp lr }
  23. STD_ENDPROC(current_text_addr)
  24. STD_ENTRY(_sim_syscall)
  25. /*
  26. * Wait for r0-r9 to be ready (and lr on the off chance we
  27. * want the syscall to locate its caller), then make a magic
  28. * simulator syscall.
  29. *
  30. * We carefully stall until the registers are readable in case they
  31. * are the target of a slow load, etc. so that tile-sim will
  32. * definitely be able to read all of them inside the magic syscall.
  33. *
  34. * Technically this is wrong for r3-r9 and lr, since an interrupt
  35. * could come in and restore the registers with a slow load right
  36. * before executing the mtspr. We may need to modify tile-sim to
  37. * explicitly stall for this case, but we do not yet have
  38. * a way to implement such a stall.
  39. */
  40. { and zero, lr, r9 ; and zero, r8, r7 }
  41. { and zero, r6, r5 ; and zero, r4, r3 }
  42. { and zero, r2, r1 ; mtspr SIM_CONTROL, r0 }
  43. { jrp lr }
  44. STD_ENDPROC(_sim_syscall)
  45. /*
  46. * Implement execve(). The i386 code has a note that forking from kernel
  47. * space results in no copy on write until the execve, so we should be
  48. * careful not to write to the stack here.
  49. */
  50. STD_ENTRY(kernel_execve)
  51. moveli TREG_SYSCALL_NR_NAME, __NR_execve
  52. swint1
  53. jrp lr
  54. STD_ENDPROC(kernel_execve)
  55. /* Delay a fixed number of cycles. */
  56. STD_ENTRY(__delay)
  57. { addi r0, r0, -1; bnzt r0, . }
  58. jrp lr
  59. STD_ENDPROC(__delay)
  60. /*
  61. * We don't run this function directly, but instead copy it to a page
  62. * we map into every user process. See vdso_setup().
  63. *
  64. * Note that libc has a copy of this function that it uses to compare
  65. * against the PC when a stack backtrace ends, so if this code is
  66. * changed, the libc implementation(s) should also be updated.
  67. */
  68. .pushsection .data
  69. ENTRY(__rt_sigreturn)
  70. moveli TREG_SYSCALL_NR_NAME,__NR_rt_sigreturn
  71. swint1
  72. ENDPROC(__rt_sigreturn)
  73. ENTRY(__rt_sigreturn_end)
  74. .popsection
  75. STD_ENTRY(dump_stack)
  76. { move r2, lr; lnk r1 }
  77. { move r4, r52; addli r1, r1, dump_stack - . }
  78. { move r3, sp; j _dump_stack }
  79. jrp lr /* keep backtracer happy */
  80. STD_ENDPROC(dump_stack)
  81. STD_ENTRY(KBacktraceIterator_init_current)
  82. { move r2, lr; lnk r1 }
  83. { move r4, r52; addli r1, r1, KBacktraceIterator_init_current - . }
  84. { move r3, sp; j _KBacktraceIterator_init_current }
  85. jrp lr /* keep backtracer happy */
  86. STD_ENDPROC(KBacktraceIterator_init_current)
  87. /*
  88. * Reset our stack to r1/r2 (sp and ksp0+cpu respectively), then
  89. * free the old stack (passed in r0) and re-invoke cpu_idle().
  90. * We update sp and ksp0 simultaneously to avoid backtracer warnings.
  91. */
  92. STD_ENTRY(cpu_idle_on_new_stack)
  93. {
  94. move sp, r1
  95. mtspr SYSTEM_SAVE_1_0, r2
  96. }
  97. jal free_thread_info
  98. j cpu_idle
  99. STD_ENDPROC(cpu_idle_on_new_stack)
  100. /* Loop forever on a nap during SMP boot. */
  101. STD_ENTRY(smp_nap)
  102. nap
  103. j smp_nap /* we are not architecturally guaranteed not to exit nap */
  104. jrp lr /* clue in the backtracer */
  105. STD_ENDPROC(smp_nap)
  106. /*
  107. * Enable interrupts racelessly and then nap until interrupted.
  108. * This function's _cpu_idle_nap address is special; see intvec.S.
  109. * When interrupted at _cpu_idle_nap, we bump the PC forward 8, and
  110. * as a result return to the function that called _cpu_idle().
  111. */
  112. STD_ENTRY(_cpu_idle)
  113. {
  114. lnk r0
  115. movei r1, 1
  116. }
  117. {
  118. addli r0, r0, _cpu_idle_nap - .
  119. mtspr INTERRUPT_CRITICAL_SECTION, r1
  120. }
  121. IRQ_ENABLE(r2, r3) /* unmask, but still with ICS set */
  122. mtspr EX_CONTEXT_1_1, r1 /* PL1, ICS clear */
  123. mtspr EX_CONTEXT_1_0, r0
  124. iret
  125. .global _cpu_idle_nap
  126. _cpu_idle_nap:
  127. nap
  128. jrp lr
  129. STD_ENDPROC(_cpu_idle)