traps.c 23 KB

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  1. /*
  2. * arch/s390/kernel/traps.c
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  8. *
  9. * Derived from "arch/i386/kernel/traps.c"
  10. * Copyright (C) 1991, 1992 Linus Torvalds
  11. */
  12. /*
  13. * 'Traps.c' handles hardware traps and faults after we have saved some
  14. * state in 'asm.s'.
  15. */
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/errno.h>
  20. #include <linux/tracehook.h>
  21. #include <linux/timer.h>
  22. #include <linux/mm.h>
  23. #include <linux/smp.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/delay.h>
  28. #include <linux/module.h>
  29. #include <linux/kdebug.h>
  30. #include <linux/kallsyms.h>
  31. #include <linux/reboot.h>
  32. #include <linux/kprobes.h>
  33. #include <linux/bug.h>
  34. #include <linux/utsname.h>
  35. #include <asm/system.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/io.h>
  38. #include <asm/atomic.h>
  39. #include <asm/mathemu.h>
  40. #include <asm/cpcmd.h>
  41. #include <asm/s390_ext.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/debug.h>
  44. #include "entry.h"
  45. pgm_check_handler_t *pgm_check_table[128];
  46. int show_unhandled_signals;
  47. extern pgm_check_handler_t do_protection_exception;
  48. extern pgm_check_handler_t do_dat_exception;
  49. extern pgm_check_handler_t do_asce_exception;
  50. #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
  51. #ifndef CONFIG_64BIT
  52. #define LONG "%08lx "
  53. #define FOURLONG "%08lx %08lx %08lx %08lx\n"
  54. static int kstack_depth_to_print = 12;
  55. #else /* CONFIG_64BIT */
  56. #define LONG "%016lx "
  57. #define FOURLONG "%016lx %016lx %016lx %016lx\n"
  58. static int kstack_depth_to_print = 20;
  59. #endif /* CONFIG_64BIT */
  60. /*
  61. * For show_trace we have tree different stack to consider:
  62. * - the panic stack which is used if the kernel stack has overflown
  63. * - the asynchronous interrupt stack (cpu related)
  64. * - the synchronous kernel stack (process related)
  65. * The stack trace can start at any of the three stack and can potentially
  66. * touch all of them. The order is: panic stack, async stack, sync stack.
  67. */
  68. static unsigned long
  69. __show_trace(unsigned long sp, unsigned long low, unsigned long high)
  70. {
  71. struct stack_frame *sf;
  72. struct pt_regs *regs;
  73. while (1) {
  74. sp = sp & PSW_ADDR_INSN;
  75. if (sp < low || sp > high - sizeof(*sf))
  76. return sp;
  77. sf = (struct stack_frame *) sp;
  78. printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  79. print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
  80. /* Follow the backchain. */
  81. while (1) {
  82. low = sp;
  83. sp = sf->back_chain & PSW_ADDR_INSN;
  84. if (!sp)
  85. break;
  86. if (sp <= low || sp > high - sizeof(*sf))
  87. return sp;
  88. sf = (struct stack_frame *) sp;
  89. printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  90. print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
  91. }
  92. /* Zero backchain detected, check for interrupt frame. */
  93. sp = (unsigned long) (sf + 1);
  94. if (sp <= low || sp > high - sizeof(*regs))
  95. return sp;
  96. regs = (struct pt_regs *) sp;
  97. printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
  98. print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
  99. low = sp;
  100. sp = regs->gprs[15];
  101. }
  102. }
  103. static void show_trace(struct task_struct *task, unsigned long *stack)
  104. {
  105. register unsigned long __r15 asm ("15");
  106. unsigned long sp;
  107. sp = (unsigned long) stack;
  108. if (!sp)
  109. sp = task ? task->thread.ksp : __r15;
  110. printk("Call Trace:\n");
  111. #ifdef CONFIG_CHECK_STACK
  112. sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
  113. S390_lowcore.panic_stack);
  114. #endif
  115. sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
  116. S390_lowcore.async_stack);
  117. if (task)
  118. __show_trace(sp, (unsigned long) task_stack_page(task),
  119. (unsigned long) task_stack_page(task) + THREAD_SIZE);
  120. else
  121. __show_trace(sp, S390_lowcore.thread_info,
  122. S390_lowcore.thread_info + THREAD_SIZE);
  123. if (!task)
  124. task = current;
  125. debug_show_held_locks(task);
  126. }
  127. void show_stack(struct task_struct *task, unsigned long *sp)
  128. {
  129. register unsigned long * __r15 asm ("15");
  130. unsigned long *stack;
  131. int i;
  132. if (!sp)
  133. stack = task ? (unsigned long *) task->thread.ksp : __r15;
  134. else
  135. stack = sp;
  136. for (i = 0; i < kstack_depth_to_print; i++) {
  137. if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
  138. break;
  139. if (i && ((i * sizeof (long) % 32) == 0))
  140. printk("\n ");
  141. printk(LONG, *stack++);
  142. }
  143. printk("\n");
  144. show_trace(task, sp);
  145. }
  146. static void show_last_breaking_event(struct pt_regs *regs)
  147. {
  148. #ifdef CONFIG_64BIT
  149. printk("Last Breaking-Event-Address:\n");
  150. printk(" [<%016lx>] ", regs->args[0] & PSW_ADDR_INSN);
  151. print_symbol("%s\n", regs->args[0] & PSW_ADDR_INSN);
  152. #endif
  153. }
  154. /*
  155. * The architecture-independent dump_stack generator
  156. */
  157. void dump_stack(void)
  158. {
  159. printk("CPU: %d %s %s %.*s\n",
  160. task_thread_info(current)->cpu, print_tainted(),
  161. init_utsname()->release,
  162. (int)strcspn(init_utsname()->version, " "),
  163. init_utsname()->version);
  164. printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
  165. current->comm, current->pid, current,
  166. (void *) current->thread.ksp);
  167. show_stack(NULL, NULL);
  168. }
  169. EXPORT_SYMBOL(dump_stack);
  170. static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
  171. {
  172. return (regs->psw.mask & bits) / ((~bits + 1) & bits);
  173. }
  174. void show_registers(struct pt_regs *regs)
  175. {
  176. char *mode;
  177. mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
  178. printk("%s PSW : %p %p",
  179. mode, (void *) regs->psw.mask,
  180. (void *) regs->psw.addr);
  181. print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
  182. printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
  183. "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
  184. mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
  185. mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
  186. mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
  187. mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
  188. mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
  189. #ifdef CONFIG_64BIT
  190. printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
  191. #endif
  192. printk("\n%s GPRS: " FOURLONG, mode,
  193. regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
  194. printk(" " FOURLONG,
  195. regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
  196. printk(" " FOURLONG,
  197. regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
  198. printk(" " FOURLONG,
  199. regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
  200. show_code(regs);
  201. }
  202. void show_regs(struct pt_regs *regs)
  203. {
  204. print_modules();
  205. printk("CPU: %d %s %s %.*s\n",
  206. task_thread_info(current)->cpu, print_tainted(),
  207. init_utsname()->release,
  208. (int)strcspn(init_utsname()->version, " "),
  209. init_utsname()->version);
  210. printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
  211. current->comm, current->pid, current,
  212. (void *) current->thread.ksp);
  213. show_registers(regs);
  214. /* Show stack backtrace if pt_regs is from kernel mode */
  215. if (!(regs->psw.mask & PSW_MASK_PSTATE))
  216. show_trace(NULL, (unsigned long *) regs->gprs[15]);
  217. show_last_breaking_event(regs);
  218. }
  219. /* This is called from fs/proc/array.c */
  220. void task_show_regs(struct seq_file *m, struct task_struct *task)
  221. {
  222. struct pt_regs *regs;
  223. regs = task_pt_regs(task);
  224. seq_printf(m, "task: %p, ksp: %p\n",
  225. task, (void *)task->thread.ksp);
  226. seq_printf(m, "User PSW : %p %p\n",
  227. (void *) regs->psw.mask, (void *)regs->psw.addr);
  228. seq_printf(m, "User GPRS: " FOURLONG,
  229. regs->gprs[0], regs->gprs[1],
  230. regs->gprs[2], regs->gprs[3]);
  231. seq_printf(m, " " FOURLONG,
  232. regs->gprs[4], regs->gprs[5],
  233. regs->gprs[6], regs->gprs[7]);
  234. seq_printf(m, " " FOURLONG,
  235. regs->gprs[8], regs->gprs[9],
  236. regs->gprs[10], regs->gprs[11]);
  237. seq_printf(m, " " FOURLONG,
  238. regs->gprs[12], regs->gprs[13],
  239. regs->gprs[14], regs->gprs[15]);
  240. seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
  241. task->thread.acrs[0], task->thread.acrs[1],
  242. task->thread.acrs[2], task->thread.acrs[3]);
  243. seq_printf(m, " %08x %08x %08x %08x\n",
  244. task->thread.acrs[4], task->thread.acrs[5],
  245. task->thread.acrs[6], task->thread.acrs[7]);
  246. seq_printf(m, " %08x %08x %08x %08x\n",
  247. task->thread.acrs[8], task->thread.acrs[9],
  248. task->thread.acrs[10], task->thread.acrs[11]);
  249. seq_printf(m, " %08x %08x %08x %08x\n",
  250. task->thread.acrs[12], task->thread.acrs[13],
  251. task->thread.acrs[14], task->thread.acrs[15]);
  252. }
  253. static DEFINE_SPINLOCK(die_lock);
  254. void die(const char * str, struct pt_regs * regs, long err)
  255. {
  256. static int die_counter;
  257. oops_enter();
  258. debug_stop_all();
  259. console_verbose();
  260. spin_lock_irq(&die_lock);
  261. bust_spinlocks(1);
  262. printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
  263. #ifdef CONFIG_PREEMPT
  264. printk("PREEMPT ");
  265. #endif
  266. #ifdef CONFIG_SMP
  267. printk("SMP ");
  268. #endif
  269. #ifdef CONFIG_DEBUG_PAGEALLOC
  270. printk("DEBUG_PAGEALLOC");
  271. #endif
  272. printk("\n");
  273. notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
  274. show_regs(regs);
  275. bust_spinlocks(0);
  276. add_taint(TAINT_DIE);
  277. spin_unlock_irq(&die_lock);
  278. if (in_interrupt())
  279. panic("Fatal exception in interrupt");
  280. if (panic_on_oops)
  281. panic("Fatal exception: panic_on_oops");
  282. oops_exit();
  283. do_exit(SIGSEGV);
  284. }
  285. static void inline report_user_fault(struct pt_regs *regs, long int_code,
  286. int signr)
  287. {
  288. if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
  289. return;
  290. if (!unhandled_signal(current, signr))
  291. return;
  292. if (!printk_ratelimit())
  293. return;
  294. printk("User process fault: interruption code 0x%lX ", int_code);
  295. print_vma_addr("in ", regs->psw.addr & PSW_ADDR_INSN);
  296. printk("\n");
  297. show_regs(regs);
  298. }
  299. int is_valid_bugaddr(unsigned long addr)
  300. {
  301. return 1;
  302. }
  303. static void __kprobes inline do_trap(long interruption_code, int signr,
  304. char *str, struct pt_regs *regs,
  305. siginfo_t *info)
  306. {
  307. /*
  308. * We got all needed information from the lowcore and can
  309. * now safely switch on interrupts.
  310. */
  311. if (regs->psw.mask & PSW_MASK_PSTATE)
  312. local_irq_enable();
  313. if (notify_die(DIE_TRAP, str, regs, interruption_code,
  314. interruption_code, signr) == NOTIFY_STOP)
  315. return;
  316. if (regs->psw.mask & PSW_MASK_PSTATE) {
  317. struct task_struct *tsk = current;
  318. tsk->thread.trap_no = interruption_code & 0xffff;
  319. force_sig_info(signr, info, tsk);
  320. report_user_fault(regs, interruption_code, signr);
  321. } else {
  322. const struct exception_table_entry *fixup;
  323. fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
  324. if (fixup)
  325. regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
  326. else {
  327. enum bug_trap_type btt;
  328. btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
  329. if (btt == BUG_TRAP_TYPE_WARN)
  330. return;
  331. die(str, regs, interruption_code);
  332. }
  333. }
  334. }
  335. static inline void __user *get_check_address(struct pt_regs *regs)
  336. {
  337. return (void __user *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
  338. }
  339. void __kprobes do_single_step(struct pt_regs *regs)
  340. {
  341. if (notify_die(DIE_SSTEP, "sstep", regs, 0, 0,
  342. SIGTRAP) == NOTIFY_STOP){
  343. return;
  344. }
  345. if (tracehook_consider_fatal_signal(current, SIGTRAP))
  346. force_sig(SIGTRAP, current);
  347. }
  348. static void default_trap_handler(struct pt_regs * regs, long interruption_code)
  349. {
  350. if (regs->psw.mask & PSW_MASK_PSTATE) {
  351. local_irq_enable();
  352. report_user_fault(regs, interruption_code, SIGSEGV);
  353. do_exit(SIGSEGV);
  354. } else
  355. die("Unknown program exception", regs, interruption_code);
  356. }
  357. #define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
  358. static void name(struct pt_regs * regs, long interruption_code) \
  359. { \
  360. siginfo_t info; \
  361. info.si_signo = signr; \
  362. info.si_errno = 0; \
  363. info.si_code = sicode; \
  364. info.si_addr = siaddr; \
  365. do_trap(interruption_code, signr, str, regs, &info); \
  366. }
  367. DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
  368. ILL_ILLADR, get_check_address(regs))
  369. DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
  370. ILL_ILLOPN, get_check_address(regs))
  371. DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
  372. FPE_INTDIV, get_check_address(regs))
  373. DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
  374. FPE_INTOVF, get_check_address(regs))
  375. DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
  376. FPE_FLTOVF, get_check_address(regs))
  377. DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
  378. FPE_FLTUND, get_check_address(regs))
  379. DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
  380. FPE_FLTRES, get_check_address(regs))
  381. DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
  382. FPE_FLTDIV, get_check_address(regs))
  383. DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
  384. FPE_FLTINV, get_check_address(regs))
  385. DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
  386. ILL_ILLOPN, get_check_address(regs))
  387. DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
  388. ILL_PRVOPC, get_check_address(regs))
  389. DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
  390. ILL_ILLOPN, get_check_address(regs))
  391. DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
  392. ILL_ILLOPN, get_check_address(regs))
  393. static inline void
  394. do_fp_trap(struct pt_regs *regs, void __user *location,
  395. int fpc, long interruption_code)
  396. {
  397. siginfo_t si;
  398. si.si_signo = SIGFPE;
  399. si.si_errno = 0;
  400. si.si_addr = location;
  401. si.si_code = 0;
  402. /* FPC[2] is Data Exception Code */
  403. if ((fpc & 0x00000300) == 0) {
  404. /* bits 6 and 7 of DXC are 0 iff IEEE exception */
  405. if (fpc & 0x8000) /* invalid fp operation */
  406. si.si_code = FPE_FLTINV;
  407. else if (fpc & 0x4000) /* div by 0 */
  408. si.si_code = FPE_FLTDIV;
  409. else if (fpc & 0x2000) /* overflow */
  410. si.si_code = FPE_FLTOVF;
  411. else if (fpc & 0x1000) /* underflow */
  412. si.si_code = FPE_FLTUND;
  413. else if (fpc & 0x0800) /* inexact */
  414. si.si_code = FPE_FLTRES;
  415. }
  416. current->thread.ieee_instruction_pointer = (addr_t) location;
  417. do_trap(interruption_code, SIGFPE,
  418. "floating point exception", regs, &si);
  419. }
  420. static void illegal_op(struct pt_regs * regs, long interruption_code)
  421. {
  422. siginfo_t info;
  423. __u8 opcode[6];
  424. __u16 __user *location;
  425. int signal = 0;
  426. location = get_check_address(regs);
  427. /*
  428. * We got all needed information from the lowcore and can
  429. * now safely switch on interrupts.
  430. */
  431. if (regs->psw.mask & PSW_MASK_PSTATE)
  432. local_irq_enable();
  433. if (regs->psw.mask & PSW_MASK_PSTATE) {
  434. if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
  435. return;
  436. if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
  437. if (tracehook_consider_fatal_signal(current, SIGTRAP))
  438. force_sig(SIGTRAP, current);
  439. else
  440. signal = SIGILL;
  441. #ifdef CONFIG_MATHEMU
  442. } else if (opcode[0] == 0xb3) {
  443. if (get_user(*((__u16 *) (opcode+2)), location+1))
  444. return;
  445. signal = math_emu_b3(opcode, regs);
  446. } else if (opcode[0] == 0xed) {
  447. if (get_user(*((__u32 *) (opcode+2)),
  448. (__u32 __user *)(location+1)))
  449. return;
  450. signal = math_emu_ed(opcode, regs);
  451. } else if (*((__u16 *) opcode) == 0xb299) {
  452. if (get_user(*((__u16 *) (opcode+2)), location+1))
  453. return;
  454. signal = math_emu_srnm(opcode, regs);
  455. } else if (*((__u16 *) opcode) == 0xb29c) {
  456. if (get_user(*((__u16 *) (opcode+2)), location+1))
  457. return;
  458. signal = math_emu_stfpc(opcode, regs);
  459. } else if (*((__u16 *) opcode) == 0xb29d) {
  460. if (get_user(*((__u16 *) (opcode+2)), location+1))
  461. return;
  462. signal = math_emu_lfpc(opcode, regs);
  463. #endif
  464. } else
  465. signal = SIGILL;
  466. } else {
  467. /*
  468. * If we get an illegal op in kernel mode, send it through the
  469. * kprobes notifier. If kprobes doesn't pick it up, SIGILL
  470. */
  471. if (notify_die(DIE_BPT, "bpt", regs, interruption_code,
  472. 3, SIGTRAP) != NOTIFY_STOP)
  473. signal = SIGILL;
  474. }
  475. #ifdef CONFIG_MATHEMU
  476. if (signal == SIGFPE)
  477. do_fp_trap(regs, location,
  478. current->thread.fp_regs.fpc, interruption_code);
  479. else if (signal == SIGSEGV) {
  480. info.si_signo = signal;
  481. info.si_errno = 0;
  482. info.si_code = SEGV_MAPERR;
  483. info.si_addr = (void __user *) location;
  484. do_trap(interruption_code, signal,
  485. "user address fault", regs, &info);
  486. } else
  487. #endif
  488. if (signal) {
  489. info.si_signo = signal;
  490. info.si_errno = 0;
  491. info.si_code = ILL_ILLOPC;
  492. info.si_addr = (void __user *) location;
  493. do_trap(interruption_code, signal,
  494. "illegal operation", regs, &info);
  495. }
  496. }
  497. #ifdef CONFIG_MATHEMU
  498. asmlinkage void
  499. specification_exception(struct pt_regs * regs, long interruption_code)
  500. {
  501. __u8 opcode[6];
  502. __u16 __user *location = NULL;
  503. int signal = 0;
  504. location = (__u16 __user *) get_check_address(regs);
  505. /*
  506. * We got all needed information from the lowcore and can
  507. * now safely switch on interrupts.
  508. */
  509. if (regs->psw.mask & PSW_MASK_PSTATE)
  510. local_irq_enable();
  511. if (regs->psw.mask & PSW_MASK_PSTATE) {
  512. get_user(*((__u16 *) opcode), location);
  513. switch (opcode[0]) {
  514. case 0x28: /* LDR Rx,Ry */
  515. signal = math_emu_ldr(opcode);
  516. break;
  517. case 0x38: /* LER Rx,Ry */
  518. signal = math_emu_ler(opcode);
  519. break;
  520. case 0x60: /* STD R,D(X,B) */
  521. get_user(*((__u16 *) (opcode+2)), location+1);
  522. signal = math_emu_std(opcode, regs);
  523. break;
  524. case 0x68: /* LD R,D(X,B) */
  525. get_user(*((__u16 *) (opcode+2)), location+1);
  526. signal = math_emu_ld(opcode, regs);
  527. break;
  528. case 0x70: /* STE R,D(X,B) */
  529. get_user(*((__u16 *) (opcode+2)), location+1);
  530. signal = math_emu_ste(opcode, regs);
  531. break;
  532. case 0x78: /* LE R,D(X,B) */
  533. get_user(*((__u16 *) (opcode+2)), location+1);
  534. signal = math_emu_le(opcode, regs);
  535. break;
  536. default:
  537. signal = SIGILL;
  538. break;
  539. }
  540. } else
  541. signal = SIGILL;
  542. if (signal == SIGFPE)
  543. do_fp_trap(regs, location,
  544. current->thread.fp_regs.fpc, interruption_code);
  545. else if (signal) {
  546. siginfo_t info;
  547. info.si_signo = signal;
  548. info.si_errno = 0;
  549. info.si_code = ILL_ILLOPN;
  550. info.si_addr = location;
  551. do_trap(interruption_code, signal,
  552. "specification exception", regs, &info);
  553. }
  554. }
  555. #else
  556. DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
  557. ILL_ILLOPN, get_check_address(regs));
  558. #endif
  559. static void data_exception(struct pt_regs * regs, long interruption_code)
  560. {
  561. __u16 __user *location;
  562. int signal = 0;
  563. location = get_check_address(regs);
  564. /*
  565. * We got all needed information from the lowcore and can
  566. * now safely switch on interrupts.
  567. */
  568. if (regs->psw.mask & PSW_MASK_PSTATE)
  569. local_irq_enable();
  570. if (MACHINE_HAS_IEEE)
  571. asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
  572. #ifdef CONFIG_MATHEMU
  573. else if (regs->psw.mask & PSW_MASK_PSTATE) {
  574. __u8 opcode[6];
  575. get_user(*((__u16 *) opcode), location);
  576. switch (opcode[0]) {
  577. case 0x28: /* LDR Rx,Ry */
  578. signal = math_emu_ldr(opcode);
  579. break;
  580. case 0x38: /* LER Rx,Ry */
  581. signal = math_emu_ler(opcode);
  582. break;
  583. case 0x60: /* STD R,D(X,B) */
  584. get_user(*((__u16 *) (opcode+2)), location+1);
  585. signal = math_emu_std(opcode, regs);
  586. break;
  587. case 0x68: /* LD R,D(X,B) */
  588. get_user(*((__u16 *) (opcode+2)), location+1);
  589. signal = math_emu_ld(opcode, regs);
  590. break;
  591. case 0x70: /* STE R,D(X,B) */
  592. get_user(*((__u16 *) (opcode+2)), location+1);
  593. signal = math_emu_ste(opcode, regs);
  594. break;
  595. case 0x78: /* LE R,D(X,B) */
  596. get_user(*((__u16 *) (opcode+2)), location+1);
  597. signal = math_emu_le(opcode, regs);
  598. break;
  599. case 0xb3:
  600. get_user(*((__u16 *) (opcode+2)), location+1);
  601. signal = math_emu_b3(opcode, regs);
  602. break;
  603. case 0xed:
  604. get_user(*((__u32 *) (opcode+2)),
  605. (__u32 __user *)(location+1));
  606. signal = math_emu_ed(opcode, regs);
  607. break;
  608. case 0xb2:
  609. if (opcode[1] == 0x99) {
  610. get_user(*((__u16 *) (opcode+2)), location+1);
  611. signal = math_emu_srnm(opcode, regs);
  612. } else if (opcode[1] == 0x9c) {
  613. get_user(*((__u16 *) (opcode+2)), location+1);
  614. signal = math_emu_stfpc(opcode, regs);
  615. } else if (opcode[1] == 0x9d) {
  616. get_user(*((__u16 *) (opcode+2)), location+1);
  617. signal = math_emu_lfpc(opcode, regs);
  618. } else
  619. signal = SIGILL;
  620. break;
  621. default:
  622. signal = SIGILL;
  623. break;
  624. }
  625. }
  626. #endif
  627. if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
  628. signal = SIGFPE;
  629. else
  630. signal = SIGILL;
  631. if (signal == SIGFPE)
  632. do_fp_trap(regs, location,
  633. current->thread.fp_regs.fpc, interruption_code);
  634. else if (signal) {
  635. siginfo_t info;
  636. info.si_signo = signal;
  637. info.si_errno = 0;
  638. info.si_code = ILL_ILLOPN;
  639. info.si_addr = location;
  640. do_trap(interruption_code, signal,
  641. "data exception", regs, &info);
  642. }
  643. }
  644. static void space_switch_exception(struct pt_regs * regs, long int_code)
  645. {
  646. siginfo_t info;
  647. /* Set user psw back to home space mode. */
  648. if (regs->psw.mask & PSW_MASK_PSTATE)
  649. regs->psw.mask |= PSW_ASC_HOME;
  650. /* Send SIGILL. */
  651. info.si_signo = SIGILL;
  652. info.si_errno = 0;
  653. info.si_code = ILL_PRVOPC;
  654. info.si_addr = get_check_address(regs);
  655. do_trap(int_code, SIGILL, "space switch event", regs, &info);
  656. }
  657. asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
  658. {
  659. bust_spinlocks(1);
  660. printk("Kernel stack overflow.\n");
  661. show_regs(regs);
  662. bust_spinlocks(0);
  663. panic("Corrupt kernel stack, can't continue.");
  664. }
  665. /* init is done in lowcore.S and head.S */
  666. void __init trap_init(void)
  667. {
  668. int i;
  669. for (i = 0; i < 128; i++)
  670. pgm_check_table[i] = &default_trap_handler;
  671. pgm_check_table[1] = &illegal_op;
  672. pgm_check_table[2] = &privileged_op;
  673. pgm_check_table[3] = &execute_exception;
  674. pgm_check_table[4] = &do_protection_exception;
  675. pgm_check_table[5] = &addressing_exception;
  676. pgm_check_table[6] = &specification_exception;
  677. pgm_check_table[7] = &data_exception;
  678. pgm_check_table[8] = &overflow_exception;
  679. pgm_check_table[9] = &divide_exception;
  680. pgm_check_table[0x0A] = &overflow_exception;
  681. pgm_check_table[0x0B] = &divide_exception;
  682. pgm_check_table[0x0C] = &hfp_overflow_exception;
  683. pgm_check_table[0x0D] = &hfp_underflow_exception;
  684. pgm_check_table[0x0E] = &hfp_significance_exception;
  685. pgm_check_table[0x0F] = &hfp_divide_exception;
  686. pgm_check_table[0x10] = &do_dat_exception;
  687. pgm_check_table[0x11] = &do_dat_exception;
  688. pgm_check_table[0x12] = &translation_exception;
  689. pgm_check_table[0x13] = &special_op_exception;
  690. #ifdef CONFIG_64BIT
  691. pgm_check_table[0x38] = &do_asce_exception;
  692. pgm_check_table[0x39] = &do_dat_exception;
  693. pgm_check_table[0x3A] = &do_dat_exception;
  694. pgm_check_table[0x3B] = &do_dat_exception;
  695. #endif /* CONFIG_64BIT */
  696. pgm_check_table[0x15] = &operand_exception;
  697. pgm_check_table[0x1C] = &space_switch_exception;
  698. pgm_check_table[0x1D] = &hfp_sqrt_exception;
  699. pfault_irq_init();
  700. }