cm_bf527.c 23 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. },
  79. [2] = { /* DMA IRQ */
  80. .start = IRQ_USB_DMA,
  81. .end = IRQ_USB_DMA,
  82. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83. },
  84. };
  85. static struct musb_hdrc_config musb_config = {
  86. .multipoint = 0,
  87. .dyn_fifo = 0,
  88. .soft_con = 1,
  89. .dma = 1,
  90. .num_eps = 8,
  91. .dma_channels = 8,
  92. .gpio_vrsel = GPIO_PF11,
  93. /* Some custom boards need to be active low, just set it to "0"
  94. * if it is the case.
  95. */
  96. .gpio_vrsel_active = 1,
  97. };
  98. static struct musb_hdrc_platform_data musb_plat = {
  99. #if defined(CONFIG_USB_MUSB_OTG)
  100. .mode = MUSB_OTG,
  101. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  102. .mode = MUSB_HOST,
  103. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  104. .mode = MUSB_PERIPHERAL,
  105. #endif
  106. .config = &musb_config,
  107. };
  108. static u64 musb_dmamask = ~(u32)0;
  109. static struct platform_device musb_device = {
  110. .name = "musb_hdrc",
  111. .id = 0,
  112. .dev = {
  113. .dma_mask = &musb_dmamask,
  114. .coherent_dma_mask = 0xffffffff,
  115. .platform_data = &musb_plat,
  116. },
  117. .num_resources = ARRAY_SIZE(musb_resources),
  118. .resource = musb_resources,
  119. };
  120. #endif
  121. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  122. static struct mtd_partition partition_info[] = {
  123. {
  124. .name = "linux kernel(nand)",
  125. .offset = 0,
  126. .size = 4 * 1024 * 1024,
  127. },
  128. {
  129. .name = "file system(nand)",
  130. .offset = MTDPART_OFS_APPEND,
  131. .size = MTDPART_SIZ_FULL,
  132. },
  133. };
  134. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  135. .data_width = NFC_NWIDTH_8,
  136. .partitions = partition_info,
  137. .nr_partitions = ARRAY_SIZE(partition_info),
  138. .rd_dly = 3,
  139. .wr_dly = 3,
  140. };
  141. static struct resource bf5xx_nand_resources[] = {
  142. {
  143. .start = NFC_CTL,
  144. .end = NFC_DATA_RD + 2,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. {
  148. .start = CH_NFC,
  149. .end = CH_NFC,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. };
  153. static struct platform_device bf5xx_nand_device = {
  154. .name = "bf5xx-nand",
  155. .id = 0,
  156. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  157. .resource = bf5xx_nand_resources,
  158. .dev = {
  159. .platform_data = &bf5xx_nand_platform,
  160. },
  161. };
  162. #endif
  163. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  164. static struct resource bfin_pcmcia_cf_resources[] = {
  165. {
  166. .start = 0x20310000, /* IO PORT */
  167. .end = 0x20312000,
  168. .flags = IORESOURCE_MEM,
  169. }, {
  170. .start = 0x20311000, /* Attribute Memory */
  171. .end = 0x20311FFF,
  172. .flags = IORESOURCE_MEM,
  173. }, {
  174. .start = IRQ_PF4,
  175. .end = IRQ_PF4,
  176. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  177. }, {
  178. .start = 6, /* Card Detect PF6 */
  179. .end = 6,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. };
  183. static struct platform_device bfin_pcmcia_cf_device = {
  184. .name = "bfin_cf_pcmcia",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  187. .resource = bfin_pcmcia_cf_resources,
  188. };
  189. #endif
  190. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  191. static struct platform_device rtc_device = {
  192. .name = "rtc-bfin",
  193. .id = -1,
  194. };
  195. #endif
  196. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  197. #include <linux/smc91x.h>
  198. static struct smc91x_platdata smc91x_info = {
  199. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  200. .leda = RPC_LED_100_10,
  201. .ledb = RPC_LED_TX_RX,
  202. };
  203. static struct resource smc91x_resources[] = {
  204. {
  205. .name = "smc91x-regs",
  206. .start = 0x20300300,
  207. .end = 0x20300300 + 16,
  208. .flags = IORESOURCE_MEM,
  209. }, {
  210. .start = IRQ_PF7,
  211. .end = IRQ_PF7,
  212. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  213. },
  214. };
  215. static struct platform_device smc91x_device = {
  216. .name = "smc91x",
  217. .id = 0,
  218. .num_resources = ARRAY_SIZE(smc91x_resources),
  219. .resource = smc91x_resources,
  220. .dev = {
  221. .platform_data = &smc91x_info,
  222. },
  223. };
  224. #endif
  225. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  226. static struct resource dm9000_resources[] = {
  227. [0] = {
  228. .start = 0x203FB800,
  229. .end = 0x203FB800 + 1,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. [1] = {
  233. .start = 0x203FB804,
  234. .end = 0x203FB804 + 1,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. [2] = {
  238. .start = IRQ_PF9,
  239. .end = IRQ_PF9,
  240. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  241. },
  242. };
  243. static struct platform_device dm9000_device = {
  244. .name = "dm9000",
  245. .id = -1,
  246. .num_resources = ARRAY_SIZE(dm9000_resources),
  247. .resource = dm9000_resources,
  248. };
  249. #endif
  250. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  251. static struct platform_device bfin_mii_bus = {
  252. .name = "bfin_mii_bus",
  253. };
  254. static struct platform_device bfin_mac_device = {
  255. .name = "bfin_mac",
  256. .dev.platform_data = &bfin_mii_bus,
  257. };
  258. #endif
  259. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  260. static struct resource net2272_bfin_resources[] = {
  261. {
  262. .start = 0x20300000,
  263. .end = 0x20300000 + 0x100,
  264. .flags = IORESOURCE_MEM,
  265. }, {
  266. .start = IRQ_PF7,
  267. .end = IRQ_PF7,
  268. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  269. },
  270. };
  271. static struct platform_device net2272_bfin_device = {
  272. .name = "net2272",
  273. .id = -1,
  274. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  275. .resource = net2272_bfin_resources,
  276. };
  277. #endif
  278. #if defined(CONFIG_MTD_M25P80) \
  279. || defined(CONFIG_MTD_M25P80_MODULE)
  280. static struct mtd_partition bfin_spi_flash_partitions[] = {
  281. {
  282. .name = "bootloader(spi)",
  283. .size = 0x00040000,
  284. .offset = 0,
  285. .mask_flags = MTD_CAP_ROM
  286. }, {
  287. .name = "linux kernel(spi)",
  288. .size = MTDPART_SIZ_FULL,
  289. .offset = MTDPART_OFS_APPEND,
  290. }
  291. };
  292. static struct flash_platform_data bfin_spi_flash_data = {
  293. .name = "m25p80",
  294. .parts = bfin_spi_flash_partitions,
  295. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  296. .type = "m25p16",
  297. };
  298. /* SPI flash chip (m25p64) */
  299. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  300. .enable_dma = 0, /* use dma transfer with this chip*/
  301. .bits_per_word = 8,
  302. };
  303. #endif
  304. #if defined(CONFIG_BFIN_SPI_ADC) \
  305. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  306. /* SPI ADC chip */
  307. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  308. .enable_dma = 1, /* use dma transfer with this chip*/
  309. .bits_per_word = 16,
  310. };
  311. #endif
  312. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  313. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  314. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  315. .enable_dma = 0,
  316. .bits_per_word = 16,
  317. };
  318. #endif
  319. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  320. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  321. .enable_dma = 0,
  322. .bits_per_word = 8,
  323. };
  324. #endif
  325. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  326. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  327. .enable_dma = 0,
  328. .bits_per_word = 16,
  329. };
  330. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  331. .model = 7877,
  332. .vref_delay_usecs = 50, /* internal, no capacitor */
  333. .x_plate_ohms = 419,
  334. .y_plate_ohms = 486,
  335. .pressure_max = 1000,
  336. .pressure_min = 0,
  337. .stopacq_polarity = 1,
  338. .first_conversion_delay = 3,
  339. .acquisition_time = 1,
  340. .averaging = 1,
  341. .pen_down_acc_interval = 1,
  342. };
  343. #endif
  344. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  345. && defined(CONFIG_SND_SOC_WM8731_SPI)
  346. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  347. .enable_dma = 0,
  348. .bits_per_word = 16,
  349. };
  350. #endif
  351. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  352. static struct bfin5xx_spi_chip spidev_chip_info = {
  353. .enable_dma = 0,
  354. .bits_per_word = 8,
  355. };
  356. #endif
  357. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  358. #if defined(CONFIG_MTD_M25P80) \
  359. || defined(CONFIG_MTD_M25P80_MODULE)
  360. {
  361. /* the modalias must be the same as spi device driver name */
  362. .modalias = "m25p80", /* Name of spi_driver for this device */
  363. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  364. .bus_num = 0, /* Framework bus number */
  365. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  366. .platform_data = &bfin_spi_flash_data,
  367. .controller_data = &spi_flash_chip_info,
  368. .mode = SPI_MODE_3,
  369. },
  370. #endif
  371. #if defined(CONFIG_BFIN_SPI_ADC) \
  372. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  373. {
  374. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  375. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  376. .bus_num = 0, /* Framework bus number */
  377. .chip_select = 1, /* Framework chip select. */
  378. .platform_data = NULL, /* No spi_driver specific config */
  379. .controller_data = &spi_adc_chip_info,
  380. },
  381. #endif
  382. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  383. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  384. {
  385. .modalias = "ad1836",
  386. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  387. .bus_num = 0,
  388. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  389. .controller_data = &ad1836_spi_chip_info,
  390. },
  391. #endif
  392. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  393. {
  394. .modalias = "mmc_spi",
  395. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  396. .bus_num = 0,
  397. .chip_select = 5,
  398. .controller_data = &mmc_spi_chip_info,
  399. .mode = SPI_MODE_3,
  400. },
  401. #endif
  402. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  403. {
  404. .modalias = "ad7877",
  405. .platform_data = &bfin_ad7877_ts_info,
  406. .irq = IRQ_PF8,
  407. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  408. .bus_num = 0,
  409. .chip_select = 2,
  410. .controller_data = &spi_ad7877_chip_info,
  411. },
  412. #endif
  413. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  414. && defined(CONFIG_SND_SOC_WM8731_SPI)
  415. {
  416. .modalias = "wm8731",
  417. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  418. .bus_num = 0,
  419. .chip_select = 5,
  420. .controller_data = &spi_wm8731_chip_info,
  421. .mode = SPI_MODE_0,
  422. },
  423. #endif
  424. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  425. {
  426. .modalias = "spidev",
  427. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  428. .bus_num = 0,
  429. .chip_select = 1,
  430. .controller_data = &spidev_chip_info,
  431. },
  432. #endif
  433. };
  434. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  435. /* SPI controller data */
  436. static struct bfin5xx_spi_master bfin_spi0_info = {
  437. .num_chipselect = 8,
  438. .enable_dma = 1, /* master has the ability to do dma transfer */
  439. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  440. };
  441. /* SPI (0) */
  442. static struct resource bfin_spi0_resource[] = {
  443. [0] = {
  444. .start = SPI0_REGBASE,
  445. .end = SPI0_REGBASE + 0xFF,
  446. .flags = IORESOURCE_MEM,
  447. },
  448. [1] = {
  449. .start = CH_SPI,
  450. .end = CH_SPI,
  451. .flags = IORESOURCE_DMA,
  452. },
  453. [2] = {
  454. .start = IRQ_SPI,
  455. .end = IRQ_SPI,
  456. .flags = IORESOURCE_IRQ,
  457. },
  458. };
  459. static struct platform_device bfin_spi0_device = {
  460. .name = "bfin-spi",
  461. .id = 0, /* Bus number */
  462. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  463. .resource = bfin_spi0_resource,
  464. .dev = {
  465. .platform_data = &bfin_spi0_info, /* Passed to driver */
  466. },
  467. };
  468. #endif /* spi master and devices */
  469. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  470. static struct mtd_partition cm_partitions[] = {
  471. {
  472. .name = "bootloader(nor)",
  473. .size = 0x40000,
  474. .offset = 0,
  475. }, {
  476. .name = "linux kernel(nor)",
  477. .size = 0x100000,
  478. .offset = MTDPART_OFS_APPEND,
  479. }, {
  480. .name = "file system(nor)",
  481. .size = MTDPART_SIZ_FULL,
  482. .offset = MTDPART_OFS_APPEND,
  483. }
  484. };
  485. static struct physmap_flash_data cm_flash_data = {
  486. .width = 2,
  487. .parts = cm_partitions,
  488. .nr_parts = ARRAY_SIZE(cm_partitions),
  489. };
  490. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  491. static struct resource cm_flash_resource[] = {
  492. {
  493. .name = "cfi_probe",
  494. .start = 0x20000000,
  495. .end = 0x201fffff,
  496. .flags = IORESOURCE_MEM,
  497. }, {
  498. .start = (unsigned long)cm_flash_gpios,
  499. .end = ARRAY_SIZE(cm_flash_gpios),
  500. .flags = IORESOURCE_IRQ,
  501. }
  502. };
  503. static struct platform_device cm_flash_device = {
  504. .name = "gpio-addr-flash",
  505. .id = 0,
  506. .dev = {
  507. .platform_data = &cm_flash_data,
  508. },
  509. .num_resources = ARRAY_SIZE(cm_flash_resource),
  510. .resource = cm_flash_resource,
  511. };
  512. #endif
  513. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  514. #ifdef CONFIG_SERIAL_BFIN_UART0
  515. static struct resource bfin_uart0_resources[] = {
  516. {
  517. .start = UART0_THR,
  518. .end = UART0_GCTL+2,
  519. .flags = IORESOURCE_MEM,
  520. },
  521. {
  522. .start = IRQ_UART0_RX,
  523. .end = IRQ_UART0_RX+1,
  524. .flags = IORESOURCE_IRQ,
  525. },
  526. {
  527. .start = IRQ_UART0_ERROR,
  528. .end = IRQ_UART0_ERROR,
  529. .flags = IORESOURCE_IRQ,
  530. },
  531. {
  532. .start = CH_UART0_TX,
  533. .end = CH_UART0_TX,
  534. .flags = IORESOURCE_DMA,
  535. },
  536. {
  537. .start = CH_UART0_RX,
  538. .end = CH_UART0_RX,
  539. .flags = IORESOURCE_DMA,
  540. },
  541. };
  542. unsigned short bfin_uart0_peripherals[] = {
  543. P_UART0_TX, P_UART0_RX, 0
  544. };
  545. static struct platform_device bfin_uart0_device = {
  546. .name = "bfin-uart",
  547. .id = 0,
  548. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  549. .resource = bfin_uart0_resources,
  550. .dev = {
  551. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  552. },
  553. };
  554. #endif
  555. #ifdef CONFIG_SERIAL_BFIN_UART1
  556. static struct resource bfin_uart1_resources[] = {
  557. {
  558. .start = UART1_THR,
  559. .end = UART1_GCTL+2,
  560. .flags = IORESOURCE_MEM,
  561. },
  562. {
  563. .start = IRQ_UART1_RX,
  564. .end = IRQ_UART1_RX+1,
  565. .flags = IORESOURCE_IRQ,
  566. },
  567. {
  568. .start = IRQ_UART1_ERROR,
  569. .end = IRQ_UART1_ERROR,
  570. .flags = IORESOURCE_IRQ,
  571. },
  572. {
  573. .start = CH_UART1_TX,
  574. .end = CH_UART1_TX,
  575. .flags = IORESOURCE_DMA,
  576. },
  577. {
  578. .start = CH_UART1_RX,
  579. .end = CH_UART1_RX,
  580. .flags = IORESOURCE_DMA,
  581. },
  582. #ifdef CONFIG_BFIN_UART1_CTSRTS
  583. { /* CTS pin */
  584. .start = GPIO_PF9,
  585. .end = GPIO_PF9,
  586. .flags = IORESOURCE_IO,
  587. },
  588. { /* RTS pin */
  589. .start = GPIO_PF10,
  590. .end = GPIO_PF10,
  591. .flags = IORESOURCE_IO,
  592. },
  593. #endif
  594. };
  595. unsigned short bfin_uart1_peripherals[] = {
  596. P_UART1_TX, P_UART1_RX, 0
  597. };
  598. static struct platform_device bfin_uart1_device = {
  599. .name = "bfin-uart",
  600. .id = 1,
  601. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  602. .resource = bfin_uart1_resources,
  603. .dev = {
  604. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  605. },
  606. };
  607. #endif
  608. #endif
  609. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  610. #ifdef CONFIG_BFIN_SIR0
  611. static struct resource bfin_sir0_resources[] = {
  612. {
  613. .start = 0xFFC00400,
  614. .end = 0xFFC004FF,
  615. .flags = IORESOURCE_MEM,
  616. },
  617. {
  618. .start = IRQ_UART0_RX,
  619. .end = IRQ_UART0_RX+1,
  620. .flags = IORESOURCE_IRQ,
  621. },
  622. {
  623. .start = CH_UART0_RX,
  624. .end = CH_UART0_RX+1,
  625. .flags = IORESOURCE_DMA,
  626. },
  627. };
  628. static struct platform_device bfin_sir0_device = {
  629. .name = "bfin_sir",
  630. .id = 0,
  631. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  632. .resource = bfin_sir0_resources,
  633. };
  634. #endif
  635. #ifdef CONFIG_BFIN_SIR1
  636. static struct resource bfin_sir1_resources[] = {
  637. {
  638. .start = 0xFFC02000,
  639. .end = 0xFFC020FF,
  640. .flags = IORESOURCE_MEM,
  641. },
  642. {
  643. .start = IRQ_UART1_RX,
  644. .end = IRQ_UART1_RX+1,
  645. .flags = IORESOURCE_IRQ,
  646. },
  647. {
  648. .start = CH_UART1_RX,
  649. .end = CH_UART1_RX+1,
  650. .flags = IORESOURCE_DMA,
  651. },
  652. };
  653. static struct platform_device bfin_sir1_device = {
  654. .name = "bfin_sir",
  655. .id = 1,
  656. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  657. .resource = bfin_sir1_resources,
  658. };
  659. #endif
  660. #endif
  661. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  662. static struct resource bfin_twi0_resource[] = {
  663. [0] = {
  664. .start = TWI0_REGBASE,
  665. .end = TWI0_REGBASE,
  666. .flags = IORESOURCE_MEM,
  667. },
  668. [1] = {
  669. .start = IRQ_TWI,
  670. .end = IRQ_TWI,
  671. .flags = IORESOURCE_IRQ,
  672. },
  673. };
  674. static struct platform_device i2c_bfin_twi_device = {
  675. .name = "i2c-bfin-twi",
  676. .id = 0,
  677. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  678. .resource = bfin_twi0_resource,
  679. };
  680. #endif
  681. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  682. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  683. {
  684. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  685. },
  686. #endif
  687. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  688. {
  689. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  690. .irq = IRQ_PF8,
  691. },
  692. #endif
  693. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  694. {
  695. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  696. },
  697. #endif
  698. };
  699. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  700. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  701. static struct resource bfin_sport0_uart_resources[] = {
  702. {
  703. .start = SPORT0_TCR1,
  704. .end = SPORT0_MRCS3+4,
  705. .flags = IORESOURCE_MEM,
  706. },
  707. {
  708. .start = IRQ_SPORT0_RX,
  709. .end = IRQ_SPORT0_RX+1,
  710. .flags = IORESOURCE_IRQ,
  711. },
  712. {
  713. .start = IRQ_SPORT0_ERROR,
  714. .end = IRQ_SPORT0_ERROR,
  715. .flags = IORESOURCE_IRQ,
  716. },
  717. };
  718. unsigned short bfin_sport0_peripherals[] = {
  719. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  720. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  721. };
  722. static struct platform_device bfin_sport0_uart_device = {
  723. .name = "bfin-sport-uart",
  724. .id = 0,
  725. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  726. .resource = bfin_sport0_uart_resources,
  727. .dev = {
  728. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  729. },
  730. };
  731. #endif
  732. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  733. static struct resource bfin_sport1_uart_resources[] = {
  734. {
  735. .start = SPORT1_TCR1,
  736. .end = SPORT1_MRCS3+4,
  737. .flags = IORESOURCE_MEM,
  738. },
  739. {
  740. .start = IRQ_SPORT1_RX,
  741. .end = IRQ_SPORT1_RX+1,
  742. .flags = IORESOURCE_IRQ,
  743. },
  744. {
  745. .start = IRQ_SPORT1_ERROR,
  746. .end = IRQ_SPORT1_ERROR,
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. };
  750. unsigned short bfin_sport1_peripherals[] = {
  751. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  752. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  753. };
  754. static struct platform_device bfin_sport1_uart_device = {
  755. .name = "bfin-sport-uart",
  756. .id = 1,
  757. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  758. .resource = bfin_sport1_uart_resources,
  759. .dev = {
  760. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  761. },
  762. };
  763. #endif
  764. #endif
  765. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  766. #include <linux/input.h>
  767. #include <linux/gpio_keys.h>
  768. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  769. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  770. };
  771. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  772. .buttons = bfin_gpio_keys_table,
  773. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  774. };
  775. static struct platform_device bfin_device_gpiokeys = {
  776. .name = "gpio-keys",
  777. .dev = {
  778. .platform_data = &bfin_gpio_keys_data,
  779. },
  780. };
  781. #endif
  782. static const unsigned int cclk_vlev_datasheet[] =
  783. {
  784. VRPAIR(VLEV_100, 400000000),
  785. VRPAIR(VLEV_105, 426000000),
  786. VRPAIR(VLEV_110, 500000000),
  787. VRPAIR(VLEV_115, 533000000),
  788. VRPAIR(VLEV_120, 600000000),
  789. };
  790. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  791. .tuple_tab = cclk_vlev_datasheet,
  792. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  793. .vr_settling_time = 25 /* us */,
  794. };
  795. static struct platform_device bfin_dpmc = {
  796. .name = "bfin dpmc",
  797. .dev = {
  798. .platform_data = &bfin_dmpc_vreg_data,
  799. },
  800. };
  801. static struct platform_device *cmbf527_devices[] __initdata = {
  802. &bfin_dpmc,
  803. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  804. &bf5xx_nand_device,
  805. #endif
  806. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  807. &bfin_pcmcia_cf_device,
  808. #endif
  809. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  810. &rtc_device,
  811. #endif
  812. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  813. &bfin_isp1760_device,
  814. #endif
  815. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  816. &musb_device,
  817. #endif
  818. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  819. &smc91x_device,
  820. #endif
  821. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  822. &dm9000_device,
  823. #endif
  824. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  825. &bfin_mii_bus,
  826. &bfin_mac_device,
  827. #endif
  828. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  829. &net2272_bfin_device,
  830. #endif
  831. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  832. &bfin_spi0_device,
  833. #endif
  834. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  835. #ifdef CONFIG_SERIAL_BFIN_UART0
  836. &bfin_uart0_device,
  837. #endif
  838. #ifdef CONFIG_SERIAL_BFIN_UART1
  839. &bfin_uart1_device,
  840. #endif
  841. #endif
  842. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  843. #ifdef CONFIG_BFIN_SIR0
  844. &bfin_sir0_device,
  845. #endif
  846. #ifdef CONFIG_BFIN_SIR1
  847. &bfin_sir1_device,
  848. #endif
  849. #endif
  850. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  851. &i2c_bfin_twi_device,
  852. #endif
  853. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  854. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  855. &bfin_sport0_uart_device,
  856. #endif
  857. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  858. &bfin_sport1_uart_device,
  859. #endif
  860. #endif
  861. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  862. &bfin_device_gpiokeys,
  863. #endif
  864. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  865. &cm_flash_device,
  866. #endif
  867. };
  868. static int __init cm_init(void)
  869. {
  870. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  871. i2c_register_board_info(0, bfin_i2c_board_info,
  872. ARRAY_SIZE(bfin_i2c_board_info));
  873. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  874. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  875. return 0;
  876. }
  877. arch_initcall(cm_init);
  878. static struct platform_device *cmbf527_early_devices[] __initdata = {
  879. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  880. #ifdef CONFIG_SERIAL_BFIN_UART0
  881. &bfin_uart0_device,
  882. #endif
  883. #ifdef CONFIG_SERIAL_BFIN_UART1
  884. &bfin_uart1_device,
  885. #endif
  886. #endif
  887. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  888. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  889. &bfin_sport0_uart_device,
  890. #endif
  891. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  892. &bfin_sport1_uart_device,
  893. #endif
  894. #endif
  895. };
  896. void __init native_machine_early_platform_add_devices(void)
  897. {
  898. printk(KERN_INFO "register early platform devices\n");
  899. early_platform_add_devices(cmbf527_early_devices,
  900. ARRAY_SIZE(cmbf527_early_devices));
  901. }
  902. void native_machine_restart(char *cmd)
  903. {
  904. /* workaround reboot hang when booting from SPI */
  905. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  906. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  907. }
  908. void bfin_get_ether_addr(char *addr)
  909. {
  910. random_ether_addr(addr);
  911. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  912. }
  913. EXPORT_SYMBOL(bfin_get_ether_addr);