spear.h 5.3 KB

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  1. /*
  2. * arch/arm/mach-spear6xx/include/mach/spear.h
  3. *
  4. * SPEAr6xx Machine family specific definition
  5. *
  6. * Copyright (C) 2009 ST Microelectronics
  7. * Rajeev Kumar<rajeev-dlh.kumar@st.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #ifndef __MACH_SPEAR6XX_H
  14. #define __MACH_SPEAR6XX_H
  15. #include <mach/hardware.h>
  16. #include <mach/spear600.h>
  17. #define SPEAR6XX_ML_SDRAM_BASE 0x00000000
  18. #define SPEAR6XX_ML_SDRAM_SIZE 0x40000000
  19. /* ICM1 - Low speed connection */
  20. #define SPEAR6XX_ICM1_BASE 0xD0000000
  21. #define SPEAR6XX_ICM1_SIZE 0x08000000
  22. #define SPEAR6XX_ICM1_UART0_BASE 0xD0000000
  23. #define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
  24. #define SPEAR6XX_ICM1_UART0_SIZE 0x00080000
  25. #define SPEAR6XX_ICM1_UART1_BASE 0xD0080000
  26. #define SPEAR6XX_ICM1_UART1_SIZE 0x00080000
  27. #define SPEAR6XX_ICM1_SSP0_BASE 0xD0100000
  28. #define SPEAR6XX_ICM1_SSP0_SIZE 0x00080000
  29. #define SPEAR6XX_ICM1_SSP1_BASE 0xD0180000
  30. #define SPEAR6XX_ICM1_SSP1_SIZE 0x00080000
  31. #define SPEAR6XX_ICM1_I2C_BASE 0xD0200000
  32. #define SPEAR6XX_ICM1_I2C_SIZE 0x00080000
  33. #define SPEAR6XX_ICM1_JPEG_BASE 0xD0800000
  34. #define SPEAR6XX_ICM1_JPEG_SIZE 0x00800000
  35. #define SPEAR6XX_ICM1_IRDA_BASE 0xD1000000
  36. #define SPEAR6XX_ICM1_IRDA_SIZE 0x00800000
  37. #define SPEAR6XX_ICM1_FSMC_BASE 0xD1800000
  38. #define SPEAR6XX_ICM1_FSMC_SIZE 0x00800000
  39. #define SPEAR6XX_ICM1_NAND_BASE 0xD2000000
  40. #define SPEAR6XX_ICM1_NAND_SIZE 0x00800000
  41. #define SPEAR6XX_ICM1_SRAM_BASE 0xD2800000
  42. #define SPEAR6XX_ICM1_SRAM_SIZE 0x00800000
  43. /* ICM2 - Application Subsystem */
  44. #define SPEAR6XX_ICM2_BASE 0xD8000000
  45. #define SPEAR6XX_ICM2_SIZE 0x08000000
  46. #define SPEAR6XX_ICM2_TMR0_BASE 0xD8000000
  47. #define SPEAR6XX_ICM2_TMR0_SIZE 0x00080000
  48. #define SPEAR6XX_ICM2_TMR1_BASE 0xD8080000
  49. #define SPEAR6XX_ICM2_TMR1_SIZE 0x00080000
  50. #define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000
  51. #define SPEAR6XX_ICM2_GPIO_SIZE 0x00080000
  52. #define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000
  53. #define SPEAR6XX_ICM2_SPI2_SIZE 0x00080000
  54. #define SPEAR6XX_ICM2_ADC_BASE 0xD8200000
  55. #define SPEAR6XX_ICM2_ADC_SIZE 0x00080000
  56. /* ML-1, 2 - Multi Layer CPU Subsystem */
  57. #define SPEAR6XX_ML_CPU_BASE 0xF0000000
  58. #define SPEAR6XX_ML_CPU_SIZE 0x08000000
  59. #define SPEAR6XX_CPU_TMR_BASE 0xF0000000
  60. #define SPEAR6XX_CPU_TMR_SIZE 0x00100000
  61. #define SPEAR6XX_CPU_GPIO_BASE 0xF0100000
  62. #define SPEAR6XX_CPU_GPIO_SIZE 0x00100000
  63. #define SPEAR6XX_CPU_VIC_SEC_BASE 0xF1000000
  64. #define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
  65. #define SPEAR6XX_CPU_VIC_SEC_SIZE 0x00100000
  66. #define SPEAR6XX_CPU_VIC_PRI_BASE 0xF1100000
  67. #define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
  68. #define SPEAR6XX_CPU_VIC_PRI_SIZE 0x00100000
  69. /* ICM3 - Basic Subsystem */
  70. #define SPEAR6XX_ICM3_BASE 0xF8000000
  71. #define SPEAR6XX_ICM3_SIZE 0x08000000
  72. #define SPEAR6XX_ICM3_SMEM_BASE 0xF8000000
  73. #define SPEAR6XX_ICM3_SMEM_SIZE 0x04000000
  74. #define SPEAR6XX_ICM3_SMI_CTRL_BASE 0xFC000000
  75. #define SPEAR6XX_ICM3_SMI_CTRL_SIZE 0x00200000
  76. #define SPEAR6XX_ICM3_CLCD_BASE 0xFC200000
  77. #define SPEAR6XX_ICM3_CLCD_SIZE 0x00200000
  78. #define SPEAR6XX_ICM3_DMA_BASE 0xFC400000
  79. #define SPEAR6XX_ICM3_DMA_SIZE 0x00200000
  80. #define SPEAR6XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
  81. #define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
  82. #define SPEAR6XX_ICM3_TMR_BASE 0xFC800000
  83. #define SPEAR6XX_ICM3_TMR_SIZE 0x00080000
  84. #define SPEAR6XX_ICM3_WDT_BASE 0xFC880000
  85. #define SPEAR6XX_ICM3_WDT_SIZE 0x00080000
  86. #define SPEAR6XX_ICM3_RTC_BASE 0xFC900000
  87. #define SPEAR6XX_ICM3_RTC_SIZE 0x00080000
  88. #define SPEAR6XX_ICM3_GPIO_BASE 0xFC980000
  89. #define SPEAR6XX_ICM3_GPIO_SIZE 0x00080000
  90. #define SPEAR6XX_ICM3_SYS_CTRL_BASE 0xFCA00000
  91. #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
  92. #define SPEAR6XX_ICM3_SYS_CTRL_SIZE 0x00080000
  93. #define SPEAR6XX_ICM3_MISC_REG_BASE 0xFCA80000
  94. #define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
  95. #define SPEAR6XX_ICM3_MISC_REG_SIZE 0x00080000
  96. /* ICM4 - High Speed Connection */
  97. #define SPEAR6XX_ICM4_BASE 0xE0000000
  98. #define SPEAR6XX_ICM4_SIZE 0x08000000
  99. #define SPEAR6XX_ICM4_GMAC_BASE 0xE0800000
  100. #define SPEAR6XX_ICM4_GMAC_SIZE 0x00800000
  101. #define SPEAR6XX_ICM4_USBD_FIFO_BASE 0xE1000000
  102. #define SPEAR6XX_ICM4_USBD_FIFO_SIZE 0x00100000
  103. #define SPEAR6XX_ICM4_USBD_CSR_BASE 0xE1100000
  104. #define SPEAR6XX_ICM4_USBD_CSR_SIZE 0x00100000
  105. #define SPEAR6XX_ICM4_USBD_PLDT_BASE 0xE1200000
  106. #define SPEAR6XX_ICM4_USBD_PLDT_SIZE 0x00100000
  107. #define SPEAR6XX_ICM4_USB_EHCI0_BASE 0xE1800000
  108. #define SPEAR6XX_ICM4_USB_EHCI0_SIZE 0x00100000
  109. #define SPEAR6XX_ICM4_USB_OHCI0_BASE 0xE1900000
  110. #define SPEAR6XX_ICM4_USB_OHCI0_SIZE 0x00100000
  111. #define SPEAR6XX_ICM4_USB_EHCI1_BASE 0xE2000000
  112. #define SPEAR6XX_ICM4_USB_EHCI1_SIZE 0x00100000
  113. #define SPEAR6XX_ICM4_USB_OHCI1_BASE 0xE2100000
  114. #define SPEAR6XX_ICM4_USB_OHCI1_SIZE 0x00100000
  115. #define SPEAR6XX_ICM4_USB_ARB_BASE 0xE2800000
  116. #define SPEAR6XX_ICM4_USB_ARB_SIZE 0x00010000
  117. /* Debug uart for linux, will be used for debug and uncompress messages */
  118. #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
  119. #define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE
  120. /* Sysctl base for spear platform */
  121. #define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE
  122. #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
  123. #endif /* __MACH_SPEAR6XX_H */