rt2x00queue.c 23 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  4. <http://rt2x00.serialmonkey.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the
  15. Free Software Foundation, Inc.,
  16. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. /*
  19. Module: rt2x00lib
  20. Abstract: rt2x00 queue specific routines.
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/dma-mapping.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00lib.h"
  28. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  29. struct queue_entry *entry)
  30. {
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = entry->queue->data_size + entry->queue->desc_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. skbdesc->entry = entry;
  74. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  75. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  76. skb->data,
  77. skb->len,
  78. DMA_FROM_DEVICE);
  79. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  80. }
  81. return skb;
  82. }
  83. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  84. {
  85. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  86. skbdesc->skb_dma =
  87. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  88. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  89. }
  90. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  91. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  92. {
  93. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  94. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  95. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  96. DMA_FROM_DEVICE);
  97. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  98. }
  99. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  100. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  101. DMA_TO_DEVICE);
  102. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  103. }
  104. }
  105. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  106. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  107. {
  108. if (!skb)
  109. return;
  110. rt2x00queue_unmap_skb(rt2x00dev, skb);
  111. dev_kfree_skb_any(skb);
  112. }
  113. void rt2x00queue_align_frame(struct sk_buff *skb)
  114. {
  115. unsigned int frame_length = skb->len;
  116. unsigned int align = ALIGN_SIZE(skb, 0);
  117. if (!align)
  118. return;
  119. skb_push(skb, align);
  120. memmove(skb->data, skb->data + align, frame_length);
  121. skb_trim(skb, frame_length);
  122. }
  123. void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
  124. {
  125. unsigned int frame_length = skb->len;
  126. unsigned int align = ALIGN_SIZE(skb, header_length);
  127. if (!align)
  128. return;
  129. skb_push(skb, align);
  130. memmove(skb->data, skb->data + align, frame_length);
  131. skb_trim(skb, frame_length);
  132. }
  133. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  134. {
  135. unsigned int payload_length = skb->len - header_length;
  136. unsigned int header_align = ALIGN_SIZE(skb, 0);
  137. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  138. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  139. /*
  140. * Adjust the header alignment if the payload needs to be moved more
  141. * than the header.
  142. */
  143. if (payload_align > header_align)
  144. header_align += 4;
  145. /* There is nothing to do if no alignment is needed */
  146. if (!header_align)
  147. return;
  148. /* Reserve the amount of space needed in front of the frame */
  149. skb_push(skb, header_align);
  150. /*
  151. * Move the header.
  152. */
  153. memmove(skb->data, skb->data + header_align, header_length);
  154. /* Move the payload, if present and if required */
  155. if (payload_length && payload_align)
  156. memmove(skb->data + header_length + l2pad,
  157. skb->data + header_length + l2pad + payload_align,
  158. payload_length);
  159. /* Trim the skb to the correct size */
  160. skb_trim(skb, header_length + l2pad + payload_length);
  161. }
  162. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  163. {
  164. unsigned int l2pad = L2PAD_SIZE(header_length);
  165. if (!l2pad)
  166. return;
  167. memmove(skb->data + l2pad, skb->data, header_length);
  168. skb_pull(skb, l2pad);
  169. }
  170. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  171. struct txentry_desc *txdesc)
  172. {
  173. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  174. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  175. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  176. unsigned long irqflags;
  177. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
  178. unlikely(!tx_info->control.vif))
  179. return;
  180. /*
  181. * Hardware should insert sequence counter.
  182. * FIXME: We insert a software sequence counter first for
  183. * hardware that doesn't support hardware sequence counting.
  184. *
  185. * This is wrong because beacons are not getting sequence
  186. * numbers assigned properly.
  187. *
  188. * A secondary problem exists for drivers that cannot toggle
  189. * sequence counting per-frame, since those will override the
  190. * sequence counter given by mac80211.
  191. */
  192. spin_lock_irqsave(&intf->seqlock, irqflags);
  193. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  194. intf->seqno += 0x10;
  195. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  196. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  197. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  198. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  199. }
  200. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  201. struct txentry_desc *txdesc,
  202. const struct rt2x00_rate *hwrate)
  203. {
  204. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  205. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  206. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  207. unsigned int data_length;
  208. unsigned int duration;
  209. unsigned int residual;
  210. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  211. data_length = entry->skb->len + 4;
  212. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  213. /*
  214. * PLCP setup
  215. * Length calculation depends on OFDM/CCK rate.
  216. */
  217. txdesc->signal = hwrate->plcp;
  218. txdesc->service = 0x04;
  219. if (hwrate->flags & DEV_RATE_OFDM) {
  220. txdesc->length_high = (data_length >> 6) & 0x3f;
  221. txdesc->length_low = data_length & 0x3f;
  222. } else {
  223. /*
  224. * Convert length to microseconds.
  225. */
  226. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  227. duration = GET_DURATION(data_length, hwrate->bitrate);
  228. if (residual != 0) {
  229. duration++;
  230. /*
  231. * Check if we need to set the Length Extension
  232. */
  233. if (hwrate->bitrate == 110 && residual <= 30)
  234. txdesc->service |= 0x80;
  235. }
  236. txdesc->length_high = (duration >> 8) & 0xff;
  237. txdesc->length_low = duration & 0xff;
  238. /*
  239. * When preamble is enabled we should set the
  240. * preamble bit for the signal.
  241. */
  242. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  243. txdesc->signal |= 0x08;
  244. }
  245. }
  246. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  247. struct txentry_desc *txdesc)
  248. {
  249. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  250. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  251. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  252. struct ieee80211_rate *rate =
  253. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  254. const struct rt2x00_rate *hwrate;
  255. memset(txdesc, 0, sizeof(*txdesc));
  256. /*
  257. * Initialize information from queue
  258. */
  259. txdesc->queue = entry->queue->qid;
  260. txdesc->cw_min = entry->queue->cw_min;
  261. txdesc->cw_max = entry->queue->cw_max;
  262. txdesc->aifs = entry->queue->aifs;
  263. /*
  264. * Header and frame information.
  265. */
  266. txdesc->length = entry->skb->len;
  267. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  268. /*
  269. * Check whether this frame is to be acked.
  270. */
  271. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  272. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  273. /*
  274. * Check if this is a RTS/CTS frame
  275. */
  276. if (ieee80211_is_rts(hdr->frame_control) ||
  277. ieee80211_is_cts(hdr->frame_control)) {
  278. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  279. if (ieee80211_is_rts(hdr->frame_control))
  280. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  281. else
  282. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  283. if (tx_info->control.rts_cts_rate_idx >= 0)
  284. rate =
  285. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  286. }
  287. /*
  288. * Determine retry information.
  289. */
  290. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  291. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  292. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  293. /*
  294. * Check if more fragments are pending
  295. */
  296. if (ieee80211_has_morefrags(hdr->frame_control)) {
  297. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  298. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  299. }
  300. /*
  301. * Check if more frames (!= fragments) are pending
  302. */
  303. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  304. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  305. /*
  306. * Beacons and probe responses require the tsf timestamp
  307. * to be inserted into the frame, except for a frame that has been injected
  308. * through a monitor interface. This latter is needed for testing a
  309. * monitor interface.
  310. */
  311. if ((ieee80211_is_beacon(hdr->frame_control) ||
  312. ieee80211_is_probe_resp(hdr->frame_control)) &&
  313. (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
  314. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  315. /*
  316. * Determine with what IFS priority this frame should be send.
  317. * Set ifs to IFS_SIFS when the this is not the first fragment,
  318. * or this fragment came after RTS/CTS.
  319. */
  320. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  321. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  322. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  323. txdesc->ifs = IFS_BACKOFF;
  324. } else
  325. txdesc->ifs = IFS_SIFS;
  326. /*
  327. * Determine rate modulation.
  328. */
  329. hwrate = rt2x00_get_rate(rate->hw_value);
  330. txdesc->rate_mode = RATE_MODE_CCK;
  331. if (hwrate->flags & DEV_RATE_OFDM)
  332. txdesc->rate_mode = RATE_MODE_OFDM;
  333. /*
  334. * Apply TX descriptor handling by components
  335. */
  336. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  337. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  338. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  339. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  340. }
  341. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  342. struct txentry_desc *txdesc)
  343. {
  344. struct data_queue *queue = entry->queue;
  345. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  346. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  347. /*
  348. * All processing on the frame has been completed, this means
  349. * it is now ready to be dumped to userspace through debugfs.
  350. */
  351. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  352. }
  353. static void rt2x00queue_kick_tx_queue(struct queue_entry *entry,
  354. struct txentry_desc *txdesc)
  355. {
  356. struct data_queue *queue = entry->queue;
  357. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  358. /*
  359. * Check if we need to kick the queue, there are however a few rules
  360. * 1) Don't kick unless this is the last in frame in a burst.
  361. * When the burst flag is set, this frame is always followed
  362. * by another frame which in some way are related to eachother.
  363. * This is true for fragments, RTS or CTS-to-self frames.
  364. * 2) Rule 1 can be broken when the available entries
  365. * in the queue are less then a certain threshold.
  366. */
  367. if (rt2x00queue_threshold(queue) ||
  368. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  369. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  370. }
  371. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  372. bool local)
  373. {
  374. struct ieee80211_tx_info *tx_info;
  375. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  376. struct txentry_desc txdesc;
  377. struct skb_frame_desc *skbdesc;
  378. u8 rate_idx, rate_flags;
  379. if (unlikely(rt2x00queue_full(queue)))
  380. return -ENOBUFS;
  381. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  382. ERROR(queue->rt2x00dev,
  383. "Arrived at non-free entry in the non-full queue %d.\n"
  384. "Please file bug report to %s.\n",
  385. queue->qid, DRV_PROJECT);
  386. return -EINVAL;
  387. }
  388. /*
  389. * Copy all TX descriptor information into txdesc,
  390. * after that we are free to use the skb->cb array
  391. * for our information.
  392. */
  393. entry->skb = skb;
  394. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  395. /*
  396. * All information is retrieved from the skb->cb array,
  397. * now we should claim ownership of the driver part of that
  398. * array, preserving the bitrate index and flags.
  399. */
  400. tx_info = IEEE80211_SKB_CB(skb);
  401. rate_idx = tx_info->control.rates[0].idx;
  402. rate_flags = tx_info->control.rates[0].flags;
  403. skbdesc = get_skb_frame_desc(skb);
  404. memset(skbdesc, 0, sizeof(*skbdesc));
  405. skbdesc->entry = entry;
  406. skbdesc->tx_rate_idx = rate_idx;
  407. skbdesc->tx_rate_flags = rate_flags;
  408. if (local)
  409. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  410. /*
  411. * When hardware encryption is supported, and this frame
  412. * is to be encrypted, we should strip the IV/EIV data from
  413. * the frame so we can provide it to the driver separately.
  414. */
  415. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  416. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  417. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  418. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  419. else
  420. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  421. }
  422. /*
  423. * When DMA allocation is required we should guarentee to the
  424. * driver that the DMA is aligned to a 4-byte boundary.
  425. * However some drivers require L2 padding to pad the payload
  426. * rather then the header. This could be a requirement for
  427. * PCI and USB devices, while header alignment only is valid
  428. * for PCI devices.
  429. */
  430. if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
  431. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  432. else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  433. rt2x00queue_align_frame(entry->skb);
  434. /*
  435. * It could be possible that the queue was corrupted and this
  436. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  437. * this frame will simply be dropped.
  438. */
  439. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry,
  440. &txdesc))) {
  441. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  442. entry->skb = NULL;
  443. return -EIO;
  444. }
  445. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  446. rt2x00queue_index_inc(queue, Q_INDEX);
  447. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  448. rt2x00queue_kick_tx_queue(entry, &txdesc);
  449. return 0;
  450. }
  451. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  452. struct ieee80211_vif *vif,
  453. const bool enable_beacon)
  454. {
  455. struct rt2x00_intf *intf = vif_to_intf(vif);
  456. struct skb_frame_desc *skbdesc;
  457. struct txentry_desc txdesc;
  458. if (unlikely(!intf->beacon))
  459. return -ENOBUFS;
  460. mutex_lock(&intf->beacon_skb_mutex);
  461. /*
  462. * Clean up the beacon skb.
  463. */
  464. rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
  465. intf->beacon->skb = NULL;
  466. if (!enable_beacon) {
  467. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
  468. mutex_unlock(&intf->beacon_skb_mutex);
  469. return 0;
  470. }
  471. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  472. if (!intf->beacon->skb) {
  473. mutex_unlock(&intf->beacon_skb_mutex);
  474. return -ENOMEM;
  475. }
  476. /*
  477. * Copy all TX descriptor information into txdesc,
  478. * after that we are free to use the skb->cb array
  479. * for our information.
  480. */
  481. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  482. /*
  483. * Fill in skb descriptor
  484. */
  485. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  486. memset(skbdesc, 0, sizeof(*skbdesc));
  487. skbdesc->entry = intf->beacon;
  488. /*
  489. * Send beacon to hardware and enable beacon genaration..
  490. */
  491. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  492. mutex_unlock(&intf->beacon_skb_mutex);
  493. return 0;
  494. }
  495. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  496. const enum data_queue_qid queue)
  497. {
  498. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  499. if (queue == QID_RX)
  500. return rt2x00dev->rx;
  501. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  502. return &rt2x00dev->tx[queue];
  503. if (!rt2x00dev->bcn)
  504. return NULL;
  505. if (queue == QID_BEACON)
  506. return &rt2x00dev->bcn[0];
  507. else if (queue == QID_ATIM && atim)
  508. return &rt2x00dev->bcn[1];
  509. return NULL;
  510. }
  511. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  512. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  513. enum queue_index index)
  514. {
  515. struct queue_entry *entry;
  516. unsigned long irqflags;
  517. if (unlikely(index >= Q_INDEX_MAX)) {
  518. ERROR(queue->rt2x00dev,
  519. "Entry requested from invalid index type (%d)\n", index);
  520. return NULL;
  521. }
  522. spin_lock_irqsave(&queue->lock, irqflags);
  523. entry = &queue->entries[queue->index[index]];
  524. spin_unlock_irqrestore(&queue->lock, irqflags);
  525. return entry;
  526. }
  527. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  528. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  529. {
  530. unsigned long irqflags;
  531. if (unlikely(index >= Q_INDEX_MAX)) {
  532. ERROR(queue->rt2x00dev,
  533. "Index change on invalid index type (%d)\n", index);
  534. return;
  535. }
  536. spin_lock_irqsave(&queue->lock, irqflags);
  537. queue->index[index]++;
  538. if (queue->index[index] >= queue->limit)
  539. queue->index[index] = 0;
  540. if (index == Q_INDEX) {
  541. queue->length++;
  542. } else if (index == Q_INDEX_DONE) {
  543. queue->length--;
  544. queue->count++;
  545. }
  546. spin_unlock_irqrestore(&queue->lock, irqflags);
  547. }
  548. static void rt2x00queue_reset(struct data_queue *queue)
  549. {
  550. unsigned long irqflags;
  551. spin_lock_irqsave(&queue->lock, irqflags);
  552. queue->count = 0;
  553. queue->length = 0;
  554. memset(queue->index, 0, sizeof(queue->index));
  555. spin_unlock_irqrestore(&queue->lock, irqflags);
  556. }
  557. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  558. {
  559. struct data_queue *queue;
  560. txall_queue_for_each(rt2x00dev, queue)
  561. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
  562. }
  563. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  564. {
  565. struct data_queue *queue;
  566. unsigned int i;
  567. queue_for_each(rt2x00dev, queue) {
  568. rt2x00queue_reset(queue);
  569. for (i = 0; i < queue->limit; i++) {
  570. queue->entries[i].flags = 0;
  571. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  572. }
  573. }
  574. }
  575. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  576. const struct data_queue_desc *qdesc)
  577. {
  578. struct queue_entry *entries;
  579. unsigned int entry_size;
  580. unsigned int i;
  581. rt2x00queue_reset(queue);
  582. queue->limit = qdesc->entry_num;
  583. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  584. queue->data_size = qdesc->data_size;
  585. queue->desc_size = qdesc->desc_size;
  586. /*
  587. * Allocate all queue entries.
  588. */
  589. entry_size = sizeof(*entries) + qdesc->priv_size;
  590. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  591. if (!entries)
  592. return -ENOMEM;
  593. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  594. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  595. ((__index) * (__psize)) )
  596. for (i = 0; i < queue->limit; i++) {
  597. entries[i].flags = 0;
  598. entries[i].queue = queue;
  599. entries[i].skb = NULL;
  600. entries[i].entry_idx = i;
  601. entries[i].priv_data =
  602. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  603. sizeof(*entries), qdesc->priv_size);
  604. }
  605. #undef QUEUE_ENTRY_PRIV_OFFSET
  606. queue->entries = entries;
  607. return 0;
  608. }
  609. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  610. struct data_queue *queue)
  611. {
  612. unsigned int i;
  613. if (!queue->entries)
  614. return;
  615. for (i = 0; i < queue->limit; i++) {
  616. if (queue->entries[i].skb)
  617. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  618. }
  619. }
  620. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  621. struct data_queue *queue)
  622. {
  623. unsigned int i;
  624. struct sk_buff *skb;
  625. for (i = 0; i < queue->limit; i++) {
  626. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  627. if (!skb)
  628. return -ENOMEM;
  629. queue->entries[i].skb = skb;
  630. }
  631. return 0;
  632. }
  633. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  634. {
  635. struct data_queue *queue;
  636. int status;
  637. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  638. if (status)
  639. goto exit;
  640. tx_queue_for_each(rt2x00dev, queue) {
  641. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  642. if (status)
  643. goto exit;
  644. }
  645. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  646. if (status)
  647. goto exit;
  648. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  649. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  650. rt2x00dev->ops->atim);
  651. if (status)
  652. goto exit;
  653. }
  654. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  655. if (status)
  656. goto exit;
  657. return 0;
  658. exit:
  659. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  660. rt2x00queue_uninitialize(rt2x00dev);
  661. return status;
  662. }
  663. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  664. {
  665. struct data_queue *queue;
  666. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  667. queue_for_each(rt2x00dev, queue) {
  668. kfree(queue->entries);
  669. queue->entries = NULL;
  670. }
  671. }
  672. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  673. struct data_queue *queue, enum data_queue_qid qid)
  674. {
  675. spin_lock_init(&queue->lock);
  676. queue->rt2x00dev = rt2x00dev;
  677. queue->qid = qid;
  678. queue->txop = 0;
  679. queue->aifs = 2;
  680. queue->cw_min = 5;
  681. queue->cw_max = 10;
  682. }
  683. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  684. {
  685. struct data_queue *queue;
  686. enum data_queue_qid qid;
  687. unsigned int req_atim =
  688. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  689. /*
  690. * We need the following queues:
  691. * RX: 1
  692. * TX: ops->tx_queues
  693. * Beacon: 1
  694. * Atim: 1 (if required)
  695. */
  696. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  697. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  698. if (!queue) {
  699. ERROR(rt2x00dev, "Queue allocation failed.\n");
  700. return -ENOMEM;
  701. }
  702. /*
  703. * Initialize pointers
  704. */
  705. rt2x00dev->rx = queue;
  706. rt2x00dev->tx = &queue[1];
  707. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  708. /*
  709. * Initialize queue parameters.
  710. * RX: qid = QID_RX
  711. * TX: qid = QID_AC_BE + index
  712. * TX: cw_min: 2^5 = 32.
  713. * TX: cw_max: 2^10 = 1024.
  714. * BCN: qid = QID_BEACON
  715. * ATIM: qid = QID_ATIM
  716. */
  717. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  718. qid = QID_AC_BE;
  719. tx_queue_for_each(rt2x00dev, queue)
  720. rt2x00queue_init(rt2x00dev, queue, qid++);
  721. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  722. if (req_atim)
  723. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  724. return 0;
  725. }
  726. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  727. {
  728. kfree(rt2x00dev->rx);
  729. rt2x00dev->rx = NULL;
  730. rt2x00dev->tx = NULL;
  731. rt2x00dev->bcn = NULL;
  732. }