be_main.c 55 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  32. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  33. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
  34. { 0 }
  35. };
  36. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  37. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  38. {
  39. struct be_dma_mem *mem = &q->dma_mem;
  40. if (mem->va)
  41. pci_free_consistent(adapter->pdev, mem->size,
  42. mem->va, mem->dma);
  43. }
  44. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  45. u16 len, u16 entry_size)
  46. {
  47. struct be_dma_mem *mem = &q->dma_mem;
  48. memset(q, 0, sizeof(*q));
  49. q->len = len;
  50. q->entry_size = entry_size;
  51. mem->size = len * entry_size;
  52. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  53. if (!mem->va)
  54. return -1;
  55. memset(mem->va, 0, mem->size);
  56. return 0;
  57. }
  58. static void be_intr_set(struct be_adapter *adapter, bool enable)
  59. {
  60. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  61. u32 reg = ioread32(addr);
  62. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. if (!enabled && enable)
  64. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else if (enabled && !enable)
  66. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  67. else
  68. return;
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  99. {
  100. u32 val = 0;
  101. val |= qid & DB_CQ_RING_ID_MASK;
  102. if (arm)
  103. val |= 1 << DB_CQ_REARM_SHIFT;
  104. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  105. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  106. }
  107. static int be_mac_addr_set(struct net_device *netdev, void *p)
  108. {
  109. struct be_adapter *adapter = netdev_priv(netdev);
  110. struct sockaddr *addr = p;
  111. int status = 0;
  112. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  113. if (status)
  114. return status;
  115. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  116. adapter->if_handle, &adapter->pmac_id);
  117. if (!status)
  118. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  119. return status;
  120. }
  121. void netdev_stats_update(struct be_adapter *adapter)
  122. {
  123. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  124. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  125. struct be_port_rxf_stats *port_stats =
  126. &rxf_stats->port[adapter->port_num];
  127. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  128. struct be_erx_stats *erx_stats = &hw_stats->erx;
  129. dev_stats->rx_packets = port_stats->rx_total_frames;
  130. dev_stats->tx_packets = port_stats->tx_unicastframes +
  131. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  132. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  133. (u64) port_stats->rx_bytes_lsd;
  134. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  135. (u64) port_stats->tx_bytes_lsd;
  136. /* bad pkts received */
  137. dev_stats->rx_errors = port_stats->rx_crc_errors +
  138. port_stats->rx_alignment_symbol_errors +
  139. port_stats->rx_in_range_errors +
  140. port_stats->rx_out_range_errors +
  141. port_stats->rx_frame_too_long +
  142. port_stats->rx_dropped_too_small +
  143. port_stats->rx_dropped_too_short +
  144. port_stats->rx_dropped_header_too_small +
  145. port_stats->rx_dropped_tcp_length +
  146. port_stats->rx_dropped_runt +
  147. port_stats->rx_tcp_checksum_errs +
  148. port_stats->rx_ip_checksum_errs +
  149. port_stats->rx_udp_checksum_errs;
  150. /* no space in linux buffers: best possible approximation */
  151. dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
  152. /* detailed rx errors */
  153. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  154. port_stats->rx_out_range_errors +
  155. port_stats->rx_frame_too_long;
  156. /* receive ring buffer overflow */
  157. dev_stats->rx_over_errors = 0;
  158. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  159. /* frame alignment errors */
  160. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  161. /* receiver fifo overrun */
  162. /* drops_no_pbuf is no per i/f, it's per BE card */
  163. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  164. port_stats->rx_input_fifo_overflow +
  165. rxf_stats->rx_drops_no_pbuf;
  166. /* receiver missed packetd */
  167. dev_stats->rx_missed_errors = 0;
  168. /* packet transmit problems */
  169. dev_stats->tx_errors = 0;
  170. /* no space available in linux */
  171. dev_stats->tx_dropped = 0;
  172. dev_stats->multicast = port_stats->rx_multicast_frames;
  173. dev_stats->collisions = 0;
  174. /* detailed tx_errors */
  175. dev_stats->tx_aborted_errors = 0;
  176. dev_stats->tx_carrier_errors = 0;
  177. dev_stats->tx_fifo_errors = 0;
  178. dev_stats->tx_heartbeat_errors = 0;
  179. dev_stats->tx_window_errors = 0;
  180. }
  181. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  182. {
  183. struct net_device *netdev = adapter->netdev;
  184. /* If link came up or went down */
  185. if (adapter->link_up != link_up) {
  186. if (link_up) {
  187. netif_start_queue(netdev);
  188. netif_carrier_on(netdev);
  189. printk(KERN_INFO "%s: Link up\n", netdev->name);
  190. } else {
  191. netif_stop_queue(netdev);
  192. netif_carrier_off(netdev);
  193. printk(KERN_INFO "%s: Link down\n", netdev->name);
  194. }
  195. adapter->link_up = link_up;
  196. }
  197. }
  198. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  199. static void be_rx_eqd_update(struct be_adapter *adapter)
  200. {
  201. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  202. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  203. ulong now = jiffies;
  204. u32 eqd;
  205. if (!rx_eq->enable_aic)
  206. return;
  207. /* Wrapped around */
  208. if (time_before(now, stats->rx_fps_jiffies)) {
  209. stats->rx_fps_jiffies = now;
  210. return;
  211. }
  212. /* Update once a second */
  213. if ((now - stats->rx_fps_jiffies) < HZ)
  214. return;
  215. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  216. ((now - stats->rx_fps_jiffies) / HZ);
  217. stats->rx_fps_jiffies = now;
  218. stats->be_prev_rx_frags = stats->be_rx_frags;
  219. eqd = stats->be_rx_fps / 110000;
  220. eqd = eqd << 3;
  221. if (eqd > rx_eq->max_eqd)
  222. eqd = rx_eq->max_eqd;
  223. if (eqd < rx_eq->min_eqd)
  224. eqd = rx_eq->min_eqd;
  225. if (eqd < 10)
  226. eqd = 0;
  227. if (eqd != rx_eq->cur_eqd)
  228. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  229. rx_eq->cur_eqd = eqd;
  230. }
  231. static struct net_device_stats *be_get_stats(struct net_device *dev)
  232. {
  233. return &dev->stats;
  234. }
  235. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  236. {
  237. u64 rate = bytes;
  238. do_div(rate, ticks / HZ);
  239. rate <<= 3; /* bytes/sec -> bits/sec */
  240. do_div(rate, 1000000ul); /* MB/Sec */
  241. return rate;
  242. }
  243. static void be_tx_rate_update(struct be_adapter *adapter)
  244. {
  245. struct be_drvr_stats *stats = drvr_stats(adapter);
  246. ulong now = jiffies;
  247. /* Wrapped around? */
  248. if (time_before(now, stats->be_tx_jiffies)) {
  249. stats->be_tx_jiffies = now;
  250. return;
  251. }
  252. /* Update tx rate once in two seconds */
  253. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  254. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  255. - stats->be_tx_bytes_prev,
  256. now - stats->be_tx_jiffies);
  257. stats->be_tx_jiffies = now;
  258. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  259. }
  260. }
  261. static void be_tx_stats_update(struct be_adapter *adapter,
  262. u32 wrb_cnt, u32 copied, bool stopped)
  263. {
  264. struct be_drvr_stats *stats = drvr_stats(adapter);
  265. stats->be_tx_reqs++;
  266. stats->be_tx_wrbs += wrb_cnt;
  267. stats->be_tx_bytes += copied;
  268. if (stopped)
  269. stats->be_tx_stops++;
  270. }
  271. /* Determine number of WRB entries needed to xmit data in an skb */
  272. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  273. {
  274. int cnt = (skb->len > skb->data_len);
  275. cnt += skb_shinfo(skb)->nr_frags;
  276. /* to account for hdr wrb */
  277. cnt++;
  278. if (cnt & 1) {
  279. /* add a dummy to make it an even num */
  280. cnt++;
  281. *dummy = true;
  282. } else
  283. *dummy = false;
  284. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  285. return cnt;
  286. }
  287. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  288. {
  289. wrb->frag_pa_hi = upper_32_bits(addr);
  290. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  291. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  292. }
  293. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  294. bool vlan, u32 wrb_cnt, u32 len)
  295. {
  296. memset(hdr, 0, sizeof(*hdr));
  297. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  298. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  299. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  300. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  301. hdr, skb_shinfo(skb)->gso_size);
  302. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  303. if (is_tcp_pkt(skb))
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  305. else if (is_udp_pkt(skb))
  306. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  307. }
  308. if (vlan && vlan_tx_tag_present(skb)) {
  309. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  311. hdr, vlan_tx_tag_get(skb));
  312. }
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  315. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  316. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  317. }
  318. static int make_tx_wrbs(struct be_adapter *adapter,
  319. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  320. {
  321. u64 busaddr;
  322. u32 i, copied = 0;
  323. struct pci_dev *pdev = adapter->pdev;
  324. struct sk_buff *first_skb = skb;
  325. struct be_queue_info *txq = &adapter->tx_obj.q;
  326. struct be_eth_wrb *wrb;
  327. struct be_eth_hdr_wrb *hdr;
  328. hdr = queue_head_node(txq);
  329. atomic_add(wrb_cnt, &txq->used);
  330. queue_head_inc(txq);
  331. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  332. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  333. return 0;
  334. }
  335. if (skb->len > skb->data_len) {
  336. int len = skb->len - skb->data_len;
  337. wrb = queue_head_node(txq);
  338. busaddr = skb_shinfo(skb)->dma_head;
  339. wrb_fill(wrb, busaddr, len);
  340. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  341. queue_head_inc(txq);
  342. copied += len;
  343. }
  344. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  345. struct skb_frag_struct *frag =
  346. &skb_shinfo(skb)->frags[i];
  347. busaddr = skb_shinfo(skb)->dma_maps[i];
  348. wrb = queue_head_node(txq);
  349. wrb_fill(wrb, busaddr, frag->size);
  350. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  351. queue_head_inc(txq);
  352. copied += frag->size;
  353. }
  354. if (dummy_wrb) {
  355. wrb = queue_head_node(txq);
  356. wrb_fill(wrb, 0, 0);
  357. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  358. queue_head_inc(txq);
  359. }
  360. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  361. wrb_cnt, copied);
  362. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  363. return copied;
  364. }
  365. static netdev_tx_t be_xmit(struct sk_buff *skb,
  366. struct net_device *netdev)
  367. {
  368. struct be_adapter *adapter = netdev_priv(netdev);
  369. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  370. struct be_queue_info *txq = &tx_obj->q;
  371. u32 wrb_cnt = 0, copied = 0;
  372. u32 start = txq->head;
  373. bool dummy_wrb, stopped = false;
  374. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  375. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  376. if (copied) {
  377. /* record the sent skb in the sent_skb table */
  378. BUG_ON(tx_obj->sent_skb_list[start]);
  379. tx_obj->sent_skb_list[start] = skb;
  380. /* Ensure txq has space for the next skb; Else stop the queue
  381. * *BEFORE* ringing the tx doorbell, so that we serialze the
  382. * tx compls of the current transmit which'll wake up the queue
  383. */
  384. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  385. txq->len) {
  386. netif_stop_queue(netdev);
  387. stopped = true;
  388. }
  389. be_txq_notify(adapter, txq->id, wrb_cnt);
  390. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  391. } else {
  392. txq->head = start;
  393. dev_kfree_skb_any(skb);
  394. }
  395. return NETDEV_TX_OK;
  396. }
  397. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  398. {
  399. struct be_adapter *adapter = netdev_priv(netdev);
  400. if (new_mtu < BE_MIN_MTU ||
  401. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  402. dev_info(&adapter->pdev->dev,
  403. "MTU must be between %d and %d bytes\n",
  404. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  405. return -EINVAL;
  406. }
  407. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  408. netdev->mtu, new_mtu);
  409. netdev->mtu = new_mtu;
  410. return 0;
  411. }
  412. /*
  413. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  414. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  415. * set the BE in promiscuous VLAN mode.
  416. */
  417. static int be_vid_config(struct be_adapter *adapter)
  418. {
  419. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  420. u16 ntags = 0, i;
  421. int status;
  422. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  423. /* Construct VLAN Table to give to HW */
  424. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  425. if (adapter->vlan_tag[i]) {
  426. vtag[ntags] = cpu_to_le16(i);
  427. ntags++;
  428. }
  429. }
  430. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  431. vtag, ntags, 1, 0);
  432. } else {
  433. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  434. NULL, 0, 1, 1);
  435. }
  436. return status;
  437. }
  438. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  439. {
  440. struct be_adapter *adapter = netdev_priv(netdev);
  441. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  442. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  443. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  444. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  445. adapter->vlan_grp = grp;
  446. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  447. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  448. }
  449. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  450. {
  451. struct be_adapter *adapter = netdev_priv(netdev);
  452. adapter->num_vlans++;
  453. adapter->vlan_tag[vid] = 1;
  454. be_vid_config(adapter);
  455. }
  456. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  457. {
  458. struct be_adapter *adapter = netdev_priv(netdev);
  459. adapter->num_vlans--;
  460. adapter->vlan_tag[vid] = 0;
  461. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  462. be_vid_config(adapter);
  463. }
  464. static void be_set_multicast_list(struct net_device *netdev)
  465. {
  466. struct be_adapter *adapter = netdev_priv(netdev);
  467. if (netdev->flags & IFF_PROMISC) {
  468. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  469. adapter->promiscuous = true;
  470. goto done;
  471. }
  472. /* BE was previously in promiscous mode; disable it */
  473. if (adapter->promiscuous) {
  474. adapter->promiscuous = false;
  475. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  476. }
  477. if (netdev->flags & IFF_ALLMULTI) {
  478. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
  479. goto done;
  480. }
  481. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  482. netdev->mc_count);
  483. done:
  484. return;
  485. }
  486. static void be_rx_rate_update(struct be_adapter *adapter)
  487. {
  488. struct be_drvr_stats *stats = drvr_stats(adapter);
  489. ulong now = jiffies;
  490. /* Wrapped around */
  491. if (time_before(now, stats->be_rx_jiffies)) {
  492. stats->be_rx_jiffies = now;
  493. return;
  494. }
  495. /* Update the rate once in two seconds */
  496. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  497. return;
  498. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  499. - stats->be_rx_bytes_prev,
  500. now - stats->be_rx_jiffies);
  501. stats->be_rx_jiffies = now;
  502. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  503. }
  504. static void be_rx_stats_update(struct be_adapter *adapter,
  505. u32 pktsize, u16 numfrags)
  506. {
  507. struct be_drvr_stats *stats = drvr_stats(adapter);
  508. stats->be_rx_compl++;
  509. stats->be_rx_frags += numfrags;
  510. stats->be_rx_bytes += pktsize;
  511. }
  512. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  513. {
  514. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  515. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  516. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  517. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  518. if (ip_version) {
  519. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  520. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  521. }
  522. ipv6_chk = (ip_version && (tcpf || udpf));
  523. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  524. }
  525. static struct be_rx_page_info *
  526. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  527. {
  528. struct be_rx_page_info *rx_page_info;
  529. struct be_queue_info *rxq = &adapter->rx_obj.q;
  530. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  531. BUG_ON(!rx_page_info->page);
  532. if (rx_page_info->last_page_user)
  533. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  534. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  535. atomic_dec(&rxq->used);
  536. return rx_page_info;
  537. }
  538. /* Throwaway the data in the Rx completion */
  539. static void be_rx_compl_discard(struct be_adapter *adapter,
  540. struct be_eth_rx_compl *rxcp)
  541. {
  542. struct be_queue_info *rxq = &adapter->rx_obj.q;
  543. struct be_rx_page_info *page_info;
  544. u16 rxq_idx, i, num_rcvd;
  545. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  546. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  547. for (i = 0; i < num_rcvd; i++) {
  548. page_info = get_rx_page_info(adapter, rxq_idx);
  549. put_page(page_info->page);
  550. memset(page_info, 0, sizeof(*page_info));
  551. index_inc(&rxq_idx, rxq->len);
  552. }
  553. }
  554. /*
  555. * skb_fill_rx_data forms a complete skb for an ether frame
  556. * indicated by rxcp.
  557. */
  558. static void skb_fill_rx_data(struct be_adapter *adapter,
  559. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  560. {
  561. struct be_queue_info *rxq = &adapter->rx_obj.q;
  562. struct be_rx_page_info *page_info;
  563. u16 rxq_idx, i, num_rcvd, j;
  564. u32 pktsize, hdr_len, curr_frag_len, size;
  565. u8 *start;
  566. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  567. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  568. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  569. page_info = get_rx_page_info(adapter, rxq_idx);
  570. start = page_address(page_info->page) + page_info->page_offset;
  571. prefetch(start);
  572. /* Copy data in the first descriptor of this completion */
  573. curr_frag_len = min(pktsize, rx_frag_size);
  574. /* Copy the header portion into skb_data */
  575. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  576. memcpy(skb->data, start, hdr_len);
  577. skb->len = curr_frag_len;
  578. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  579. /* Complete packet has now been moved to data */
  580. put_page(page_info->page);
  581. skb->data_len = 0;
  582. skb->tail += curr_frag_len;
  583. } else {
  584. skb_shinfo(skb)->nr_frags = 1;
  585. skb_shinfo(skb)->frags[0].page = page_info->page;
  586. skb_shinfo(skb)->frags[0].page_offset =
  587. page_info->page_offset + hdr_len;
  588. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  589. skb->data_len = curr_frag_len - hdr_len;
  590. skb->tail += hdr_len;
  591. }
  592. memset(page_info, 0, sizeof(*page_info));
  593. if (pktsize <= rx_frag_size) {
  594. BUG_ON(num_rcvd != 1);
  595. goto done;
  596. }
  597. /* More frags present for this completion */
  598. size = pktsize;
  599. for (i = 1, j = 0; i < num_rcvd; i++) {
  600. size -= curr_frag_len;
  601. index_inc(&rxq_idx, rxq->len);
  602. page_info = get_rx_page_info(adapter, rxq_idx);
  603. curr_frag_len = min(size, rx_frag_size);
  604. /* Coalesce all frags from the same physical page in one slot */
  605. if (page_info->page_offset == 0) {
  606. /* Fresh page */
  607. j++;
  608. skb_shinfo(skb)->frags[j].page = page_info->page;
  609. skb_shinfo(skb)->frags[j].page_offset =
  610. page_info->page_offset;
  611. skb_shinfo(skb)->frags[j].size = 0;
  612. skb_shinfo(skb)->nr_frags++;
  613. } else {
  614. put_page(page_info->page);
  615. }
  616. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  617. skb->len += curr_frag_len;
  618. skb->data_len += curr_frag_len;
  619. memset(page_info, 0, sizeof(*page_info));
  620. }
  621. BUG_ON(j > MAX_SKB_FRAGS);
  622. done:
  623. be_rx_stats_update(adapter, pktsize, num_rcvd);
  624. return;
  625. }
  626. /* Process the RX completion indicated by rxcp when GRO is disabled */
  627. static void be_rx_compl_process(struct be_adapter *adapter,
  628. struct be_eth_rx_compl *rxcp)
  629. {
  630. struct sk_buff *skb;
  631. u32 vlanf, vid;
  632. u8 vtm;
  633. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  634. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  635. /* vlanf could be wrongly set in some cards.
  636. * ignore if vtm is not set */
  637. if ((adapter->cap == 0x400) && !vtm)
  638. vlanf = 0;
  639. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  640. if (!skb) {
  641. if (net_ratelimit())
  642. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  643. be_rx_compl_discard(adapter, rxcp);
  644. return;
  645. }
  646. skb_fill_rx_data(adapter, skb, rxcp);
  647. if (do_pkt_csum(rxcp, adapter->rx_csum))
  648. skb->ip_summed = CHECKSUM_NONE;
  649. else
  650. skb->ip_summed = CHECKSUM_UNNECESSARY;
  651. skb->truesize = skb->len + sizeof(struct sk_buff);
  652. skb->protocol = eth_type_trans(skb, adapter->netdev);
  653. skb->dev = adapter->netdev;
  654. if (vlanf) {
  655. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  656. kfree_skb(skb);
  657. return;
  658. }
  659. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  660. vid = be16_to_cpu(vid);
  661. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  662. } else {
  663. netif_receive_skb(skb);
  664. }
  665. return;
  666. }
  667. /* Process the RX completion indicated by rxcp when GRO is enabled */
  668. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  669. struct be_eth_rx_compl *rxcp)
  670. {
  671. struct be_rx_page_info *page_info;
  672. struct sk_buff *skb = NULL;
  673. struct be_queue_info *rxq = &adapter->rx_obj.q;
  674. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  675. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  676. u16 i, rxq_idx = 0, vid, j;
  677. u8 vtm;
  678. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  679. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  680. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  681. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  682. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  683. /* vlanf could be wrongly set in some cards.
  684. * ignore if vtm is not set */
  685. if ((adapter->cap == 0x400) && !vtm)
  686. vlanf = 0;
  687. skb = napi_get_frags(&eq_obj->napi);
  688. if (!skb) {
  689. be_rx_compl_discard(adapter, rxcp);
  690. return;
  691. }
  692. remaining = pkt_size;
  693. for (i = 0, j = -1; i < num_rcvd; i++) {
  694. page_info = get_rx_page_info(adapter, rxq_idx);
  695. curr_frag_len = min(remaining, rx_frag_size);
  696. /* Coalesce all frags from the same physical page in one slot */
  697. if (i == 0 || page_info->page_offset == 0) {
  698. /* First frag or Fresh page */
  699. j++;
  700. skb_shinfo(skb)->frags[j].page = page_info->page;
  701. skb_shinfo(skb)->frags[j].page_offset =
  702. page_info->page_offset;
  703. skb_shinfo(skb)->frags[j].size = 0;
  704. } else {
  705. put_page(page_info->page);
  706. }
  707. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  708. remaining -= curr_frag_len;
  709. index_inc(&rxq_idx, rxq->len);
  710. memset(page_info, 0, sizeof(*page_info));
  711. }
  712. BUG_ON(j > MAX_SKB_FRAGS);
  713. skb_shinfo(skb)->nr_frags = j + 1;
  714. skb->len = pkt_size;
  715. skb->data_len = pkt_size;
  716. skb->truesize += pkt_size;
  717. skb->ip_summed = CHECKSUM_UNNECESSARY;
  718. if (likely(!vlanf)) {
  719. napi_gro_frags(&eq_obj->napi);
  720. } else {
  721. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  722. vid = be16_to_cpu(vid);
  723. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  724. return;
  725. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  726. }
  727. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  728. return;
  729. }
  730. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  731. {
  732. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  733. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  734. return NULL;
  735. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  736. queue_tail_inc(&adapter->rx_obj.cq);
  737. return rxcp;
  738. }
  739. /* To reset the valid bit, we need to reset the whole word as
  740. * when walking the queue the valid entries are little-endian
  741. * and invalid entries are host endian
  742. */
  743. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  744. {
  745. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  746. }
  747. static inline struct page *be_alloc_pages(u32 size)
  748. {
  749. gfp_t alloc_flags = GFP_ATOMIC;
  750. u32 order = get_order(size);
  751. if (order > 0)
  752. alloc_flags |= __GFP_COMP;
  753. return alloc_pages(alloc_flags, order);
  754. }
  755. /*
  756. * Allocate a page, split it to fragments of size rx_frag_size and post as
  757. * receive buffers to BE
  758. */
  759. static void be_post_rx_frags(struct be_adapter *adapter)
  760. {
  761. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  762. struct be_rx_page_info *page_info = NULL;
  763. struct be_queue_info *rxq = &adapter->rx_obj.q;
  764. struct page *pagep = NULL;
  765. struct be_eth_rx_d *rxd;
  766. u64 page_dmaaddr = 0, frag_dmaaddr;
  767. u32 posted, page_offset = 0;
  768. page_info = &page_info_tbl[rxq->head];
  769. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  770. if (!pagep) {
  771. pagep = be_alloc_pages(adapter->big_page_size);
  772. if (unlikely(!pagep)) {
  773. drvr_stats(adapter)->be_ethrx_post_fail++;
  774. break;
  775. }
  776. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  777. adapter->big_page_size,
  778. PCI_DMA_FROMDEVICE);
  779. page_info->page_offset = 0;
  780. } else {
  781. get_page(pagep);
  782. page_info->page_offset = page_offset + rx_frag_size;
  783. }
  784. page_offset = page_info->page_offset;
  785. page_info->page = pagep;
  786. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  787. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  788. rxd = queue_head_node(rxq);
  789. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  790. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  791. queue_head_inc(rxq);
  792. /* Any space left in the current big page for another frag? */
  793. if ((page_offset + rx_frag_size + rx_frag_size) >
  794. adapter->big_page_size) {
  795. pagep = NULL;
  796. page_info->last_page_user = true;
  797. }
  798. page_info = &page_info_tbl[rxq->head];
  799. }
  800. if (pagep)
  801. page_info->last_page_user = true;
  802. if (posted) {
  803. atomic_add(posted, &rxq->used);
  804. be_rxq_notify(adapter, rxq->id, posted);
  805. } else if (atomic_read(&rxq->used) == 0) {
  806. /* Let be_worker replenish when memory is available */
  807. adapter->rx_post_starved = true;
  808. }
  809. return;
  810. }
  811. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  812. {
  813. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  814. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  815. return NULL;
  816. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  817. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  818. queue_tail_inc(tx_cq);
  819. return txcp;
  820. }
  821. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  822. {
  823. struct be_queue_info *txq = &adapter->tx_obj.q;
  824. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  825. struct sk_buff *sent_skb;
  826. u16 cur_index, num_wrbs = 0;
  827. cur_index = txq->tail;
  828. sent_skb = sent_skbs[cur_index];
  829. BUG_ON(!sent_skb);
  830. sent_skbs[cur_index] = NULL;
  831. do {
  832. cur_index = txq->tail;
  833. num_wrbs++;
  834. queue_tail_inc(txq);
  835. } while (cur_index != last_index);
  836. atomic_sub(num_wrbs, &txq->used);
  837. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  838. kfree_skb(sent_skb);
  839. }
  840. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  841. {
  842. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  843. if (!eqe->evt)
  844. return NULL;
  845. eqe->evt = le32_to_cpu(eqe->evt);
  846. queue_tail_inc(&eq_obj->q);
  847. return eqe;
  848. }
  849. static int event_handle(struct be_adapter *adapter,
  850. struct be_eq_obj *eq_obj)
  851. {
  852. struct be_eq_entry *eqe;
  853. u16 num = 0;
  854. while ((eqe = event_get(eq_obj)) != NULL) {
  855. eqe->evt = 0;
  856. num++;
  857. }
  858. /* Deal with any spurious interrupts that come
  859. * without events
  860. */
  861. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  862. if (num)
  863. napi_schedule(&eq_obj->napi);
  864. return num;
  865. }
  866. /* Just read and notify events without processing them.
  867. * Used at the time of destroying event queues */
  868. static void be_eq_clean(struct be_adapter *adapter,
  869. struct be_eq_obj *eq_obj)
  870. {
  871. struct be_eq_entry *eqe;
  872. u16 num = 0;
  873. while ((eqe = event_get(eq_obj)) != NULL) {
  874. eqe->evt = 0;
  875. num++;
  876. }
  877. if (num)
  878. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  879. }
  880. static void be_rx_q_clean(struct be_adapter *adapter)
  881. {
  882. struct be_rx_page_info *page_info;
  883. struct be_queue_info *rxq = &adapter->rx_obj.q;
  884. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  885. struct be_eth_rx_compl *rxcp;
  886. u16 tail;
  887. /* First cleanup pending rx completions */
  888. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  889. be_rx_compl_discard(adapter, rxcp);
  890. be_rx_compl_reset(rxcp);
  891. be_cq_notify(adapter, rx_cq->id, true, 1);
  892. }
  893. /* Then free posted rx buffer that were not used */
  894. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  895. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  896. page_info = get_rx_page_info(adapter, tail);
  897. put_page(page_info->page);
  898. memset(page_info, 0, sizeof(*page_info));
  899. }
  900. BUG_ON(atomic_read(&rxq->used));
  901. }
  902. static void be_tx_compl_clean(struct be_adapter *adapter)
  903. {
  904. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  905. struct be_queue_info *txq = &adapter->tx_obj.q;
  906. struct be_eth_tx_compl *txcp;
  907. u16 end_idx, cmpl = 0, timeo = 0;
  908. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  909. do {
  910. while ((txcp = be_tx_compl_get(tx_cq))) {
  911. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  912. wrb_index, txcp);
  913. be_tx_compl_process(adapter, end_idx);
  914. cmpl++;
  915. }
  916. if (cmpl) {
  917. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  918. cmpl = 0;
  919. }
  920. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  921. break;
  922. mdelay(1);
  923. } while (true);
  924. if (atomic_read(&txq->used))
  925. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  926. atomic_read(&txq->used));
  927. }
  928. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  929. {
  930. struct be_queue_info *q;
  931. q = &adapter->mcc_obj.q;
  932. if (q->created)
  933. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  934. be_queue_free(adapter, q);
  935. q = &adapter->mcc_obj.cq;
  936. if (q->created)
  937. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  938. be_queue_free(adapter, q);
  939. }
  940. /* Must be called only after TX qs are created as MCC shares TX EQ */
  941. static int be_mcc_queues_create(struct be_adapter *adapter)
  942. {
  943. struct be_queue_info *q, *cq;
  944. /* Alloc MCC compl queue */
  945. cq = &adapter->mcc_obj.cq;
  946. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  947. sizeof(struct be_mcc_compl)))
  948. goto err;
  949. /* Ask BE to create MCC compl queue; share TX's eq */
  950. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  951. goto mcc_cq_free;
  952. /* Alloc MCC queue */
  953. q = &adapter->mcc_obj.q;
  954. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  955. goto mcc_cq_destroy;
  956. /* Ask BE to create MCC queue */
  957. if (be_cmd_mccq_create(adapter, q, cq))
  958. goto mcc_q_free;
  959. return 0;
  960. mcc_q_free:
  961. be_queue_free(adapter, q);
  962. mcc_cq_destroy:
  963. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  964. mcc_cq_free:
  965. be_queue_free(adapter, cq);
  966. err:
  967. return -1;
  968. }
  969. static void be_tx_queues_destroy(struct be_adapter *adapter)
  970. {
  971. struct be_queue_info *q;
  972. q = &adapter->tx_obj.q;
  973. if (q->created)
  974. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  975. be_queue_free(adapter, q);
  976. q = &adapter->tx_obj.cq;
  977. if (q->created)
  978. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  979. be_queue_free(adapter, q);
  980. /* Clear any residual events */
  981. be_eq_clean(adapter, &adapter->tx_eq);
  982. q = &adapter->tx_eq.q;
  983. if (q->created)
  984. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  985. be_queue_free(adapter, q);
  986. }
  987. static int be_tx_queues_create(struct be_adapter *adapter)
  988. {
  989. struct be_queue_info *eq, *q, *cq;
  990. adapter->tx_eq.max_eqd = 0;
  991. adapter->tx_eq.min_eqd = 0;
  992. adapter->tx_eq.cur_eqd = 96;
  993. adapter->tx_eq.enable_aic = false;
  994. /* Alloc Tx Event queue */
  995. eq = &adapter->tx_eq.q;
  996. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  997. return -1;
  998. /* Ask BE to create Tx Event queue */
  999. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1000. goto tx_eq_free;
  1001. /* Alloc TX eth compl queue */
  1002. cq = &adapter->tx_obj.cq;
  1003. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1004. sizeof(struct be_eth_tx_compl)))
  1005. goto tx_eq_destroy;
  1006. /* Ask BE to create Tx eth compl queue */
  1007. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1008. goto tx_cq_free;
  1009. /* Alloc TX eth queue */
  1010. q = &adapter->tx_obj.q;
  1011. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1012. goto tx_cq_destroy;
  1013. /* Ask BE to create Tx eth queue */
  1014. if (be_cmd_txq_create(adapter, q, cq))
  1015. goto tx_q_free;
  1016. return 0;
  1017. tx_q_free:
  1018. be_queue_free(adapter, q);
  1019. tx_cq_destroy:
  1020. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1021. tx_cq_free:
  1022. be_queue_free(adapter, cq);
  1023. tx_eq_destroy:
  1024. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1025. tx_eq_free:
  1026. be_queue_free(adapter, eq);
  1027. return -1;
  1028. }
  1029. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1030. {
  1031. struct be_queue_info *q;
  1032. q = &adapter->rx_obj.q;
  1033. if (q->created) {
  1034. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1035. be_rx_q_clean(adapter);
  1036. }
  1037. be_queue_free(adapter, q);
  1038. q = &adapter->rx_obj.cq;
  1039. if (q->created)
  1040. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1041. be_queue_free(adapter, q);
  1042. /* Clear any residual events */
  1043. be_eq_clean(adapter, &adapter->rx_eq);
  1044. q = &adapter->rx_eq.q;
  1045. if (q->created)
  1046. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1047. be_queue_free(adapter, q);
  1048. }
  1049. static int be_rx_queues_create(struct be_adapter *adapter)
  1050. {
  1051. struct be_queue_info *eq, *q, *cq;
  1052. int rc;
  1053. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1054. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1055. adapter->rx_eq.min_eqd = 0;
  1056. adapter->rx_eq.cur_eqd = 0;
  1057. adapter->rx_eq.enable_aic = true;
  1058. /* Alloc Rx Event queue */
  1059. eq = &adapter->rx_eq.q;
  1060. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1061. sizeof(struct be_eq_entry));
  1062. if (rc)
  1063. return rc;
  1064. /* Ask BE to create Rx Event queue */
  1065. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1066. if (rc)
  1067. goto rx_eq_free;
  1068. /* Alloc RX eth compl queue */
  1069. cq = &adapter->rx_obj.cq;
  1070. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1071. sizeof(struct be_eth_rx_compl));
  1072. if (rc)
  1073. goto rx_eq_destroy;
  1074. /* Ask BE to create Rx eth compl queue */
  1075. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1076. if (rc)
  1077. goto rx_cq_free;
  1078. /* Alloc RX eth queue */
  1079. q = &adapter->rx_obj.q;
  1080. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1081. if (rc)
  1082. goto rx_cq_destroy;
  1083. /* Ask BE to create Rx eth queue */
  1084. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1085. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1086. if (rc)
  1087. goto rx_q_free;
  1088. return 0;
  1089. rx_q_free:
  1090. be_queue_free(adapter, q);
  1091. rx_cq_destroy:
  1092. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1093. rx_cq_free:
  1094. be_queue_free(adapter, cq);
  1095. rx_eq_destroy:
  1096. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1097. rx_eq_free:
  1098. be_queue_free(adapter, eq);
  1099. return rc;
  1100. }
  1101. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1102. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1103. {
  1104. return eq_id - 8 * be_pci_func(adapter);
  1105. }
  1106. static irqreturn_t be_intx(int irq, void *dev)
  1107. {
  1108. struct be_adapter *adapter = dev;
  1109. int isr;
  1110. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1111. be_pci_func(adapter) * CEV_ISR_SIZE);
  1112. if (!isr)
  1113. return IRQ_NONE;
  1114. event_handle(adapter, &adapter->tx_eq);
  1115. event_handle(adapter, &adapter->rx_eq);
  1116. return IRQ_HANDLED;
  1117. }
  1118. static irqreturn_t be_msix_rx(int irq, void *dev)
  1119. {
  1120. struct be_adapter *adapter = dev;
  1121. event_handle(adapter, &adapter->rx_eq);
  1122. return IRQ_HANDLED;
  1123. }
  1124. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1125. {
  1126. struct be_adapter *adapter = dev;
  1127. event_handle(adapter, &adapter->tx_eq);
  1128. return IRQ_HANDLED;
  1129. }
  1130. static inline bool do_gro(struct be_adapter *adapter,
  1131. struct be_eth_rx_compl *rxcp)
  1132. {
  1133. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1134. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1135. if (err)
  1136. drvr_stats(adapter)->be_rxcp_err++;
  1137. return (tcp_frame && !err) ? true : false;
  1138. }
  1139. int be_poll_rx(struct napi_struct *napi, int budget)
  1140. {
  1141. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1142. struct be_adapter *adapter =
  1143. container_of(rx_eq, struct be_adapter, rx_eq);
  1144. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1145. struct be_eth_rx_compl *rxcp;
  1146. u32 work_done;
  1147. for (work_done = 0; work_done < budget; work_done++) {
  1148. rxcp = be_rx_compl_get(adapter);
  1149. if (!rxcp)
  1150. break;
  1151. if (do_gro(adapter, rxcp))
  1152. be_rx_compl_process_gro(adapter, rxcp);
  1153. else
  1154. be_rx_compl_process(adapter, rxcp);
  1155. be_rx_compl_reset(rxcp);
  1156. }
  1157. /* Refill the queue */
  1158. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1159. be_post_rx_frags(adapter);
  1160. /* All consumed */
  1161. if (work_done < budget) {
  1162. napi_complete(napi);
  1163. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1164. } else {
  1165. /* More to be consumed; continue with interrupts disabled */
  1166. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1167. }
  1168. return work_done;
  1169. }
  1170. void be_process_tx(struct be_adapter *adapter)
  1171. {
  1172. struct be_queue_info *txq = &adapter->tx_obj.q;
  1173. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1174. struct be_eth_tx_compl *txcp;
  1175. u32 num_cmpl = 0;
  1176. u16 end_idx;
  1177. while ((txcp = be_tx_compl_get(tx_cq))) {
  1178. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1179. wrb_index, txcp);
  1180. be_tx_compl_process(adapter, end_idx);
  1181. num_cmpl++;
  1182. }
  1183. if (num_cmpl) {
  1184. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1185. /* As Tx wrbs have been freed up, wake up netdev queue if
  1186. * it was stopped due to lack of tx wrbs.
  1187. */
  1188. if (netif_queue_stopped(adapter->netdev) &&
  1189. atomic_read(&txq->used) < txq->len / 2) {
  1190. netif_wake_queue(adapter->netdev);
  1191. }
  1192. drvr_stats(adapter)->be_tx_events++;
  1193. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1194. }
  1195. }
  1196. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1197. * For TX/MCC we don't honour budget; consume everything
  1198. */
  1199. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1200. {
  1201. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1202. struct be_adapter *adapter =
  1203. container_of(tx_eq, struct be_adapter, tx_eq);
  1204. napi_complete(napi);
  1205. be_process_tx(adapter);
  1206. be_process_mcc(adapter);
  1207. return 1;
  1208. }
  1209. static void be_worker(struct work_struct *work)
  1210. {
  1211. struct be_adapter *adapter =
  1212. container_of(work, struct be_adapter, work.work);
  1213. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1214. /* Set EQ delay */
  1215. be_rx_eqd_update(adapter);
  1216. be_tx_rate_update(adapter);
  1217. be_rx_rate_update(adapter);
  1218. if (adapter->rx_post_starved) {
  1219. adapter->rx_post_starved = false;
  1220. be_post_rx_frags(adapter);
  1221. }
  1222. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1223. }
  1224. static void be_msix_enable(struct be_adapter *adapter)
  1225. {
  1226. int i, status;
  1227. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1228. adapter->msix_entries[i].entry = i;
  1229. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1230. BE_NUM_MSIX_VECTORS);
  1231. if (status == 0)
  1232. adapter->msix_enabled = true;
  1233. return;
  1234. }
  1235. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1236. {
  1237. return adapter->msix_entries[
  1238. be_evt_bit_get(adapter, eq_id)].vector;
  1239. }
  1240. static int be_request_irq(struct be_adapter *adapter,
  1241. struct be_eq_obj *eq_obj,
  1242. void *handler, char *desc)
  1243. {
  1244. struct net_device *netdev = adapter->netdev;
  1245. int vec;
  1246. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1247. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1248. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1249. }
  1250. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1251. {
  1252. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1253. free_irq(vec, adapter);
  1254. }
  1255. static int be_msix_register(struct be_adapter *adapter)
  1256. {
  1257. int status;
  1258. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1259. if (status)
  1260. goto err;
  1261. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1262. if (status)
  1263. goto free_tx_irq;
  1264. return 0;
  1265. free_tx_irq:
  1266. be_free_irq(adapter, &adapter->tx_eq);
  1267. err:
  1268. dev_warn(&adapter->pdev->dev,
  1269. "MSIX Request IRQ failed - err %d\n", status);
  1270. pci_disable_msix(adapter->pdev);
  1271. adapter->msix_enabled = false;
  1272. return status;
  1273. }
  1274. static int be_irq_register(struct be_adapter *adapter)
  1275. {
  1276. struct net_device *netdev = adapter->netdev;
  1277. int status;
  1278. if (adapter->msix_enabled) {
  1279. status = be_msix_register(adapter);
  1280. if (status == 0)
  1281. goto done;
  1282. }
  1283. /* INTx */
  1284. netdev->irq = adapter->pdev->irq;
  1285. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1286. adapter);
  1287. if (status) {
  1288. dev_err(&adapter->pdev->dev,
  1289. "INTx request IRQ failed - err %d\n", status);
  1290. return status;
  1291. }
  1292. done:
  1293. adapter->isr_registered = true;
  1294. return 0;
  1295. }
  1296. static void be_irq_unregister(struct be_adapter *adapter)
  1297. {
  1298. struct net_device *netdev = adapter->netdev;
  1299. if (!adapter->isr_registered)
  1300. return;
  1301. /* INTx */
  1302. if (!adapter->msix_enabled) {
  1303. free_irq(netdev->irq, adapter);
  1304. goto done;
  1305. }
  1306. /* MSIx */
  1307. be_free_irq(adapter, &adapter->tx_eq);
  1308. be_free_irq(adapter, &adapter->rx_eq);
  1309. done:
  1310. adapter->isr_registered = false;
  1311. return;
  1312. }
  1313. static int be_open(struct net_device *netdev)
  1314. {
  1315. struct be_adapter *adapter = netdev_priv(netdev);
  1316. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1317. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1318. bool link_up;
  1319. int status;
  1320. u8 mac_speed;
  1321. u16 link_speed;
  1322. /* First time posting */
  1323. be_post_rx_frags(adapter);
  1324. napi_enable(&rx_eq->napi);
  1325. napi_enable(&tx_eq->napi);
  1326. be_irq_register(adapter);
  1327. be_intr_set(adapter, true);
  1328. /* The evt queues are created in unarmed state; arm them */
  1329. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1330. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1331. /* Rx compl queue may be in unarmed state; rearm it */
  1332. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1333. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1334. &link_speed);
  1335. if (status)
  1336. goto ret_sts;
  1337. be_link_status_update(adapter, link_up);
  1338. status = be_vid_config(adapter);
  1339. if (status)
  1340. goto ret_sts;
  1341. status = be_cmd_set_flow_control(adapter,
  1342. adapter->tx_fc, adapter->rx_fc);
  1343. if (status)
  1344. goto ret_sts;
  1345. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1346. ret_sts:
  1347. return status;
  1348. }
  1349. static int be_setup(struct be_adapter *adapter)
  1350. {
  1351. struct net_device *netdev = adapter->netdev;
  1352. u32 cap_flags, en_flags;
  1353. int status;
  1354. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1355. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1356. BE_IF_FLAGS_PROMISCUOUS |
  1357. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1358. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1359. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1360. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1361. netdev->dev_addr, false/* pmac_invalid */,
  1362. &adapter->if_handle, &adapter->pmac_id);
  1363. if (status != 0)
  1364. goto do_none;
  1365. status = be_tx_queues_create(adapter);
  1366. if (status != 0)
  1367. goto if_destroy;
  1368. status = be_rx_queues_create(adapter);
  1369. if (status != 0)
  1370. goto tx_qs_destroy;
  1371. status = be_mcc_queues_create(adapter);
  1372. if (status != 0)
  1373. goto rx_qs_destroy;
  1374. return 0;
  1375. rx_qs_destroy:
  1376. be_rx_queues_destroy(adapter);
  1377. tx_qs_destroy:
  1378. be_tx_queues_destroy(adapter);
  1379. if_destroy:
  1380. be_cmd_if_destroy(adapter, adapter->if_handle);
  1381. do_none:
  1382. return status;
  1383. }
  1384. static int be_clear(struct be_adapter *adapter)
  1385. {
  1386. be_mcc_queues_destroy(adapter);
  1387. be_rx_queues_destroy(adapter);
  1388. be_tx_queues_destroy(adapter);
  1389. be_cmd_if_destroy(adapter, adapter->if_handle);
  1390. return 0;
  1391. }
  1392. static int be_close(struct net_device *netdev)
  1393. {
  1394. struct be_adapter *adapter = netdev_priv(netdev);
  1395. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1396. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1397. int vec;
  1398. cancel_delayed_work_sync(&adapter->work);
  1399. netif_stop_queue(netdev);
  1400. netif_carrier_off(netdev);
  1401. adapter->link_up = false;
  1402. be_intr_set(adapter, false);
  1403. if (adapter->msix_enabled) {
  1404. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1405. synchronize_irq(vec);
  1406. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1407. synchronize_irq(vec);
  1408. } else {
  1409. synchronize_irq(netdev->irq);
  1410. }
  1411. be_irq_unregister(adapter);
  1412. napi_disable(&rx_eq->napi);
  1413. napi_disable(&tx_eq->napi);
  1414. /* Wait for all pending tx completions to arrive so that
  1415. * all tx skbs are freed.
  1416. */
  1417. be_tx_compl_clean(adapter);
  1418. return 0;
  1419. }
  1420. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1421. char flash_cookie[2][16] = {"*** SE FLAS",
  1422. "H DIRECTORY *** "};
  1423. static int be_flash_image(struct be_adapter *adapter,
  1424. const struct firmware *fw,
  1425. struct be_dma_mem *flash_cmd, u32 flash_type)
  1426. {
  1427. int status;
  1428. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1429. int num_bytes;
  1430. const u8 *p = fw->data;
  1431. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1432. switch (flash_type) {
  1433. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1434. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1435. image_size = FLASH_IMAGE_MAX_SIZE;
  1436. break;
  1437. case FLASHROM_TYPE_ISCSI_BACKUP:
  1438. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1439. image_size = FLASH_IMAGE_MAX_SIZE;
  1440. break;
  1441. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1442. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1443. image_size = FLASH_IMAGE_MAX_SIZE;
  1444. break;
  1445. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1446. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1447. image_size = FLASH_IMAGE_MAX_SIZE;
  1448. break;
  1449. case FLASHROM_TYPE_BIOS:
  1450. image_offset = FLASH_iSCSI_BIOS_START;
  1451. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1452. break;
  1453. case FLASHROM_TYPE_FCOE_BIOS:
  1454. image_offset = FLASH_FCoE_BIOS_START;
  1455. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1456. break;
  1457. case FLASHROM_TYPE_PXE_BIOS:
  1458. image_offset = FLASH_PXE_BIOS_START;
  1459. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1460. break;
  1461. default:
  1462. return 0;
  1463. }
  1464. p += sizeof(struct flash_file_hdr) + image_offset;
  1465. if (p + image_size > fw->data + fw->size)
  1466. return -1;
  1467. total_bytes = image_size;
  1468. while (total_bytes) {
  1469. if (total_bytes > 32*1024)
  1470. num_bytes = 32*1024;
  1471. else
  1472. num_bytes = total_bytes;
  1473. total_bytes -= num_bytes;
  1474. if (!total_bytes)
  1475. flash_op = FLASHROM_OPER_FLASH;
  1476. else
  1477. flash_op = FLASHROM_OPER_SAVE;
  1478. memcpy(req->params.data_buf, p, num_bytes);
  1479. p += num_bytes;
  1480. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1481. flash_type, flash_op, num_bytes);
  1482. if (status) {
  1483. dev_err(&adapter->pdev->dev,
  1484. "cmd to write to flash rom failed. type/op %d/%d\n",
  1485. flash_type, flash_op);
  1486. return -1;
  1487. }
  1488. yield();
  1489. }
  1490. return 0;
  1491. }
  1492. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1493. {
  1494. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1495. const struct firmware *fw;
  1496. struct flash_file_hdr *fhdr;
  1497. struct flash_section_info *fsec = NULL;
  1498. struct be_dma_mem flash_cmd;
  1499. int status;
  1500. const u8 *p;
  1501. bool entry_found = false;
  1502. int flash_type;
  1503. char fw_ver[FW_VER_LEN];
  1504. char fw_cfg;
  1505. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1506. if (status)
  1507. return status;
  1508. fw_cfg = *(fw_ver + 2);
  1509. if (fw_cfg == '0')
  1510. fw_cfg = '1';
  1511. strcpy(fw_file, func);
  1512. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1513. if (status)
  1514. goto fw_exit;
  1515. p = fw->data;
  1516. fhdr = (struct flash_file_hdr *) p;
  1517. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1518. dev_err(&adapter->pdev->dev,
  1519. "Firmware(%s) load error (signature did not match)\n",
  1520. fw_file);
  1521. status = -1;
  1522. goto fw_exit;
  1523. }
  1524. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1525. p += sizeof(struct flash_file_hdr);
  1526. while (p < (fw->data + fw->size)) {
  1527. fsec = (struct flash_section_info *)p;
  1528. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1529. entry_found = true;
  1530. break;
  1531. }
  1532. p += 32;
  1533. }
  1534. if (!entry_found) {
  1535. status = -1;
  1536. dev_err(&adapter->pdev->dev,
  1537. "Flash cookie not found in firmware image\n");
  1538. goto fw_exit;
  1539. }
  1540. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1541. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1542. &flash_cmd.dma);
  1543. if (!flash_cmd.va) {
  1544. status = -ENOMEM;
  1545. dev_err(&adapter->pdev->dev,
  1546. "Memory allocation failure while flashing\n");
  1547. goto fw_exit;
  1548. }
  1549. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1550. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1551. status = be_flash_image(adapter, fw, &flash_cmd,
  1552. flash_type);
  1553. if (status)
  1554. break;
  1555. }
  1556. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1557. flash_cmd.dma);
  1558. if (status) {
  1559. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1560. goto fw_exit;
  1561. }
  1562. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1563. fw_exit:
  1564. release_firmware(fw);
  1565. return status;
  1566. }
  1567. static struct net_device_ops be_netdev_ops = {
  1568. .ndo_open = be_open,
  1569. .ndo_stop = be_close,
  1570. .ndo_start_xmit = be_xmit,
  1571. .ndo_get_stats = be_get_stats,
  1572. .ndo_set_rx_mode = be_set_multicast_list,
  1573. .ndo_set_mac_address = be_mac_addr_set,
  1574. .ndo_change_mtu = be_change_mtu,
  1575. .ndo_validate_addr = eth_validate_addr,
  1576. .ndo_vlan_rx_register = be_vlan_register,
  1577. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1578. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1579. };
  1580. static void be_netdev_init(struct net_device *netdev)
  1581. {
  1582. struct be_adapter *adapter = netdev_priv(netdev);
  1583. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1584. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1585. NETIF_F_GRO;
  1586. netdev->flags |= IFF_MULTICAST;
  1587. adapter->rx_csum = true;
  1588. /* Default settings for Rx and Tx flow control */
  1589. adapter->rx_fc = true;
  1590. adapter->tx_fc = true;
  1591. netif_set_gso_max_size(netdev, 65535);
  1592. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1593. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1594. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1595. BE_NAPI_WEIGHT);
  1596. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1597. BE_NAPI_WEIGHT);
  1598. netif_carrier_off(netdev);
  1599. netif_stop_queue(netdev);
  1600. }
  1601. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1602. {
  1603. if (adapter->csr)
  1604. iounmap(adapter->csr);
  1605. if (adapter->db)
  1606. iounmap(adapter->db);
  1607. if (adapter->pcicfg)
  1608. iounmap(adapter->pcicfg);
  1609. }
  1610. static int be_map_pci_bars(struct be_adapter *adapter)
  1611. {
  1612. u8 __iomem *addr;
  1613. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1614. pci_resource_len(adapter->pdev, 2));
  1615. if (addr == NULL)
  1616. return -ENOMEM;
  1617. adapter->csr = addr;
  1618. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1619. 128 * 1024);
  1620. if (addr == NULL)
  1621. goto pci_map_err;
  1622. adapter->db = addr;
  1623. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1624. pci_resource_len(adapter->pdev, 1));
  1625. if (addr == NULL)
  1626. goto pci_map_err;
  1627. adapter->pcicfg = addr;
  1628. return 0;
  1629. pci_map_err:
  1630. be_unmap_pci_bars(adapter);
  1631. return -ENOMEM;
  1632. }
  1633. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1634. {
  1635. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1636. be_unmap_pci_bars(adapter);
  1637. if (mem->va)
  1638. pci_free_consistent(adapter->pdev, mem->size,
  1639. mem->va, mem->dma);
  1640. }
  1641. static int be_ctrl_init(struct be_adapter *adapter)
  1642. {
  1643. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1644. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1645. int status;
  1646. status = be_map_pci_bars(adapter);
  1647. if (status)
  1648. return status;
  1649. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1650. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1651. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1652. if (!mbox_mem_alloc->va) {
  1653. be_unmap_pci_bars(adapter);
  1654. return -1;
  1655. }
  1656. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1657. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1658. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1659. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1660. spin_lock_init(&adapter->mbox_lock);
  1661. spin_lock_init(&adapter->mcc_lock);
  1662. spin_lock_init(&adapter->mcc_cq_lock);
  1663. return 0;
  1664. }
  1665. static void be_stats_cleanup(struct be_adapter *adapter)
  1666. {
  1667. struct be_stats_obj *stats = &adapter->stats;
  1668. struct be_dma_mem *cmd = &stats->cmd;
  1669. if (cmd->va)
  1670. pci_free_consistent(adapter->pdev, cmd->size,
  1671. cmd->va, cmd->dma);
  1672. }
  1673. static int be_stats_init(struct be_adapter *adapter)
  1674. {
  1675. struct be_stats_obj *stats = &adapter->stats;
  1676. struct be_dma_mem *cmd = &stats->cmd;
  1677. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1678. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1679. if (cmd->va == NULL)
  1680. return -1;
  1681. return 0;
  1682. }
  1683. static void __devexit be_remove(struct pci_dev *pdev)
  1684. {
  1685. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1686. if (!adapter)
  1687. return;
  1688. unregister_netdev(adapter->netdev);
  1689. be_clear(adapter);
  1690. be_stats_cleanup(adapter);
  1691. be_ctrl_cleanup(adapter);
  1692. if (adapter->msix_enabled) {
  1693. pci_disable_msix(adapter->pdev);
  1694. adapter->msix_enabled = false;
  1695. }
  1696. pci_set_drvdata(pdev, NULL);
  1697. pci_release_regions(pdev);
  1698. pci_disable_device(pdev);
  1699. free_netdev(adapter->netdev);
  1700. }
  1701. static int be_hw_up(struct be_adapter *adapter)
  1702. {
  1703. int status;
  1704. status = be_cmd_POST(adapter);
  1705. if (status)
  1706. return status;
  1707. status = be_cmd_reset_function(adapter);
  1708. if (status)
  1709. return status;
  1710. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1711. if (status)
  1712. return status;
  1713. status = be_cmd_query_fw_cfg(adapter,
  1714. &adapter->port_num, &adapter->cap);
  1715. return status;
  1716. }
  1717. static int __devinit be_probe(struct pci_dev *pdev,
  1718. const struct pci_device_id *pdev_id)
  1719. {
  1720. int status = 0;
  1721. struct be_adapter *adapter;
  1722. struct net_device *netdev;
  1723. u8 mac[ETH_ALEN];
  1724. status = pci_enable_device(pdev);
  1725. if (status)
  1726. goto do_none;
  1727. status = pci_request_regions(pdev, DRV_NAME);
  1728. if (status)
  1729. goto disable_dev;
  1730. pci_set_master(pdev);
  1731. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1732. if (netdev == NULL) {
  1733. status = -ENOMEM;
  1734. goto rel_reg;
  1735. }
  1736. adapter = netdev_priv(netdev);
  1737. adapter->pdev = pdev;
  1738. pci_set_drvdata(pdev, adapter);
  1739. adapter->netdev = netdev;
  1740. be_msix_enable(adapter);
  1741. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1742. if (!status) {
  1743. netdev->features |= NETIF_F_HIGHDMA;
  1744. } else {
  1745. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1746. if (status) {
  1747. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1748. goto free_netdev;
  1749. }
  1750. }
  1751. status = be_ctrl_init(adapter);
  1752. if (status)
  1753. goto free_netdev;
  1754. status = be_stats_init(adapter);
  1755. if (status)
  1756. goto ctrl_clean;
  1757. status = be_hw_up(adapter);
  1758. if (status)
  1759. goto stats_clean;
  1760. status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
  1761. true /* permanent */, 0);
  1762. if (status)
  1763. goto stats_clean;
  1764. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1765. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1766. be_netdev_init(netdev);
  1767. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1768. status = be_setup(adapter);
  1769. if (status)
  1770. goto stats_clean;
  1771. status = register_netdev(netdev);
  1772. if (status != 0)
  1773. goto unsetup;
  1774. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1775. return 0;
  1776. unsetup:
  1777. be_clear(adapter);
  1778. stats_clean:
  1779. be_stats_cleanup(adapter);
  1780. ctrl_clean:
  1781. be_ctrl_cleanup(adapter);
  1782. free_netdev:
  1783. free_netdev(adapter->netdev);
  1784. rel_reg:
  1785. pci_release_regions(pdev);
  1786. disable_dev:
  1787. pci_disable_device(pdev);
  1788. do_none:
  1789. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1790. return status;
  1791. }
  1792. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1793. {
  1794. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1795. struct net_device *netdev = adapter->netdev;
  1796. netif_device_detach(netdev);
  1797. if (netif_running(netdev)) {
  1798. rtnl_lock();
  1799. be_close(netdev);
  1800. rtnl_unlock();
  1801. }
  1802. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  1803. be_clear(adapter);
  1804. pci_save_state(pdev);
  1805. pci_disable_device(pdev);
  1806. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1807. return 0;
  1808. }
  1809. static int be_resume(struct pci_dev *pdev)
  1810. {
  1811. int status = 0;
  1812. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1813. struct net_device *netdev = adapter->netdev;
  1814. netif_device_detach(netdev);
  1815. status = pci_enable_device(pdev);
  1816. if (status)
  1817. return status;
  1818. pci_set_power_state(pdev, 0);
  1819. pci_restore_state(pdev);
  1820. be_setup(adapter);
  1821. if (netif_running(netdev)) {
  1822. rtnl_lock();
  1823. be_open(netdev);
  1824. rtnl_unlock();
  1825. }
  1826. netif_device_attach(netdev);
  1827. return 0;
  1828. }
  1829. static struct pci_driver be_driver = {
  1830. .name = DRV_NAME,
  1831. .id_table = be_dev_ids,
  1832. .probe = be_probe,
  1833. .remove = be_remove,
  1834. .suspend = be_suspend,
  1835. .resume = be_resume
  1836. };
  1837. static int __init be_init_module(void)
  1838. {
  1839. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1840. && rx_frag_size != 2048) {
  1841. printk(KERN_WARNING DRV_NAME
  1842. " : Module param rx_frag_size must be 2048/4096/8192."
  1843. " Using 2048\n");
  1844. rx_frag_size = 2048;
  1845. }
  1846. return pci_register_driver(&be_driver);
  1847. }
  1848. module_init(be_init_module);
  1849. static void __exit be_exit_module(void)
  1850. {
  1851. pci_unregister_driver(&be_driver);
  1852. }
  1853. module_exit(be_exit_module);