tegra-kbc.c 20 KB

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  1. /*
  2. * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
  3. * keyboard controller
  4. *
  5. * Copyright (c) 2009-2011, NVIDIA Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/input.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/clk.h>
  29. #include <linux/slab.h>
  30. #include <mach/clk.h>
  31. #include <mach/kbc.h>
  32. #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
  33. /* KBC row scan time and delay for beginning the row scan. */
  34. #define KBC_ROW_SCAN_TIME 16
  35. #define KBC_ROW_SCAN_DLY 5
  36. /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  37. #define KBC_CYCLE_MS 32
  38. /* KBC Registers */
  39. /* KBC Control Register */
  40. #define KBC_CONTROL_0 0x0
  41. #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
  42. #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
  43. #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
  44. #define KBC_CONTROL_KBC_EN (1 << 0)
  45. /* KBC Interrupt Register */
  46. #define KBC_INT_0 0x4
  47. #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
  48. #define KBC_ROW_CFG0_0 0x8
  49. #define KBC_COL_CFG0_0 0x18
  50. #define KBC_TO_CNT_0 0x24
  51. #define KBC_INIT_DLY_0 0x28
  52. #define KBC_RPT_DLY_0 0x2c
  53. #define KBC_KP_ENT0_0 0x30
  54. #define KBC_KP_ENT1_0 0x34
  55. #define KBC_ROW0_MASK_0 0x38
  56. #define KBC_ROW_SHIFT 3
  57. struct tegra_kbc {
  58. void __iomem *mmio;
  59. struct input_dev *idev;
  60. unsigned int irq;
  61. spinlock_t lock;
  62. unsigned int repoll_dly;
  63. unsigned long cp_dly_jiffies;
  64. unsigned int cp_to_wkup_dly;
  65. bool use_fn_map;
  66. bool use_ghost_filter;
  67. const struct tegra_kbc_platform_data *pdata;
  68. unsigned short keycode[KBC_MAX_KEY * 2];
  69. unsigned short current_keys[KBC_MAX_KPENT];
  70. unsigned int num_pressed_keys;
  71. struct timer_list timer;
  72. struct clk *clk;
  73. };
  74. static const u32 tegra_kbc_default_keymap[] = {
  75. KEY(0, 2, KEY_W),
  76. KEY(0, 3, KEY_S),
  77. KEY(0, 4, KEY_A),
  78. KEY(0, 5, KEY_Z),
  79. KEY(0, 7, KEY_FN),
  80. KEY(1, 7, KEY_LEFTMETA),
  81. KEY(2, 6, KEY_RIGHTALT),
  82. KEY(2, 7, KEY_LEFTALT),
  83. KEY(3, 0, KEY_5),
  84. KEY(3, 1, KEY_4),
  85. KEY(3, 2, KEY_R),
  86. KEY(3, 3, KEY_E),
  87. KEY(3, 4, KEY_F),
  88. KEY(3, 5, KEY_D),
  89. KEY(3, 6, KEY_X),
  90. KEY(4, 0, KEY_7),
  91. KEY(4, 1, KEY_6),
  92. KEY(4, 2, KEY_T),
  93. KEY(4, 3, KEY_H),
  94. KEY(4, 4, KEY_G),
  95. KEY(4, 5, KEY_V),
  96. KEY(4, 6, KEY_C),
  97. KEY(4, 7, KEY_SPACE),
  98. KEY(5, 0, KEY_9),
  99. KEY(5, 1, KEY_8),
  100. KEY(5, 2, KEY_U),
  101. KEY(5, 3, KEY_Y),
  102. KEY(5, 4, KEY_J),
  103. KEY(5, 5, KEY_N),
  104. KEY(5, 6, KEY_B),
  105. KEY(5, 7, KEY_BACKSLASH),
  106. KEY(6, 0, KEY_MINUS),
  107. KEY(6, 1, KEY_0),
  108. KEY(6, 2, KEY_O),
  109. KEY(6, 3, KEY_I),
  110. KEY(6, 4, KEY_L),
  111. KEY(6, 5, KEY_K),
  112. KEY(6, 6, KEY_COMMA),
  113. KEY(6, 7, KEY_M),
  114. KEY(7, 1, KEY_EQUAL),
  115. KEY(7, 2, KEY_RIGHTBRACE),
  116. KEY(7, 3, KEY_ENTER),
  117. KEY(7, 7, KEY_MENU),
  118. KEY(8, 4, KEY_RIGHTSHIFT),
  119. KEY(8, 5, KEY_LEFTSHIFT),
  120. KEY(9, 5, KEY_RIGHTCTRL),
  121. KEY(9, 7, KEY_LEFTCTRL),
  122. KEY(11, 0, KEY_LEFTBRACE),
  123. KEY(11, 1, KEY_P),
  124. KEY(11, 2, KEY_APOSTROPHE),
  125. KEY(11, 3, KEY_SEMICOLON),
  126. KEY(11, 4, KEY_SLASH),
  127. KEY(11, 5, KEY_DOT),
  128. KEY(12, 0, KEY_F10),
  129. KEY(12, 1, KEY_F9),
  130. KEY(12, 2, KEY_BACKSPACE),
  131. KEY(12, 3, KEY_3),
  132. KEY(12, 4, KEY_2),
  133. KEY(12, 5, KEY_UP),
  134. KEY(12, 6, KEY_PRINT),
  135. KEY(12, 7, KEY_PAUSE),
  136. KEY(13, 0, KEY_INSERT),
  137. KEY(13, 1, KEY_DELETE),
  138. KEY(13, 3, KEY_PAGEUP),
  139. KEY(13, 4, KEY_PAGEDOWN),
  140. KEY(13, 5, KEY_RIGHT),
  141. KEY(13, 6, KEY_DOWN),
  142. KEY(13, 7, KEY_LEFT),
  143. KEY(14, 0, KEY_F11),
  144. KEY(14, 1, KEY_F12),
  145. KEY(14, 2, KEY_F8),
  146. KEY(14, 3, KEY_Q),
  147. KEY(14, 4, KEY_F4),
  148. KEY(14, 5, KEY_F3),
  149. KEY(14, 6, KEY_1),
  150. KEY(14, 7, KEY_F7),
  151. KEY(15, 0, KEY_ESC),
  152. KEY(15, 1, KEY_GRAVE),
  153. KEY(15, 2, KEY_F5),
  154. KEY(15, 3, KEY_TAB),
  155. KEY(15, 4, KEY_F1),
  156. KEY(15, 5, KEY_F2),
  157. KEY(15, 6, KEY_CAPSLOCK),
  158. KEY(15, 7, KEY_F6),
  159. /* Software Handled Function Keys */
  160. KEY(20, 0, KEY_KP7),
  161. KEY(21, 0, KEY_KP9),
  162. KEY(21, 1, KEY_KP8),
  163. KEY(21, 2, KEY_KP4),
  164. KEY(21, 4, KEY_KP1),
  165. KEY(22, 1, KEY_KPSLASH),
  166. KEY(22, 2, KEY_KP6),
  167. KEY(22, 3, KEY_KP5),
  168. KEY(22, 4, KEY_KP3),
  169. KEY(22, 5, KEY_KP2),
  170. KEY(22, 7, KEY_KP0),
  171. KEY(27, 1, KEY_KPASTERISK),
  172. KEY(27, 3, KEY_KPMINUS),
  173. KEY(27, 4, KEY_KPPLUS),
  174. KEY(27, 5, KEY_KPDOT),
  175. KEY(28, 5, KEY_VOLUMEUP),
  176. KEY(29, 3, KEY_HOME),
  177. KEY(29, 4, KEY_END),
  178. KEY(29, 5, KEY_BRIGHTNESSDOWN),
  179. KEY(29, 6, KEY_VOLUMEDOWN),
  180. KEY(29, 7, KEY_BRIGHTNESSUP),
  181. KEY(30, 0, KEY_NUMLOCK),
  182. KEY(30, 1, KEY_SCROLLLOCK),
  183. KEY(30, 2, KEY_MUTE),
  184. KEY(31, 4, KEY_HELP),
  185. };
  186. static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
  187. .keymap = tegra_kbc_default_keymap,
  188. .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
  189. };
  190. static void tegra_kbc_report_released_keys(struct input_dev *input,
  191. unsigned short old_keycodes[],
  192. unsigned int old_num_keys,
  193. unsigned short new_keycodes[],
  194. unsigned int new_num_keys)
  195. {
  196. unsigned int i, j;
  197. for (i = 0; i < old_num_keys; i++) {
  198. for (j = 0; j < new_num_keys; j++)
  199. if (old_keycodes[i] == new_keycodes[j])
  200. break;
  201. if (j == new_num_keys)
  202. input_report_key(input, old_keycodes[i], 0);
  203. }
  204. }
  205. static void tegra_kbc_report_pressed_keys(struct input_dev *input,
  206. unsigned char scancodes[],
  207. unsigned short keycodes[],
  208. unsigned int num_pressed_keys)
  209. {
  210. unsigned int i;
  211. for (i = 0; i < num_pressed_keys; i++) {
  212. input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
  213. input_report_key(input, keycodes[i], 1);
  214. }
  215. }
  216. static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
  217. {
  218. unsigned char scancodes[KBC_MAX_KPENT];
  219. unsigned short keycodes[KBC_MAX_KPENT];
  220. u32 val = 0;
  221. unsigned int i;
  222. unsigned int num_down = 0;
  223. unsigned long flags;
  224. bool fn_keypress = false;
  225. bool key_in_same_row = false;
  226. bool key_in_same_col = false;
  227. spin_lock_irqsave(&kbc->lock, flags);
  228. for (i = 0; i < KBC_MAX_KPENT; i++) {
  229. if ((i % 4) == 0)
  230. val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
  231. if (val & 0x80) {
  232. unsigned int col = val & 0x07;
  233. unsigned int row = (val >> 3) & 0x0f;
  234. unsigned char scancode =
  235. MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
  236. scancodes[num_down] = scancode;
  237. keycodes[num_down] = kbc->keycode[scancode];
  238. /* If driver uses Fn map, do not report the Fn key. */
  239. if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
  240. fn_keypress = true;
  241. else
  242. num_down++;
  243. }
  244. val >>= 8;
  245. }
  246. /*
  247. * Matrix keyboard designs are prone to keyboard ghosting.
  248. * Ghosting occurs if there are 3 keys such that -
  249. * any 2 of the 3 keys share a row, and any 2 of them share a column.
  250. * If so ignore the key presses for this iteration.
  251. */
  252. if ((kbc->use_ghost_filter) && (num_down >= 3)) {
  253. for (i = 0; i < num_down; i++) {
  254. unsigned int j;
  255. u8 curr_col = scancodes[i] & 0x07;
  256. u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
  257. /*
  258. * Find 2 keys such that one key is in the same row
  259. * and the other is in the same column as the i-th key.
  260. */
  261. for (j = i + 1; j < num_down; j++) {
  262. u8 col = scancodes[j] & 0x07;
  263. u8 row = scancodes[j] >> KBC_ROW_SHIFT;
  264. if (col == curr_col)
  265. key_in_same_col = true;
  266. if (row == curr_row)
  267. key_in_same_row = true;
  268. }
  269. }
  270. }
  271. /*
  272. * If the platform uses Fn keymaps, translate keys on a Fn keypress.
  273. * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
  274. */
  275. if (fn_keypress) {
  276. for (i = 0; i < num_down; i++) {
  277. scancodes[i] += KBC_MAX_KEY;
  278. keycodes[i] = kbc->keycode[scancodes[i]];
  279. }
  280. }
  281. spin_unlock_irqrestore(&kbc->lock, flags);
  282. /* Ignore the key presses for this iteration? */
  283. if (key_in_same_col && key_in_same_row)
  284. return;
  285. tegra_kbc_report_released_keys(kbc->idev,
  286. kbc->current_keys, kbc->num_pressed_keys,
  287. keycodes, num_down);
  288. tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
  289. input_sync(kbc->idev);
  290. memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
  291. kbc->num_pressed_keys = num_down;
  292. }
  293. static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
  294. {
  295. u32 val;
  296. val = readl(kbc->mmio + KBC_CONTROL_0);
  297. if (enable)
  298. val |= KBC_CONTROL_FIFO_CNT_INT_EN;
  299. else
  300. val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
  301. writel(val, kbc->mmio + KBC_CONTROL_0);
  302. }
  303. static void tegra_kbc_keypress_timer(unsigned long data)
  304. {
  305. struct tegra_kbc *kbc = (struct tegra_kbc *)data;
  306. unsigned long flags;
  307. u32 val;
  308. unsigned int i;
  309. val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
  310. if (val) {
  311. unsigned long dly;
  312. tegra_kbc_report_keys(kbc);
  313. /*
  314. * If more than one keys are pressed we need not wait
  315. * for the repoll delay.
  316. */
  317. dly = (val == 1) ? kbc->repoll_dly : 1;
  318. mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
  319. } else {
  320. /* Release any pressed keys and exit the polling loop */
  321. for (i = 0; i < kbc->num_pressed_keys; i++)
  322. input_report_key(kbc->idev, kbc->current_keys[i], 0);
  323. input_sync(kbc->idev);
  324. kbc->num_pressed_keys = 0;
  325. /* All keys are released so enable the keypress interrupt */
  326. spin_lock_irqsave(&kbc->lock, flags);
  327. tegra_kbc_set_fifo_interrupt(kbc, true);
  328. spin_unlock_irqrestore(&kbc->lock, flags);
  329. }
  330. }
  331. static irqreturn_t tegra_kbc_isr(int irq, void *args)
  332. {
  333. struct tegra_kbc *kbc = args;
  334. u32 val;
  335. /*
  336. * Until all keys are released, defer further processing to
  337. * the polling loop in tegra_kbc_keypress_timer
  338. */
  339. tegra_kbc_set_fifo_interrupt(kbc, false);
  340. /*
  341. * Quickly bail out & reenable interrupts if the fifo threshold
  342. * count interrupt wasn't the interrupt source
  343. */
  344. val = readl(kbc->mmio + KBC_INT_0);
  345. writel(val, kbc->mmio + KBC_INT_0);
  346. if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
  347. /*
  348. * Schedule timer to run when hardware is in continuous
  349. * polling mode.
  350. */
  351. mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
  352. } else {
  353. tegra_kbc_set_fifo_interrupt(kbc, true);
  354. }
  355. return IRQ_HANDLED;
  356. }
  357. static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
  358. {
  359. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  360. int i;
  361. unsigned int rst_val;
  362. /* Either mask all keys or none. */
  363. rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
  364. for (i = 0; i < KBC_MAX_ROW; i++)
  365. writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
  366. }
  367. static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
  368. {
  369. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  370. int i;
  371. for (i = 0; i < KBC_MAX_GPIO; i++) {
  372. u32 r_shft = 5 * (i % 6);
  373. u32 c_shft = 4 * (i % 8);
  374. u32 r_mask = 0x1f << r_shft;
  375. u32 c_mask = 0x0f << c_shft;
  376. u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
  377. u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
  378. u32 row_cfg = readl(kbc->mmio + r_offs);
  379. u32 col_cfg = readl(kbc->mmio + c_offs);
  380. row_cfg &= ~r_mask;
  381. col_cfg &= ~c_mask;
  382. if (pdata->pin_cfg[i].is_row)
  383. row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
  384. else
  385. col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
  386. writel(row_cfg, kbc->mmio + r_offs);
  387. writel(col_cfg, kbc->mmio + c_offs);
  388. }
  389. }
  390. static int tegra_kbc_start(struct tegra_kbc *kbc)
  391. {
  392. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  393. unsigned long flags;
  394. unsigned int debounce_cnt;
  395. u32 val = 0;
  396. clk_enable(kbc->clk);
  397. /* Reset the KBC controller to clear all previous status.*/
  398. tegra_periph_reset_assert(kbc->clk);
  399. udelay(100);
  400. tegra_periph_reset_deassert(kbc->clk);
  401. udelay(100);
  402. tegra_kbc_config_pins(kbc);
  403. tegra_kbc_setup_wakekeys(kbc, false);
  404. writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
  405. /* Keyboard debounce count is maximum of 12 bits. */
  406. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  407. val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
  408. val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
  409. val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
  410. val |= KBC_CONTROL_KBC_EN; /* enable */
  411. writel(val, kbc->mmio + KBC_CONTROL_0);
  412. /*
  413. * Compute the delay(ns) from interrupt mode to continuous polling
  414. * mode so the timer routine is scheduled appropriately.
  415. */
  416. val = readl(kbc->mmio + KBC_INIT_DLY_0);
  417. kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
  418. kbc->num_pressed_keys = 0;
  419. /*
  420. * Atomically clear out any remaining entries in the key FIFO
  421. * and enable keyboard interrupts.
  422. */
  423. spin_lock_irqsave(&kbc->lock, flags);
  424. while (1) {
  425. val = readl(kbc->mmio + KBC_INT_0);
  426. val >>= 4;
  427. if (!val)
  428. break;
  429. val = readl(kbc->mmio + KBC_KP_ENT0_0);
  430. val = readl(kbc->mmio + KBC_KP_ENT1_0);
  431. }
  432. writel(0x7, kbc->mmio + KBC_INT_0);
  433. spin_unlock_irqrestore(&kbc->lock, flags);
  434. enable_irq(kbc->irq);
  435. return 0;
  436. }
  437. static void tegra_kbc_stop(struct tegra_kbc *kbc)
  438. {
  439. unsigned long flags;
  440. u32 val;
  441. spin_lock_irqsave(&kbc->lock, flags);
  442. val = readl(kbc->mmio + KBC_CONTROL_0);
  443. val &= ~1;
  444. writel(val, kbc->mmio + KBC_CONTROL_0);
  445. spin_unlock_irqrestore(&kbc->lock, flags);
  446. disable_irq(kbc->irq);
  447. del_timer_sync(&kbc->timer);
  448. clk_disable(kbc->clk);
  449. }
  450. static int tegra_kbc_open(struct input_dev *dev)
  451. {
  452. struct tegra_kbc *kbc = input_get_drvdata(dev);
  453. return tegra_kbc_start(kbc);
  454. }
  455. static void tegra_kbc_close(struct input_dev *dev)
  456. {
  457. struct tegra_kbc *kbc = input_get_drvdata(dev);
  458. return tegra_kbc_stop(kbc);
  459. }
  460. static bool __devinit
  461. tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
  462. struct device *dev, unsigned int *num_rows)
  463. {
  464. int i;
  465. *num_rows = 0;
  466. for (i = 0; i < KBC_MAX_GPIO; i++) {
  467. const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
  468. if (pin_cfg->is_row) {
  469. if (pin_cfg->num >= KBC_MAX_ROW) {
  470. dev_err(dev,
  471. "pin_cfg[%d]: invalid row number %d\n",
  472. i, pin_cfg->num);
  473. return false;
  474. }
  475. (*num_rows)++;
  476. } else {
  477. if (pin_cfg->num >= KBC_MAX_COL) {
  478. dev_err(dev,
  479. "pin_cfg[%d]: invalid column number %d\n",
  480. i, pin_cfg->num);
  481. return false;
  482. }
  483. }
  484. }
  485. return true;
  486. }
  487. static int __devinit tegra_kbc_probe(struct platform_device *pdev)
  488. {
  489. const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
  490. const struct matrix_keymap_data *keymap_data;
  491. struct tegra_kbc *kbc;
  492. struct input_dev *input_dev;
  493. struct resource *res;
  494. int irq;
  495. int err;
  496. int num_rows = 0;
  497. unsigned int debounce_cnt;
  498. unsigned int scan_time_rows;
  499. if (!pdata)
  500. return -EINVAL;
  501. if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
  502. return -EINVAL;
  503. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  504. if (!res) {
  505. dev_err(&pdev->dev, "failed to get I/O memory\n");
  506. return -ENXIO;
  507. }
  508. irq = platform_get_irq(pdev, 0);
  509. if (irq < 0) {
  510. dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
  511. return -ENXIO;
  512. }
  513. kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
  514. input_dev = input_allocate_device();
  515. if (!kbc || !input_dev) {
  516. err = -ENOMEM;
  517. goto err_free_mem;
  518. }
  519. kbc->pdata = pdata;
  520. kbc->idev = input_dev;
  521. kbc->irq = irq;
  522. spin_lock_init(&kbc->lock);
  523. setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
  524. res = request_mem_region(res->start, resource_size(res), pdev->name);
  525. if (!res) {
  526. dev_err(&pdev->dev, "failed to request I/O memory\n");
  527. err = -EBUSY;
  528. goto err_free_mem;
  529. }
  530. kbc->mmio = ioremap(res->start, resource_size(res));
  531. if (!kbc->mmio) {
  532. dev_err(&pdev->dev, "failed to remap I/O memory\n");
  533. err = -ENXIO;
  534. goto err_free_mem_region;
  535. }
  536. kbc->clk = clk_get(&pdev->dev, NULL);
  537. if (IS_ERR(kbc->clk)) {
  538. dev_err(&pdev->dev, "failed to get keyboard clock\n");
  539. err = PTR_ERR(kbc->clk);
  540. goto err_iounmap;
  541. }
  542. /*
  543. * The time delay between two consecutive reads of the FIFO is
  544. * the sum of the repeat time and the time taken for scanning
  545. * the rows. There is an additional delay before the row scanning
  546. * starts. The repoll delay is computed in milliseconds.
  547. */
  548. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  549. scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
  550. kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
  551. kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
  552. input_dev->name = pdev->name;
  553. input_dev->id.bustype = BUS_HOST;
  554. input_dev->dev.parent = &pdev->dev;
  555. input_dev->open = tegra_kbc_open;
  556. input_dev->close = tegra_kbc_close;
  557. input_set_drvdata(input_dev, kbc);
  558. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
  559. input_set_capability(input_dev, EV_MSC, MSC_SCAN);
  560. input_dev->keycode = kbc->keycode;
  561. input_dev->keycodesize = sizeof(kbc->keycode[0]);
  562. input_dev->keycodemax = KBC_MAX_KEY;
  563. if (pdata->use_fn_map)
  564. input_dev->keycodemax *= 2;
  565. kbc->use_fn_map = pdata->use_fn_map;
  566. kbc->use_ghost_filter = pdata->use_ghost_filter;
  567. keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
  568. matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
  569. input_dev->keycode, input_dev->keybit);
  570. err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
  571. pdev->name, kbc);
  572. if (err) {
  573. dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
  574. goto err_put_clk;
  575. }
  576. disable_irq(kbc->irq);
  577. err = input_register_device(kbc->idev);
  578. if (err) {
  579. dev_err(&pdev->dev, "failed to register input device\n");
  580. goto err_free_irq;
  581. }
  582. platform_set_drvdata(pdev, kbc);
  583. device_init_wakeup(&pdev->dev, pdata->wakeup);
  584. return 0;
  585. err_free_irq:
  586. free_irq(kbc->irq, pdev);
  587. err_put_clk:
  588. clk_put(kbc->clk);
  589. err_iounmap:
  590. iounmap(kbc->mmio);
  591. err_free_mem_region:
  592. release_mem_region(res->start, resource_size(res));
  593. err_free_mem:
  594. input_free_device(input_dev);
  595. kfree(kbc);
  596. return err;
  597. }
  598. static int __devexit tegra_kbc_remove(struct platform_device *pdev)
  599. {
  600. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  601. struct resource *res;
  602. free_irq(kbc->irq, pdev);
  603. clk_put(kbc->clk);
  604. input_unregister_device(kbc->idev);
  605. iounmap(kbc->mmio);
  606. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  607. release_mem_region(res->start, resource_size(res));
  608. kfree(kbc);
  609. platform_set_drvdata(pdev, NULL);
  610. return 0;
  611. }
  612. #ifdef CONFIG_PM_SLEEP
  613. static int tegra_kbc_suspend(struct device *dev)
  614. {
  615. struct platform_device *pdev = to_platform_device(dev);
  616. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  617. mutex_lock(&kbc->idev->mutex);
  618. if (device_may_wakeup(&pdev->dev)) {
  619. disable_irq(kbc->irq);
  620. del_timer_sync(&kbc->timer);
  621. tegra_kbc_set_fifo_interrupt(kbc, false);
  622. /* Forcefully clear the interrupt status */
  623. writel(0x7, kbc->mmio + KBC_INT_0);
  624. /*
  625. * Store the previous resident time of continuous polling mode.
  626. * Force the keyboard into interrupt mode.
  627. */
  628. kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
  629. writel(0, kbc->mmio + KBC_TO_CNT_0);
  630. tegra_kbc_setup_wakekeys(kbc, true);
  631. msleep(30);
  632. enable_irq_wake(kbc->irq);
  633. } else {
  634. if (kbc->idev->users)
  635. tegra_kbc_stop(kbc);
  636. }
  637. mutex_unlock(&kbc->idev->mutex);
  638. return 0;
  639. }
  640. static int tegra_kbc_resume(struct device *dev)
  641. {
  642. struct platform_device *pdev = to_platform_device(dev);
  643. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  644. int err = 0;
  645. mutex_lock(&kbc->idev->mutex);
  646. if (device_may_wakeup(&pdev->dev)) {
  647. disable_irq_wake(kbc->irq);
  648. tegra_kbc_setup_wakekeys(kbc, false);
  649. /* Restore the resident time of continuous polling mode. */
  650. writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
  651. tegra_kbc_set_fifo_interrupt(kbc, true);
  652. enable_irq(kbc->irq);
  653. } else {
  654. if (kbc->idev->users)
  655. err = tegra_kbc_start(kbc);
  656. }
  657. mutex_unlock(&kbc->idev->mutex);
  658. return err;
  659. }
  660. #endif
  661. static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
  662. static struct platform_driver tegra_kbc_driver = {
  663. .probe = tegra_kbc_probe,
  664. .remove = __devexit_p(tegra_kbc_remove),
  665. .driver = {
  666. .name = "tegra-kbc",
  667. .owner = THIS_MODULE,
  668. .pm = &tegra_kbc_pm_ops,
  669. },
  670. };
  671. static void __exit tegra_kbc_exit(void)
  672. {
  673. platform_driver_unregister(&tegra_kbc_driver);
  674. }
  675. module_exit(tegra_kbc_exit);
  676. static int __init tegra_kbc_init(void)
  677. {
  678. return platform_driver_register(&tegra_kbc_driver);
  679. }
  680. module_init(tegra_kbc_init);
  681. MODULE_LICENSE("GPL");
  682. MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
  683. MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
  684. MODULE_ALIAS("platform:tegra-kbc");