rt2x00queue.c 18 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/dma-mapping.h>
  24. #include "rt2x00.h"
  25. #include "rt2x00lib.h"
  26. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  27. struct queue_entry *entry)
  28. {
  29. unsigned int frame_size;
  30. unsigned int reserved_size;
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. /*
  34. * The frame size includes descriptor size, because the
  35. * hardware directly receive the frame into the skbuffer.
  36. */
  37. frame_size = entry->queue->data_size + entry->queue->desc_size;
  38. /*
  39. * The payload should be aligned to a 4-byte boundary,
  40. * this means we need at least 3 bytes for moving the frame
  41. * into the correct offset.
  42. */
  43. reserved_size = 4;
  44. /*
  45. * Allocate skbuffer.
  46. */
  47. skb = dev_alloc_skb(frame_size + reserved_size);
  48. if (!skb)
  49. return NULL;
  50. skb_reserve(skb, reserved_size);
  51. skb_put(skb, frame_size);
  52. /*
  53. * Populate skbdesc.
  54. */
  55. skbdesc = get_skb_frame_desc(skb);
  56. memset(skbdesc, 0, sizeof(*skbdesc));
  57. skbdesc->entry = entry;
  58. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  59. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  60. skb->data,
  61. skb->len,
  62. DMA_FROM_DEVICE);
  63. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  64. }
  65. return skb;
  66. }
  67. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  68. {
  69. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  70. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  71. DMA_TO_DEVICE);
  72. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  73. }
  74. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  75. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  76. {
  77. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  78. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  79. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  80. DMA_FROM_DEVICE);
  81. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  82. }
  83. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  84. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  85. DMA_TO_DEVICE);
  86. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  87. }
  88. }
  89. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  90. {
  91. if (!skb)
  92. return;
  93. rt2x00queue_unmap_skb(rt2x00dev, skb);
  94. dev_kfree_skb_any(skb);
  95. }
  96. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  97. struct txentry_desc *txdesc)
  98. {
  99. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  100. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  101. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  102. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  103. struct ieee80211_rate *rate =
  104. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  105. const struct rt2x00_rate *hwrate;
  106. unsigned int data_length;
  107. unsigned int duration;
  108. unsigned int residual;
  109. unsigned long irqflags;
  110. memset(txdesc, 0, sizeof(*txdesc));
  111. /*
  112. * Initialize information from queue
  113. */
  114. txdesc->queue = entry->queue->qid;
  115. txdesc->cw_min = entry->queue->cw_min;
  116. txdesc->cw_max = entry->queue->cw_max;
  117. txdesc->aifs = entry->queue->aifs;
  118. /* Data length should be extended with 4 bytes for CRC */
  119. data_length = entry->skb->len + 4;
  120. /*
  121. * Check whether this frame is to be acked.
  122. */
  123. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  124. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  125. /*
  126. * Check if this is a RTS/CTS frame
  127. */
  128. if (ieee80211_is_rts(hdr->frame_control) ||
  129. ieee80211_is_cts(hdr->frame_control)) {
  130. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  131. if (ieee80211_is_rts(hdr->frame_control))
  132. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  133. else
  134. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  135. if (tx_info->control.rts_cts_rate_idx >= 0)
  136. rate =
  137. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  138. }
  139. /*
  140. * Determine retry information.
  141. */
  142. txdesc->retry_limit = tx_info->control.retry_limit;
  143. if (tx_info->flags & IEEE80211_TX_CTL_LONG_RETRY_LIMIT)
  144. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  145. /*
  146. * Check if more fragments are pending
  147. */
  148. if (ieee80211_has_morefrags(hdr->frame_control)) {
  149. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  150. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  151. }
  152. /*
  153. * Beacons and probe responses require the tsf timestamp
  154. * to be inserted into the frame.
  155. */
  156. if (ieee80211_is_beacon(hdr->frame_control) ||
  157. ieee80211_is_probe_resp(hdr->frame_control))
  158. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  159. /*
  160. * Determine with what IFS priority this frame should be send.
  161. * Set ifs to IFS_SIFS when the this is not the first fragment,
  162. * or this fragment came after RTS/CTS.
  163. */
  164. if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  165. txdesc->ifs = IFS_SIFS;
  166. } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
  167. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  168. txdesc->ifs = IFS_BACKOFF;
  169. } else {
  170. txdesc->ifs = IFS_SIFS;
  171. }
  172. /*
  173. * Hardware should insert sequence counter.
  174. * FIXME: We insert a software sequence counter first for
  175. * hardware that doesn't support hardware sequence counting.
  176. *
  177. * This is wrong because beacons are not getting sequence
  178. * numbers assigned properly.
  179. *
  180. * A secondary problem exists for drivers that cannot toggle
  181. * sequence counting per-frame, since those will override the
  182. * sequence counter given by mac80211.
  183. */
  184. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  185. spin_lock_irqsave(&intf->seqlock, irqflags);
  186. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  187. intf->seqno += 0x10;
  188. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  189. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  190. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  191. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  192. }
  193. /*
  194. * PLCP setup
  195. * Length calculation depends on OFDM/CCK rate.
  196. */
  197. hwrate = rt2x00_get_rate(rate->hw_value);
  198. txdesc->signal = hwrate->plcp;
  199. txdesc->service = 0x04;
  200. if (hwrate->flags & DEV_RATE_OFDM) {
  201. __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
  202. txdesc->length_high = (data_length >> 6) & 0x3f;
  203. txdesc->length_low = data_length & 0x3f;
  204. } else {
  205. /*
  206. * Convert length to microseconds.
  207. */
  208. residual = get_duration_res(data_length, hwrate->bitrate);
  209. duration = get_duration(data_length, hwrate->bitrate);
  210. if (residual != 0) {
  211. duration++;
  212. /*
  213. * Check if we need to set the Length Extension
  214. */
  215. if (hwrate->bitrate == 110 && residual <= 30)
  216. txdesc->service |= 0x80;
  217. }
  218. txdesc->length_high = (duration >> 8) & 0xff;
  219. txdesc->length_low = duration & 0xff;
  220. /*
  221. * When preamble is enabled we should set the
  222. * preamble bit for the signal.
  223. */
  224. if (rt2x00_get_rate_preamble(rate->hw_value))
  225. txdesc->signal |= 0x08;
  226. }
  227. }
  228. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  229. struct txentry_desc *txdesc)
  230. {
  231. struct data_queue *queue = entry->queue;
  232. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  233. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  234. /*
  235. * All processing on the frame has been completed, this means
  236. * it is now ready to be dumped to userspace through debugfs.
  237. */
  238. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  239. /*
  240. * Check if we need to kick the queue, there are however a few rules
  241. * 1) Don't kick beacon queue
  242. * 2) Don't kick unless this is the last in frame in a burst.
  243. * When the burst flag is set, this frame is always followed
  244. * by another frame which in some way are related to eachother.
  245. * This is true for fragments, RTS or CTS-to-self frames.
  246. * 3) Rule 2 can be broken when the available entries
  247. * in the queue are less then a certain threshold.
  248. */
  249. if (entry->queue->qid == QID_BEACON)
  250. return;
  251. if (rt2x00queue_threshold(queue) ||
  252. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  253. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  254. }
  255. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
  256. {
  257. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  258. struct txentry_desc txdesc;
  259. struct skb_frame_desc *skbdesc;
  260. if (unlikely(rt2x00queue_full(queue)))
  261. return -EINVAL;
  262. if (__test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  263. ERROR(queue->rt2x00dev,
  264. "Arrived at non-free entry in the non-full queue %d.\n"
  265. "Please file bug report to %s.\n",
  266. queue->qid, DRV_PROJECT);
  267. return -EINVAL;
  268. }
  269. /*
  270. * Copy all TX descriptor information into txdesc,
  271. * after that we are free to use the skb->cb array
  272. * for our information.
  273. */
  274. entry->skb = skb;
  275. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  276. /*
  277. * skb->cb array is now ours and we are free to use it.
  278. */
  279. skbdesc = get_skb_frame_desc(entry->skb);
  280. memset(skbdesc, 0, sizeof(*skbdesc));
  281. skbdesc->entry = entry;
  282. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  283. __clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  284. return -EIO;
  285. }
  286. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  287. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  288. __set_bit(ENTRY_DATA_PENDING, &entry->flags);
  289. rt2x00queue_index_inc(queue, Q_INDEX);
  290. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  291. return 0;
  292. }
  293. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  294. struct ieee80211_vif *vif)
  295. {
  296. struct rt2x00_intf *intf = vif_to_intf(vif);
  297. struct skb_frame_desc *skbdesc;
  298. struct txentry_desc txdesc;
  299. __le32 desc[16];
  300. if (unlikely(!intf->beacon))
  301. return -ENOBUFS;
  302. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  303. if (!intf->beacon->skb)
  304. return -ENOMEM;
  305. /*
  306. * Copy all TX descriptor information into txdesc,
  307. * after that we are free to use the skb->cb array
  308. * for our information.
  309. */
  310. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  311. /*
  312. * For the descriptor we use a local array from where the
  313. * driver can move it to the correct location required for
  314. * the hardware.
  315. */
  316. memset(desc, 0, sizeof(desc));
  317. /*
  318. * Fill in skb descriptor
  319. */
  320. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  321. memset(skbdesc, 0, sizeof(*skbdesc));
  322. skbdesc->desc = desc;
  323. skbdesc->desc_len = intf->beacon->queue->desc_size;
  324. skbdesc->entry = intf->beacon;
  325. /*
  326. * Write TX descriptor into reserved room in front of the beacon.
  327. */
  328. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  329. /*
  330. * Send beacon to hardware.
  331. * Also enable beacon generation, which might have been disabled
  332. * by the driver during the config_beacon() callback function.
  333. */
  334. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  335. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  336. return 0;
  337. }
  338. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  339. const enum data_queue_qid queue)
  340. {
  341. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  342. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  343. return &rt2x00dev->tx[queue];
  344. if (!rt2x00dev->bcn)
  345. return NULL;
  346. if (queue == QID_BEACON)
  347. return &rt2x00dev->bcn[0];
  348. else if (queue == QID_ATIM && atim)
  349. return &rt2x00dev->bcn[1];
  350. return NULL;
  351. }
  352. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  353. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  354. enum queue_index index)
  355. {
  356. struct queue_entry *entry;
  357. unsigned long irqflags;
  358. if (unlikely(index >= Q_INDEX_MAX)) {
  359. ERROR(queue->rt2x00dev,
  360. "Entry requested from invalid index type (%d)\n", index);
  361. return NULL;
  362. }
  363. spin_lock_irqsave(&queue->lock, irqflags);
  364. entry = &queue->entries[queue->index[index]];
  365. spin_unlock_irqrestore(&queue->lock, irqflags);
  366. return entry;
  367. }
  368. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  369. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  370. {
  371. unsigned long irqflags;
  372. if (unlikely(index >= Q_INDEX_MAX)) {
  373. ERROR(queue->rt2x00dev,
  374. "Index change on invalid index type (%d)\n", index);
  375. return;
  376. }
  377. spin_lock_irqsave(&queue->lock, irqflags);
  378. queue->index[index]++;
  379. if (queue->index[index] >= queue->limit)
  380. queue->index[index] = 0;
  381. if (index == Q_INDEX) {
  382. queue->length++;
  383. } else if (index == Q_INDEX_DONE) {
  384. queue->length--;
  385. queue->count ++;
  386. }
  387. spin_unlock_irqrestore(&queue->lock, irqflags);
  388. }
  389. static void rt2x00queue_reset(struct data_queue *queue)
  390. {
  391. unsigned long irqflags;
  392. spin_lock_irqsave(&queue->lock, irqflags);
  393. queue->count = 0;
  394. queue->length = 0;
  395. memset(queue->index, 0, sizeof(queue->index));
  396. spin_unlock_irqrestore(&queue->lock, irqflags);
  397. }
  398. void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev)
  399. {
  400. struct data_queue *queue = rt2x00dev->rx;
  401. unsigned int i;
  402. rt2x00queue_reset(queue);
  403. if (!rt2x00dev->ops->lib->init_rxentry)
  404. return;
  405. for (i = 0; i < queue->limit; i++) {
  406. queue->entries[i].flags = 0;
  407. rt2x00dev->ops->lib->init_rxentry(rt2x00dev,
  408. &queue->entries[i]);
  409. }
  410. }
  411. void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev)
  412. {
  413. struct data_queue *queue;
  414. unsigned int i;
  415. txall_queue_for_each(rt2x00dev, queue) {
  416. rt2x00queue_reset(queue);
  417. if (!rt2x00dev->ops->lib->init_txentry)
  418. continue;
  419. for (i = 0; i < queue->limit; i++) {
  420. queue->entries[i].flags = 0;
  421. rt2x00dev->ops->lib->init_txentry(rt2x00dev,
  422. &queue->entries[i]);
  423. }
  424. }
  425. }
  426. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  427. const struct data_queue_desc *qdesc)
  428. {
  429. struct queue_entry *entries;
  430. unsigned int entry_size;
  431. unsigned int i;
  432. rt2x00queue_reset(queue);
  433. queue->limit = qdesc->entry_num;
  434. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  435. queue->data_size = qdesc->data_size;
  436. queue->desc_size = qdesc->desc_size;
  437. /*
  438. * Allocate all queue entries.
  439. */
  440. entry_size = sizeof(*entries) + qdesc->priv_size;
  441. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  442. if (!entries)
  443. return -ENOMEM;
  444. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  445. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  446. ((__index) * (__psize)) )
  447. for (i = 0; i < queue->limit; i++) {
  448. entries[i].flags = 0;
  449. entries[i].queue = queue;
  450. entries[i].skb = NULL;
  451. entries[i].entry_idx = i;
  452. entries[i].priv_data =
  453. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  454. sizeof(*entries), qdesc->priv_size);
  455. }
  456. #undef QUEUE_ENTRY_PRIV_OFFSET
  457. queue->entries = entries;
  458. return 0;
  459. }
  460. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  461. struct data_queue *queue)
  462. {
  463. unsigned int i;
  464. if (!queue->entries)
  465. return;
  466. for (i = 0; i < queue->limit; i++) {
  467. if (queue->entries[i].skb)
  468. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  469. }
  470. }
  471. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  472. struct data_queue *queue)
  473. {
  474. unsigned int i;
  475. struct sk_buff *skb;
  476. for (i = 0; i < queue->limit; i++) {
  477. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  478. if (!skb)
  479. return -ENOMEM;
  480. queue->entries[i].skb = skb;
  481. }
  482. return 0;
  483. }
  484. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  485. {
  486. struct data_queue *queue;
  487. int status;
  488. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  489. if (status)
  490. goto exit;
  491. tx_queue_for_each(rt2x00dev, queue) {
  492. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  493. if (status)
  494. goto exit;
  495. }
  496. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  497. if (status)
  498. goto exit;
  499. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  500. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  501. rt2x00dev->ops->atim);
  502. if (status)
  503. goto exit;
  504. }
  505. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  506. if (status)
  507. goto exit;
  508. return 0;
  509. exit:
  510. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  511. rt2x00queue_uninitialize(rt2x00dev);
  512. return status;
  513. }
  514. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  515. {
  516. struct data_queue *queue;
  517. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  518. queue_for_each(rt2x00dev, queue) {
  519. kfree(queue->entries);
  520. queue->entries = NULL;
  521. }
  522. }
  523. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  524. struct data_queue *queue, enum data_queue_qid qid)
  525. {
  526. spin_lock_init(&queue->lock);
  527. queue->rt2x00dev = rt2x00dev;
  528. queue->qid = qid;
  529. queue->aifs = 2;
  530. queue->cw_min = 5;
  531. queue->cw_max = 10;
  532. }
  533. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  534. {
  535. struct data_queue *queue;
  536. enum data_queue_qid qid;
  537. unsigned int req_atim =
  538. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  539. /*
  540. * We need the following queues:
  541. * RX: 1
  542. * TX: ops->tx_queues
  543. * Beacon: 1
  544. * Atim: 1 (if required)
  545. */
  546. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  547. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  548. if (!queue) {
  549. ERROR(rt2x00dev, "Queue allocation failed.\n");
  550. return -ENOMEM;
  551. }
  552. /*
  553. * Initialize pointers
  554. */
  555. rt2x00dev->rx = queue;
  556. rt2x00dev->tx = &queue[1];
  557. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  558. /*
  559. * Initialize queue parameters.
  560. * RX: qid = QID_RX
  561. * TX: qid = QID_AC_BE + index
  562. * TX: cw_min: 2^5 = 32.
  563. * TX: cw_max: 2^10 = 1024.
  564. * BCN: qid = QID_BEACON
  565. * ATIM: qid = QID_ATIM
  566. */
  567. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  568. qid = QID_AC_BE;
  569. tx_queue_for_each(rt2x00dev, queue)
  570. rt2x00queue_init(rt2x00dev, queue, qid++);
  571. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  572. if (req_atim)
  573. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  574. return 0;
  575. }
  576. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  577. {
  578. kfree(rt2x00dev->rx);
  579. rt2x00dev->rx = NULL;
  580. rt2x00dev->tx = NULL;
  581. rt2x00dev->bcn = NULL;
  582. }