cx88-dvb.c 23 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h"
  36. # ifdef HAVE_VP3054_I2C
  37. # include "cx88-vp3054-i2c.h"
  38. # endif
  39. #endif
  40. #ifdef HAVE_ZL10353
  41. # include "zl10353.h"
  42. #endif
  43. #ifdef HAVE_CX22702
  44. # include "cx22702.h"
  45. #endif
  46. #ifdef HAVE_OR51132
  47. # include "or51132.h"
  48. #endif
  49. #ifdef HAVE_LGDT330X
  50. # include "lgdt330x.h"
  51. #endif
  52. #ifdef HAVE_NXT200X
  53. # include "nxt200x.h"
  54. #endif
  55. #ifdef HAVE_CX24123
  56. # include "cx24123.h"
  57. #endif
  58. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  59. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  60. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  61. MODULE_LICENSE("GPL");
  62. static unsigned int debug = 0;
  63. module_param(debug, int, 0644);
  64. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  65. #define dprintk(level,fmt, arg...) if (debug >= level) \
  66. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  67. /* ------------------------------------------------------------------ */
  68. static int dvb_buf_setup(struct videobuf_queue *q,
  69. unsigned int *count, unsigned int *size)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. dev->ts_packet_size = 188 * 4;
  73. dev->ts_packet_count = 32;
  74. *size = dev->ts_packet_size * dev->ts_packet_count;
  75. *count = 32;
  76. return 0;
  77. }
  78. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  79. enum v4l2_field field)
  80. {
  81. struct cx8802_dev *dev = q->priv_data;
  82. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  83. }
  84. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  85. {
  86. struct cx8802_dev *dev = q->priv_data;
  87. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  88. }
  89. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  90. {
  91. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  92. }
  93. static struct videobuf_queue_ops dvb_qops = {
  94. .buf_setup = dvb_buf_setup,
  95. .buf_prepare = dvb_buf_prepare,
  96. .buf_queue = dvb_buf_queue,
  97. .buf_release = dvb_buf_release,
  98. };
  99. /* ------------------------------------------------------------------ */
  100. #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
  101. static int zarlink_pll_set(struct dvb_frontend *fe,
  102. struct dvb_frontend_parameters *params,
  103. u8 *pllbuf)
  104. {
  105. struct cx8802_dev *dev = fe->dvb->priv;
  106. pllbuf[0] = dev->core->pll_addr << 1;
  107. dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
  108. params->frequency,
  109. params->u.ofdm.bandwidth);
  110. return 0;
  111. }
  112. #endif
  113. #ifdef HAVE_MT352
  114. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  115. {
  116. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  117. static u8 reset [] = { RESET, 0x80 };
  118. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  119. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  120. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  121. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  122. mt352_write(fe, clock_config, sizeof(clock_config));
  123. udelay(200);
  124. mt352_write(fe, reset, sizeof(reset));
  125. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  126. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  127. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  128. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  129. return 0;
  130. }
  131. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  132. {
  133. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  134. static u8 reset [] = { RESET, 0x80 };
  135. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  136. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  137. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  138. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  139. mt352_write(fe, clock_config, sizeof(clock_config));
  140. udelay(200);
  141. mt352_write(fe, reset, sizeof(reset));
  142. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  143. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  144. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  145. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  146. return 0;
  147. }
  148. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  149. {
  150. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  151. static u8 reset [] = { 0x50, 0x80 };
  152. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  153. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  154. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  155. static u8 dntv_extra[] = { 0xB5, 0x7A };
  156. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  157. mt352_write(fe, clock_config, sizeof(clock_config));
  158. udelay(2000);
  159. mt352_write(fe, reset, sizeof(reset));
  160. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  161. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  162. udelay(2000);
  163. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  164. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  165. return 0;
  166. }
  167. static struct mt352_config dvico_fusionhdtv = {
  168. .demod_address = 0x0F,
  169. .demod_init = dvico_fusionhdtv_demod_init,
  170. .pll_set = zarlink_pll_set,
  171. };
  172. static struct mt352_config dntv_live_dvbt_config = {
  173. .demod_address = 0x0f,
  174. .demod_init = dntv_live_dvbt_demod_init,
  175. .pll_set = zarlink_pll_set,
  176. };
  177. static struct mt352_config dvico_fusionhdtv_dual = {
  178. .demod_address = 0x0F,
  179. .demod_init = dvico_dual_demod_init,
  180. .pll_set = zarlink_pll_set,
  181. };
  182. #ifdef HAVE_VP3054_I2C
  183. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  184. {
  185. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  186. static u8 reset [] = { 0x50, 0x80 };
  187. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  188. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  189. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  190. static u8 dntv_extra[] = { 0xB5, 0x7A };
  191. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  192. mt352_write(fe, clock_config, sizeof(clock_config));
  193. udelay(2000);
  194. mt352_write(fe, reset, sizeof(reset));
  195. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  196. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  197. udelay(2000);
  198. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  199. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  200. return 0;
  201. }
  202. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  203. {
  204. struct cx8802_dev *dev= fe->dvb->priv;
  205. /* this message is to set up ATC and ALC */
  206. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  207. struct i2c_msg msg =
  208. { .addr = dev->core->pll_addr, .flags = 0,
  209. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  210. int err;
  211. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  212. if (err < 0)
  213. return err;
  214. else
  215. return -EREMOTEIO;
  216. }
  217. return 0;
  218. }
  219. static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
  220. struct dvb_frontend_parameters* params,
  221. u8* pllbuf)
  222. {
  223. struct cx8802_dev *dev= fe->dvb->priv;
  224. struct i2c_msg msg =
  225. { .addr = dev->core->pll_addr, .flags = 0,
  226. .buf = pllbuf+1, .len = 4 };
  227. int err;
  228. /* Switch PLL to DVB mode */
  229. err = philips_fmd1216_pll_init(fe);
  230. if (err)
  231. return err;
  232. /* Tune PLL */
  233. pllbuf[0] = dev->core->pll_addr << 1;
  234. dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
  235. params->frequency,
  236. params->u.ofdm.bandwidth);
  237. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  238. printk(KERN_WARNING "cx88-dvb: %s error "
  239. "(addr %02x <- %02x, err = %i)\n",
  240. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  241. if (err < 0)
  242. return err;
  243. else
  244. return -EREMOTEIO;
  245. }
  246. return 0;
  247. }
  248. static struct mt352_config dntv_live_dvbt_pro_config = {
  249. .demod_address = 0x0f,
  250. .no_tuner = 1,
  251. .demod_init = dntv_live_dvbt_pro_demod_init,
  252. .pll_set = dntv_live_dvbt_pro_pll_set,
  253. };
  254. #endif
  255. #endif
  256. #ifdef HAVE_ZL10353
  257. static int dvico_hybrid_tune_pll(struct dvb_frontend *fe,
  258. struct dvb_frontend_parameters *params,
  259. u8 *pllbuf)
  260. {
  261. struct cx8802_dev *dev= fe->dvb->priv;
  262. struct i2c_msg msg =
  263. { .addr = dev->core->pll_addr, .flags = 0,
  264. .buf = pllbuf + 1, .len = 4 };
  265. int err;
  266. pllbuf[0] = dev->core->pll_addr << 1;
  267. dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
  268. params->frequency,
  269. params->u.ofdm.bandwidth);
  270. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  271. printk(KERN_WARNING "cx88-dvb: %s error "
  272. "(addr %02x <- %02x, err = %i)\n",
  273. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  274. if (err < 0)
  275. return err;
  276. else
  277. return -EREMOTEIO;
  278. }
  279. return 0;
  280. }
  281. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  282. .demod_address = 0x0F,
  283. .pll_set = dvico_hybrid_tune_pll,
  284. };
  285. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  286. .demod_address = 0x0F,
  287. .pll_set = zarlink_pll_set,
  288. };
  289. #endif
  290. #ifdef HAVE_CX22702
  291. static struct cx22702_config connexant_refboard_config = {
  292. .demod_address = 0x43,
  293. .output_mode = CX22702_SERIAL_OUTPUT,
  294. .pll_address = 0x60,
  295. .pll_desc = &dvb_pll_thomson_dtt7579,
  296. };
  297. static struct cx22702_config hauppauge_novat_config = {
  298. .demod_address = 0x43,
  299. .output_mode = CX22702_SERIAL_OUTPUT,
  300. .pll_address = 0x61,
  301. .pll_desc = &dvb_pll_thomson_dtt759x,
  302. };
  303. static struct cx22702_config hauppauge_hvr1100_config = {
  304. .demod_address = 0x63,
  305. .output_mode = CX22702_SERIAL_OUTPUT,
  306. .pll_address = 0x61,
  307. .pll_desc = &dvb_pll_fmd1216me,
  308. };
  309. #endif
  310. #ifdef HAVE_OR51132
  311. static int or51132_set_ts_param(struct dvb_frontend* fe,
  312. int is_punctured)
  313. {
  314. struct cx8802_dev *dev= fe->dvb->priv;
  315. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  316. return 0;
  317. }
  318. static struct or51132_config pchdtv_hd3000 = {
  319. .demod_address = 0x15,
  320. .pll_address = 0x61,
  321. .pll_desc = &dvb_pll_thomson_dtt761x,
  322. .set_ts_params = or51132_set_ts_param,
  323. };
  324. #endif
  325. #ifdef HAVE_LGDT330X
  326. static int lgdt330x_pll_set(struct dvb_frontend* fe,
  327. struct dvb_frontend_parameters* params)
  328. {
  329. /* FIXME make this routine use the tuner-simple code.
  330. * It could probably be shared with a number of ATSC
  331. * frontends. Many share the same tuner with analog TV. */
  332. struct cx8802_dev *dev= fe->dvb->priv;
  333. struct cx88_core *core = dev->core;
  334. u8 buf[4];
  335. struct i2c_msg msg =
  336. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  337. int err;
  338. /* Put the analog decoder in standby to keep it quiet */
  339. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  340. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  341. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  342. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  343. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  344. printk(KERN_WARNING "cx88-dvb: %s error "
  345. "(addr %02x <- %02x, err = %i)\n",
  346. __FUNCTION__, buf[0], buf[1], err);
  347. if (err < 0)
  348. return err;
  349. else
  350. return -EREMOTEIO;
  351. }
  352. if (core->tuner_type == TUNER_LG_TDVS_H062F) {
  353. /* Set the Auxiliary Byte. */
  354. buf[2] &= ~0x20;
  355. buf[2] |= 0x18;
  356. buf[3] = 0x50;
  357. i2c_transfer(&core->i2c_adap, &msg, 1);
  358. }
  359. return 0;
  360. }
  361. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  362. {
  363. struct cx8802_dev *dev= fe->dvb->priv;
  364. struct cx88_core *core = dev->core;
  365. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  366. if (index == 0)
  367. cx_clear(MO_GP0_IO, 8);
  368. else
  369. cx_set(MO_GP0_IO, 8);
  370. return 0;
  371. }
  372. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  373. {
  374. struct cx8802_dev *dev= fe->dvb->priv;
  375. if (is_punctured)
  376. dev->ts_gen_cntrl |= 0x04;
  377. else
  378. dev->ts_gen_cntrl &= ~0x04;
  379. return 0;
  380. }
  381. static struct lgdt330x_config fusionhdtv_3_gold = {
  382. .demod_address = 0x0e,
  383. .demod_chip = LGDT3302,
  384. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  385. .pll_set = lgdt330x_pll_set,
  386. .set_ts_params = lgdt330x_set_ts_param,
  387. };
  388. static struct lgdt330x_config fusionhdtv_5_gold = {
  389. .demod_address = 0x0e,
  390. .demod_chip = LGDT3303,
  391. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  392. .pll_set = lgdt330x_pll_set,
  393. .set_ts_params = lgdt330x_set_ts_param,
  394. };
  395. static struct lgdt330x_config pchdtv_hd5500 = {
  396. .demod_address = 0x59,
  397. .demod_chip = LGDT3303,
  398. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  399. .pll_set = lgdt330x_pll_set,
  400. .set_ts_params = lgdt330x_set_ts_param,
  401. };
  402. #endif
  403. #ifdef HAVE_NXT200X
  404. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  405. int is_punctured)
  406. {
  407. struct cx8802_dev *dev= fe->dvb->priv;
  408. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  409. return 0;
  410. }
  411. static int nxt200x_set_pll_input(u8* buf, int input)
  412. {
  413. if (input)
  414. buf[3] |= 0x08;
  415. else
  416. buf[3] &= ~0x08;
  417. return 0;
  418. }
  419. static struct nxt200x_config ati_hdtvwonder = {
  420. .demod_address = 0x0a,
  421. .pll_address = 0x61,
  422. .pll_desc = &dvb_pll_tuv1236d,
  423. .set_pll_input = nxt200x_set_pll_input,
  424. .set_ts_params = nxt200x_set_ts_param,
  425. };
  426. #endif
  427. #ifdef HAVE_CX24123
  428. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  429. int is_punctured)
  430. {
  431. struct cx8802_dev *dev= fe->dvb->priv;
  432. dev->ts_gen_cntrl = 0x2;
  433. return 0;
  434. }
  435. static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
  436. {
  437. struct cx8802_dev *dev= fe->dvb->priv;
  438. struct cx88_core *core = dev->core;
  439. if (on)
  440. cx_write(MO_GP0_IO, 0x000006f9);
  441. else
  442. cx_write(MO_GP0_IO, 0x000006fB);
  443. }
  444. static struct cx24123_config hauppauge_novas_config = {
  445. .demod_address = 0x55,
  446. .use_isl6421 = 1,
  447. .set_ts_params = cx24123_set_ts_param,
  448. };
  449. static struct cx24123_config kworld_dvbs_100_config = {
  450. .demod_address = 0x15,
  451. .use_isl6421 = 0,
  452. .set_ts_params = cx24123_set_ts_param,
  453. .enable_lnb_voltage = cx24123_enable_lnb_voltage,
  454. };
  455. #endif
  456. static int dvb_register(struct cx8802_dev *dev)
  457. {
  458. /* init struct videobuf_dvb */
  459. dev->dvb.name = dev->core->name;
  460. dev->ts_gen_cntrl = 0x0c;
  461. /* init frontend */
  462. switch (dev->core->board) {
  463. #ifdef HAVE_CX22702
  464. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  465. dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
  466. &dev->core->i2c_adap);
  467. break;
  468. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  469. case CX88_BOARD_CONEXANT_DVB_T1:
  470. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  471. case CX88_BOARD_WINFAST_DTV1000:
  472. dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
  473. &dev->core->i2c_adap);
  474. break;
  475. case CX88_BOARD_HAUPPAUGE_HVR1100:
  476. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  477. dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
  478. &dev->core->i2c_adap);
  479. break;
  480. #endif
  481. #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
  482. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  483. dev->core->pll_addr = 0x60;
  484. dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
  485. #ifdef HAVE_MT352
  486. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  487. &dev->core->i2c_adap);
  488. if (dev->dvb.frontend != NULL)
  489. break;
  490. #endif
  491. #ifdef HAVE_ZL10353
  492. /* ZL10353 replaces MT352 on later cards */
  493. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
  494. &dev->core->i2c_adap);
  495. #endif
  496. break;
  497. #endif /* HAVE_MT352 || HAVE_ZL10353 */
  498. #ifdef HAVE_MT352
  499. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  500. dev->core->pll_addr = 0x61;
  501. dev->core->pll_desc = &dvb_pll_lg_z201;
  502. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  503. &dev->core->i2c_adap);
  504. break;
  505. case CX88_BOARD_KWORLD_DVB_T:
  506. case CX88_BOARD_DNTV_LIVE_DVB_T:
  507. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  508. dev->core->pll_addr = 0x61;
  509. dev->core->pll_desc = &dvb_pll_unknown_1;
  510. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
  511. &dev->core->i2c_adap);
  512. break;
  513. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  514. #ifdef HAVE_VP3054_I2C
  515. dev->core->pll_addr = 0x61;
  516. dev->core->pll_desc = &dvb_pll_fmd1216me;
  517. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
  518. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  519. #else
  520. printk("%s: built without vp3054 support\n", dev->core->name);
  521. #endif
  522. break;
  523. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  524. /* The tin box says DEE1601, but it seems to be DTT7579
  525. * compatible, with a slightly different MT352 AGC gain. */
  526. dev->core->pll_addr = 0x61;
  527. dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
  528. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
  529. &dev->core->i2c_adap);
  530. break;
  531. #endif
  532. #ifdef HAVE_ZL10353
  533. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  534. dev->core->pll_addr = 0x61;
  535. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  536. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
  537. &dev->core->i2c_adap);
  538. break;
  539. #endif
  540. #ifdef HAVE_OR51132
  541. case CX88_BOARD_PCHDTV_HD3000:
  542. dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
  543. &dev->core->i2c_adap);
  544. break;
  545. #endif
  546. #ifdef HAVE_LGDT330X
  547. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  548. dev->ts_gen_cntrl = 0x08;
  549. {
  550. /* Do a hardware reset of chip before using it. */
  551. struct cx88_core *core = dev->core;
  552. cx_clear(MO_GP0_IO, 1);
  553. mdelay(100);
  554. cx_set(MO_GP0_IO, 1);
  555. mdelay(200);
  556. /* Select RF connector callback */
  557. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  558. dev->core->pll_addr = 0x61;
  559. dev->core->pll_desc = &dvb_pll_microtune_4042;
  560. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  561. &dev->core->i2c_adap);
  562. }
  563. break;
  564. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  565. dev->ts_gen_cntrl = 0x08;
  566. {
  567. /* Do a hardware reset of chip before using it. */
  568. struct cx88_core *core = dev->core;
  569. cx_clear(MO_GP0_IO, 1);
  570. mdelay(100);
  571. cx_set(MO_GP0_IO, 9);
  572. mdelay(200);
  573. dev->core->pll_addr = 0x61;
  574. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  575. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  576. &dev->core->i2c_adap);
  577. }
  578. break;
  579. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  580. dev->ts_gen_cntrl = 0x08;
  581. {
  582. /* Do a hardware reset of chip before using it. */
  583. struct cx88_core *core = dev->core;
  584. cx_clear(MO_GP0_IO, 1);
  585. mdelay(100);
  586. cx_set(MO_GP0_IO, 1);
  587. mdelay(200);
  588. dev->core->pll_addr = 0x61;
  589. dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
  590. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
  591. &dev->core->i2c_adap);
  592. }
  593. break;
  594. case CX88_BOARD_PCHDTV_HD5500:
  595. dev->ts_gen_cntrl = 0x08;
  596. {
  597. /* Do a hardware reset of chip before using it. */
  598. struct cx88_core *core = dev->core;
  599. cx_clear(MO_GP0_IO, 1);
  600. mdelay(100);
  601. cx_set(MO_GP0_IO, 1);
  602. mdelay(200);
  603. dev->core->pll_addr = 0x61;
  604. dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
  605. dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
  606. &dev->core->i2c_adap);
  607. }
  608. break;
  609. #endif
  610. #ifdef HAVE_NXT200X
  611. case CX88_BOARD_ATI_HDTVWONDER:
  612. dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
  613. &dev->core->i2c_adap);
  614. break;
  615. #endif
  616. #ifdef HAVE_CX24123
  617. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  618. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  619. dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
  620. &dev->core->i2c_adap);
  621. break;
  622. case CX88_BOARD_KWORLD_DVBS_100:
  623. dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
  624. &dev->core->i2c_adap);
  625. break;
  626. #endif
  627. default:
  628. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  629. dev->core->name);
  630. break;
  631. }
  632. if (NULL == dev->dvb.frontend) {
  633. printk("%s: frontend initialization failed\n",dev->core->name);
  634. return -1;
  635. }
  636. if (dev->core->pll_desc) {
  637. dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
  638. dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
  639. }
  640. /* Put the analog decoder in standby to keep it quiet */
  641. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  642. /* register everything */
  643. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  644. }
  645. /* ----------------------------------------------------------- */
  646. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  647. const struct pci_device_id *pci_id)
  648. {
  649. struct cx8802_dev *dev;
  650. struct cx88_core *core;
  651. int err;
  652. /* general setup */
  653. core = cx88_core_get(pci_dev);
  654. if (NULL == core)
  655. return -EINVAL;
  656. err = -ENODEV;
  657. if (!cx88_boards[core->board].dvb)
  658. goto fail_core;
  659. err = -ENOMEM;
  660. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  661. if (NULL == dev)
  662. goto fail_core;
  663. dev->pci = pci_dev;
  664. dev->core = core;
  665. err = cx8802_init_common(dev);
  666. if (0 != err)
  667. goto fail_free;
  668. #ifdef HAVE_VP3054_I2C
  669. err = vp3054_i2c_probe(dev);
  670. if (0 != err)
  671. goto fail_free;
  672. #endif
  673. /* dvb stuff */
  674. printk("%s/2: cx2388x based dvb card\n", core->name);
  675. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  676. dev->pci, &dev->slock,
  677. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  678. V4L2_FIELD_TOP,
  679. sizeof(struct cx88_buffer),
  680. dev);
  681. err = dvb_register(dev);
  682. if (0 != err)
  683. goto fail_fini;
  684. /* Maintain a reference to cx88-video can query the 8802 device. */
  685. core->dvbdev = dev;
  686. return 0;
  687. fail_fini:
  688. cx8802_fini_common(dev);
  689. fail_free:
  690. kfree(dev);
  691. fail_core:
  692. cx88_core_put(core,pci_dev);
  693. return err;
  694. }
  695. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  696. {
  697. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  698. /* Destroy any 8802 reference. */
  699. dev->core->dvbdev = NULL;
  700. /* dvb */
  701. videobuf_dvb_unregister(&dev->dvb);
  702. #ifdef HAVE_VP3054_I2C
  703. vp3054_i2c_remove(dev);
  704. #endif
  705. /* common */
  706. cx8802_fini_common(dev);
  707. cx88_core_put(dev->core,dev->pci);
  708. kfree(dev);
  709. }
  710. static struct pci_device_id cx8802_pci_tbl[] = {
  711. {
  712. .vendor = 0x14f1,
  713. .device = 0x8802,
  714. .subvendor = PCI_ANY_ID,
  715. .subdevice = PCI_ANY_ID,
  716. },{
  717. /* --- end of list --- */
  718. }
  719. };
  720. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  721. static struct pci_driver dvb_pci_driver = {
  722. .name = "cx88-dvb",
  723. .id_table = cx8802_pci_tbl,
  724. .probe = dvb_probe,
  725. .remove = __devexit_p(dvb_remove),
  726. .suspend = cx8802_suspend_common,
  727. .resume = cx8802_resume_common,
  728. };
  729. static int dvb_init(void)
  730. {
  731. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  732. (CX88_VERSION_CODE >> 16) & 0xff,
  733. (CX88_VERSION_CODE >> 8) & 0xff,
  734. CX88_VERSION_CODE & 0xff);
  735. #ifdef SNAPSHOT
  736. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  737. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  738. #endif
  739. return pci_register_driver(&dvb_pci_driver);
  740. }
  741. static void dvb_fini(void)
  742. {
  743. pci_unregister_driver(&dvb_pci_driver);
  744. }
  745. module_init(dvb_init);
  746. module_exit(dvb_fini);
  747. /*
  748. * Local variables:
  749. * c-basic-offset: 8
  750. * compile-command: "make DVB=1"
  751. * End:
  752. */