cx23885-cards.c 22 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. #include "netup-init.h"
  29. /* ------------------------------------------------------------------ */
  30. /* board config info */
  31. struct cx23885_board cx23885_boards[] = {
  32. [CX23885_BOARD_UNKNOWN] = {
  33. .name = "UNKNOWN/GENERIC",
  34. /* Ensure safe default for unknown boards */
  35. .clk_freq = 0,
  36. .input = {{
  37. .type = CX23885_VMUX_COMPOSITE1,
  38. .vmux = 0,
  39. }, {
  40. .type = CX23885_VMUX_COMPOSITE2,
  41. .vmux = 1,
  42. }, {
  43. .type = CX23885_VMUX_COMPOSITE3,
  44. .vmux = 2,
  45. }, {
  46. .type = CX23885_VMUX_COMPOSITE4,
  47. .vmux = 3,
  48. } },
  49. },
  50. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  51. .name = "Hauppauge WinTV-HVR1800lp",
  52. .portc = CX23885_MPEG_DVB,
  53. .input = {{
  54. .type = CX23885_VMUX_TELEVISION,
  55. .vmux = 0,
  56. .gpio0 = 0xff00,
  57. }, {
  58. .type = CX23885_VMUX_DEBUG,
  59. .vmux = 0,
  60. .gpio0 = 0xff01,
  61. }, {
  62. .type = CX23885_VMUX_COMPOSITE1,
  63. .vmux = 1,
  64. .gpio0 = 0xff02,
  65. }, {
  66. .type = CX23885_VMUX_SVIDEO,
  67. .vmux = 2,
  68. .gpio0 = 0xff02,
  69. } },
  70. },
  71. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  72. .name = "Hauppauge WinTV-HVR1800",
  73. .porta = CX23885_ANALOG_VIDEO,
  74. .portb = CX23885_MPEG_ENCODER,
  75. .portc = CX23885_MPEG_DVB,
  76. .tuner_type = TUNER_PHILIPS_TDA8290,
  77. .tuner_addr = 0x42, /* 0x84 >> 1 */
  78. .input = {{
  79. .type = CX23885_VMUX_TELEVISION,
  80. .vmux = CX25840_VIN7_CH3 |
  81. CX25840_VIN5_CH2 |
  82. CX25840_VIN2_CH1,
  83. .gpio0 = 0,
  84. }, {
  85. .type = CX23885_VMUX_COMPOSITE1,
  86. .vmux = CX25840_VIN7_CH3 |
  87. CX25840_VIN4_CH2 |
  88. CX25840_VIN6_CH1,
  89. .gpio0 = 0,
  90. }, {
  91. .type = CX23885_VMUX_SVIDEO,
  92. .vmux = CX25840_VIN7_CH3 |
  93. CX25840_VIN4_CH2 |
  94. CX25840_VIN8_CH1 |
  95. CX25840_SVIDEO_ON,
  96. .gpio0 = 0,
  97. } },
  98. },
  99. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  100. .name = "Hauppauge WinTV-HVR1250",
  101. .portc = CX23885_MPEG_DVB,
  102. .input = {{
  103. .type = CX23885_VMUX_TELEVISION,
  104. .vmux = 0,
  105. .gpio0 = 0xff00,
  106. }, {
  107. .type = CX23885_VMUX_DEBUG,
  108. .vmux = 0,
  109. .gpio0 = 0xff01,
  110. }, {
  111. .type = CX23885_VMUX_COMPOSITE1,
  112. .vmux = 1,
  113. .gpio0 = 0xff02,
  114. }, {
  115. .type = CX23885_VMUX_SVIDEO,
  116. .vmux = 2,
  117. .gpio0 = 0xff02,
  118. } },
  119. },
  120. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  121. .name = "DViCO FusionHDTV5 Express",
  122. .portb = CX23885_MPEG_DVB,
  123. },
  124. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  125. .name = "Hauppauge WinTV-HVR1500Q",
  126. .portc = CX23885_MPEG_DVB,
  127. },
  128. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  129. .name = "Hauppauge WinTV-HVR1500",
  130. .portc = CX23885_MPEG_DVB,
  131. },
  132. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  133. .name = "Hauppauge WinTV-HVR1200",
  134. .portc = CX23885_MPEG_DVB,
  135. },
  136. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  137. .name = "Hauppauge WinTV-HVR1700",
  138. .portc = CX23885_MPEG_DVB,
  139. },
  140. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  141. .name = "Hauppauge WinTV-HVR1400",
  142. .portc = CX23885_MPEG_DVB,
  143. },
  144. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  145. .name = "DViCO FusionHDTV7 Dual Express",
  146. .portb = CX23885_MPEG_DVB,
  147. .portc = CX23885_MPEG_DVB,
  148. },
  149. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  150. .name = "DViCO FusionHDTV DVB-T Dual Express",
  151. .portb = CX23885_MPEG_DVB,
  152. .portc = CX23885_MPEG_DVB,
  153. },
  154. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  155. .name = "Leadtek Winfast PxDVR3200 H",
  156. .portc = CX23885_MPEG_DVB,
  157. },
  158. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  159. .name = "Compro VideoMate E650F",
  160. .portc = CX23885_MPEG_DVB,
  161. },
  162. [CX23885_BOARD_TBS_6920] = {
  163. .name = "TurboSight TBS 6920",
  164. .portb = CX23885_MPEG_DVB,
  165. },
  166. [CX23885_BOARD_TEVII_S470] = {
  167. .name = "TeVii S470",
  168. .portb = CX23885_MPEG_DVB,
  169. },
  170. [CX23885_BOARD_DVBWORLD_2005] = {
  171. .name = "DVBWorld DVB-S2 2005",
  172. .portb = CX23885_MPEG_DVB,
  173. },
  174. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  175. .cimax = 1,
  176. .name = "NetUP Dual DVB-S2 CI",
  177. .portb = CX23885_MPEG_DVB,
  178. .portc = CX23885_MPEG_DVB,
  179. },
  180. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  181. .name = "Hauppauge WinTV-HVR1270",
  182. .portc = CX23885_MPEG_DVB,
  183. },
  184. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  185. .name = "Hauppauge WinTV-HVR1275",
  186. .portc = CX23885_MPEG_DVB,
  187. },
  188. };
  189. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  190. /* ------------------------------------------------------------------ */
  191. /* PCI subsystem IDs */
  192. struct cx23885_subid cx23885_subids[] = {
  193. {
  194. .subvendor = 0x0070,
  195. .subdevice = 0x3400,
  196. .card = CX23885_BOARD_UNKNOWN,
  197. }, {
  198. .subvendor = 0x0070,
  199. .subdevice = 0x7600,
  200. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  201. }, {
  202. .subvendor = 0x0070,
  203. .subdevice = 0x7800,
  204. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  205. }, {
  206. .subvendor = 0x0070,
  207. .subdevice = 0x7801,
  208. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  209. }, {
  210. .subvendor = 0x0070,
  211. .subdevice = 0x7809,
  212. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  213. }, {
  214. .subvendor = 0x0070,
  215. .subdevice = 0x7911,
  216. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  217. }, {
  218. .subvendor = 0x18ac,
  219. .subdevice = 0xd500,
  220. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  221. }, {
  222. .subvendor = 0x0070,
  223. .subdevice = 0x7790,
  224. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  225. }, {
  226. .subvendor = 0x0070,
  227. .subdevice = 0x7797,
  228. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  229. }, {
  230. .subvendor = 0x0070,
  231. .subdevice = 0x7710,
  232. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  233. }, {
  234. .subvendor = 0x0070,
  235. .subdevice = 0x7717,
  236. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  237. }, {
  238. .subvendor = 0x0070,
  239. .subdevice = 0x71d1,
  240. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  241. }, {
  242. .subvendor = 0x0070,
  243. .subdevice = 0x71d3,
  244. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  245. }, {
  246. .subvendor = 0x0070,
  247. .subdevice = 0x8101,
  248. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  249. }, {
  250. .subvendor = 0x0070,
  251. .subdevice = 0x8010,
  252. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  253. }, {
  254. .subvendor = 0x18ac,
  255. .subdevice = 0xd618,
  256. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  257. }, {
  258. .subvendor = 0x18ac,
  259. .subdevice = 0xdb78,
  260. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  261. }, {
  262. .subvendor = 0x107d,
  263. .subdevice = 0x6681,
  264. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  265. }, {
  266. .subvendor = 0x185b,
  267. .subdevice = 0xe800,
  268. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  269. }, {
  270. .subvendor = 0x6920,
  271. .subdevice = 0x8888,
  272. .card = CX23885_BOARD_TBS_6920,
  273. }, {
  274. .subvendor = 0xd470,
  275. .subdevice = 0x9022,
  276. .card = CX23885_BOARD_TEVII_S470,
  277. }, {
  278. .subvendor = 0x0001,
  279. .subdevice = 0x2005,
  280. .card = CX23885_BOARD_DVBWORLD_2005,
  281. }, {
  282. .subvendor = 0x1b55,
  283. .subdevice = 0x2a2c,
  284. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  285. }, {
  286. .subvendor = 0x0070,
  287. .subdevice = 0x2211,
  288. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  289. }, {
  290. .subvendor = 0x0070,
  291. .subdevice = 0x2215,
  292. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  293. },
  294. };
  295. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  296. void cx23885_card_list(struct cx23885_dev *dev)
  297. {
  298. int i;
  299. if (0 == dev->pci->subsystem_vendor &&
  300. 0 == dev->pci->subsystem_device) {
  301. printk(KERN_INFO
  302. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  303. "%s: be autodetected. Pass card=<n> insmod option\n"
  304. "%s: to workaround that. Redirect complaints to the\n"
  305. "%s: vendor of the TV card. Best regards,\n"
  306. "%s: -- tux\n",
  307. dev->name, dev->name, dev->name, dev->name, dev->name);
  308. } else {
  309. printk(KERN_INFO
  310. "%s: Your board isn't known (yet) to the driver.\n"
  311. "%s: Try to pick one of the existing card configs via\n"
  312. "%s: card=<n> insmod option. Updating to the latest\n"
  313. "%s: version might help as well.\n",
  314. dev->name, dev->name, dev->name, dev->name);
  315. }
  316. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  317. dev->name);
  318. for (i = 0; i < cx23885_bcount; i++)
  319. printk(KERN_INFO "%s: card=%d -> %s\n",
  320. dev->name, i, cx23885_boards[i].name);
  321. }
  322. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  323. {
  324. struct tveeprom tv;
  325. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  326. eeprom_data);
  327. /* Make sure we support the board model */
  328. switch (tv.model) {
  329. case 71009:
  330. /* WinTV-HVR1200 (PCIe, Retail, full height)
  331. * DVB-T and basic analog */
  332. case 71359:
  333. /* WinTV-HVR1200 (PCIe, OEM, half height)
  334. * DVB-T and basic analog */
  335. case 71439:
  336. /* WinTV-HVR1200 (PCIe, OEM, half height)
  337. * DVB-T and basic analog */
  338. case 71449:
  339. /* WinTV-HVR1200 (PCIe, OEM, full height)
  340. * DVB-T and basic analog */
  341. case 71939:
  342. /* WinTV-HVR1200 (PCIe, OEM, half height)
  343. * DVB-T and basic analog */
  344. case 71949:
  345. /* WinTV-HVR1200 (PCIe, OEM, full height)
  346. * DVB-T and basic analog */
  347. case 71959:
  348. /* WinTV-HVR1200 (PCIe, OEM, full height)
  349. * DVB-T and basic analog */
  350. case 71979:
  351. /* WinTV-HVR1200 (PCIe, OEM, half height)
  352. * DVB-T and basic analog */
  353. case 71999:
  354. /* WinTV-HVR1200 (PCIe, OEM, full height)
  355. * DVB-T and basic analog */
  356. case 76601:
  357. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  358. channel ATSC and MPEG2 HW Encoder */
  359. case 77001:
  360. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  361. and Basic analog */
  362. case 77011:
  363. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  364. and Basic analog */
  365. case 77041:
  366. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  367. and Basic analog */
  368. case 77051:
  369. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  370. and Basic analog */
  371. case 78011:
  372. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  373. Dual channel ATSC and MPEG2 HW Encoder */
  374. case 78501:
  375. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  376. Dual channel ATSC and MPEG2 HW Encoder */
  377. case 78521:
  378. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  379. Dual channel ATSC and MPEG2 HW Encoder */
  380. case 78531:
  381. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  382. Dual channel ATSC and MPEG2 HW Encoder */
  383. case 78631:
  384. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  385. Dual channel ATSC and MPEG2 HW Encoder */
  386. case 79001:
  387. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  388. ATSC and Basic analog */
  389. case 79101:
  390. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  391. ATSC and Basic analog */
  392. case 79561:
  393. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  394. ATSC and Basic analog */
  395. case 79571:
  396. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  397. ATSC and Basic analog */
  398. case 79671:
  399. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  400. ATSC and Basic analog */
  401. case 80019:
  402. /* WinTV-HVR1400 (Express Card, Retail, IR,
  403. * DVB-T and Basic analog */
  404. case 81509:
  405. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  406. * DVB-T and MPEG2 HW Encoder */
  407. case 81519:
  408. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  409. * DVB-T and MPEG2 HW Encoder */
  410. break;
  411. default:
  412. printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
  413. dev->name, tv.model);
  414. break;
  415. }
  416. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  417. dev->name, tv.model);
  418. }
  419. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  420. {
  421. struct cx23885_tsport *port = priv;
  422. struct cx23885_dev *dev = port->dev;
  423. u32 bitmask = 0;
  424. if (command == XC2028_RESET_CLK)
  425. return 0;
  426. if (command != 0) {
  427. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  428. __func__, command);
  429. return -EINVAL;
  430. }
  431. switch (dev->board) {
  432. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  433. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  434. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  435. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  436. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  437. /* Tuner Reset Command */
  438. bitmask = 0x04;
  439. break;
  440. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  441. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  442. /* Two identical tuners on two different i2c buses,
  443. * we need to reset the correct gpio. */
  444. if (port->nr == 1)
  445. bitmask = 0x01;
  446. else if (port->nr == 2)
  447. bitmask = 0x04;
  448. break;
  449. }
  450. if (bitmask) {
  451. /* Drive the tuner into reset and back out */
  452. cx_clear(GP0_IO, bitmask);
  453. mdelay(200);
  454. cx_set(GP0_IO, bitmask);
  455. }
  456. return 0;
  457. }
  458. void cx23885_gpio_setup(struct cx23885_dev *dev)
  459. {
  460. switch (dev->board) {
  461. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  462. /* GPIO-0 cx24227 demodulator reset */
  463. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  464. break;
  465. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  466. /* GPIO-0 cx24227 demodulator */
  467. /* GPIO-2 xc3028 tuner */
  468. /* Put the parts into reset */
  469. cx_set(GP0_IO, 0x00050000);
  470. cx_clear(GP0_IO, 0x00000005);
  471. msleep(5);
  472. /* Bring the parts out of reset */
  473. cx_set(GP0_IO, 0x00050005);
  474. break;
  475. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  476. /* GPIO-0 cx24227 demodulator reset */
  477. /* GPIO-2 xc5000 tuner reset */
  478. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  479. break;
  480. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  481. /* GPIO-0 656_CLK */
  482. /* GPIO-1 656_D0 */
  483. /* GPIO-2 8295A Reset */
  484. /* GPIO-3-10 cx23417 data0-7 */
  485. /* GPIO-11-14 cx23417 addr0-3 */
  486. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  487. /* GPIO-19 IR_RX */
  488. /* CX23417 GPIO's */
  489. /* EIO15 Zilog Reset */
  490. /* EIO14 S5H1409/CX24227 Reset */
  491. /* Force the TDA8295A into reset and back */
  492. cx_set(GP0_IO, 0x00040004);
  493. mdelay(20);
  494. cx_clear(GP0_IO, 0x00000004);
  495. mdelay(20);
  496. cx_set(GP0_IO, 0x00040004);
  497. mdelay(20);
  498. break;
  499. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  500. /* GPIO-0 tda10048 demodulator reset */
  501. /* GPIO-2 tda18271 tuner reset */
  502. /* Put the parts into reset and back */
  503. cx_set(GP0_IO, 0x00050000);
  504. mdelay(20);
  505. cx_clear(GP0_IO, 0x00000005);
  506. mdelay(20);
  507. cx_set(GP0_IO, 0x00050005);
  508. break;
  509. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  510. /* GPIO-0 TDA10048 demodulator reset */
  511. /* GPIO-2 TDA8295A Reset */
  512. /* GPIO-3-10 cx23417 data0-7 */
  513. /* GPIO-11-14 cx23417 addr0-3 */
  514. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  515. /* The following GPIO's are on the interna AVCore (cx25840) */
  516. /* GPIO-19 IR_RX */
  517. /* GPIO-20 IR_TX 416/DVBT Select */
  518. /* GPIO-21 IIS DAT */
  519. /* GPIO-22 IIS WCLK */
  520. /* GPIO-23 IIS BCLK */
  521. /* Put the parts into reset and back */
  522. cx_set(GP0_IO, 0x00050000);
  523. mdelay(20);
  524. cx_clear(GP0_IO, 0x00000005);
  525. mdelay(20);
  526. cx_set(GP0_IO, 0x00050005);
  527. break;
  528. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  529. /* GPIO-0 Dibcom7000p demodulator reset */
  530. /* GPIO-2 xc3028L tuner reset */
  531. /* GPIO-13 LED */
  532. /* Put the parts into reset and back */
  533. cx_set(GP0_IO, 0x00050000);
  534. mdelay(20);
  535. cx_clear(GP0_IO, 0x00000005);
  536. mdelay(20);
  537. cx_set(GP0_IO, 0x00050005);
  538. break;
  539. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  540. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  541. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  542. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  543. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  544. /* Put the parts into reset and back */
  545. cx_set(GP0_IO, 0x000f0000);
  546. mdelay(20);
  547. cx_clear(GP0_IO, 0x0000000f);
  548. mdelay(20);
  549. cx_set(GP0_IO, 0x000f000f);
  550. break;
  551. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  552. /* GPIO-0 portb xc3028 reset */
  553. /* GPIO-1 portb zl10353 reset */
  554. /* GPIO-2 portc xc3028 reset */
  555. /* GPIO-3 portc zl10353 reset */
  556. /* Put the parts into reset and back */
  557. cx_set(GP0_IO, 0x000f0000);
  558. mdelay(20);
  559. cx_clear(GP0_IO, 0x0000000f);
  560. mdelay(20);
  561. cx_set(GP0_IO, 0x000f000f);
  562. break;
  563. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  564. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  565. /* GPIO-2 xc3028 tuner reset */
  566. /* The following GPIO's are on the internal AVCore (cx25840) */
  567. /* GPIO-? zl10353 demod reset */
  568. /* Put the parts into reset and back */
  569. cx_set(GP0_IO, 0x00040000);
  570. mdelay(20);
  571. cx_clear(GP0_IO, 0x00000004);
  572. mdelay(20);
  573. cx_set(GP0_IO, 0x00040004);
  574. break;
  575. case CX23885_BOARD_TBS_6920:
  576. case CX23885_BOARD_TEVII_S470:
  577. cx_write(MC417_CTL, 0x00000036);
  578. cx_write(MC417_OEN, 0x00001000);
  579. cx_write(MC417_RWD, 0x00001800);
  580. break;
  581. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  582. /* GPIO-0 INTA from CiMax1
  583. GPIO-1 INTB from CiMax2
  584. GPIO-2 reset chips
  585. GPIO-3 to GPIO-10 data/addr for CA
  586. GPIO-11 ~CS0 to CiMax1
  587. GPIO-12 ~CS1 to CiMax2
  588. GPIO-13 ADL0 load LSB addr
  589. GPIO-14 ADL1 load MSB addr
  590. GPIO-15 ~RDY from CiMax
  591. GPIO-17 ~RD to CiMax
  592. GPIO-18 ~WR to CiMax
  593. */
  594. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  595. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  596. cx_clear(GP0_IO, 0x00030004);
  597. mdelay(100);/* reset delay */
  598. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  599. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  600. /* GPIO-15 IN as ~ACK, rest as OUT */
  601. cx_write(MC417_OEN, 0x00001000);
  602. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  603. cx_write(MC417_RWD, 0x0000c300);
  604. /* enable irq */
  605. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  606. break;
  607. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  608. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  609. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  610. /* GPIO-6 I2C Gate which can isolate the 3305 from the bus */
  611. /* GPIO-9 LG3305 reset */
  612. /* Put the parts into reset and back */
  613. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  614. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  615. cx23885_gpio_clear(dev, GPIO_9);
  616. mdelay(20);
  617. cx23885_gpio_set(dev, GPIO_9);
  618. break;
  619. }
  620. }
  621. int cx23885_ir_init(struct cx23885_dev *dev)
  622. {
  623. switch (dev->board) {
  624. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  625. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  626. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  627. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  628. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  629. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  630. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  631. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  632. /* FIXME: Implement me */
  633. break;
  634. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  635. request_module("ir-kbd-i2c");
  636. break;
  637. }
  638. return 0;
  639. }
  640. void cx23885_card_setup(struct cx23885_dev *dev)
  641. {
  642. struct cx23885_tsport *ts1 = &dev->ts1;
  643. struct cx23885_tsport *ts2 = &dev->ts2;
  644. static u8 eeprom[256];
  645. if (dev->i2c_bus[0].i2c_rc == 0) {
  646. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  647. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  648. eeprom, sizeof(eeprom));
  649. }
  650. switch (dev->board) {
  651. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  652. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  653. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  654. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  655. if (dev->i2c_bus[0].i2c_rc == 0)
  656. hauppauge_eeprom(dev, eeprom+0x80);
  657. break;
  658. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  659. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  660. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  661. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  662. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  663. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  664. if (dev->i2c_bus[0].i2c_rc == 0)
  665. hauppauge_eeprom(dev, eeprom+0xc0);
  666. break;
  667. }
  668. switch (dev->board) {
  669. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  670. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  671. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  672. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  673. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  674. /* break omitted intentionally */
  675. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  676. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  677. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  678. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  679. break;
  680. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  681. /* Defaults for VID B - Analog encoder */
  682. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  683. ts1->gen_ctrl_val = 0x10e;
  684. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  685. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  686. /* APB_TSVALERR_POL (active low)*/
  687. ts1->vld_misc_val = 0x2000;
  688. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  689. /* Defaults for VID C */
  690. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  691. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  692. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  693. break;
  694. case CX23885_BOARD_TEVII_S470:
  695. case CX23885_BOARD_TBS_6920:
  696. case CX23885_BOARD_DVBWORLD_2005:
  697. ts1->gen_ctrl_val = 0x5; /* Parallel */
  698. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  699. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  700. break;
  701. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  702. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  703. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  704. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  705. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  706. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  707. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  708. break;
  709. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  710. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  711. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  712. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  713. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  714. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  715. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  716. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  717. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  718. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  719. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  720. default:
  721. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  722. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  723. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  724. }
  725. /* Certain boards support analog, or require the avcore to be
  726. * loaded, ensure this happens.
  727. */
  728. switch (dev->board) {
  729. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  730. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  731. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  732. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  733. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  734. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  735. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  736. &dev->i2c_bus[2].i2c_adap,
  737. "cx25840", "cx25840", 0x88 >> 1);
  738. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  739. break;
  740. }
  741. /* AUX-PLL 27MHz CLK */
  742. switch (dev->board) {
  743. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  744. netup_initialize(dev);
  745. break;
  746. }
  747. }
  748. /* ------------------------------------------------------------------ */