qd65xx.c 12 KB

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  1. /*
  2. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  3. */
  4. /*
  5. * Version 0.03 Cleaned auto-tune, added probe
  6. * Version 0.04 Added second channel tuning
  7. * Version 0.05 Enhanced tuning ; added qd6500 support
  8. * Version 0.06 Added dos driver's list
  9. * Version 0.07 Second channel bug fix
  10. *
  11. * QDI QD6500/QD6580 EIDE controller fast support
  12. *
  13. * Please set local bus speed using kernel parameter idebus
  14. * for example, "idebus=33" stands for 33Mhz VLbus
  15. * To activate controller support, use "ide0=qd65xx"
  16. * To enable tuning, use "hda=autotune hdb=autotune"
  17. * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
  18. */
  19. /*
  20. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  21. * Samuel Thibault <samuel.thibault@fnac.net>
  22. */
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/kernel.h>
  26. #include <linux/delay.h>
  27. #include <linux/timer.h>
  28. #include <linux/mm.h>
  29. #include <linux/ioport.h>
  30. #include <linux/blkdev.h>
  31. #include <linux/hdreg.h>
  32. #include <linux/ide.h>
  33. #include <linux/init.h>
  34. #include <asm/system.h>
  35. #include <asm/io.h>
  36. #include "qd65xx.h"
  37. /*
  38. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  39. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  40. * -- qd6500 is a single IDE interface
  41. * -- qd6580 is a dual IDE interface
  42. *
  43. * More research on qd6580 being done by willmore@cig.mot.com (David)
  44. * More Information given by Petr Soucek (petr@ryston.cz)
  45. * http://www.ryston.cz/petr/vlb
  46. */
  47. /*
  48. * base: Timer1
  49. *
  50. *
  51. * base+0x01: Config (R/O)
  52. *
  53. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  54. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  55. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  56. * bit 3: qd6500: 1 = disabled, 0 = enabled
  57. * qd6580: 1
  58. * upper nibble:
  59. * qd6500: 1100
  60. * qd6580: either 1010 or 0101
  61. *
  62. *
  63. * base+0x02: Timer2 (qd6580 only)
  64. *
  65. *
  66. * base+0x03: Control (qd6580 only)
  67. *
  68. * bits 0-3 must always be set 1
  69. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  70. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  71. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  72. * channel 1 for hdc & hdd
  73. * bit 1 : 1 = only disks on primary port
  74. * 0 = disks & ATAPI devices on primary port
  75. * bit 2-4 : always 0
  76. * bit 5 : status, but of what ?
  77. * bit 6 : always set 1 by dos driver
  78. * bit 7 : set 1 for non-ATAPI devices on primary port
  79. * (maybe read-ahead and post-write buffer ?)
  80. */
  81. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  82. /*
  83. * qd65xx_select:
  84. *
  85. * This routine is invoked to prepare for access to a given drive.
  86. */
  87. static void qd65xx_select(ide_drive_t *drive)
  88. {
  89. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  90. (QD_TIMREG(drive) & 0x02);
  91. if (timings[index] != QD_TIMING(drive))
  92. outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  93. }
  94. /*
  95. * qd6500_compute_timing
  96. *
  97. * computes the timing value where
  98. * lower nibble represents active time, in count of VLB clocks
  99. * upper nibble represents recovery time, in count of VLB clocks
  100. */
  101. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  102. {
  103. u8 active_cycle,recovery_cycle;
  104. if (system_bus_clock()<=33) {
  105. active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
  106. recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
  107. } else {
  108. active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
  109. recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
  110. }
  111. return((recovery_cycle<<4) | 0x08 | active_cycle);
  112. }
  113. /*
  114. * qd6580_compute_timing
  115. *
  116. * idem for qd6580
  117. */
  118. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  119. {
  120. u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
  121. u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
  122. return((recovery_cycle<<4) | active_cycle);
  123. }
  124. /*
  125. * qd_find_disk_type
  126. *
  127. * tries to find timing from dos driver's table
  128. */
  129. static int qd_find_disk_type (ide_drive_t *drive,
  130. int *active_time, int *recovery_time)
  131. {
  132. struct qd65xx_timing_s *p;
  133. char model[40];
  134. if (!*drive->id->model) return 0;
  135. strncpy(model,drive->id->model,40);
  136. ide_fixstring(model,40,1); /* byte-swap */
  137. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  138. if (!strncmp(p->model, model+p->offset, 4)) {
  139. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  140. *active_time = p->active;
  141. *recovery_time = p->recovery;
  142. return 1;
  143. }
  144. }
  145. return 0;
  146. }
  147. /*
  148. * qd_set_timing:
  149. *
  150. * records the timing
  151. */
  152. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  153. {
  154. drive->drive_data &= 0xff00;
  155. drive->drive_data |= timing;
  156. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  157. }
  158. static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
  159. {
  160. int active_time = 175;
  161. int recovery_time = 415; /* worst case values from the dos driver */
  162. /*
  163. * FIXME: use "pio" value
  164. */
  165. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  166. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  167. && drive->id->eide_pio >= 240) {
  168. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  169. drive->id->tPIO);
  170. active_time = 110;
  171. recovery_time = drive->id->eide_pio - 120;
  172. }
  173. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  174. }
  175. static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
  176. {
  177. int base = HWIF(drive)->select_data;
  178. unsigned int cycle_time;
  179. int active_time = 175;
  180. int recovery_time = 415; /* worst case values from the dos driver */
  181. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  182. cycle_time = ide_pio_cycle_time(drive, pio);
  183. switch (pio) {
  184. case 0: break;
  185. case 3:
  186. if (cycle_time >= 110) {
  187. active_time = 86;
  188. recovery_time = cycle_time - 102;
  189. } else
  190. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  191. break;
  192. case 4:
  193. if (cycle_time >= 69) {
  194. active_time = 70;
  195. recovery_time = cycle_time - 61;
  196. } else
  197. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  198. break;
  199. default:
  200. if (cycle_time >= 180) {
  201. active_time = 110;
  202. recovery_time = cycle_time - 120;
  203. } else {
  204. active_time = ide_pio_timings[pio].active_time;
  205. recovery_time = cycle_time - active_time;
  206. }
  207. }
  208. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  209. }
  210. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  211. outb(0x5f, QD_CONTROL_PORT);
  212. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  213. "and post-write buffer on %s.\n",
  214. drive->name, HWIF(drive)->name);
  215. }
  216. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  217. }
  218. /*
  219. * qd_testreg
  220. *
  221. * tests if the given port is a register
  222. */
  223. static int __init qd_testreg(int port)
  224. {
  225. unsigned long flags;
  226. u8 savereg, readreg;
  227. local_irq_save(flags);
  228. savereg = inb_p(port);
  229. outb_p(QD_TESTVAL, port); /* safe value */
  230. readreg = inb_p(port);
  231. outb(savereg, port);
  232. local_irq_restore(flags);
  233. if (savereg == QD_TESTVAL) {
  234. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  235. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  236. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  237. return 1;
  238. }
  239. return (readreg != QD_TESTVAL);
  240. }
  241. /*
  242. * qd_setup:
  243. *
  244. * called to setup an ata channel : adjusts attributes & links for tuning
  245. */
  246. static void __init qd_setup(ide_hwif_t *hwif, int base, int config)
  247. {
  248. hwif->select_data = base;
  249. hwif->config_data = config;
  250. }
  251. static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
  252. {
  253. u8 base = hwif->select_data, config = QD_CONFIG(hwif);
  254. hwif->drives[0].drive_data = QD6500_DEF_DATA;
  255. hwif->drives[1].drive_data = QD6500_DEF_DATA;
  256. }
  257. static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
  258. {
  259. u16 t1, t2;
  260. u8 base = hwif->select_data, config = QD_CONFIG(hwif);
  261. if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
  262. t1 = QD6580_DEF_DATA;
  263. t2 = QD6580_DEF_DATA2;
  264. } else
  265. t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
  266. hwif->drives[0].drive_data = t1;
  267. hwif->drives[1].drive_data = t2;
  268. }
  269. static const struct ide_port_info qd65xx_port_info __initdata = {
  270. .chipset = ide_qd65xx,
  271. .host_flags = IDE_HFLAG_IO_32BIT |
  272. IDE_HFLAG_NO_DMA |
  273. IDE_HFLAG_NO_AUTOTUNE,
  274. .pio_mask = ATA_PIO4,
  275. };
  276. /*
  277. * qd_probe:
  278. *
  279. * looks at the specified baseport, and if qd found, registers & initialises it
  280. * return 1 if another qd may be probed
  281. */
  282. static int __init qd_probe(int base)
  283. {
  284. ide_hwif_t *hwif;
  285. u8 config, unit;
  286. u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
  287. hw_regs_t hw[2];
  288. struct ide_port_info d = qd65xx_port_info;
  289. config = inb(QD_CONFIG_PORT);
  290. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  291. return -ENODEV;
  292. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  293. if (unit)
  294. d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
  295. memset(&hw, 0, sizeof(hw));
  296. ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
  297. hw[0].irq = 14;
  298. ide_std_init_ports(&hw[1], 0x170, 0x376);
  299. hw[1].irq = 15;
  300. if ((config & 0xf0) == QD_CONFIG_QD6500) {
  301. if (qd_testreg(base))
  302. return -ENODEV; /* bad register */
  303. /* qd6500 found */
  304. if (config & QD_CONFIG_DISABLED) {
  305. printk(KERN_WARNING "qd6500 is disabled !\n");
  306. return -ENODEV;
  307. }
  308. printk(KERN_NOTICE "qd6500 at %#x\n", base);
  309. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  310. config, QD_ID3);
  311. hwif = ide_find_port_slot(&d);
  312. if (hwif == NULL)
  313. return -ENOENT;
  314. ide_init_port_hw(hwif, &hw[unit]);
  315. qd_setup(hwif, base, config);
  316. hwif->port_init_devs = qd6500_port_init_devs;
  317. hwif->set_pio_mode = qd6500_set_pio_mode;
  318. hwif->selectproc = qd65xx_select;
  319. idx[unit] = hwif->index;
  320. ide_device_add(idx, &d);
  321. return 1;
  322. }
  323. if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
  324. ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
  325. u8 control;
  326. if (qd_testreg(base) || qd_testreg(base + 0x02))
  327. return -ENODEV; /* bad registers */
  328. /* qd6580 found */
  329. control = inb(QD_CONTROL_PORT);
  330. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  331. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  332. config, control, QD_ID3);
  333. outb(QD_DEF_CONTR, QD_CONTROL_PORT);
  334. if (control & QD_CONTR_SEC_DISABLED) {
  335. /* secondary disabled */
  336. printk(KERN_INFO "qd6580: single IDE board\n");
  337. hwif = ide_find_port_slot(&d);
  338. if (hwif == NULL)
  339. return -ENOENT;
  340. ide_init_port_hw(hwif, &hw[unit]);
  341. qd_setup(hwif, base, config | (control << 8));
  342. hwif->port_init_devs = qd6580_port_init_devs;
  343. hwif->set_pio_mode = qd6580_set_pio_mode;
  344. hwif->selectproc = qd65xx_select;
  345. idx[unit] = hwif->index;
  346. ide_device_add(idx, &d);
  347. return 1;
  348. } else {
  349. ide_hwif_t *mate;
  350. /* secondary enabled */
  351. printk(KERN_INFO "qd6580: dual IDE board\n");
  352. hwif = ide_find_port();
  353. if (hwif) {
  354. ide_init_port_hw(hwif, &hw[0]);
  355. qd_setup(hwif, base, config | (control << 8));
  356. hwif->port_init_devs = qd6580_port_init_devs;
  357. hwif->set_pio_mode = qd6580_set_pio_mode;
  358. hwif->selectproc = qd65xx_select;
  359. idx[0] = hwif->index;
  360. }
  361. mate = ide_find_port();
  362. if (mate) {
  363. ide_init_port_hw(mate, &hw[1]);
  364. qd_setup(mate, base, config | (control << 8));
  365. mate->port_init_devs = qd6580_port_init_devs;
  366. mate->set_pio_mode = qd6580_set_pio_mode;
  367. mate->selectproc = qd65xx_select;
  368. idx[1] = mate->index;
  369. }
  370. ide_device_add(idx, &qd65xx_port_info);
  371. return 0; /* no other qd65xx possible */
  372. }
  373. }
  374. /* no qd65xx found */
  375. return -ENODEV;
  376. }
  377. int probe_qd65xx = 0;
  378. module_param_named(probe, probe_qd65xx, bool, 0);
  379. MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
  380. static int __init qd65xx_init(void)
  381. {
  382. int rc1, rc2 = -ENODEV;
  383. if (probe_qd65xx == 0)
  384. return -ENODEV;
  385. rc1 = qd_probe(0x30);
  386. if (rc1)
  387. rc2 = qd_probe(0xb0);
  388. if (rc1 < 0 && rc2 < 0)
  389. return -ENODEV;
  390. return 0;
  391. }
  392. module_init(qd65xx_init);
  393. MODULE_AUTHOR("Samuel Thibault");
  394. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  395. MODULE_LICENSE("GPL");