host.c 16 KB

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  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. *
  33. * * Redistributions of source code must retain the above copyright
  34. * notice, this list of conditions and the following disclaimer.
  35. * * Redistributions in binary form must reproduce the above copyright
  36. * notice, this list of conditions and the following disclaimer in
  37. * the documentation and/or other materials provided with the
  38. * distribution.
  39. * * Neither the name of Intel Corporation nor the names of its
  40. * contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #include "isci.h"
  56. #include "scic_io_request.h"
  57. #include "scic_remote_device.h"
  58. #include "scic_port.h"
  59. #include "port.h"
  60. #include "request.h"
  61. #include "host.h"
  62. #include "probe_roms.h"
  63. irqreturn_t isci_msix_isr(int vec, void *data)
  64. {
  65. struct isci_host *ihost = data;
  66. struct scic_sds_controller *scic = ihost->core_controller;
  67. if (scic_sds_controller_isr(scic))
  68. tasklet_schedule(&ihost->completion_tasklet);
  69. return IRQ_HANDLED;
  70. }
  71. irqreturn_t isci_intx_isr(int vec, void *data)
  72. {
  73. struct pci_dev *pdev = data;
  74. struct isci_host *ihost;
  75. irqreturn_t ret = IRQ_NONE;
  76. int i;
  77. for_each_isci_host(i, ihost, pdev) {
  78. struct scic_sds_controller *scic = ihost->core_controller;
  79. if (scic_sds_controller_isr(scic)) {
  80. tasklet_schedule(&ihost->completion_tasklet);
  81. ret = IRQ_HANDLED;
  82. } else if (scic_sds_controller_error_isr(scic)) {
  83. spin_lock(&ihost->scic_lock);
  84. scic_sds_controller_error_handler(scic);
  85. spin_unlock(&ihost->scic_lock);
  86. ret = IRQ_HANDLED;
  87. }
  88. }
  89. return ret;
  90. }
  91. irqreturn_t isci_error_isr(int vec, void *data)
  92. {
  93. struct isci_host *ihost = data;
  94. struct scic_sds_controller *scic = ihost->core_controller;
  95. if (scic_sds_controller_error_isr(scic))
  96. scic_sds_controller_error_handler(scic);
  97. return IRQ_HANDLED;
  98. }
  99. /**
  100. * isci_host_start_complete() - This function is called by the core library,
  101. * through the ISCI Module, to indicate controller start status.
  102. * @isci_host: This parameter specifies the ISCI host object
  103. * @completion_status: This parameter specifies the completion status from the
  104. * core library.
  105. *
  106. */
  107. void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status)
  108. {
  109. if (completion_status != SCI_SUCCESS)
  110. dev_info(&ihost->pdev->dev,
  111. "controller start timed out, continuing...\n");
  112. isci_host_change_state(ihost, isci_ready);
  113. clear_bit(IHOST_START_PENDING, &ihost->flags);
  114. wake_up(&ihost->eventq);
  115. }
  116. int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)
  117. {
  118. struct isci_host *ihost = isci_host_from_sas_ha(SHOST_TO_SAS_HA(shost));
  119. if (test_bit(IHOST_START_PENDING, &ihost->flags))
  120. return 0;
  121. /* todo: use sas_flush_discovery once it is upstream */
  122. scsi_flush_work(shost);
  123. scsi_flush_work(shost);
  124. dev_dbg(&ihost->pdev->dev,
  125. "%s: ihost->status = %d, time = %ld\n",
  126. __func__, isci_host_get_state(ihost), time);
  127. return 1;
  128. }
  129. void isci_host_scan_start(struct Scsi_Host *shost)
  130. {
  131. struct isci_host *ihost = isci_host_from_sas_ha(SHOST_TO_SAS_HA(shost));
  132. struct scic_sds_controller *scic = ihost->core_controller;
  133. unsigned long tmo = scic_controller_get_suggested_start_timeout(scic);
  134. set_bit(IHOST_START_PENDING, &ihost->flags);
  135. spin_lock_irq(&ihost->scic_lock);
  136. scic_controller_start(scic, tmo);
  137. scic_controller_enable_interrupts(scic);
  138. spin_unlock_irq(&ihost->scic_lock);
  139. }
  140. void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)
  141. {
  142. isci_host_change_state(ihost, isci_stopped);
  143. scic_controller_disable_interrupts(ihost->core_controller);
  144. clear_bit(IHOST_STOP_PENDING, &ihost->flags);
  145. wake_up(&ihost->eventq);
  146. }
  147. static struct coherent_memory_info *isci_host_alloc_mdl_struct(
  148. struct isci_host *isci_host,
  149. u32 size)
  150. {
  151. struct coherent_memory_info *mdl_struct;
  152. void *uncached_address = NULL;
  153. mdl_struct = devm_kzalloc(&isci_host->pdev->dev,
  154. sizeof(*mdl_struct),
  155. GFP_KERNEL);
  156. if (!mdl_struct)
  157. return NULL;
  158. INIT_LIST_HEAD(&mdl_struct->node);
  159. uncached_address = dmam_alloc_coherent(&isci_host->pdev->dev,
  160. size,
  161. &mdl_struct->dma_handle,
  162. GFP_KERNEL);
  163. if (!uncached_address)
  164. return NULL;
  165. /* memset the whole memory area. */
  166. memset((char *)uncached_address, 0, size);
  167. mdl_struct->vaddr = uncached_address;
  168. mdl_struct->size = (size_t)size;
  169. return mdl_struct;
  170. }
  171. static void isci_host_build_mde(
  172. struct sci_physical_memory_descriptor *mde_struct,
  173. struct coherent_memory_info *mdl_struct)
  174. {
  175. unsigned long address = 0;
  176. dma_addr_t dma_addr = 0;
  177. address = (unsigned long)mdl_struct->vaddr;
  178. dma_addr = mdl_struct->dma_handle;
  179. /* to satisfy the alignment. */
  180. if ((address % mde_struct->constant_memory_alignment) != 0) {
  181. int align_offset
  182. = (mde_struct->constant_memory_alignment
  183. - (address % mde_struct->constant_memory_alignment));
  184. address += align_offset;
  185. dma_addr += align_offset;
  186. }
  187. mde_struct->virtual_address = (void *)address;
  188. mde_struct->physical_address = dma_addr;
  189. mdl_struct->mde = mde_struct;
  190. }
  191. static int isci_host_mdl_allocate_coherent(
  192. struct isci_host *isci_host)
  193. {
  194. struct sci_physical_memory_descriptor *current_mde;
  195. struct coherent_memory_info *mdl_struct;
  196. u32 size = 0;
  197. struct sci_base_memory_descriptor_list *mdl_handle
  198. = sci_controller_get_memory_descriptor_list_handle(
  199. isci_host->core_controller);
  200. sci_mdl_first_entry(mdl_handle);
  201. current_mde = sci_mdl_get_current_entry(mdl_handle);
  202. while (current_mde != NULL) {
  203. size = (current_mde->constant_memory_size
  204. + current_mde->constant_memory_alignment);
  205. mdl_struct = isci_host_alloc_mdl_struct(isci_host, size);
  206. if (!mdl_struct)
  207. return -ENOMEM;
  208. list_add_tail(&mdl_struct->node, &isci_host->mdl_struct_list);
  209. isci_host_build_mde(current_mde, mdl_struct);
  210. sci_mdl_next_entry(mdl_handle);
  211. current_mde = sci_mdl_get_current_entry(mdl_handle);
  212. }
  213. return 0;
  214. }
  215. /**
  216. * isci_host_completion_routine() - This function is the delayed service
  217. * routine that calls the sci core library's completion handler. It's
  218. * scheduled as a tasklet from the interrupt service routine when interrupts
  219. * in use, or set as the timeout function in polled mode.
  220. * @data: This parameter specifies the ISCI host object
  221. *
  222. */
  223. static void isci_host_completion_routine(unsigned long data)
  224. {
  225. struct isci_host *isci_host = (struct isci_host *)data;
  226. struct list_head completed_request_list;
  227. struct list_head errored_request_list;
  228. struct list_head *current_position;
  229. struct list_head *next_position;
  230. struct isci_request *request;
  231. struct isci_request *next_request;
  232. struct sas_task *task;
  233. INIT_LIST_HEAD(&completed_request_list);
  234. INIT_LIST_HEAD(&errored_request_list);
  235. spin_lock_irq(&isci_host->scic_lock);
  236. scic_sds_controller_completion_handler(isci_host->core_controller);
  237. /* Take the lists of completed I/Os from the host. */
  238. list_splice_init(&isci_host->requests_to_complete,
  239. &completed_request_list);
  240. /* Take the list of errored I/Os from the host. */
  241. list_splice_init(&isci_host->requests_to_errorback,
  242. &errored_request_list);
  243. spin_unlock_irq(&isci_host->scic_lock);
  244. /* Process any completions in the lists. */
  245. list_for_each_safe(current_position, next_position,
  246. &completed_request_list) {
  247. request = list_entry(current_position, struct isci_request,
  248. completed_node);
  249. task = isci_request_access_task(request);
  250. /* Normal notification (task_done) */
  251. dev_dbg(&isci_host->pdev->dev,
  252. "%s: Normal - request/task = %p/%p\n",
  253. __func__,
  254. request,
  255. task);
  256. /* Return the task to libsas */
  257. if (task != NULL) {
  258. task->lldd_task = NULL;
  259. if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
  260. /* If the task is already in the abort path,
  261. * the task_done callback cannot be called.
  262. */
  263. task->task_done(task);
  264. }
  265. }
  266. /* Free the request object. */
  267. isci_request_free(isci_host, request);
  268. }
  269. list_for_each_entry_safe(request, next_request, &errored_request_list,
  270. completed_node) {
  271. task = isci_request_access_task(request);
  272. /* Use sas_task_abort */
  273. dev_warn(&isci_host->pdev->dev,
  274. "%s: Error - request/task = %p/%p\n",
  275. __func__,
  276. request,
  277. task);
  278. if (task != NULL) {
  279. /* Put the task into the abort path if it's not there
  280. * already.
  281. */
  282. if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED))
  283. sas_task_abort(task);
  284. } else {
  285. /* This is a case where the request has completed with a
  286. * status such that it needed further target servicing,
  287. * but the sas_task reference has already been removed
  288. * from the request. Since it was errored, it was not
  289. * being aborted, so there is nothing to do except free
  290. * it.
  291. */
  292. spin_lock_irq(&isci_host->scic_lock);
  293. /* Remove the request from the remote device's list
  294. * of pending requests.
  295. */
  296. list_del_init(&request->dev_node);
  297. spin_unlock_irq(&isci_host->scic_lock);
  298. /* Free the request object. */
  299. isci_request_free(isci_host, request);
  300. }
  301. }
  302. }
  303. void isci_host_deinit(struct isci_host *ihost)
  304. {
  305. struct scic_sds_controller *scic = ihost->core_controller;
  306. int i;
  307. isci_host_change_state(ihost, isci_stopping);
  308. for (i = 0; i < SCI_MAX_PORTS; i++) {
  309. struct isci_port *port = &ihost->isci_ports[i];
  310. struct isci_remote_device *idev, *d;
  311. list_for_each_entry_safe(idev, d, &port->remote_dev_list, node) {
  312. isci_remote_device_change_state(idev, isci_stopping);
  313. isci_remote_device_stop(ihost, idev);
  314. }
  315. }
  316. set_bit(IHOST_STOP_PENDING, &ihost->flags);
  317. spin_lock_irq(&ihost->scic_lock);
  318. scic_controller_stop(scic, SCIC_CONTROLLER_STOP_TIMEOUT);
  319. spin_unlock_irq(&ihost->scic_lock);
  320. wait_for_stop(ihost);
  321. scic_controller_reset(scic);
  322. isci_timer_list_destroy(ihost);
  323. }
  324. static void __iomem *scu_base(struct isci_host *isci_host)
  325. {
  326. struct pci_dev *pdev = isci_host->pdev;
  327. int id = isci_host->id;
  328. return pcim_iomap_table(pdev)[SCI_SCU_BAR * 2] + SCI_SCU_BAR_SIZE * id;
  329. }
  330. static void __iomem *smu_base(struct isci_host *isci_host)
  331. {
  332. struct pci_dev *pdev = isci_host->pdev;
  333. int id = isci_host->id;
  334. return pcim_iomap_table(pdev)[SCI_SMU_BAR * 2] + SCI_SMU_BAR_SIZE * id;
  335. }
  336. int isci_host_init(struct isci_host *isci_host)
  337. {
  338. int err = 0, i;
  339. enum sci_status status;
  340. struct scic_sds_controller *controller;
  341. union scic_oem_parameters scic_oem_params;
  342. union scic_user_parameters scic_user_params;
  343. struct isci_pci_info *pci_info = to_pci_info(isci_host->pdev);
  344. isci_timer_list_construct(isci_host);
  345. controller = scic_controller_alloc(&isci_host->pdev->dev);
  346. if (!controller) {
  347. dev_err(&isci_host->pdev->dev,
  348. "%s: failed (%d)\n",
  349. __func__,
  350. err);
  351. return -ENOMEM;
  352. }
  353. isci_host->core_controller = controller;
  354. spin_lock_init(&isci_host->state_lock);
  355. spin_lock_init(&isci_host->scic_lock);
  356. spin_lock_init(&isci_host->queue_lock);
  357. init_waitqueue_head(&isci_host->eventq);
  358. isci_host_change_state(isci_host, isci_starting);
  359. isci_host->can_queue = ISCI_CAN_QUEUE_VAL;
  360. status = scic_controller_construct(controller, scu_base(isci_host),
  361. smu_base(isci_host));
  362. if (status != SCI_SUCCESS) {
  363. dev_err(&isci_host->pdev->dev,
  364. "%s: scic_controller_construct failed - status = %x\n",
  365. __func__,
  366. status);
  367. return -ENODEV;
  368. }
  369. isci_host->sas_ha.dev = &isci_host->pdev->dev;
  370. isci_host->sas_ha.lldd_ha = isci_host;
  371. /*----------- SCIC controller Initialization Stuff ------------------
  372. * set association host adapter struct in core controller.
  373. */
  374. sci_object_set_association(isci_host->core_controller,
  375. (void *)isci_host);
  376. /*
  377. * grab initial values stored in the controller object for OEM and USER
  378. * parameters
  379. */
  380. scic_user_parameters_get(controller, &scic_user_params);
  381. status = scic_user_parameters_set(isci_host->core_controller,
  382. &scic_user_params);
  383. if (status != SCI_SUCCESS) {
  384. dev_warn(&isci_host->pdev->dev,
  385. "%s: scic_user_parameters_set failed\n",
  386. __func__);
  387. return -ENODEV;
  388. }
  389. scic_oem_parameters_get(controller, &scic_oem_params);
  390. /* grab any OEM parameters specified in orom */
  391. if (pci_info->orom) {
  392. status = isci_parse_oem_parameters(&scic_oem_params,
  393. pci_info->orom,
  394. isci_host->id);
  395. if (status != SCI_SUCCESS) {
  396. dev_warn(&isci_host->pdev->dev,
  397. "parsing firmware oem parameters failed\n");
  398. return -EINVAL;
  399. }
  400. } else {
  401. status = scic_oem_parameters_set(isci_host->core_controller,
  402. &scic_oem_params);
  403. if (status != SCI_SUCCESS) {
  404. dev_warn(&isci_host->pdev->dev,
  405. "%s: scic_oem_parameters_set failed\n",
  406. __func__);
  407. return -ENODEV;
  408. }
  409. }
  410. tasklet_init(&isci_host->completion_tasklet,
  411. isci_host_completion_routine, (unsigned long)isci_host);
  412. INIT_LIST_HEAD(&(isci_host->mdl_struct_list));
  413. INIT_LIST_HEAD(&isci_host->requests_to_complete);
  414. INIT_LIST_HEAD(&isci_host->requests_to_errorback);
  415. spin_lock_irq(&isci_host->scic_lock);
  416. status = scic_controller_initialize(isci_host->core_controller);
  417. spin_unlock_irq(&isci_host->scic_lock);
  418. if (status != SCI_SUCCESS) {
  419. dev_warn(&isci_host->pdev->dev,
  420. "%s: scic_controller_initialize failed -"
  421. " status = 0x%x\n",
  422. __func__, status);
  423. return -ENODEV;
  424. }
  425. /* populate mdl with dma memory. scu_mdl_allocate_coherent() */
  426. err = isci_host_mdl_allocate_coherent(isci_host);
  427. if (err)
  428. return err;
  429. /*
  430. * keep the pool alloc size around, will use it for a bounds checking
  431. * when trying to convert virtual addresses to physical addresses
  432. */
  433. isci_host->dma_pool_alloc_size = sizeof(struct isci_request) +
  434. scic_io_request_get_object_size();
  435. isci_host->dma_pool = dmam_pool_create(DRV_NAME, &isci_host->pdev->dev,
  436. isci_host->dma_pool_alloc_size,
  437. SLAB_HWCACHE_ALIGN, 0);
  438. if (!isci_host->dma_pool)
  439. return -ENOMEM;
  440. for (i = 0; i < SCI_MAX_PORTS; i++)
  441. isci_port_init(&isci_host->isci_ports[i], isci_host, i);
  442. for (i = 0; i < SCI_MAX_PHYS; i++)
  443. isci_phy_init(&isci_host->phys[i], isci_host, i);
  444. for (i = 0; i < SCI_MAX_REMOTE_DEVICES; i++) {
  445. struct isci_remote_device *idev = idev_by_id(isci_host, i);
  446. INIT_LIST_HEAD(&idev->reqs_in_process);
  447. INIT_LIST_HEAD(&idev->node);
  448. spin_lock_init(&idev->state_lock);
  449. }
  450. return 0;
  451. }