pci-sysfs.c 38 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531
  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (kstrtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = kstrtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (kstrtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  242. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  243. size_t count)
  244. {
  245. unsigned long val;
  246. struct pci_bus *b = NULL;
  247. if (kstrtoul(buf, 0, &val) < 0)
  248. return -EINVAL;
  249. if (val) {
  250. mutex_lock(&pci_remove_rescan_mutex);
  251. while ((b = pci_find_next_bus(b)) != NULL)
  252. pci_rescan_bus(b);
  253. mutex_unlock(&pci_remove_rescan_mutex);
  254. }
  255. return count;
  256. }
  257. struct bus_attribute pci_bus_attrs[] = {
  258. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  259. __ATTR_NULL
  260. };
  261. static ssize_t
  262. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. unsigned long val;
  266. struct pci_dev *pdev = to_pci_dev(dev);
  267. if (kstrtoul(buf, 0, &val) < 0)
  268. return -EINVAL;
  269. if (val) {
  270. mutex_lock(&pci_remove_rescan_mutex);
  271. pci_rescan_bus(pdev->bus);
  272. mutex_unlock(&pci_remove_rescan_mutex);
  273. }
  274. return count;
  275. }
  276. struct device_attribute dev_rescan_attr = __ATTR(rescan, (S_IWUSR|S_IWGRP),
  277. NULL, dev_rescan_store);
  278. static void remove_callback(struct device *dev)
  279. {
  280. struct pci_dev *pdev = to_pci_dev(dev);
  281. mutex_lock(&pci_remove_rescan_mutex);
  282. pci_stop_and_remove_bus_device(pdev);
  283. mutex_unlock(&pci_remove_rescan_mutex);
  284. }
  285. static ssize_t
  286. remove_store(struct device *dev, struct device_attribute *dummy,
  287. const char *buf, size_t count)
  288. {
  289. int ret = 0;
  290. unsigned long val;
  291. if (kstrtoul(buf, 0, &val) < 0)
  292. return -EINVAL;
  293. /* An attribute cannot be unregistered by one of its own methods,
  294. * so we have to use this roundabout approach.
  295. */
  296. if (val)
  297. ret = device_schedule_callback(dev, remove_callback);
  298. if (ret)
  299. count = ret;
  300. return count;
  301. }
  302. struct device_attribute dev_remove_attr = __ATTR(remove, (S_IWUSR|S_IWGRP),
  303. NULL, remove_store);
  304. static ssize_t
  305. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  306. const char *buf, size_t count)
  307. {
  308. unsigned long val;
  309. struct pci_bus *bus = to_pci_bus(dev);
  310. if (kstrtoul(buf, 0, &val) < 0)
  311. return -EINVAL;
  312. if (val) {
  313. mutex_lock(&pci_remove_rescan_mutex);
  314. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  315. pci_rescan_bus_bridge_resize(bus->self);
  316. else
  317. pci_rescan_bus(bus);
  318. mutex_unlock(&pci_remove_rescan_mutex);
  319. }
  320. return count;
  321. }
  322. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  323. static ssize_t d3cold_allowed_store(struct device *dev,
  324. struct device_attribute *attr,
  325. const char *buf, size_t count)
  326. {
  327. struct pci_dev *pdev = to_pci_dev(dev);
  328. unsigned long val;
  329. if (kstrtoul(buf, 0, &val) < 0)
  330. return -EINVAL;
  331. pdev->d3cold_allowed = !!val;
  332. pm_runtime_resume(dev);
  333. return count;
  334. }
  335. static ssize_t d3cold_allowed_show(struct device *dev,
  336. struct device_attribute *attr, char *buf)
  337. {
  338. struct pci_dev *pdev = to_pci_dev(dev);
  339. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  340. }
  341. #endif
  342. #ifdef CONFIG_PCI_IOV
  343. static ssize_t sriov_totalvfs_show(struct device *dev,
  344. struct device_attribute *attr,
  345. char *buf)
  346. {
  347. struct pci_dev *pdev = to_pci_dev(dev);
  348. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  349. }
  350. static ssize_t sriov_numvfs_show(struct device *dev,
  351. struct device_attribute *attr,
  352. char *buf)
  353. {
  354. struct pci_dev *pdev = to_pci_dev(dev);
  355. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  356. }
  357. /*
  358. * num_vfs > 0; number of VFs to enable
  359. * num_vfs = 0; disable all VFs
  360. *
  361. * Note: SRIOV spec doesn't allow partial VF
  362. * disable, so it's all or none.
  363. */
  364. static ssize_t sriov_numvfs_store(struct device *dev,
  365. struct device_attribute *attr,
  366. const char *buf, size_t count)
  367. {
  368. struct pci_dev *pdev = to_pci_dev(dev);
  369. int ret;
  370. u16 num_vfs;
  371. ret = kstrtou16(buf, 0, &num_vfs);
  372. if (ret < 0)
  373. return ret;
  374. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  375. return -ERANGE;
  376. if (num_vfs == pdev->sriov->num_VFs)
  377. return count; /* no change */
  378. /* is PF driver loaded w/callback */
  379. if (!pdev->driver || !pdev->driver->sriov_configure) {
  380. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  381. return -ENOSYS;
  382. }
  383. if (num_vfs == 0) {
  384. /* disable VFs */
  385. ret = pdev->driver->sriov_configure(pdev, 0);
  386. if (ret < 0)
  387. return ret;
  388. return count;
  389. }
  390. /* enable VFs */
  391. if (pdev->sriov->num_VFs) {
  392. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  393. pdev->sriov->num_VFs, num_vfs);
  394. return -EBUSY;
  395. }
  396. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  397. if (ret < 0)
  398. return ret;
  399. if (ret != num_vfs)
  400. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  401. num_vfs, ret);
  402. return count;
  403. }
  404. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  405. static struct device_attribute sriov_numvfs_attr =
  406. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  407. sriov_numvfs_show, sriov_numvfs_store);
  408. #endif /* CONFIG_PCI_IOV */
  409. struct device_attribute pci_dev_attrs[] = {
  410. __ATTR_RO(resource),
  411. __ATTR_RO(vendor),
  412. __ATTR_RO(device),
  413. __ATTR_RO(subsystem_vendor),
  414. __ATTR_RO(subsystem_device),
  415. __ATTR_RO(class),
  416. __ATTR_RO(irq),
  417. __ATTR_RO(local_cpus),
  418. __ATTR_RO(local_cpulist),
  419. __ATTR_RO(modalias),
  420. #ifdef CONFIG_NUMA
  421. __ATTR_RO(numa_node),
  422. #endif
  423. __ATTR_RO(dma_mask_bits),
  424. __ATTR_RO(consistent_dma_mask_bits),
  425. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  426. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  427. broken_parity_status_show,broken_parity_status_store),
  428. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  429. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  430. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  431. #endif
  432. __ATTR_NULL,
  433. };
  434. struct device_attribute pcibus_dev_attrs[] = {
  435. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  436. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  437. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  438. __ATTR_NULL,
  439. };
  440. static ssize_t
  441. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  442. {
  443. struct pci_dev *pdev = to_pci_dev(dev);
  444. struct pci_dev *vga_dev = vga_default_device();
  445. if (vga_dev)
  446. return sprintf(buf, "%u\n", (pdev == vga_dev));
  447. return sprintf(buf, "%u\n",
  448. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  449. IORESOURCE_ROM_SHADOW));
  450. }
  451. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  452. static ssize_t
  453. pci_read_config(struct file *filp, struct kobject *kobj,
  454. struct bin_attribute *bin_attr,
  455. char *buf, loff_t off, size_t count)
  456. {
  457. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  458. unsigned int size = 64;
  459. loff_t init_off = off;
  460. u8 *data = (u8*) buf;
  461. /* Several chips lock up trying to read undefined config space */
  462. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  463. size = dev->cfg_size;
  464. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  465. size = 128;
  466. }
  467. if (off > size)
  468. return 0;
  469. if (off + count > size) {
  470. size -= off;
  471. count = size;
  472. } else {
  473. size = count;
  474. }
  475. pci_config_pm_runtime_get(dev);
  476. if ((off & 1) && size) {
  477. u8 val;
  478. pci_user_read_config_byte(dev, off, &val);
  479. data[off - init_off] = val;
  480. off++;
  481. size--;
  482. }
  483. if ((off & 3) && size > 2) {
  484. u16 val;
  485. pci_user_read_config_word(dev, off, &val);
  486. data[off - init_off] = val & 0xff;
  487. data[off - init_off + 1] = (val >> 8) & 0xff;
  488. off += 2;
  489. size -= 2;
  490. }
  491. while (size > 3) {
  492. u32 val;
  493. pci_user_read_config_dword(dev, off, &val);
  494. data[off - init_off] = val & 0xff;
  495. data[off - init_off + 1] = (val >> 8) & 0xff;
  496. data[off - init_off + 2] = (val >> 16) & 0xff;
  497. data[off - init_off + 3] = (val >> 24) & 0xff;
  498. off += 4;
  499. size -= 4;
  500. }
  501. if (size >= 2) {
  502. u16 val;
  503. pci_user_read_config_word(dev, off, &val);
  504. data[off - init_off] = val & 0xff;
  505. data[off - init_off + 1] = (val >> 8) & 0xff;
  506. off += 2;
  507. size -= 2;
  508. }
  509. if (size > 0) {
  510. u8 val;
  511. pci_user_read_config_byte(dev, off, &val);
  512. data[off - init_off] = val;
  513. off++;
  514. --size;
  515. }
  516. pci_config_pm_runtime_put(dev);
  517. return count;
  518. }
  519. static ssize_t
  520. pci_write_config(struct file* filp, struct kobject *kobj,
  521. struct bin_attribute *bin_attr,
  522. char *buf, loff_t off, size_t count)
  523. {
  524. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  525. unsigned int size = count;
  526. loff_t init_off = off;
  527. u8 *data = (u8*) buf;
  528. if (off > dev->cfg_size)
  529. return 0;
  530. if (off + count > dev->cfg_size) {
  531. size = dev->cfg_size - off;
  532. count = size;
  533. }
  534. pci_config_pm_runtime_get(dev);
  535. if ((off & 1) && size) {
  536. pci_user_write_config_byte(dev, off, data[off - init_off]);
  537. off++;
  538. size--;
  539. }
  540. if ((off & 3) && size > 2) {
  541. u16 val = data[off - init_off];
  542. val |= (u16) data[off - init_off + 1] << 8;
  543. pci_user_write_config_word(dev, off, val);
  544. off += 2;
  545. size -= 2;
  546. }
  547. while (size > 3) {
  548. u32 val = data[off - init_off];
  549. val |= (u32) data[off - init_off + 1] << 8;
  550. val |= (u32) data[off - init_off + 2] << 16;
  551. val |= (u32) data[off - init_off + 3] << 24;
  552. pci_user_write_config_dword(dev, off, val);
  553. off += 4;
  554. size -= 4;
  555. }
  556. if (size >= 2) {
  557. u16 val = data[off - init_off];
  558. val |= (u16) data[off - init_off + 1] << 8;
  559. pci_user_write_config_word(dev, off, val);
  560. off += 2;
  561. size -= 2;
  562. }
  563. if (size) {
  564. pci_user_write_config_byte(dev, off, data[off - init_off]);
  565. off++;
  566. --size;
  567. }
  568. pci_config_pm_runtime_put(dev);
  569. return count;
  570. }
  571. static ssize_t
  572. read_vpd_attr(struct file *filp, struct kobject *kobj,
  573. struct bin_attribute *bin_attr,
  574. char *buf, loff_t off, size_t count)
  575. {
  576. struct pci_dev *dev =
  577. to_pci_dev(container_of(kobj, struct device, kobj));
  578. if (off > bin_attr->size)
  579. count = 0;
  580. else if (count > bin_attr->size - off)
  581. count = bin_attr->size - off;
  582. return pci_read_vpd(dev, off, count, buf);
  583. }
  584. static ssize_t
  585. write_vpd_attr(struct file *filp, struct kobject *kobj,
  586. struct bin_attribute *bin_attr,
  587. char *buf, loff_t off, size_t count)
  588. {
  589. struct pci_dev *dev =
  590. to_pci_dev(container_of(kobj, struct device, kobj));
  591. if (off > bin_attr->size)
  592. count = 0;
  593. else if (count > bin_attr->size - off)
  594. count = bin_attr->size - off;
  595. return pci_write_vpd(dev, off, count, buf);
  596. }
  597. #ifdef HAVE_PCI_LEGACY
  598. /**
  599. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  600. * @filp: open sysfs file
  601. * @kobj: kobject corresponding to file to read from
  602. * @bin_attr: struct bin_attribute for this file
  603. * @buf: buffer to store results
  604. * @off: offset into legacy I/O port space
  605. * @count: number of bytes to read
  606. *
  607. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  608. * callback routine (pci_legacy_read).
  609. */
  610. static ssize_t
  611. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  612. struct bin_attribute *bin_attr,
  613. char *buf, loff_t off, size_t count)
  614. {
  615. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  616. struct device,
  617. kobj));
  618. /* Only support 1, 2 or 4 byte accesses */
  619. if (count != 1 && count != 2 && count != 4)
  620. return -EINVAL;
  621. return pci_legacy_read(bus, off, (u32 *)buf, count);
  622. }
  623. /**
  624. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  625. * @filp: open sysfs file
  626. * @kobj: kobject corresponding to file to read from
  627. * @bin_attr: struct bin_attribute for this file
  628. * @buf: buffer containing value to be written
  629. * @off: offset into legacy I/O port space
  630. * @count: number of bytes to write
  631. *
  632. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  633. * callback routine (pci_legacy_write).
  634. */
  635. static ssize_t
  636. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  637. struct bin_attribute *bin_attr,
  638. char *buf, loff_t off, size_t count)
  639. {
  640. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  641. struct device,
  642. kobj));
  643. /* Only support 1, 2 or 4 byte accesses */
  644. if (count != 1 && count != 2 && count != 4)
  645. return -EINVAL;
  646. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  647. }
  648. /**
  649. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  650. * @filp: open sysfs file
  651. * @kobj: kobject corresponding to device to be mapped
  652. * @attr: struct bin_attribute for this file
  653. * @vma: struct vm_area_struct passed to mmap
  654. *
  655. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  656. * legacy memory space (first meg of bus space) into application virtual
  657. * memory space.
  658. */
  659. static int
  660. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  661. struct bin_attribute *attr,
  662. struct vm_area_struct *vma)
  663. {
  664. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  665. struct device,
  666. kobj));
  667. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  668. }
  669. /**
  670. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  671. * @filp: open sysfs file
  672. * @kobj: kobject corresponding to device to be mapped
  673. * @attr: struct bin_attribute for this file
  674. * @vma: struct vm_area_struct passed to mmap
  675. *
  676. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  677. * legacy IO space (first meg of bus space) into application virtual
  678. * memory space. Returns -ENOSYS if the operation isn't supported
  679. */
  680. static int
  681. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  682. struct bin_attribute *attr,
  683. struct vm_area_struct *vma)
  684. {
  685. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  686. struct device,
  687. kobj));
  688. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  689. }
  690. /**
  691. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  692. * @b: bus to create files under
  693. * @mmap_type: I/O port or memory
  694. *
  695. * Stub implementation. Can be overridden by arch if necessary.
  696. */
  697. void __weak
  698. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  699. {
  700. return;
  701. }
  702. /**
  703. * pci_create_legacy_files - create legacy I/O port and memory files
  704. * @b: bus to create files under
  705. *
  706. * Some platforms allow access to legacy I/O port and ISA memory space on
  707. * a per-bus basis. This routine creates the files and ties them into
  708. * their associated read, write and mmap files from pci-sysfs.c
  709. *
  710. * On error unwind, but don't propagate the error to the caller
  711. * as it is ok to set up the PCI bus without these files.
  712. */
  713. void pci_create_legacy_files(struct pci_bus *b)
  714. {
  715. int error;
  716. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  717. GFP_ATOMIC);
  718. if (!b->legacy_io)
  719. goto kzalloc_err;
  720. sysfs_bin_attr_init(b->legacy_io);
  721. b->legacy_io->attr.name = "legacy_io";
  722. b->legacy_io->size = 0xffff;
  723. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  724. b->legacy_io->read = pci_read_legacy_io;
  725. b->legacy_io->write = pci_write_legacy_io;
  726. b->legacy_io->mmap = pci_mmap_legacy_io;
  727. pci_adjust_legacy_attr(b, pci_mmap_io);
  728. error = device_create_bin_file(&b->dev, b->legacy_io);
  729. if (error)
  730. goto legacy_io_err;
  731. /* Allocated above after the legacy_io struct */
  732. b->legacy_mem = b->legacy_io + 1;
  733. sysfs_bin_attr_init(b->legacy_mem);
  734. b->legacy_mem->attr.name = "legacy_mem";
  735. b->legacy_mem->size = 1024*1024;
  736. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  737. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  738. pci_adjust_legacy_attr(b, pci_mmap_mem);
  739. error = device_create_bin_file(&b->dev, b->legacy_mem);
  740. if (error)
  741. goto legacy_mem_err;
  742. return;
  743. legacy_mem_err:
  744. device_remove_bin_file(&b->dev, b->legacy_io);
  745. legacy_io_err:
  746. kfree(b->legacy_io);
  747. b->legacy_io = NULL;
  748. kzalloc_err:
  749. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  750. "and ISA memory resources to sysfs\n");
  751. return;
  752. }
  753. void pci_remove_legacy_files(struct pci_bus *b)
  754. {
  755. if (b->legacy_io) {
  756. device_remove_bin_file(&b->dev, b->legacy_io);
  757. device_remove_bin_file(&b->dev, b->legacy_mem);
  758. kfree(b->legacy_io); /* both are allocated here */
  759. }
  760. }
  761. #endif /* HAVE_PCI_LEGACY */
  762. #ifdef HAVE_PCI_MMAP
  763. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  764. enum pci_mmap_api mmap_api)
  765. {
  766. unsigned long nr, start, size, pci_start;
  767. if (pci_resource_len(pdev, resno) == 0)
  768. return 0;
  769. nr = vma_pages(vma);
  770. start = vma->vm_pgoff;
  771. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  772. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  773. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  774. if (start >= pci_start && start < pci_start + size &&
  775. start + nr <= pci_start + size)
  776. return 1;
  777. return 0;
  778. }
  779. /**
  780. * pci_mmap_resource - map a PCI resource into user memory space
  781. * @kobj: kobject for mapping
  782. * @attr: struct bin_attribute for the file being mapped
  783. * @vma: struct vm_area_struct passed into the mmap
  784. * @write_combine: 1 for write_combine mapping
  785. *
  786. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  787. */
  788. static int
  789. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  790. struct vm_area_struct *vma, int write_combine)
  791. {
  792. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  793. struct device, kobj));
  794. struct resource *res = attr->private;
  795. enum pci_mmap_state mmap_type;
  796. resource_size_t start, end;
  797. int i;
  798. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  799. if (res == &pdev->resource[i])
  800. break;
  801. if (i >= PCI_ROM_RESOURCE)
  802. return -ENODEV;
  803. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  804. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  805. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  806. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  807. pci_name(pdev), i,
  808. (u64)pci_resource_start(pdev, i),
  809. (u64)pci_resource_len(pdev, i));
  810. return -EINVAL;
  811. }
  812. /* pci_mmap_page_range() expects the same kind of entry as coming
  813. * from /proc/bus/pci/ which is a "user visible" value. If this is
  814. * different from the resource itself, arch will do necessary fixup.
  815. */
  816. pci_resource_to_user(pdev, i, res, &start, &end);
  817. vma->vm_pgoff += start >> PAGE_SHIFT;
  818. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  819. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  820. return -EINVAL;
  821. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  822. }
  823. static int
  824. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  825. struct bin_attribute *attr,
  826. struct vm_area_struct *vma)
  827. {
  828. return pci_mmap_resource(kobj, attr, vma, 0);
  829. }
  830. static int
  831. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  832. struct bin_attribute *attr,
  833. struct vm_area_struct *vma)
  834. {
  835. return pci_mmap_resource(kobj, attr, vma, 1);
  836. }
  837. static ssize_t
  838. pci_resource_io(struct file *filp, struct kobject *kobj,
  839. struct bin_attribute *attr, char *buf,
  840. loff_t off, size_t count, bool write)
  841. {
  842. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  843. struct device, kobj));
  844. struct resource *res = attr->private;
  845. unsigned long port = off;
  846. int i;
  847. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  848. if (res == &pdev->resource[i])
  849. break;
  850. if (i >= PCI_ROM_RESOURCE)
  851. return -ENODEV;
  852. port += pci_resource_start(pdev, i);
  853. if (port > pci_resource_end(pdev, i))
  854. return 0;
  855. if (port + count - 1 > pci_resource_end(pdev, i))
  856. return -EINVAL;
  857. switch (count) {
  858. case 1:
  859. if (write)
  860. outb(*(u8 *)buf, port);
  861. else
  862. *(u8 *)buf = inb(port);
  863. return 1;
  864. case 2:
  865. if (write)
  866. outw(*(u16 *)buf, port);
  867. else
  868. *(u16 *)buf = inw(port);
  869. return 2;
  870. case 4:
  871. if (write)
  872. outl(*(u32 *)buf, port);
  873. else
  874. *(u32 *)buf = inl(port);
  875. return 4;
  876. }
  877. return -EINVAL;
  878. }
  879. static ssize_t
  880. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  881. struct bin_attribute *attr, char *buf,
  882. loff_t off, size_t count)
  883. {
  884. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  885. }
  886. static ssize_t
  887. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  888. struct bin_attribute *attr, char *buf,
  889. loff_t off, size_t count)
  890. {
  891. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  892. }
  893. /**
  894. * pci_remove_resource_files - cleanup resource files
  895. * @pdev: dev to cleanup
  896. *
  897. * If we created resource files for @pdev, remove them from sysfs and
  898. * free their resources.
  899. */
  900. static void
  901. pci_remove_resource_files(struct pci_dev *pdev)
  902. {
  903. int i;
  904. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  905. struct bin_attribute *res_attr;
  906. res_attr = pdev->res_attr[i];
  907. if (res_attr) {
  908. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  909. kfree(res_attr);
  910. }
  911. res_attr = pdev->res_attr_wc[i];
  912. if (res_attr) {
  913. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  914. kfree(res_attr);
  915. }
  916. }
  917. }
  918. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  919. {
  920. /* allocate attribute structure, piggyback attribute name */
  921. int name_len = write_combine ? 13 : 10;
  922. struct bin_attribute *res_attr;
  923. int retval;
  924. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  925. if (res_attr) {
  926. char *res_attr_name = (char *)(res_attr + 1);
  927. sysfs_bin_attr_init(res_attr);
  928. if (write_combine) {
  929. pdev->res_attr_wc[num] = res_attr;
  930. sprintf(res_attr_name, "resource%d_wc", num);
  931. res_attr->mmap = pci_mmap_resource_wc;
  932. } else {
  933. pdev->res_attr[num] = res_attr;
  934. sprintf(res_attr_name, "resource%d", num);
  935. res_attr->mmap = pci_mmap_resource_uc;
  936. }
  937. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  938. res_attr->read = pci_read_resource_io;
  939. res_attr->write = pci_write_resource_io;
  940. }
  941. res_attr->attr.name = res_attr_name;
  942. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  943. res_attr->size = pci_resource_len(pdev, num);
  944. res_attr->private = &pdev->resource[num];
  945. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  946. } else
  947. retval = -ENOMEM;
  948. return retval;
  949. }
  950. /**
  951. * pci_create_resource_files - create resource files in sysfs for @dev
  952. * @pdev: dev in question
  953. *
  954. * Walk the resources in @pdev creating files for each resource available.
  955. */
  956. static int pci_create_resource_files(struct pci_dev *pdev)
  957. {
  958. int i;
  959. int retval;
  960. /* Expose the PCI resources from this device as files */
  961. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  962. /* skip empty resources */
  963. if (!pci_resource_len(pdev, i))
  964. continue;
  965. retval = pci_create_attr(pdev, i, 0);
  966. /* for prefetchable resources, create a WC mappable file */
  967. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  968. retval = pci_create_attr(pdev, i, 1);
  969. if (retval) {
  970. pci_remove_resource_files(pdev);
  971. return retval;
  972. }
  973. }
  974. return 0;
  975. }
  976. #else /* !HAVE_PCI_MMAP */
  977. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  978. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  979. #endif /* HAVE_PCI_MMAP */
  980. /**
  981. * pci_write_rom - used to enable access to the PCI ROM display
  982. * @filp: sysfs file
  983. * @kobj: kernel object handle
  984. * @bin_attr: struct bin_attribute for this file
  985. * @buf: user input
  986. * @off: file offset
  987. * @count: number of byte in input
  988. *
  989. * writing anything except 0 enables it
  990. */
  991. static ssize_t
  992. pci_write_rom(struct file *filp, struct kobject *kobj,
  993. struct bin_attribute *bin_attr,
  994. char *buf, loff_t off, size_t count)
  995. {
  996. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  997. if ((off == 0) && (*buf == '0') && (count == 2))
  998. pdev->rom_attr_enabled = 0;
  999. else
  1000. pdev->rom_attr_enabled = 1;
  1001. return count;
  1002. }
  1003. /**
  1004. * pci_read_rom - read a PCI ROM
  1005. * @filp: sysfs file
  1006. * @kobj: kernel object handle
  1007. * @bin_attr: struct bin_attribute for this file
  1008. * @buf: where to put the data we read from the ROM
  1009. * @off: file offset
  1010. * @count: number of bytes to read
  1011. *
  1012. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1013. * device corresponding to @kobj.
  1014. */
  1015. static ssize_t
  1016. pci_read_rom(struct file *filp, struct kobject *kobj,
  1017. struct bin_attribute *bin_attr,
  1018. char *buf, loff_t off, size_t count)
  1019. {
  1020. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1021. void __iomem *rom;
  1022. size_t size;
  1023. if (!pdev->rom_attr_enabled)
  1024. return -EINVAL;
  1025. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1026. if (!rom || !size)
  1027. return -EIO;
  1028. if (off >= size)
  1029. count = 0;
  1030. else {
  1031. if (off + count > size)
  1032. count = size - off;
  1033. memcpy_fromio(buf, rom + off, count);
  1034. }
  1035. pci_unmap_rom(pdev, rom);
  1036. return count;
  1037. }
  1038. static struct bin_attribute pci_config_attr = {
  1039. .attr = {
  1040. .name = "config",
  1041. .mode = S_IRUGO | S_IWUSR,
  1042. },
  1043. .size = PCI_CFG_SPACE_SIZE,
  1044. .read = pci_read_config,
  1045. .write = pci_write_config,
  1046. };
  1047. static struct bin_attribute pcie_config_attr = {
  1048. .attr = {
  1049. .name = "config",
  1050. .mode = S_IRUGO | S_IWUSR,
  1051. },
  1052. .size = PCI_CFG_SPACE_EXP_SIZE,
  1053. .read = pci_read_config,
  1054. .write = pci_write_config,
  1055. };
  1056. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1057. {
  1058. return 0;
  1059. }
  1060. static ssize_t reset_store(struct device *dev,
  1061. struct device_attribute *attr, const char *buf,
  1062. size_t count)
  1063. {
  1064. struct pci_dev *pdev = to_pci_dev(dev);
  1065. unsigned long val;
  1066. ssize_t result = kstrtoul(buf, 0, &val);
  1067. if (result < 0)
  1068. return result;
  1069. if (val != 1)
  1070. return -EINVAL;
  1071. result = pci_reset_function(pdev);
  1072. if (result < 0)
  1073. return result;
  1074. return count;
  1075. }
  1076. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1077. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1078. {
  1079. int retval;
  1080. struct bin_attribute *attr;
  1081. /* If the device has VPD, try to expose it in sysfs. */
  1082. if (dev->vpd) {
  1083. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1084. if (!attr)
  1085. return -ENOMEM;
  1086. sysfs_bin_attr_init(attr);
  1087. attr->size = dev->vpd->len;
  1088. attr->attr.name = "vpd";
  1089. attr->attr.mode = S_IRUSR | S_IWUSR;
  1090. attr->read = read_vpd_attr;
  1091. attr->write = write_vpd_attr;
  1092. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1093. if (retval) {
  1094. kfree(attr);
  1095. return retval;
  1096. }
  1097. dev->vpd->attr = attr;
  1098. }
  1099. /* Active State Power Management */
  1100. pcie_aspm_create_sysfs_dev_files(dev);
  1101. if (!pci_probe_reset_function(dev)) {
  1102. retval = device_create_file(&dev->dev, &reset_attr);
  1103. if (retval)
  1104. goto error;
  1105. dev->reset_fn = 1;
  1106. }
  1107. return 0;
  1108. error:
  1109. pcie_aspm_remove_sysfs_dev_files(dev);
  1110. if (dev->vpd && dev->vpd->attr) {
  1111. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1112. kfree(dev->vpd->attr);
  1113. }
  1114. return retval;
  1115. }
  1116. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1117. {
  1118. int retval;
  1119. int rom_size = 0;
  1120. struct bin_attribute *attr;
  1121. if (!sysfs_initialized)
  1122. return -EACCES;
  1123. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1124. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1125. else
  1126. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1127. if (retval)
  1128. goto err;
  1129. retval = pci_create_resource_files(pdev);
  1130. if (retval)
  1131. goto err_config_file;
  1132. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1133. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1134. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1135. rom_size = 0x20000;
  1136. /* If the device has a ROM, try to expose it in sysfs. */
  1137. if (rom_size) {
  1138. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1139. if (!attr) {
  1140. retval = -ENOMEM;
  1141. goto err_resource_files;
  1142. }
  1143. sysfs_bin_attr_init(attr);
  1144. attr->size = rom_size;
  1145. attr->attr.name = "rom";
  1146. attr->attr.mode = S_IRUSR | S_IWUSR;
  1147. attr->read = pci_read_rom;
  1148. attr->write = pci_write_rom;
  1149. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1150. if (retval) {
  1151. kfree(attr);
  1152. goto err_resource_files;
  1153. }
  1154. pdev->rom_attr = attr;
  1155. }
  1156. /* add platform-specific attributes */
  1157. retval = pcibios_add_platform_entries(pdev);
  1158. if (retval)
  1159. goto err_rom_file;
  1160. /* add sysfs entries for various capabilities */
  1161. retval = pci_create_capabilities_sysfs(pdev);
  1162. if (retval)
  1163. goto err_rom_file;
  1164. pci_create_firmware_label_files(pdev);
  1165. return 0;
  1166. err_rom_file:
  1167. if (rom_size) {
  1168. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1169. kfree(pdev->rom_attr);
  1170. pdev->rom_attr = NULL;
  1171. }
  1172. err_resource_files:
  1173. pci_remove_resource_files(pdev);
  1174. err_config_file:
  1175. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1176. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1177. else
  1178. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1179. err:
  1180. return retval;
  1181. }
  1182. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1183. {
  1184. if (dev->vpd && dev->vpd->attr) {
  1185. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1186. kfree(dev->vpd->attr);
  1187. }
  1188. pcie_aspm_remove_sysfs_dev_files(dev);
  1189. if (dev->reset_fn) {
  1190. device_remove_file(&dev->dev, &reset_attr);
  1191. dev->reset_fn = 0;
  1192. }
  1193. }
  1194. /**
  1195. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1196. * @pdev: device whose entries we should free
  1197. *
  1198. * Cleanup when @pdev is removed from sysfs.
  1199. */
  1200. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1201. {
  1202. int rom_size = 0;
  1203. if (!sysfs_initialized)
  1204. return;
  1205. pci_remove_capabilities_sysfs(pdev);
  1206. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1207. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1208. else
  1209. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1210. pci_remove_resource_files(pdev);
  1211. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1212. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1213. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1214. rom_size = 0x20000;
  1215. if (rom_size && pdev->rom_attr) {
  1216. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1217. kfree(pdev->rom_attr);
  1218. }
  1219. pci_remove_firmware_label_files(pdev);
  1220. }
  1221. static int __init pci_sysfs_init(void)
  1222. {
  1223. struct pci_dev *pdev = NULL;
  1224. int retval;
  1225. sysfs_initialized = 1;
  1226. for_each_pci_dev(pdev) {
  1227. retval = pci_create_sysfs_dev_files(pdev);
  1228. if (retval) {
  1229. pci_dev_put(pdev);
  1230. return retval;
  1231. }
  1232. }
  1233. return 0;
  1234. }
  1235. late_initcall(pci_sysfs_init);
  1236. static struct attribute *pci_dev_dev_attrs[] = {
  1237. &vga_attr.attr,
  1238. NULL,
  1239. };
  1240. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1241. struct attribute *a, int n)
  1242. {
  1243. struct device *dev = container_of(kobj, struct device, kobj);
  1244. struct pci_dev *pdev = to_pci_dev(dev);
  1245. if (a == &vga_attr.attr)
  1246. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1247. return 0;
  1248. return a->mode;
  1249. }
  1250. static struct attribute *pci_dev_hp_attrs[] = {
  1251. &dev_remove_attr.attr,
  1252. &dev_rescan_attr.attr,
  1253. NULL,
  1254. };
  1255. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1256. struct attribute *a, int n)
  1257. {
  1258. struct device *dev = container_of(kobj, struct device, kobj);
  1259. struct pci_dev *pdev = to_pci_dev(dev);
  1260. if (pdev->is_virtfn)
  1261. return 0;
  1262. return a->mode;
  1263. }
  1264. static struct attribute_group pci_dev_hp_attr_group = {
  1265. .attrs = pci_dev_hp_attrs,
  1266. .is_visible = pci_dev_hp_attrs_are_visible,
  1267. };
  1268. #ifdef CONFIG_PCI_IOV
  1269. static struct attribute *sriov_dev_attrs[] = {
  1270. &sriov_totalvfs_attr.attr,
  1271. &sriov_numvfs_attr.attr,
  1272. NULL,
  1273. };
  1274. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1275. struct attribute *a, int n)
  1276. {
  1277. struct device *dev = container_of(kobj, struct device, kobj);
  1278. if (!dev_is_pf(dev))
  1279. return 0;
  1280. return a->mode;
  1281. }
  1282. static struct attribute_group sriov_dev_attr_group = {
  1283. .attrs = sriov_dev_attrs,
  1284. .is_visible = sriov_attrs_are_visible,
  1285. };
  1286. #endif /* CONFIG_PCI_IOV */
  1287. static struct attribute_group pci_dev_attr_group = {
  1288. .attrs = pci_dev_dev_attrs,
  1289. .is_visible = pci_dev_attrs_are_visible,
  1290. };
  1291. static const struct attribute_group *pci_dev_attr_groups[] = {
  1292. &pci_dev_attr_group,
  1293. &pci_dev_hp_attr_group,
  1294. #ifdef CONFIG_PCI_IOV
  1295. &sriov_dev_attr_group,
  1296. #endif
  1297. NULL,
  1298. };
  1299. struct device_type pci_dev_type = {
  1300. .groups = pci_dev_attr_groups,
  1301. };