smartreflex.c 30 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129
  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2010 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include "common.h"
  28. #include "pm.h"
  29. #include "smartreflex.h"
  30. #define SMARTREFLEX_NAME_LEN 16
  31. #define NVALUE_NAME_LEN 40
  32. #define SR_DISABLE_TIMEOUT 200
  33. struct omap_sr {
  34. int srid;
  35. int ip_type;
  36. int nvalue_count;
  37. bool autocomp_active;
  38. u32 clk_length;
  39. u32 err_weight;
  40. u32 err_minlimit;
  41. u32 err_maxlimit;
  42. u32 accum_data;
  43. u32 senn_avgweight;
  44. u32 senp_avgweight;
  45. u32 senp_mod;
  46. u32 senn_mod;
  47. unsigned int irq;
  48. void __iomem *base;
  49. struct platform_device *pdev;
  50. struct list_head node;
  51. struct omap_sr_nvalue_table *nvalue_table;
  52. struct voltagedomain *voltdm;
  53. struct dentry *dbg_dir;
  54. };
  55. /* sr_list contains all the instances of smartreflex module */
  56. static LIST_HEAD(sr_list);
  57. static struct omap_sr_class_data *sr_class;
  58. static struct omap_sr_pmic_data *sr_pmic_data;
  59. static struct dentry *sr_dbg_dir;
  60. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  61. {
  62. __raw_writel(value, (sr->base + offset));
  63. }
  64. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  65. u32 value)
  66. {
  67. u32 reg_val;
  68. /*
  69. * Smartreflex error config register is special as it contains
  70. * certain status bits which if written a 1 into means a clear
  71. * of those bits. So in order to make sure no accidental write of
  72. * 1 happens to those status bits, do a clear of them in the read
  73. * value. This mean this API doesn't rewrite values in these bits
  74. * if they are currently set, but does allow the caller to write
  75. * those bits.
  76. */
  77. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  78. mask |= ERRCONFIG_STATUS_V1_MASK;
  79. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  80. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  81. reg_val = __raw_readl(sr->base + offset);
  82. reg_val &= ~mask;
  83. value &= mask;
  84. reg_val |= value;
  85. __raw_writel(reg_val, (sr->base + offset));
  86. }
  87. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  88. {
  89. return __raw_readl(sr->base + offset);
  90. }
  91. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  92. {
  93. struct omap_sr *sr_info;
  94. if (!voltdm) {
  95. pr_err("%s: Null voltage domain passed!\n", __func__);
  96. return ERR_PTR(-EINVAL);
  97. }
  98. list_for_each_entry(sr_info, &sr_list, node) {
  99. if (voltdm == sr_info->voltdm)
  100. return sr_info;
  101. }
  102. return ERR_PTR(-ENODATA);
  103. }
  104. static irqreturn_t sr_interrupt(int irq, void *data)
  105. {
  106. struct omap_sr *sr_info = (struct omap_sr *)data;
  107. u32 status = 0;
  108. if (sr_info->ip_type == SR_TYPE_V1) {
  109. /* Read the status bits */
  110. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  111. /* Clear them by writing back */
  112. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  113. } else if (sr_info->ip_type == SR_TYPE_V2) {
  114. /* Read the status bits */
  115. status = sr_read_reg(sr_info, IRQSTATUS);
  116. /* Clear them by writing back */
  117. sr_write_reg(sr_info, IRQSTATUS, status);
  118. }
  119. if (sr_class->notify)
  120. sr_class->notify(sr_info->voltdm, status);
  121. return IRQ_HANDLED;
  122. }
  123. static void sr_set_clk_length(struct omap_sr *sr)
  124. {
  125. struct clk *sys_ck;
  126. u32 sys_clk_speed;
  127. if (cpu_is_omap34xx())
  128. sys_ck = clk_get(NULL, "sys_ck");
  129. else
  130. sys_ck = clk_get(NULL, "sys_clkin_ck");
  131. if (IS_ERR(sys_ck)) {
  132. dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
  133. __func__);
  134. return;
  135. }
  136. sys_clk_speed = clk_get_rate(sys_ck);
  137. clk_put(sys_ck);
  138. switch (sys_clk_speed) {
  139. case 12000000:
  140. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  141. break;
  142. case 13000000:
  143. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  144. break;
  145. case 19200000:
  146. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  147. break;
  148. case 26000000:
  149. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  150. break;
  151. case 38400000:
  152. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  153. break;
  154. default:
  155. dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
  156. __func__, sys_clk_speed);
  157. break;
  158. }
  159. }
  160. static void sr_set_regfields(struct omap_sr *sr)
  161. {
  162. /*
  163. * For time being these values are defined in smartreflex.h
  164. * and populated during init. May be they can be moved to board
  165. * file or pmic specific data structure. In that case these structure
  166. * fields will have to be populated using the pdata or pmic structure.
  167. */
  168. if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  169. sr->err_weight = OMAP3430_SR_ERRWEIGHT;
  170. sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
  171. sr->accum_data = OMAP3430_SR_ACCUMDATA;
  172. if (!(strcmp(sr->voltdm->name, "mpu"))) {
  173. sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
  174. sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
  175. } else {
  176. sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
  177. sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
  178. }
  179. }
  180. }
  181. static void sr_start_vddautocomp(struct omap_sr *sr)
  182. {
  183. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  184. dev_warn(&sr->pdev->dev,
  185. "%s: smartreflex class driver not registered\n",
  186. __func__);
  187. return;
  188. }
  189. if (!sr_class->enable(sr->voltdm))
  190. sr->autocomp_active = true;
  191. }
  192. static void sr_stop_vddautocomp(struct omap_sr *sr)
  193. {
  194. if (!sr_class || !(sr_class->disable)) {
  195. dev_warn(&sr->pdev->dev,
  196. "%s: smartreflex class driver not registered\n",
  197. __func__);
  198. return;
  199. }
  200. if (sr->autocomp_active) {
  201. sr_class->disable(sr->voltdm, 1);
  202. sr->autocomp_active = false;
  203. }
  204. }
  205. /*
  206. * This function handles the intializations which have to be done
  207. * only when both sr device and class driver regiter has
  208. * completed. This will be attempted to be called from both sr class
  209. * driver register and sr device intializtion API's. Only one call
  210. * will ultimately succeed.
  211. *
  212. * Currently this function registers interrupt handler for a particular SR
  213. * if smartreflex class driver is already registered and has
  214. * requested for interrupts and the SR interrupt line in present.
  215. */
  216. static int sr_late_init(struct omap_sr *sr_info)
  217. {
  218. char *name;
  219. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  220. struct resource *mem;
  221. int ret = 0;
  222. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  223. name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
  224. if (name == NULL) {
  225. ret = -ENOMEM;
  226. goto error;
  227. }
  228. ret = request_irq(sr_info->irq, sr_interrupt,
  229. 0, name, (void *)sr_info);
  230. if (ret)
  231. goto error;
  232. disable_irq(sr_info->irq);
  233. }
  234. if (pdata && pdata->enable_on_init)
  235. sr_start_vddautocomp(sr_info);
  236. return ret;
  237. error:
  238. iounmap(sr_info->base);
  239. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  240. release_mem_region(mem->start, resource_size(mem));
  241. list_del(&sr_info->node);
  242. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  243. "interrupt handler. Smartreflex will"
  244. "not function as desired\n", __func__);
  245. kfree(name);
  246. kfree(sr_info);
  247. return ret;
  248. }
  249. static void sr_v1_disable(struct omap_sr *sr)
  250. {
  251. int timeout = 0;
  252. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  253. ERRCONFIG_MCUBOUNDINTST;
  254. /* Enable MCUDisableAcknowledge interrupt */
  255. sr_modify_reg(sr, ERRCONFIG_V1,
  256. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  257. /* SRCONFIG - disable SR */
  258. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  259. /* Disable all other SR interrupts and clear the status as needed */
  260. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  261. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  262. sr_modify_reg(sr, ERRCONFIG_V1,
  263. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  264. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  265. errconf_val);
  266. /*
  267. * Wait for SR to be disabled.
  268. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  269. */
  270. omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  271. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  272. timeout);
  273. if (timeout >= SR_DISABLE_TIMEOUT)
  274. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  275. __func__);
  276. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  277. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  278. ERRCONFIG_MCUDISACKINTST);
  279. }
  280. static void sr_v2_disable(struct omap_sr *sr)
  281. {
  282. int timeout = 0;
  283. /* Enable MCUDisableAcknowledge interrupt */
  284. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  285. /* SRCONFIG - disable SR */
  286. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  287. /*
  288. * Disable all other SR interrupts and clear the status
  289. * write to status register ONLY on need basis - only if status
  290. * is set.
  291. */
  292. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  293. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  294. ERRCONFIG_VPBOUNDINTST_V2);
  295. else
  296. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  297. 0x0);
  298. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  299. IRQENABLE_MCUVALIDINT |
  300. IRQENABLE_MCUBOUNDSINT));
  301. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  302. IRQSTATUS_MCVALIDINT |
  303. IRQSTATUS_MCBOUNDSINT));
  304. /*
  305. * Wait for SR to be disabled.
  306. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  307. */
  308. omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
  309. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  310. timeout);
  311. if (timeout >= SR_DISABLE_TIMEOUT)
  312. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  313. __func__);
  314. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  315. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  316. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  317. }
  318. static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
  319. {
  320. int i;
  321. if (!sr->nvalue_table) {
  322. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  323. __func__);
  324. return 0;
  325. }
  326. for (i = 0; i < sr->nvalue_count; i++) {
  327. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  328. return sr->nvalue_table[i].nvalue;
  329. }
  330. return 0;
  331. }
  332. /* Public Functions */
  333. /**
  334. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  335. * error generator module.
  336. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  337. *
  338. * This API is to be called from the smartreflex class driver to
  339. * configure the error generator module inside the smartreflex module.
  340. * SR settings if using the ERROR module inside Smartreflex.
  341. * SR CLASS 3 by default uses only the ERROR module where as
  342. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  343. * module. Returns 0 on success and error value in case of failure.
  344. */
  345. int sr_configure_errgen(struct voltagedomain *voltdm)
  346. {
  347. u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
  348. u32 vpboundint_st, senp_en = 0, senn_en = 0;
  349. u8 senp_shift, senn_shift;
  350. struct omap_sr *sr = _sr_lookup(voltdm);
  351. if (IS_ERR(sr)) {
  352. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  353. __func__, voltdm->name);
  354. return -EINVAL;
  355. }
  356. if (!sr->clk_length)
  357. sr_set_clk_length(sr);
  358. senp_en = sr->senp_mod;
  359. senn_en = sr->senn_mod;
  360. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  361. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  362. if (sr->ip_type == SR_TYPE_V1) {
  363. sr_config |= SRCONFIG_DELAYCTRL;
  364. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  365. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  366. errconfig_offs = ERRCONFIG_V1;
  367. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  368. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  369. } else if (sr->ip_type == SR_TYPE_V2) {
  370. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  371. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  372. errconfig_offs = ERRCONFIG_V2;
  373. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  374. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  375. } else {
  376. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  377. "module without specifying the ip\n", __func__);
  378. return -EINVAL;
  379. }
  380. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  381. sr_write_reg(sr, SRCONFIG, sr_config);
  382. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  383. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  384. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  385. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  386. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  387. sr_errconfig);
  388. /* Enabling the interrupts if the ERROR module is used */
  389. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  390. vpboundint_en);
  391. return 0;
  392. }
  393. /**
  394. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  395. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  396. *
  397. * This API is to be called from the smartreflex class driver to
  398. * disable the error generator module inside the smartreflex module.
  399. *
  400. * Returns 0 on success and error value in case of failure.
  401. */
  402. int sr_disable_errgen(struct voltagedomain *voltdm)
  403. {
  404. u32 errconfig_offs, vpboundint_en;
  405. u32 vpboundint_st;
  406. struct omap_sr *sr = _sr_lookup(voltdm);
  407. if (IS_ERR(sr)) {
  408. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  409. __func__, voltdm->name);
  410. return -EINVAL;
  411. }
  412. if (sr->ip_type == SR_TYPE_V1) {
  413. errconfig_offs = ERRCONFIG_V1;
  414. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  415. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  416. } else if (sr->ip_type == SR_TYPE_V2) {
  417. errconfig_offs = ERRCONFIG_V2;
  418. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  419. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  420. } else {
  421. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  422. "module without specifying the ip\n", __func__);
  423. return -EINVAL;
  424. }
  425. /* Disable the interrupts of ERROR module */
  426. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  427. /* Disable the Sensor and errorgen */
  428. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  429. return 0;
  430. }
  431. /**
  432. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  433. * minmaxavg module.
  434. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  435. *
  436. * This API is to be called from the smartreflex class driver to
  437. * configure the minmaxavg module inside the smartreflex module.
  438. * SR settings if using the ERROR module inside Smartreflex.
  439. * SR CLASS 3 by default uses only the ERROR module where as
  440. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  441. * module. Returns 0 on success and error value in case of failure.
  442. */
  443. int sr_configure_minmax(struct voltagedomain *voltdm)
  444. {
  445. u32 sr_config, sr_avgwt;
  446. u32 senp_en = 0, senn_en = 0;
  447. u8 senp_shift, senn_shift;
  448. struct omap_sr *sr = _sr_lookup(voltdm);
  449. if (IS_ERR(sr)) {
  450. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  451. __func__, voltdm->name);
  452. return -EINVAL;
  453. }
  454. if (!sr->clk_length)
  455. sr_set_clk_length(sr);
  456. senp_en = sr->senp_mod;
  457. senn_en = sr->senn_mod;
  458. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  459. SRCONFIG_SENENABLE |
  460. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  461. if (sr->ip_type == SR_TYPE_V1) {
  462. sr_config |= SRCONFIG_DELAYCTRL;
  463. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  464. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  465. } else if (sr->ip_type == SR_TYPE_V2) {
  466. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  467. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  468. } else {
  469. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  470. "module without specifying the ip\n", __func__);
  471. return -EINVAL;
  472. }
  473. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  474. sr_write_reg(sr, SRCONFIG, sr_config);
  475. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  476. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  477. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  478. /*
  479. * Enabling the interrupts if MINMAXAVG module is used.
  480. * TODO: check if all the interrupts are mandatory
  481. */
  482. if (sr->ip_type == SR_TYPE_V1) {
  483. sr_modify_reg(sr, ERRCONFIG_V1,
  484. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  485. ERRCONFIG_MCUBOUNDINTEN),
  486. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  487. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  488. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  489. } else if (sr->ip_type == SR_TYPE_V2) {
  490. sr_write_reg(sr, IRQSTATUS,
  491. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  492. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  493. sr_write_reg(sr, IRQENABLE_SET,
  494. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  495. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  496. }
  497. return 0;
  498. }
  499. /**
  500. * sr_enable() - Enables the smartreflex module.
  501. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  502. * @volt: The voltage at which the Voltage domain associated with
  503. * the smartreflex module is operating at.
  504. * This is required only to program the correct Ntarget value.
  505. *
  506. * This API is to be called from the smartreflex class driver to
  507. * enable a smartreflex module. Returns 0 on success. Returns error
  508. * value if the voltage passed is wrong or if ntarget value is wrong.
  509. */
  510. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  511. {
  512. u32 nvalue_reciprocal;
  513. struct omap_volt_data *volt_data;
  514. struct omap_sr *sr = _sr_lookup(voltdm);
  515. int ret;
  516. if (IS_ERR(sr)) {
  517. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  518. __func__, voltdm->name);
  519. return -EINVAL;
  520. }
  521. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  522. if (IS_ERR(volt_data)) {
  523. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  524. "for nominal voltage %ld\n", __func__, volt);
  525. return -ENODATA;
  526. }
  527. nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs);
  528. if (!nvalue_reciprocal) {
  529. dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
  530. __func__, volt);
  531. return -ENODATA;
  532. }
  533. /* errminlimit is opp dependent and hence linked to voltage */
  534. sr->err_minlimit = volt_data->sr_errminlimit;
  535. pm_runtime_get_sync(&sr->pdev->dev);
  536. /* Check if SR is already enabled. If yes do nothing */
  537. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  538. return 0;
  539. /* Configure SR */
  540. ret = sr_class->configure(voltdm);
  541. if (ret)
  542. return ret;
  543. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
  544. /* SRCONFIG - enable SR */
  545. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  546. return 0;
  547. }
  548. /**
  549. * sr_disable() - Disables the smartreflex module.
  550. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  551. *
  552. * This API is to be called from the smartreflex class driver to
  553. * disable a smartreflex module.
  554. */
  555. void sr_disable(struct voltagedomain *voltdm)
  556. {
  557. struct omap_sr *sr = _sr_lookup(voltdm);
  558. if (IS_ERR(sr)) {
  559. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  560. __func__, voltdm->name);
  561. return;
  562. }
  563. /* Check if SR clocks are already disabled. If yes do nothing */
  564. if (pm_runtime_suspended(&sr->pdev->dev))
  565. return;
  566. /*
  567. * Disable SR if only it is indeed enabled. Else just
  568. * disable the clocks.
  569. */
  570. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  571. if (sr->ip_type == SR_TYPE_V1)
  572. sr_v1_disable(sr);
  573. else if (sr->ip_type == SR_TYPE_V2)
  574. sr_v2_disable(sr);
  575. }
  576. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  577. }
  578. /**
  579. * sr_register_class() - API to register a smartreflex class parameters.
  580. * @class_data: The structure containing various sr class specific data.
  581. *
  582. * This API is to be called by the smartreflex class driver to register itself
  583. * with the smartreflex driver during init. Returns 0 on success else the
  584. * error value.
  585. */
  586. int sr_register_class(struct omap_sr_class_data *class_data)
  587. {
  588. struct omap_sr *sr_info;
  589. if (!class_data) {
  590. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  591. __func__);
  592. return -EINVAL;
  593. }
  594. if (sr_class) {
  595. pr_warning("%s: Smartreflex class driver already registered\n",
  596. __func__);
  597. return -EBUSY;
  598. }
  599. sr_class = class_data;
  600. /*
  601. * Call into late init to do intializations that require
  602. * both sr driver and sr class driver to be initiallized.
  603. */
  604. list_for_each_entry(sr_info, &sr_list, node)
  605. sr_late_init(sr_info);
  606. return 0;
  607. }
  608. /**
  609. * omap_sr_enable() - API to enable SR clocks and to call into the
  610. * registered smartreflex class enable API.
  611. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  612. *
  613. * This API is to be called from the kernel in order to enable
  614. * a particular smartreflex module. This API will do the initial
  615. * configurations to turn on the smartreflex module and in turn call
  616. * into the registered smartreflex class enable API.
  617. */
  618. void omap_sr_enable(struct voltagedomain *voltdm)
  619. {
  620. struct omap_sr *sr = _sr_lookup(voltdm);
  621. if (IS_ERR(sr)) {
  622. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  623. __func__, voltdm->name);
  624. return;
  625. }
  626. if (!sr->autocomp_active)
  627. return;
  628. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  629. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  630. "registered\n", __func__);
  631. return;
  632. }
  633. sr_class->enable(voltdm);
  634. }
  635. /**
  636. * omap_sr_disable() - API to disable SR without resetting the voltage
  637. * processor voltage
  638. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  639. *
  640. * This API is to be called from the kernel in order to disable
  641. * a particular smartreflex module. This API will in turn call
  642. * into the registered smartreflex class disable API. This API will tell
  643. * the smartreflex class disable not to reset the VP voltage after
  644. * disabling smartreflex.
  645. */
  646. void omap_sr_disable(struct voltagedomain *voltdm)
  647. {
  648. struct omap_sr *sr = _sr_lookup(voltdm);
  649. if (IS_ERR(sr)) {
  650. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  651. __func__, voltdm->name);
  652. return;
  653. }
  654. if (!sr->autocomp_active)
  655. return;
  656. if (!sr_class || !(sr_class->disable)) {
  657. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  658. "registered\n", __func__);
  659. return;
  660. }
  661. sr_class->disable(voltdm, 0);
  662. }
  663. /**
  664. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  665. * voltage processor voltage
  666. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  667. *
  668. * This API is to be called from the kernel in order to disable
  669. * a particular smartreflex module. This API will in turn call
  670. * into the registered smartreflex class disable API. This API will tell
  671. * the smartreflex class disable to reset the VP voltage after
  672. * disabling smartreflex.
  673. */
  674. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  675. {
  676. struct omap_sr *sr = _sr_lookup(voltdm);
  677. if (IS_ERR(sr)) {
  678. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  679. __func__, voltdm->name);
  680. return;
  681. }
  682. if (!sr->autocomp_active)
  683. return;
  684. if (!sr_class || !(sr_class->disable)) {
  685. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  686. "registered\n", __func__);
  687. return;
  688. }
  689. sr_class->disable(voltdm, 1);
  690. }
  691. /**
  692. * omap_sr_register_pmic() - API to register pmic specific info.
  693. * @pmic_data: The structure containing pmic specific data.
  694. *
  695. * This API is to be called from the PMIC specific code to register with
  696. * smartreflex driver pmic specific info. Currently the only info required
  697. * is the smartreflex init on the PMIC side.
  698. */
  699. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  700. {
  701. if (!pmic_data) {
  702. pr_warning("%s: Trying to register NULL PMIC data structure"
  703. "with smartreflex\n", __func__);
  704. return;
  705. }
  706. sr_pmic_data = pmic_data;
  707. }
  708. /* PM Debug Fs enteries to enable disable smartreflex. */
  709. static int omap_sr_autocomp_show(void *data, u64 *val)
  710. {
  711. struct omap_sr *sr_info = (struct omap_sr *) data;
  712. if (!sr_info) {
  713. pr_warning("%s: omap_sr struct not found\n", __func__);
  714. return -EINVAL;
  715. }
  716. *val = sr_info->autocomp_active;
  717. return 0;
  718. }
  719. static int omap_sr_autocomp_store(void *data, u64 val)
  720. {
  721. struct omap_sr *sr_info = (struct omap_sr *) data;
  722. if (!sr_info) {
  723. pr_warning("%s: omap_sr struct not found\n", __func__);
  724. return -EINVAL;
  725. }
  726. /* Sanity check */
  727. if (val && (val != 1)) {
  728. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  729. return -EINVAL;
  730. }
  731. /* control enable/disable only if there is a delta in value */
  732. if (sr_info->autocomp_active != val) {
  733. if (!val)
  734. sr_stop_vddautocomp(sr_info);
  735. else
  736. sr_start_vddautocomp(sr_info);
  737. }
  738. return 0;
  739. }
  740. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  741. omap_sr_autocomp_store, "%llu\n");
  742. static int __init omap_sr_probe(struct platform_device *pdev)
  743. {
  744. struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  745. struct omap_sr_data *pdata = pdev->dev.platform_data;
  746. struct resource *mem, *irq;
  747. struct dentry *nvalue_dir;
  748. struct omap_volt_data *volt_data;
  749. int i, ret = 0;
  750. char *name;
  751. if (!sr_info) {
  752. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  753. __func__);
  754. return -ENOMEM;
  755. }
  756. if (!pdata) {
  757. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  758. ret = -EINVAL;
  759. goto err_free_devinfo;
  760. }
  761. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  762. if (!mem) {
  763. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  764. ret = -ENODEV;
  765. goto err_free_devinfo;
  766. }
  767. mem = request_mem_region(mem->start, resource_size(mem),
  768. dev_name(&pdev->dev));
  769. if (!mem) {
  770. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  771. ret = -EBUSY;
  772. goto err_free_devinfo;
  773. }
  774. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  775. pm_runtime_enable(&pdev->dev);
  776. pm_runtime_irq_safe(&pdev->dev);
  777. sr_info->pdev = pdev;
  778. sr_info->srid = pdev->id;
  779. sr_info->voltdm = pdata->voltdm;
  780. sr_info->nvalue_table = pdata->nvalue_table;
  781. sr_info->nvalue_count = pdata->nvalue_count;
  782. sr_info->senn_mod = pdata->senn_mod;
  783. sr_info->senp_mod = pdata->senp_mod;
  784. sr_info->autocomp_active = false;
  785. sr_info->ip_type = pdata->ip_type;
  786. sr_info->base = ioremap(mem->start, resource_size(mem));
  787. if (!sr_info->base) {
  788. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  789. ret = -ENOMEM;
  790. goto err_release_region;
  791. }
  792. if (irq)
  793. sr_info->irq = irq->start;
  794. sr_set_clk_length(sr_info);
  795. sr_set_regfields(sr_info);
  796. list_add(&sr_info->node, &sr_list);
  797. /*
  798. * Call into late init to do intializations that require
  799. * both sr driver and sr class driver to be initiallized.
  800. */
  801. if (sr_class) {
  802. ret = sr_late_init(sr_info);
  803. if (ret) {
  804. pr_warning("%s: Error in SR late init\n", __func__);
  805. goto err_iounmap;
  806. }
  807. }
  808. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  809. if (!sr_dbg_dir) {
  810. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  811. if (!sr_dbg_dir) {
  812. ret = PTR_ERR(sr_dbg_dir);
  813. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  814. __func__, ret);
  815. goto err_iounmap;
  816. }
  817. }
  818. name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
  819. if (!name) {
  820. dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n",
  821. __func__);
  822. ret = -ENOMEM;
  823. goto err_iounmap;
  824. }
  825. sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
  826. kfree(name);
  827. if (IS_ERR(sr_info->dbg_dir)) {
  828. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  829. __func__);
  830. ret = PTR_ERR(sr_info->dbg_dir);
  831. goto err_iounmap;
  832. }
  833. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  834. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  835. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  836. &sr_info->err_weight);
  837. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  838. &sr_info->err_maxlimit);
  839. (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir,
  840. &sr_info->err_minlimit);
  841. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  842. if (IS_ERR(nvalue_dir)) {
  843. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  844. "for n-values\n", __func__);
  845. ret = PTR_ERR(nvalue_dir);
  846. goto err_debugfs;
  847. }
  848. omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
  849. if (!volt_data) {
  850. dev_warn(&pdev->dev, "%s: No Voltage table for the"
  851. " corresponding vdd vdd_%s. Cannot create debugfs"
  852. "entries for n-values\n",
  853. __func__, sr_info->voltdm->name);
  854. ret = -ENODATA;
  855. goto err_debugfs;
  856. }
  857. for (i = 0; i < sr_info->nvalue_count; i++) {
  858. char name[NVALUE_NAME_LEN + 1];
  859. snprintf(name, sizeof(name), "volt_%d",
  860. volt_data[i].volt_nominal);
  861. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  862. &(sr_info->nvalue_table[i].nvalue));
  863. }
  864. return ret;
  865. err_debugfs:
  866. debugfs_remove_recursive(sr_info->dbg_dir);
  867. err_iounmap:
  868. list_del(&sr_info->node);
  869. iounmap(sr_info->base);
  870. err_release_region:
  871. release_mem_region(mem->start, resource_size(mem));
  872. err_free_devinfo:
  873. kfree(sr_info);
  874. return ret;
  875. }
  876. static int __devexit omap_sr_remove(struct platform_device *pdev)
  877. {
  878. struct omap_sr_data *pdata = pdev->dev.platform_data;
  879. struct omap_sr *sr_info;
  880. struct resource *mem;
  881. if (!pdata) {
  882. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  883. return -EINVAL;
  884. }
  885. sr_info = _sr_lookup(pdata->voltdm);
  886. if (IS_ERR(sr_info)) {
  887. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  888. __func__);
  889. return -EINVAL;
  890. }
  891. if (sr_info->autocomp_active)
  892. sr_stop_vddautocomp(sr_info);
  893. if (sr_info->dbg_dir)
  894. debugfs_remove_recursive(sr_info->dbg_dir);
  895. list_del(&sr_info->node);
  896. iounmap(sr_info->base);
  897. kfree(sr_info);
  898. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  899. release_mem_region(mem->start, resource_size(mem));
  900. return 0;
  901. }
  902. static void __devexit omap_sr_shutdown(struct platform_device *pdev)
  903. {
  904. struct omap_sr_data *pdata = pdev->dev.platform_data;
  905. struct omap_sr *sr_info;
  906. if (!pdata) {
  907. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  908. return;
  909. }
  910. sr_info = _sr_lookup(pdata->voltdm);
  911. if (IS_ERR(sr_info)) {
  912. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  913. __func__);
  914. return;
  915. }
  916. if (sr_info->autocomp_active)
  917. sr_stop_vddautocomp(sr_info);
  918. return;
  919. }
  920. static struct platform_driver smartreflex_driver = {
  921. .remove = __devexit_p(omap_sr_remove),
  922. .shutdown = __devexit_p(omap_sr_shutdown),
  923. .driver = {
  924. .name = "smartreflex",
  925. },
  926. };
  927. static int __init sr_init(void)
  928. {
  929. int ret = 0;
  930. /*
  931. * sr_init is a late init. If by then a pmic specific API is not
  932. * registered either there is no need for anything to be done on
  933. * the PMIC side or somebody has forgotten to register a PMIC
  934. * handler. Warn for the second condition.
  935. */
  936. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  937. sr_pmic_data->sr_pmic_init();
  938. else
  939. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  940. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  941. if (ret) {
  942. pr_err("%s: platform driver register failed for SR\n",
  943. __func__);
  944. return ret;
  945. }
  946. return 0;
  947. }
  948. static void __exit sr_exit(void)
  949. {
  950. platform_driver_unregister(&smartreflex_driver);
  951. }
  952. late_initcall(sr_init);
  953. module_exit(sr_exit);
  954. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  955. MODULE_LICENSE("GPL");
  956. MODULE_ALIAS("platform:" DRIVER_NAME);
  957. MODULE_AUTHOR("Texas Instruments Inc");