rtc-sa1100.c 13 KB

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  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@fluxnic.net>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/rtc.h>
  26. #include <linux/init.h>
  27. #include <linux/fs.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/string.h>
  30. #include <linux/pm.h>
  31. #include <linux/bitops.h>
  32. #include <mach/hardware.h>
  33. #include <asm/irq.h>
  34. #ifdef CONFIG_ARCH_PXA
  35. #include <mach/regs-rtc.h>
  36. #include <mach/regs-ost.h>
  37. #endif
  38. #define RTC_DEF_DIVIDER (32768 - 1)
  39. #define RTC_DEF_TRIM 0
  40. static const unsigned long RTC_FREQ = 1024;
  41. static unsigned long timer_freq;
  42. static struct rtc_time rtc_alarm;
  43. static DEFINE_SPINLOCK(sa1100_rtc_lock);
  44. static inline int rtc_periodic_alarm(struct rtc_time *tm)
  45. {
  46. return (tm->tm_year == -1) ||
  47. ((unsigned)tm->tm_mon >= 12) ||
  48. ((unsigned)(tm->tm_mday - 1) >= 31) ||
  49. ((unsigned)tm->tm_hour > 23) ||
  50. ((unsigned)tm->tm_min > 59) ||
  51. ((unsigned)tm->tm_sec > 59);
  52. }
  53. /*
  54. * Calculate the next alarm time given the requested alarm time mask
  55. * and the current time.
  56. */
  57. static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
  58. struct rtc_time *alrm)
  59. {
  60. unsigned long next_time;
  61. unsigned long now_time;
  62. next->tm_year = now->tm_year;
  63. next->tm_mon = now->tm_mon;
  64. next->tm_mday = now->tm_mday;
  65. next->tm_hour = alrm->tm_hour;
  66. next->tm_min = alrm->tm_min;
  67. next->tm_sec = alrm->tm_sec;
  68. rtc_tm_to_time(now, &now_time);
  69. rtc_tm_to_time(next, &next_time);
  70. if (next_time < now_time) {
  71. /* Advance one day */
  72. next_time += 60 * 60 * 24;
  73. rtc_time_to_tm(next_time, next);
  74. }
  75. }
  76. static int rtc_update_alarm(struct rtc_time *alrm)
  77. {
  78. struct rtc_time alarm_tm, now_tm;
  79. unsigned long now, time;
  80. int ret;
  81. do {
  82. now = RCNR;
  83. rtc_time_to_tm(now, &now_tm);
  84. rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
  85. ret = rtc_tm_to_time(&alarm_tm, &time);
  86. if (ret != 0)
  87. break;
  88. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  89. RTAR = time;
  90. } while (now != RCNR);
  91. return ret;
  92. }
  93. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  94. {
  95. struct platform_device *pdev = to_platform_device(dev_id);
  96. struct rtc_device *rtc = platform_get_drvdata(pdev);
  97. unsigned int rtsr;
  98. unsigned long events = 0;
  99. spin_lock(&sa1100_rtc_lock);
  100. rtsr = RTSR;
  101. /* clear interrupt sources */
  102. RTSR = 0;
  103. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  104. * See also the comments in sa1100_rtc_probe(). */
  105. if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  106. /* This is the original code, before there was the if test
  107. * above. This code does not clear interrupts that were not
  108. * enabled. */
  109. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  110. } else {
  111. /* For some reason, it is possible to enter this routine
  112. * without interruptions enabled, it has been tested with
  113. * several units (Bug in SA11xx chip?).
  114. *
  115. * This situation leads to an infinite "loop" of interrupt
  116. * routine calling and as a result the processor seems to
  117. * lock on its first call to open(). */
  118. RTSR = RTSR_AL | RTSR_HZ;
  119. }
  120. /* clear alarm interrupt if it has occurred */
  121. if (rtsr & RTSR_AL)
  122. rtsr &= ~RTSR_ALE;
  123. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  124. /* update irq data & counter */
  125. if (rtsr & RTSR_AL)
  126. events |= RTC_AF | RTC_IRQF;
  127. if (rtsr & RTSR_HZ)
  128. events |= RTC_UF | RTC_IRQF;
  129. rtc_update_irq(rtc, 1, events);
  130. if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
  131. rtc_update_alarm(&rtc_alarm);
  132. spin_unlock(&sa1100_rtc_lock);
  133. return IRQ_HANDLED;
  134. }
  135. static int sa1100_irq_set_freq(struct device *dev, int freq)
  136. {
  137. if (freq < 1 || freq > timer_freq) {
  138. return -EINVAL;
  139. } else {
  140. struct rtc_device *rtc = (struct rtc_device *)dev;
  141. rtc->irq_freq = freq;
  142. return 0;
  143. }
  144. }
  145. static int rtc_timer1_count;
  146. static int sa1100_irq_set_state(struct device *dev, int enabled)
  147. {
  148. spin_lock_irq(&sa1100_rtc_lock);
  149. if (enabled) {
  150. struct rtc_device *rtc = (struct rtc_device *)dev;
  151. OSMR1 = timer_freq / rtc->irq_freq + OSCR;
  152. OIER |= OIER_E1;
  153. rtc_timer1_count = 1;
  154. } else {
  155. OIER &= ~OIER_E1;
  156. }
  157. spin_unlock_irq(&sa1100_rtc_lock);
  158. return 0;
  159. }
  160. static inline int sa1100_timer1_retrigger(struct rtc_device *rtc)
  161. {
  162. unsigned long diff;
  163. unsigned long period = timer_freq / rtc->irq_freq;
  164. spin_lock_irq(&sa1100_rtc_lock);
  165. do {
  166. OSMR1 += period;
  167. diff = OSMR1 - OSCR;
  168. /* If OSCR > OSMR1, diff is a very large number (unsigned
  169. * math). This means we have a lost interrupt. */
  170. } while (diff > period);
  171. OIER |= OIER_E1;
  172. spin_unlock_irq(&sa1100_rtc_lock);
  173. return 0;
  174. }
  175. static irqreturn_t timer1_interrupt(int irq, void *dev_id)
  176. {
  177. struct platform_device *pdev = to_platform_device(dev_id);
  178. struct rtc_device *rtc = platform_get_drvdata(pdev);
  179. /*
  180. * If we match for the first time, rtc_timer1_count will be 1.
  181. * Otherwise, we wrapped around (very unlikely but
  182. * still possible) so compute the amount of missed periods.
  183. * The match reg is updated only when the data is actually retrieved
  184. * to avoid unnecessary interrupts.
  185. */
  186. OSSR = OSSR_M1; /* clear match on timer1 */
  187. rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF);
  188. if (rtc_timer1_count == 1)
  189. rtc_timer1_count =
  190. (rtc->irq_freq * ((1 << 30) / (timer_freq >> 2)));
  191. /* retrigger. */
  192. sa1100_timer1_retrigger(rtc);
  193. return IRQ_HANDLED;
  194. }
  195. static int sa1100_rtc_read_callback(struct device *dev, int data)
  196. {
  197. if (data & RTC_PF) {
  198. struct rtc_device *rtc = (struct rtc_device *)dev;
  199. /* interpolate missed periods and set match for the next */
  200. unsigned long period = timer_freq / rtc->irq_freq;
  201. unsigned long oscr = OSCR;
  202. unsigned long osmr1 = OSMR1;
  203. unsigned long missed = (oscr - osmr1)/period;
  204. data += missed << 8;
  205. OSSR = OSSR_M1; /* clear match on timer 1 */
  206. OSMR1 = osmr1 + (missed + 1)*period;
  207. /* Ensure we didn't miss another match in the mean time.
  208. * Here we compare (match - OSCR) 8 instead of 0 --
  209. * see comment in pxa_timer_interrupt() for explanation.
  210. */
  211. while ((signed long)((osmr1 = OSMR1) - OSCR) <= 8) {
  212. data += 0x100;
  213. OSSR = OSSR_M1; /* clear match on timer 1 */
  214. OSMR1 = osmr1 + period;
  215. }
  216. }
  217. return data;
  218. }
  219. static int sa1100_rtc_open(struct device *dev)
  220. {
  221. int ret;
  222. struct rtc_device *rtc = (struct rtc_device *)dev;
  223. ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
  224. "rtc 1Hz", dev);
  225. if (ret) {
  226. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
  227. goto fail_ui;
  228. }
  229. ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
  230. "rtc Alrm", dev);
  231. if (ret) {
  232. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
  233. goto fail_ai;
  234. }
  235. ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED,
  236. "rtc timer", dev);
  237. if (ret) {
  238. dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
  239. goto fail_pi;
  240. }
  241. rtc->max_user_freq = RTC_FREQ;
  242. sa1100_irq_set_freq(dev, RTC_FREQ);
  243. return 0;
  244. fail_pi:
  245. free_irq(IRQ_RTCAlrm, dev);
  246. fail_ai:
  247. free_irq(IRQ_RTC1Hz, dev);
  248. fail_ui:
  249. return ret;
  250. }
  251. static void sa1100_rtc_release(struct device *dev)
  252. {
  253. spin_lock_irq(&sa1100_rtc_lock);
  254. RTSR = 0;
  255. OIER &= ~OIER_E1;
  256. OSSR = OSSR_M1;
  257. spin_unlock_irq(&sa1100_rtc_lock);
  258. free_irq(IRQ_OST1, dev);
  259. free_irq(IRQ_RTCAlrm, dev);
  260. free_irq(IRQ_RTC1Hz, dev);
  261. }
  262. static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
  263. unsigned long arg)
  264. {
  265. switch (cmd) {
  266. case RTC_UIE_OFF:
  267. spin_lock_irq(&sa1100_rtc_lock);
  268. RTSR &= ~RTSR_HZE;
  269. spin_unlock_irq(&sa1100_rtc_lock);
  270. return 0;
  271. case RTC_UIE_ON:
  272. spin_lock_irq(&sa1100_rtc_lock);
  273. RTSR |= RTSR_HZE;
  274. spin_unlock_irq(&sa1100_rtc_lock);
  275. return 0;
  276. }
  277. return -ENOIOCTLCMD;
  278. }
  279. static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  280. {
  281. spin_lock_irq(&sa1100_rtc_lock);
  282. if (enabled)
  283. RTSR |= RTSR_ALE;
  284. else
  285. RTSR &= ~RTSR_ALE;
  286. spin_unlock_irq(&sa1100_rtc_lock);
  287. return 0;
  288. }
  289. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  290. {
  291. rtc_time_to_tm(RCNR, tm);
  292. return 0;
  293. }
  294. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  295. {
  296. unsigned long time;
  297. int ret;
  298. ret = rtc_tm_to_time(tm, &time);
  299. if (ret == 0)
  300. RCNR = time;
  301. return ret;
  302. }
  303. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  304. {
  305. u32 rtsr;
  306. memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
  307. rtsr = RTSR;
  308. alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
  309. alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
  310. return 0;
  311. }
  312. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  313. {
  314. int ret;
  315. spin_lock_irq(&sa1100_rtc_lock);
  316. ret = rtc_update_alarm(&alrm->time);
  317. if (ret == 0) {
  318. if (alrm->enabled)
  319. RTSR |= RTSR_ALE;
  320. else
  321. RTSR &= ~RTSR_ALE;
  322. }
  323. spin_unlock_irq(&sa1100_rtc_lock);
  324. return ret;
  325. }
  326. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  327. {
  328. struct rtc_device *rtc = (struct rtc_device *)dev;
  329. seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR);
  330. seq_printf(seq, "update_IRQ\t: %s\n",
  331. (RTSR & RTSR_HZE) ? "yes" : "no");
  332. seq_printf(seq, "periodic_IRQ\t: %s\n",
  333. (OIER & OIER_E1) ? "yes" : "no");
  334. seq_printf(seq, "periodic_freq\t: %d\n", rtc->irq_freq);
  335. seq_printf(seq, "RTSR\t\t: 0x%08x\n", (u32)RTSR);
  336. return 0;
  337. }
  338. static const struct rtc_class_ops sa1100_rtc_ops = {
  339. .open = sa1100_rtc_open,
  340. .read_callback = sa1100_rtc_read_callback,
  341. .release = sa1100_rtc_release,
  342. .ioctl = sa1100_rtc_ioctl,
  343. .read_time = sa1100_rtc_read_time,
  344. .set_time = sa1100_rtc_set_time,
  345. .read_alarm = sa1100_rtc_read_alarm,
  346. .set_alarm = sa1100_rtc_set_alarm,
  347. .proc = sa1100_rtc_proc,
  348. .irq_set_freq = sa1100_irq_set_freq,
  349. .irq_set_state = sa1100_irq_set_state,
  350. .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
  351. };
  352. static int sa1100_rtc_probe(struct platform_device *pdev)
  353. {
  354. struct rtc_device *rtc;
  355. timer_freq = get_clock_tick_rate();
  356. /*
  357. * According to the manual we should be able to let RTTR be zero
  358. * and then a default diviser for a 32.768KHz clock is used.
  359. * Apparently this doesn't work, at least for my SA1110 rev 5.
  360. * If the clock divider is uninitialized then reset it to the
  361. * default value to get the 1Hz clock.
  362. */
  363. if (RTTR == 0) {
  364. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  365. dev_warn(&pdev->dev, "warning: "
  366. "initializing default clock divider/trim value\n");
  367. /* The current RTC value probably doesn't make sense either */
  368. RCNR = 0;
  369. }
  370. device_init_wakeup(&pdev->dev, 1);
  371. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  372. THIS_MODULE);
  373. if (IS_ERR(rtc))
  374. return PTR_ERR(rtc);
  375. platform_set_drvdata(pdev, rtc);
  376. /* Set the irq_freq */
  377. /*TODO: Find out who is messing with this value after we initialize
  378. * it here.*/
  379. rtc->irq_freq = RTC_FREQ;
  380. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  381. * See also the comments in sa1100_rtc_interrupt().
  382. *
  383. * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
  384. * interrupt pending, even though interrupts were never enabled.
  385. * In this case, this bit it must be reset before enabling
  386. * interruptions to avoid a nonexistent interrupt to occur.
  387. *
  388. * In principle, the same problem would apply to bit 0, although it has
  389. * never been observed to happen.
  390. *
  391. * This issue is addressed both here and in sa1100_rtc_interrupt().
  392. * If the issue is not addressed here, in the times when the processor
  393. * wakes up with the bit set there will be one spurious interrupt.
  394. *
  395. * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
  396. * safe side, once the condition that lead to this strange
  397. * initialization is unknown and could in principle happen during
  398. * normal processing.
  399. *
  400. * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
  401. * the corresponding bits in RTSR. */
  402. RTSR = RTSR_AL | RTSR_HZ;
  403. return 0;
  404. }
  405. static int sa1100_rtc_remove(struct platform_device *pdev)
  406. {
  407. struct rtc_device *rtc = platform_get_drvdata(pdev);
  408. if (rtc)
  409. rtc_device_unregister(rtc);
  410. return 0;
  411. }
  412. #ifdef CONFIG_PM
  413. static int sa1100_rtc_suspend(struct device *dev)
  414. {
  415. if (device_may_wakeup(dev))
  416. enable_irq_wake(IRQ_RTCAlrm);
  417. return 0;
  418. }
  419. static int sa1100_rtc_resume(struct device *dev)
  420. {
  421. if (device_may_wakeup(dev))
  422. disable_irq_wake(IRQ_RTCAlrm);
  423. return 0;
  424. }
  425. static const struct dev_pm_ops sa1100_rtc_pm_ops = {
  426. .suspend = sa1100_rtc_suspend,
  427. .resume = sa1100_rtc_resume,
  428. };
  429. #endif
  430. static struct platform_driver sa1100_rtc_driver = {
  431. .probe = sa1100_rtc_probe,
  432. .remove = sa1100_rtc_remove,
  433. .driver = {
  434. .name = "sa1100-rtc",
  435. #ifdef CONFIG_PM
  436. .pm = &sa1100_rtc_pm_ops,
  437. #endif
  438. },
  439. };
  440. static int __init sa1100_rtc_init(void)
  441. {
  442. return platform_driver_register(&sa1100_rtc_driver);
  443. }
  444. static void __exit sa1100_rtc_exit(void)
  445. {
  446. platform_driver_unregister(&sa1100_rtc_driver);
  447. }
  448. module_init(sa1100_rtc_init);
  449. module_exit(sa1100_rtc_exit);
  450. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  451. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  452. MODULE_LICENSE("GPL");
  453. MODULE_ALIAS("platform:sa1100-rtc");