rtc-omap.c 14 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  24. * with century-range alarm matching, driven by the 32kHz clock.
  25. *
  26. * The main user-visible ways it differs from PC RTCs are by omitting
  27. * "don't care" alarm fields and sub-second periodic IRQs, and having
  28. * an autoadjust mechanism to calibrate to the true oscillator rate.
  29. *
  30. * Board-specific wiring options include using split power mode with
  31. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  32. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  33. * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  34. * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  35. */
  36. #define OMAP_RTC_BASE 0xfffb4800
  37. /* RTC registers */
  38. #define OMAP_RTC_SECONDS_REG 0x00
  39. #define OMAP_RTC_MINUTES_REG 0x04
  40. #define OMAP_RTC_HOURS_REG 0x08
  41. #define OMAP_RTC_DAYS_REG 0x0C
  42. #define OMAP_RTC_MONTHS_REG 0x10
  43. #define OMAP_RTC_YEARS_REG 0x14
  44. #define OMAP_RTC_WEEKS_REG 0x18
  45. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  46. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  47. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  48. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  49. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  50. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  51. #define OMAP_RTC_CTRL_REG 0x40
  52. #define OMAP_RTC_STATUS_REG 0x44
  53. #define OMAP_RTC_INTERRUPTS_REG 0x48
  54. #define OMAP_RTC_COMP_LSB_REG 0x4c
  55. #define OMAP_RTC_COMP_MSB_REG 0x50
  56. #define OMAP_RTC_OSC_REG 0x54
  57. /* OMAP_RTC_CTRL_REG bit fields: */
  58. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  59. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  60. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  61. #define OMAP_RTC_CTRL_TEST (1<<4)
  62. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  63. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  64. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  65. #define OMAP_RTC_CTRL_STOP (1<<0)
  66. /* OMAP_RTC_STATUS_REG bit fields: */
  67. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  68. #define OMAP_RTC_STATUS_ALARM (1<<6)
  69. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  70. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  71. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  72. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  73. #define OMAP_RTC_STATUS_RUN (1<<1)
  74. #define OMAP_RTC_STATUS_BUSY (1<<0)
  75. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  76. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  77. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  78. static void __iomem *rtc_base;
  79. #define rtc_read(addr) __raw_readb(rtc_base + (addr))
  80. #define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr))
  81. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  82. * so the only other requirement is that register accesses which
  83. * require BUSY to be clear are made with IRQs locally disabled
  84. */
  85. static void rtc_wait_not_busy(void)
  86. {
  87. int count = 0;
  88. u8 status;
  89. /* BUSY may stay active for 1/32768 second (~30 usec) */
  90. for (count = 0; count < 50; count++) {
  91. status = rtc_read(OMAP_RTC_STATUS_REG);
  92. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  93. break;
  94. udelay(1);
  95. }
  96. /* now we have ~15 usec to read/write various registers */
  97. }
  98. static irqreturn_t rtc_irq(int irq, void *rtc)
  99. {
  100. unsigned long events = 0;
  101. u8 irq_data;
  102. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  103. /* alarm irq? */
  104. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  105. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  106. events |= RTC_IRQF | RTC_AF;
  107. }
  108. /* 1/sec periodic/update irq? */
  109. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  110. events |= RTC_IRQF | RTC_UF;
  111. rtc_update_irq(rtc, 1, events);
  112. return IRQ_HANDLED;
  113. }
  114. #ifdef CONFIG_RTC_INTF_DEV
  115. static int
  116. omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  117. {
  118. u8 reg;
  119. switch (cmd) {
  120. case RTC_UIE_OFF:
  121. case RTC_UIE_ON:
  122. break;
  123. default:
  124. return -ENOIOCTLCMD;
  125. }
  126. local_irq_disable();
  127. rtc_wait_not_busy();
  128. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  129. switch (cmd) {
  130. /* UIE = Update Interrupt Enable (1/second) */
  131. case RTC_UIE_OFF:
  132. reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
  133. break;
  134. case RTC_UIE_ON:
  135. reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
  136. break;
  137. }
  138. rtc_wait_not_busy();
  139. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  140. local_irq_enable();
  141. return 0;
  142. }
  143. #else
  144. #define omap_rtc_ioctl NULL
  145. #endif
  146. static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  147. {
  148. u8 reg;
  149. local_irq_disable();
  150. rtc_wait_not_busy();
  151. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  152. if (enabled)
  153. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  154. else
  155. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  156. rtc_wait_not_busy();
  157. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  158. local_irq_enable();
  159. return 0;
  160. }
  161. /* this hardware doesn't support "don't care" alarm fields */
  162. static int tm2bcd(struct rtc_time *tm)
  163. {
  164. if (rtc_valid_tm(tm) != 0)
  165. return -EINVAL;
  166. tm->tm_sec = bin2bcd(tm->tm_sec);
  167. tm->tm_min = bin2bcd(tm->tm_min);
  168. tm->tm_hour = bin2bcd(tm->tm_hour);
  169. tm->tm_mday = bin2bcd(tm->tm_mday);
  170. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  171. /* epoch == 1900 */
  172. if (tm->tm_year < 100 || tm->tm_year > 199)
  173. return -EINVAL;
  174. tm->tm_year = bin2bcd(tm->tm_year - 100);
  175. return 0;
  176. }
  177. static void bcd2tm(struct rtc_time *tm)
  178. {
  179. tm->tm_sec = bcd2bin(tm->tm_sec);
  180. tm->tm_min = bcd2bin(tm->tm_min);
  181. tm->tm_hour = bcd2bin(tm->tm_hour);
  182. tm->tm_mday = bcd2bin(tm->tm_mday);
  183. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  184. /* epoch == 1900 */
  185. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  186. }
  187. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  188. {
  189. /* we don't report wday/yday/isdst ... */
  190. local_irq_disable();
  191. rtc_wait_not_busy();
  192. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  193. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  194. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  195. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  196. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  197. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  198. local_irq_enable();
  199. bcd2tm(tm);
  200. return 0;
  201. }
  202. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  203. {
  204. if (tm2bcd(tm) < 0)
  205. return -EINVAL;
  206. local_irq_disable();
  207. rtc_wait_not_busy();
  208. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  209. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  210. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  211. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  212. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  213. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  214. local_irq_enable();
  215. return 0;
  216. }
  217. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  218. {
  219. local_irq_disable();
  220. rtc_wait_not_busy();
  221. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  222. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  223. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  224. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  225. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  226. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  227. local_irq_enable();
  228. bcd2tm(&alm->time);
  229. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  230. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  231. return 0;
  232. }
  233. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  234. {
  235. u8 reg;
  236. if (tm2bcd(&alm->time) < 0)
  237. return -EINVAL;
  238. local_irq_disable();
  239. rtc_wait_not_busy();
  240. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  241. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  242. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  243. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  244. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  245. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  246. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  247. if (alm->enabled)
  248. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  249. else
  250. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  251. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  252. local_irq_enable();
  253. return 0;
  254. }
  255. static struct rtc_class_ops omap_rtc_ops = {
  256. .ioctl = omap_rtc_ioctl,
  257. .read_time = omap_rtc_read_time,
  258. .set_time = omap_rtc_set_time,
  259. .read_alarm = omap_rtc_read_alarm,
  260. .set_alarm = omap_rtc_set_alarm,
  261. .alarm_irq_enable = omap_rtc_alarm_irq_enable,
  262. };
  263. static int omap_rtc_alarm;
  264. static int omap_rtc_timer;
  265. static int __init omap_rtc_probe(struct platform_device *pdev)
  266. {
  267. struct resource *res, *mem;
  268. struct rtc_device *rtc;
  269. u8 reg, new_ctrl;
  270. omap_rtc_timer = platform_get_irq(pdev, 0);
  271. if (omap_rtc_timer <= 0) {
  272. pr_debug("%s: no update irq?\n", pdev->name);
  273. return -ENOENT;
  274. }
  275. omap_rtc_alarm = platform_get_irq(pdev, 1);
  276. if (omap_rtc_alarm <= 0) {
  277. pr_debug("%s: no alarm irq?\n", pdev->name);
  278. return -ENOENT;
  279. }
  280. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  281. if (!res) {
  282. pr_debug("%s: RTC resource data missing\n", pdev->name);
  283. return -ENOENT;
  284. }
  285. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  286. if (!mem) {
  287. pr_debug("%s: RTC registers at %08x are not free\n",
  288. pdev->name, res->start);
  289. return -EBUSY;
  290. }
  291. rtc_base = ioremap(res->start, resource_size(res));
  292. if (!rtc_base) {
  293. pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
  294. goto fail;
  295. }
  296. rtc = rtc_device_register(pdev->name, &pdev->dev,
  297. &omap_rtc_ops, THIS_MODULE);
  298. if (IS_ERR(rtc)) {
  299. pr_debug("%s: can't register RTC device, err %ld\n",
  300. pdev->name, PTR_ERR(rtc));
  301. goto fail0;
  302. }
  303. platform_set_drvdata(pdev, rtc);
  304. dev_set_drvdata(&rtc->dev, mem);
  305. /* clear pending irqs, and set 1/second periodic,
  306. * which we'll use instead of update irqs
  307. */
  308. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  309. /* clear old status */
  310. reg = rtc_read(OMAP_RTC_STATUS_REG);
  311. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  312. pr_info("%s: RTC power up reset detected\n",
  313. pdev->name);
  314. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  315. }
  316. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  317. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  318. /* handle periodic and alarm irqs */
  319. if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
  320. dev_name(&rtc->dev), rtc)) {
  321. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  322. pdev->name, omap_rtc_timer);
  323. goto fail1;
  324. }
  325. if ((omap_rtc_timer != omap_rtc_alarm) &&
  326. (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
  327. dev_name(&rtc->dev), rtc))) {
  328. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  329. pdev->name, omap_rtc_alarm);
  330. goto fail2;
  331. }
  332. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  333. reg = rtc_read(OMAP_RTC_CTRL_REG);
  334. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  335. pr_info("%s: already running\n", pdev->name);
  336. /* force to 24 hour mode */
  337. new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  338. new_ctrl |= OMAP_RTC_CTRL_STOP;
  339. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  340. *
  341. * - Device wake-up capability setting should come through chip
  342. * init logic. OMAP1 boards should initialize the "wakeup capable"
  343. * flag in the platform device if the board is wired right for
  344. * being woken up by RTC alarm. For OMAP-L138, this capability
  345. * is built into the SoC by the "Deep Sleep" capability.
  346. *
  347. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  348. * rather than nPWRON_RESET, should forcibly enable split
  349. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  350. * is write-only, and always reads as zero...)
  351. */
  352. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  353. pr_info("%s: split power mode\n", pdev->name);
  354. if (reg != new_ctrl)
  355. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  356. return 0;
  357. fail2:
  358. free_irq(omap_rtc_timer, NULL);
  359. fail1:
  360. rtc_device_unregister(rtc);
  361. fail0:
  362. iounmap(rtc_base);
  363. fail:
  364. release_mem_region(mem->start, resource_size(mem));
  365. return -EIO;
  366. }
  367. static int __exit omap_rtc_remove(struct platform_device *pdev)
  368. {
  369. struct rtc_device *rtc = platform_get_drvdata(pdev);
  370. struct resource *mem = dev_get_drvdata(&rtc->dev);
  371. device_init_wakeup(&pdev->dev, 0);
  372. /* leave rtc running, but disable irqs */
  373. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  374. free_irq(omap_rtc_timer, rtc);
  375. if (omap_rtc_timer != omap_rtc_alarm)
  376. free_irq(omap_rtc_alarm, rtc);
  377. rtc_device_unregister(rtc);
  378. iounmap(rtc_base);
  379. release_mem_region(mem->start, resource_size(mem));
  380. return 0;
  381. }
  382. #ifdef CONFIG_PM
  383. static u8 irqstat;
  384. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  385. {
  386. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  387. /* FIXME the RTC alarm is not currently acting as a wakeup event
  388. * source, and in fact this enable() call is just saving a flag
  389. * that's never used...
  390. */
  391. if (device_may_wakeup(&pdev->dev))
  392. enable_irq_wake(omap_rtc_alarm);
  393. else
  394. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  395. return 0;
  396. }
  397. static int omap_rtc_resume(struct platform_device *pdev)
  398. {
  399. if (device_may_wakeup(&pdev->dev))
  400. disable_irq_wake(omap_rtc_alarm);
  401. else
  402. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  403. return 0;
  404. }
  405. #else
  406. #define omap_rtc_suspend NULL
  407. #define omap_rtc_resume NULL
  408. #endif
  409. static void omap_rtc_shutdown(struct platform_device *pdev)
  410. {
  411. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  412. }
  413. MODULE_ALIAS("platform:omap_rtc");
  414. static struct platform_driver omap_rtc_driver = {
  415. .remove = __exit_p(omap_rtc_remove),
  416. .suspend = omap_rtc_suspend,
  417. .resume = omap_rtc_resume,
  418. .shutdown = omap_rtc_shutdown,
  419. .driver = {
  420. .name = "omap_rtc",
  421. .owner = THIS_MODULE,
  422. },
  423. };
  424. static int __init rtc_init(void)
  425. {
  426. return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
  427. }
  428. module_init(rtc_init);
  429. static void __exit rtc_exit(void)
  430. {
  431. platform_driver_unregister(&omap_rtc_driver);
  432. }
  433. module_exit(rtc_exit);
  434. MODULE_AUTHOR("George G. Davis (and others)");
  435. MODULE_LICENSE("GPL");