r600_audio.c 7.3 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Christian König.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Christian König
  25. */
  26. #include "drmP.h"
  27. #include "radeon.h"
  28. #include "radeon_reg.h"
  29. #include "radeon_asic.h"
  30. #include "atom.h"
  31. /*
  32. * check if enc_priv stores radeon_encoder_atom_dig
  33. */
  34. static bool radeon_dig_encoder(struct drm_encoder *encoder)
  35. {
  36. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  37. switch (radeon_encoder->encoder_id) {
  38. case ENCODER_OBJECT_ID_INTERNAL_LVDS:
  39. case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
  40. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
  41. case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
  42. case ENCODER_OBJECT_ID_INTERNAL_DVO1:
  43. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
  44. case ENCODER_OBJECT_ID_INTERNAL_DDI:
  45. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
  46. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
  47. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
  48. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
  49. return true;
  50. }
  51. return false;
  52. }
  53. /*
  54. * check if the chipset is supported
  55. */
  56. static int r600_audio_chipset_supported(struct radeon_device *rdev)
  57. {
  58. return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
  59. || rdev->family == CHIP_RS600
  60. || rdev->family == CHIP_RS690
  61. || rdev->family == CHIP_RS740;
  62. }
  63. /*
  64. * current number of channels
  65. */
  66. int r600_audio_channels(struct radeon_device *rdev)
  67. {
  68. return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
  69. }
  70. /*
  71. * current bits per sample
  72. */
  73. int r600_audio_bits_per_sample(struct radeon_device *rdev)
  74. {
  75. uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
  76. switch (value) {
  77. case 0x0: return 8;
  78. case 0x1: return 16;
  79. case 0x2: return 20;
  80. case 0x3: return 24;
  81. case 0x4: return 32;
  82. }
  83. dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
  84. (int)value);
  85. return 16;
  86. }
  87. /*
  88. * current sampling rate in HZ
  89. */
  90. int r600_audio_rate(struct radeon_device *rdev)
  91. {
  92. uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
  93. uint32_t result;
  94. if (value & 0x4000)
  95. result = 44100;
  96. else
  97. result = 48000;
  98. result *= ((value >> 11) & 0x7) + 1;
  99. result /= ((value >> 8) & 0x7) + 1;
  100. return result;
  101. }
  102. /*
  103. * iec 60958 status bits
  104. */
  105. uint8_t r600_audio_status_bits(struct radeon_device *rdev)
  106. {
  107. return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
  108. }
  109. /*
  110. * iec 60958 category code
  111. */
  112. uint8_t r600_audio_category_code(struct radeon_device *rdev)
  113. {
  114. return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
  115. }
  116. /*
  117. * update all hdmi interfaces with current audio parameters
  118. */
  119. void r600_audio_update_hdmi(struct work_struct *work)
  120. {
  121. struct radeon_device *rdev = container_of(work, struct radeon_device,
  122. audio_work);
  123. struct drm_device *dev = rdev->ddev;
  124. int channels = r600_audio_channels(rdev);
  125. int rate = r600_audio_rate(rdev);
  126. int bps = r600_audio_bits_per_sample(rdev);
  127. uint8_t status_bits = r600_audio_status_bits(rdev);
  128. uint8_t category_code = r600_audio_category_code(rdev);
  129. struct drm_encoder *encoder;
  130. int changes = 0;
  131. changes |= channels != rdev->audio.channels;
  132. changes |= rate != rdev->audio.rate;
  133. changes |= bps != rdev->audio.bits_per_sample;
  134. changes |= status_bits != rdev->audio.status_bits;
  135. changes |= category_code != rdev->audio.category_code;
  136. if (changes) {
  137. rdev->audio.channels = channels;
  138. rdev->audio.rate = rate;
  139. rdev->audio.bits_per_sample = bps;
  140. rdev->audio.status_bits = status_bits;
  141. rdev->audio.category_code = category_code;
  142. }
  143. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  144. if (!radeon_dig_encoder(encoder))
  145. continue;
  146. if (changes || r600_hdmi_buffer_status_changed(encoder))
  147. r600_hdmi_update_audio_settings(encoder);
  148. }
  149. }
  150. /*
  151. * turn on/off audio engine
  152. */
  153. static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
  154. {
  155. u32 value = 0;
  156. DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
  157. if (ASIC_IS_DCE4(rdev)) {
  158. if (enable) {
  159. value |= 0x81000000; /* Required to enable audio */
  160. value |= 0x0e1000f0; /* fglrx sets that too */
  161. }
  162. WREG32(EVERGREEN_AUDIO_ENABLE, value);
  163. } else {
  164. WREG32_P(R600_AUDIO_ENABLE,
  165. enable ? 0x81000000 : 0x0, ~0x81000000);
  166. }
  167. rdev->audio.enabled = enable;
  168. }
  169. /*
  170. * initialize the audio vars
  171. */
  172. int r600_audio_init(struct radeon_device *rdev)
  173. {
  174. if (!radeon_audio || !r600_audio_chipset_supported(rdev))
  175. return 0;
  176. r600_audio_engine_enable(rdev, true);
  177. rdev->audio.channels = -1;
  178. rdev->audio.rate = -1;
  179. rdev->audio.bits_per_sample = -1;
  180. rdev->audio.status_bits = 0;
  181. rdev->audio.category_code = 0;
  182. return 0;
  183. }
  184. /*
  185. * atach the audio codec to the clock source of the encoder
  186. */
  187. void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
  188. {
  189. struct drm_device *dev = encoder->dev;
  190. struct radeon_device *rdev = dev->dev_private;
  191. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  192. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  193. int base_rate = 48000;
  194. switch (radeon_encoder->encoder_id) {
  195. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
  196. case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
  197. WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
  198. break;
  199. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
  200. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
  201. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
  202. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
  203. WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
  204. break;
  205. default:
  206. dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
  207. radeon_encoder->encoder_id);
  208. return;
  209. }
  210. if (ASIC_IS_DCE4(rdev)) {
  211. /* TODO: other PLLs? */
  212. WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
  213. WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
  214. WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
  215. /* Some magic trigger or src sel? */
  216. WREG32_P(0x5ac, 0x01, ~0x77);
  217. } else {
  218. switch (dig->dig_encoder) {
  219. case 0:
  220. WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
  221. WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
  222. WREG32(R600_AUDIO_CLK_SRCSEL, 0);
  223. break;
  224. case 1:
  225. WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
  226. WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
  227. WREG32(R600_AUDIO_CLK_SRCSEL, 1);
  228. break;
  229. default:
  230. dev_err(rdev->dev,
  231. "Unsupported DIG on encoder 0x%02X\n",
  232. radeon_encoder->encoder_id);
  233. return;
  234. }
  235. }
  236. }
  237. /*
  238. * release the audio timer
  239. * TODO: How to do this correctly on SMP systems?
  240. */
  241. void r600_audio_fini(struct radeon_device *rdev)
  242. {
  243. if (!rdev->audio.enabled)
  244. return;
  245. r600_audio_engine_enable(rdev, false);
  246. }