be_main.c 55 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  32. { 0 }
  33. };
  34. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  35. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  36. {
  37. struct be_dma_mem *mem = &q->dma_mem;
  38. if (mem->va)
  39. pci_free_consistent(adapter->pdev, mem->size,
  40. mem->va, mem->dma);
  41. }
  42. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  43. u16 len, u16 entry_size)
  44. {
  45. struct be_dma_mem *mem = &q->dma_mem;
  46. memset(q, 0, sizeof(*q));
  47. q->len = len;
  48. q->entry_size = entry_size;
  49. mem->size = len * entry_size;
  50. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  51. if (!mem->va)
  52. return -1;
  53. memset(mem->va, 0, mem->size);
  54. return 0;
  55. }
  56. static void be_intr_set(struct be_adapter *adapter, bool enable)
  57. {
  58. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  59. u32 reg = ioread32(addr);
  60. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  61. if (!enabled && enable)
  62. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. else if (enabled && !enable)
  64. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else
  66. return;
  67. iowrite32(reg, addr);
  68. }
  69. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  70. {
  71. u32 val = 0;
  72. val |= qid & DB_RQ_RING_ID_MASK;
  73. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  74. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  75. }
  76. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  77. {
  78. u32 val = 0;
  79. val |= qid & DB_TXULP_RING_ID_MASK;
  80. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  81. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  82. }
  83. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  84. bool arm, bool clear_int, u16 num_popped)
  85. {
  86. u32 val = 0;
  87. val |= qid & DB_EQ_RING_ID_MASK;
  88. if (arm)
  89. val |= 1 << DB_EQ_REARM_SHIFT;
  90. if (clear_int)
  91. val |= 1 << DB_EQ_CLR_SHIFT;
  92. val |= 1 << DB_EQ_EVNT_SHIFT;
  93. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  94. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  95. }
  96. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  97. {
  98. u32 val = 0;
  99. val |= qid & DB_CQ_RING_ID_MASK;
  100. if (arm)
  101. val |= 1 << DB_CQ_REARM_SHIFT;
  102. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  103. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  104. }
  105. static int be_mac_addr_set(struct net_device *netdev, void *p)
  106. {
  107. struct be_adapter *adapter = netdev_priv(netdev);
  108. struct sockaddr *addr = p;
  109. int status = 0;
  110. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  111. if (status)
  112. return status;
  113. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  114. adapter->if_handle, &adapter->pmac_id);
  115. if (!status)
  116. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  117. return status;
  118. }
  119. void netdev_stats_update(struct be_adapter *adapter)
  120. {
  121. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  122. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  123. struct be_port_rxf_stats *port_stats =
  124. &rxf_stats->port[adapter->port_num];
  125. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  126. struct be_erx_stats *erx_stats = &hw_stats->erx;
  127. dev_stats->rx_packets = port_stats->rx_total_frames;
  128. dev_stats->tx_packets = port_stats->tx_unicastframes +
  129. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  130. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  131. (u64) port_stats->rx_bytes_lsd;
  132. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  133. (u64) port_stats->tx_bytes_lsd;
  134. /* bad pkts received */
  135. dev_stats->rx_errors = port_stats->rx_crc_errors +
  136. port_stats->rx_alignment_symbol_errors +
  137. port_stats->rx_in_range_errors +
  138. port_stats->rx_out_range_errors +
  139. port_stats->rx_frame_too_long +
  140. port_stats->rx_dropped_too_small +
  141. port_stats->rx_dropped_too_short +
  142. port_stats->rx_dropped_header_too_small +
  143. port_stats->rx_dropped_tcp_length +
  144. port_stats->rx_dropped_runt +
  145. port_stats->rx_tcp_checksum_errs +
  146. port_stats->rx_ip_checksum_errs +
  147. port_stats->rx_udp_checksum_errs;
  148. /* no space in linux buffers: best possible approximation */
  149. dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
  150. /* detailed rx errors */
  151. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  152. port_stats->rx_out_range_errors +
  153. port_stats->rx_frame_too_long;
  154. /* receive ring buffer overflow */
  155. dev_stats->rx_over_errors = 0;
  156. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  157. /* frame alignment errors */
  158. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  159. /* receiver fifo overrun */
  160. /* drops_no_pbuf is no per i/f, it's per BE card */
  161. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  162. port_stats->rx_input_fifo_overflow +
  163. rxf_stats->rx_drops_no_pbuf;
  164. /* receiver missed packetd */
  165. dev_stats->rx_missed_errors = 0;
  166. /* packet transmit problems */
  167. dev_stats->tx_errors = 0;
  168. /* no space available in linux */
  169. dev_stats->tx_dropped = 0;
  170. dev_stats->multicast = port_stats->rx_multicast_frames;
  171. dev_stats->collisions = 0;
  172. /* detailed tx_errors */
  173. dev_stats->tx_aborted_errors = 0;
  174. dev_stats->tx_carrier_errors = 0;
  175. dev_stats->tx_fifo_errors = 0;
  176. dev_stats->tx_heartbeat_errors = 0;
  177. dev_stats->tx_window_errors = 0;
  178. }
  179. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  180. {
  181. struct net_device *netdev = adapter->netdev;
  182. /* If link came up or went down */
  183. if (adapter->link_up != link_up) {
  184. if (link_up) {
  185. netif_start_queue(netdev);
  186. netif_carrier_on(netdev);
  187. printk(KERN_INFO "%s: Link up\n", netdev->name);
  188. } else {
  189. netif_stop_queue(netdev);
  190. netif_carrier_off(netdev);
  191. printk(KERN_INFO "%s: Link down\n", netdev->name);
  192. }
  193. adapter->link_up = link_up;
  194. }
  195. }
  196. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  197. static void be_rx_eqd_update(struct be_adapter *adapter)
  198. {
  199. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  200. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  201. ulong now = jiffies;
  202. u32 eqd;
  203. if (!rx_eq->enable_aic)
  204. return;
  205. /* Wrapped around */
  206. if (time_before(now, stats->rx_fps_jiffies)) {
  207. stats->rx_fps_jiffies = now;
  208. return;
  209. }
  210. /* Update once a second */
  211. if ((now - stats->rx_fps_jiffies) < HZ)
  212. return;
  213. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  214. ((now - stats->rx_fps_jiffies) / HZ);
  215. stats->rx_fps_jiffies = now;
  216. stats->be_prev_rx_frags = stats->be_rx_frags;
  217. eqd = stats->be_rx_fps / 110000;
  218. eqd = eqd << 3;
  219. if (eqd > rx_eq->max_eqd)
  220. eqd = rx_eq->max_eqd;
  221. if (eqd < rx_eq->min_eqd)
  222. eqd = rx_eq->min_eqd;
  223. if (eqd < 10)
  224. eqd = 0;
  225. if (eqd != rx_eq->cur_eqd)
  226. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  227. rx_eq->cur_eqd = eqd;
  228. }
  229. static struct net_device_stats *be_get_stats(struct net_device *dev)
  230. {
  231. return &dev->stats;
  232. }
  233. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  234. {
  235. u64 rate = bytes;
  236. do_div(rate, ticks / HZ);
  237. rate <<= 3; /* bytes/sec -> bits/sec */
  238. do_div(rate, 1000000ul); /* MB/Sec */
  239. return rate;
  240. }
  241. static void be_tx_rate_update(struct be_adapter *adapter)
  242. {
  243. struct be_drvr_stats *stats = drvr_stats(adapter);
  244. ulong now = jiffies;
  245. /* Wrapped around? */
  246. if (time_before(now, stats->be_tx_jiffies)) {
  247. stats->be_tx_jiffies = now;
  248. return;
  249. }
  250. /* Update tx rate once in two seconds */
  251. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  252. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  253. - stats->be_tx_bytes_prev,
  254. now - stats->be_tx_jiffies);
  255. stats->be_tx_jiffies = now;
  256. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  257. }
  258. }
  259. static void be_tx_stats_update(struct be_adapter *adapter,
  260. u32 wrb_cnt, u32 copied, bool stopped)
  261. {
  262. struct be_drvr_stats *stats = drvr_stats(adapter);
  263. stats->be_tx_reqs++;
  264. stats->be_tx_wrbs += wrb_cnt;
  265. stats->be_tx_bytes += copied;
  266. if (stopped)
  267. stats->be_tx_stops++;
  268. }
  269. /* Determine number of WRB entries needed to xmit data in an skb */
  270. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  271. {
  272. int cnt = (skb->len > skb->data_len);
  273. cnt += skb_shinfo(skb)->nr_frags;
  274. /* to account for hdr wrb */
  275. cnt++;
  276. if (cnt & 1) {
  277. /* add a dummy to make it an even num */
  278. cnt++;
  279. *dummy = true;
  280. } else
  281. *dummy = false;
  282. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  283. return cnt;
  284. }
  285. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  286. {
  287. wrb->frag_pa_hi = upper_32_bits(addr);
  288. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  289. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  290. }
  291. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  292. bool vlan, u32 wrb_cnt, u32 len)
  293. {
  294. memset(hdr, 0, sizeof(*hdr));
  295. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  296. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  297. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  298. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  299. hdr, skb_shinfo(skb)->gso_size);
  300. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  301. if (is_tcp_pkt(skb))
  302. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  303. else if (is_udp_pkt(skb))
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  305. }
  306. if (vlan && vlan_tx_tag_present(skb)) {
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  309. hdr, vlan_tx_tag_get(skb));
  310. }
  311. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  312. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  315. }
  316. static int make_tx_wrbs(struct be_adapter *adapter,
  317. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  318. {
  319. u64 busaddr;
  320. u32 i, copied = 0;
  321. struct pci_dev *pdev = adapter->pdev;
  322. struct sk_buff *first_skb = skb;
  323. struct be_queue_info *txq = &adapter->tx_obj.q;
  324. struct be_eth_wrb *wrb;
  325. struct be_eth_hdr_wrb *hdr;
  326. hdr = queue_head_node(txq);
  327. atomic_add(wrb_cnt, &txq->used);
  328. queue_head_inc(txq);
  329. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  330. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  331. return 0;
  332. }
  333. if (skb->len > skb->data_len) {
  334. int len = skb->len - skb->data_len;
  335. wrb = queue_head_node(txq);
  336. busaddr = skb_shinfo(skb)->dma_head;
  337. wrb_fill(wrb, busaddr, len);
  338. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  339. queue_head_inc(txq);
  340. copied += len;
  341. }
  342. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  343. struct skb_frag_struct *frag =
  344. &skb_shinfo(skb)->frags[i];
  345. busaddr = skb_shinfo(skb)->dma_maps[i];
  346. wrb = queue_head_node(txq);
  347. wrb_fill(wrb, busaddr, frag->size);
  348. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  349. queue_head_inc(txq);
  350. copied += frag->size;
  351. }
  352. if (dummy_wrb) {
  353. wrb = queue_head_node(txq);
  354. wrb_fill(wrb, 0, 0);
  355. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  356. queue_head_inc(txq);
  357. }
  358. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  359. wrb_cnt, copied);
  360. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  361. return copied;
  362. }
  363. static netdev_tx_t be_xmit(struct sk_buff *skb,
  364. struct net_device *netdev)
  365. {
  366. struct be_adapter *adapter = netdev_priv(netdev);
  367. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  368. struct be_queue_info *txq = &tx_obj->q;
  369. u32 wrb_cnt = 0, copied = 0;
  370. u32 start = txq->head;
  371. bool dummy_wrb, stopped = false;
  372. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  373. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  374. if (copied) {
  375. /* record the sent skb in the sent_skb table */
  376. BUG_ON(tx_obj->sent_skb_list[start]);
  377. tx_obj->sent_skb_list[start] = skb;
  378. /* Ensure txq has space for the next skb; Else stop the queue
  379. * *BEFORE* ringing the tx doorbell, so that we serialze the
  380. * tx compls of the current transmit which'll wake up the queue
  381. */
  382. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  383. txq->len) {
  384. netif_stop_queue(netdev);
  385. stopped = true;
  386. }
  387. be_txq_notify(adapter, txq->id, wrb_cnt);
  388. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  389. } else {
  390. txq->head = start;
  391. dev_kfree_skb_any(skb);
  392. }
  393. return NETDEV_TX_OK;
  394. }
  395. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  396. {
  397. struct be_adapter *adapter = netdev_priv(netdev);
  398. if (new_mtu < BE_MIN_MTU ||
  399. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  400. dev_info(&adapter->pdev->dev,
  401. "MTU must be between %d and %d bytes\n",
  402. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  403. return -EINVAL;
  404. }
  405. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  406. netdev->mtu, new_mtu);
  407. netdev->mtu = new_mtu;
  408. return 0;
  409. }
  410. /*
  411. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  412. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  413. * set the BE in promiscuous VLAN mode.
  414. */
  415. static int be_vid_config(struct be_adapter *adapter)
  416. {
  417. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  418. u16 ntags = 0, i;
  419. int status;
  420. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  421. /* Construct VLAN Table to give to HW */
  422. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  423. if (adapter->vlan_tag[i]) {
  424. vtag[ntags] = cpu_to_le16(i);
  425. ntags++;
  426. }
  427. }
  428. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  429. vtag, ntags, 1, 0);
  430. } else {
  431. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  432. NULL, 0, 1, 1);
  433. }
  434. return status;
  435. }
  436. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  437. {
  438. struct be_adapter *adapter = netdev_priv(netdev);
  439. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  440. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  441. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  442. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  443. adapter->vlan_grp = grp;
  444. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  445. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  446. }
  447. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  448. {
  449. struct be_adapter *adapter = netdev_priv(netdev);
  450. adapter->num_vlans++;
  451. adapter->vlan_tag[vid] = 1;
  452. be_vid_config(adapter);
  453. }
  454. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  455. {
  456. struct be_adapter *adapter = netdev_priv(netdev);
  457. adapter->num_vlans--;
  458. adapter->vlan_tag[vid] = 0;
  459. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  460. be_vid_config(adapter);
  461. }
  462. static void be_set_multicast_list(struct net_device *netdev)
  463. {
  464. struct be_adapter *adapter = netdev_priv(netdev);
  465. if (netdev->flags & IFF_PROMISC) {
  466. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  467. adapter->promiscuous = true;
  468. goto done;
  469. }
  470. /* BE was previously in promiscous mode; disable it */
  471. if (adapter->promiscuous) {
  472. adapter->promiscuous = false;
  473. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  474. }
  475. if (netdev->flags & IFF_ALLMULTI) {
  476. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
  477. goto done;
  478. }
  479. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  480. netdev->mc_count);
  481. done:
  482. return;
  483. }
  484. static void be_rx_rate_update(struct be_adapter *adapter)
  485. {
  486. struct be_drvr_stats *stats = drvr_stats(adapter);
  487. ulong now = jiffies;
  488. /* Wrapped around */
  489. if (time_before(now, stats->be_rx_jiffies)) {
  490. stats->be_rx_jiffies = now;
  491. return;
  492. }
  493. /* Update the rate once in two seconds */
  494. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  495. return;
  496. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  497. - stats->be_rx_bytes_prev,
  498. now - stats->be_rx_jiffies);
  499. stats->be_rx_jiffies = now;
  500. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  501. }
  502. static void be_rx_stats_update(struct be_adapter *adapter,
  503. u32 pktsize, u16 numfrags)
  504. {
  505. struct be_drvr_stats *stats = drvr_stats(adapter);
  506. stats->be_rx_compl++;
  507. stats->be_rx_frags += numfrags;
  508. stats->be_rx_bytes += pktsize;
  509. }
  510. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  511. {
  512. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  513. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  514. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  515. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  516. if (ip_version) {
  517. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  518. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  519. }
  520. ipv6_chk = (ip_version && (tcpf || udpf));
  521. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  522. }
  523. static struct be_rx_page_info *
  524. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  525. {
  526. struct be_rx_page_info *rx_page_info;
  527. struct be_queue_info *rxq = &adapter->rx_obj.q;
  528. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  529. BUG_ON(!rx_page_info->page);
  530. if (rx_page_info->last_page_user)
  531. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  532. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  533. atomic_dec(&rxq->used);
  534. return rx_page_info;
  535. }
  536. /* Throwaway the data in the Rx completion */
  537. static void be_rx_compl_discard(struct be_adapter *adapter,
  538. struct be_eth_rx_compl *rxcp)
  539. {
  540. struct be_queue_info *rxq = &adapter->rx_obj.q;
  541. struct be_rx_page_info *page_info;
  542. u16 rxq_idx, i, num_rcvd;
  543. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  544. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  545. for (i = 0; i < num_rcvd; i++) {
  546. page_info = get_rx_page_info(adapter, rxq_idx);
  547. put_page(page_info->page);
  548. memset(page_info, 0, sizeof(*page_info));
  549. index_inc(&rxq_idx, rxq->len);
  550. }
  551. }
  552. /*
  553. * skb_fill_rx_data forms a complete skb for an ether frame
  554. * indicated by rxcp.
  555. */
  556. static void skb_fill_rx_data(struct be_adapter *adapter,
  557. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  558. {
  559. struct be_queue_info *rxq = &adapter->rx_obj.q;
  560. struct be_rx_page_info *page_info;
  561. u16 rxq_idx, i, num_rcvd, j;
  562. u32 pktsize, hdr_len, curr_frag_len, size;
  563. u8 *start;
  564. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  565. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  566. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  567. page_info = get_rx_page_info(adapter, rxq_idx);
  568. start = page_address(page_info->page) + page_info->page_offset;
  569. prefetch(start);
  570. /* Copy data in the first descriptor of this completion */
  571. curr_frag_len = min(pktsize, rx_frag_size);
  572. /* Copy the header portion into skb_data */
  573. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  574. memcpy(skb->data, start, hdr_len);
  575. skb->len = curr_frag_len;
  576. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  577. /* Complete packet has now been moved to data */
  578. put_page(page_info->page);
  579. skb->data_len = 0;
  580. skb->tail += curr_frag_len;
  581. } else {
  582. skb_shinfo(skb)->nr_frags = 1;
  583. skb_shinfo(skb)->frags[0].page = page_info->page;
  584. skb_shinfo(skb)->frags[0].page_offset =
  585. page_info->page_offset + hdr_len;
  586. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  587. skb->data_len = curr_frag_len - hdr_len;
  588. skb->tail += hdr_len;
  589. }
  590. memset(page_info, 0, sizeof(*page_info));
  591. if (pktsize <= rx_frag_size) {
  592. BUG_ON(num_rcvd != 1);
  593. goto done;
  594. }
  595. /* More frags present for this completion */
  596. size = pktsize;
  597. for (i = 1, j = 0; i < num_rcvd; i++) {
  598. size -= curr_frag_len;
  599. index_inc(&rxq_idx, rxq->len);
  600. page_info = get_rx_page_info(adapter, rxq_idx);
  601. curr_frag_len = min(size, rx_frag_size);
  602. /* Coalesce all frags from the same physical page in one slot */
  603. if (page_info->page_offset == 0) {
  604. /* Fresh page */
  605. j++;
  606. skb_shinfo(skb)->frags[j].page = page_info->page;
  607. skb_shinfo(skb)->frags[j].page_offset =
  608. page_info->page_offset;
  609. skb_shinfo(skb)->frags[j].size = 0;
  610. skb_shinfo(skb)->nr_frags++;
  611. } else {
  612. put_page(page_info->page);
  613. }
  614. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  615. skb->len += curr_frag_len;
  616. skb->data_len += curr_frag_len;
  617. memset(page_info, 0, sizeof(*page_info));
  618. }
  619. BUG_ON(j > MAX_SKB_FRAGS);
  620. done:
  621. be_rx_stats_update(adapter, pktsize, num_rcvd);
  622. return;
  623. }
  624. /* Process the RX completion indicated by rxcp when GRO is disabled */
  625. static void be_rx_compl_process(struct be_adapter *adapter,
  626. struct be_eth_rx_compl *rxcp)
  627. {
  628. struct sk_buff *skb;
  629. u32 vlanf, vid;
  630. u8 vtm;
  631. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  632. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  633. /* vlanf could be wrongly set in some cards.
  634. * ignore if vtm is not set */
  635. if ((adapter->cap == 0x400) && !vtm)
  636. vlanf = 0;
  637. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  638. if (!skb) {
  639. if (net_ratelimit())
  640. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  641. be_rx_compl_discard(adapter, rxcp);
  642. return;
  643. }
  644. skb_fill_rx_data(adapter, skb, rxcp);
  645. if (do_pkt_csum(rxcp, adapter->rx_csum))
  646. skb->ip_summed = CHECKSUM_NONE;
  647. else
  648. skb->ip_summed = CHECKSUM_UNNECESSARY;
  649. skb->truesize = skb->len + sizeof(struct sk_buff);
  650. skb->protocol = eth_type_trans(skb, adapter->netdev);
  651. skb->dev = adapter->netdev;
  652. if (vlanf) {
  653. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  654. kfree_skb(skb);
  655. return;
  656. }
  657. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  658. vid = be16_to_cpu(vid);
  659. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  660. } else {
  661. netif_receive_skb(skb);
  662. }
  663. return;
  664. }
  665. /* Process the RX completion indicated by rxcp when GRO is enabled */
  666. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  667. struct be_eth_rx_compl *rxcp)
  668. {
  669. struct be_rx_page_info *page_info;
  670. struct sk_buff *skb = NULL;
  671. struct be_queue_info *rxq = &adapter->rx_obj.q;
  672. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  673. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  674. u16 i, rxq_idx = 0, vid, j;
  675. u8 vtm;
  676. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  677. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  678. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  679. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  680. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  681. /* vlanf could be wrongly set in some cards.
  682. * ignore if vtm is not set */
  683. if ((adapter->cap == 0x400) && !vtm)
  684. vlanf = 0;
  685. skb = napi_get_frags(&eq_obj->napi);
  686. if (!skb) {
  687. be_rx_compl_discard(adapter, rxcp);
  688. return;
  689. }
  690. remaining = pkt_size;
  691. for (i = 0, j = -1; i < num_rcvd; i++) {
  692. page_info = get_rx_page_info(adapter, rxq_idx);
  693. curr_frag_len = min(remaining, rx_frag_size);
  694. /* Coalesce all frags from the same physical page in one slot */
  695. if (i == 0 || page_info->page_offset == 0) {
  696. /* First frag or Fresh page */
  697. j++;
  698. skb_shinfo(skb)->frags[j].page = page_info->page;
  699. skb_shinfo(skb)->frags[j].page_offset =
  700. page_info->page_offset;
  701. skb_shinfo(skb)->frags[j].size = 0;
  702. } else {
  703. put_page(page_info->page);
  704. }
  705. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  706. remaining -= curr_frag_len;
  707. index_inc(&rxq_idx, rxq->len);
  708. memset(page_info, 0, sizeof(*page_info));
  709. }
  710. BUG_ON(j > MAX_SKB_FRAGS);
  711. skb_shinfo(skb)->nr_frags = j + 1;
  712. skb->len = pkt_size;
  713. skb->data_len = pkt_size;
  714. skb->truesize += pkt_size;
  715. skb->ip_summed = CHECKSUM_UNNECESSARY;
  716. if (likely(!vlanf)) {
  717. napi_gro_frags(&eq_obj->napi);
  718. } else {
  719. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  720. vid = be16_to_cpu(vid);
  721. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  722. return;
  723. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  724. }
  725. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  726. return;
  727. }
  728. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  729. {
  730. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  731. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  732. return NULL;
  733. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  734. queue_tail_inc(&adapter->rx_obj.cq);
  735. return rxcp;
  736. }
  737. /* To reset the valid bit, we need to reset the whole word as
  738. * when walking the queue the valid entries are little-endian
  739. * and invalid entries are host endian
  740. */
  741. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  742. {
  743. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  744. }
  745. static inline struct page *be_alloc_pages(u32 size)
  746. {
  747. gfp_t alloc_flags = GFP_ATOMIC;
  748. u32 order = get_order(size);
  749. if (order > 0)
  750. alloc_flags |= __GFP_COMP;
  751. return alloc_pages(alloc_flags, order);
  752. }
  753. /*
  754. * Allocate a page, split it to fragments of size rx_frag_size and post as
  755. * receive buffers to BE
  756. */
  757. static void be_post_rx_frags(struct be_adapter *adapter)
  758. {
  759. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  760. struct be_rx_page_info *page_info = NULL;
  761. struct be_queue_info *rxq = &adapter->rx_obj.q;
  762. struct page *pagep = NULL;
  763. struct be_eth_rx_d *rxd;
  764. u64 page_dmaaddr = 0, frag_dmaaddr;
  765. u32 posted, page_offset = 0;
  766. page_info = &page_info_tbl[rxq->head];
  767. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  768. if (!pagep) {
  769. pagep = be_alloc_pages(adapter->big_page_size);
  770. if (unlikely(!pagep)) {
  771. drvr_stats(adapter)->be_ethrx_post_fail++;
  772. break;
  773. }
  774. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  775. adapter->big_page_size,
  776. PCI_DMA_FROMDEVICE);
  777. page_info->page_offset = 0;
  778. } else {
  779. get_page(pagep);
  780. page_info->page_offset = page_offset + rx_frag_size;
  781. }
  782. page_offset = page_info->page_offset;
  783. page_info->page = pagep;
  784. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  785. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  786. rxd = queue_head_node(rxq);
  787. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  788. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  789. queue_head_inc(rxq);
  790. /* Any space left in the current big page for another frag? */
  791. if ((page_offset + rx_frag_size + rx_frag_size) >
  792. adapter->big_page_size) {
  793. pagep = NULL;
  794. page_info->last_page_user = true;
  795. }
  796. page_info = &page_info_tbl[rxq->head];
  797. }
  798. if (pagep)
  799. page_info->last_page_user = true;
  800. if (posted) {
  801. atomic_add(posted, &rxq->used);
  802. be_rxq_notify(adapter, rxq->id, posted);
  803. } else if (atomic_read(&rxq->used) == 0) {
  804. /* Let be_worker replenish when memory is available */
  805. adapter->rx_post_starved = true;
  806. }
  807. return;
  808. }
  809. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  810. {
  811. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  812. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  813. return NULL;
  814. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  815. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  816. queue_tail_inc(tx_cq);
  817. return txcp;
  818. }
  819. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  820. {
  821. struct be_queue_info *txq = &adapter->tx_obj.q;
  822. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  823. struct sk_buff *sent_skb;
  824. u16 cur_index, num_wrbs = 0;
  825. cur_index = txq->tail;
  826. sent_skb = sent_skbs[cur_index];
  827. BUG_ON(!sent_skb);
  828. sent_skbs[cur_index] = NULL;
  829. do {
  830. cur_index = txq->tail;
  831. num_wrbs++;
  832. queue_tail_inc(txq);
  833. } while (cur_index != last_index);
  834. atomic_sub(num_wrbs, &txq->used);
  835. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  836. kfree_skb(sent_skb);
  837. }
  838. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  839. {
  840. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  841. if (!eqe->evt)
  842. return NULL;
  843. eqe->evt = le32_to_cpu(eqe->evt);
  844. queue_tail_inc(&eq_obj->q);
  845. return eqe;
  846. }
  847. static int event_handle(struct be_adapter *adapter,
  848. struct be_eq_obj *eq_obj)
  849. {
  850. struct be_eq_entry *eqe;
  851. u16 num = 0;
  852. while ((eqe = event_get(eq_obj)) != NULL) {
  853. eqe->evt = 0;
  854. num++;
  855. }
  856. /* Deal with any spurious interrupts that come
  857. * without events
  858. */
  859. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  860. if (num)
  861. napi_schedule(&eq_obj->napi);
  862. return num;
  863. }
  864. /* Just read and notify events without processing them.
  865. * Used at the time of destroying event queues */
  866. static void be_eq_clean(struct be_adapter *adapter,
  867. struct be_eq_obj *eq_obj)
  868. {
  869. struct be_eq_entry *eqe;
  870. u16 num = 0;
  871. while ((eqe = event_get(eq_obj)) != NULL) {
  872. eqe->evt = 0;
  873. num++;
  874. }
  875. if (num)
  876. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  877. }
  878. static void be_rx_q_clean(struct be_adapter *adapter)
  879. {
  880. struct be_rx_page_info *page_info;
  881. struct be_queue_info *rxq = &adapter->rx_obj.q;
  882. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  883. struct be_eth_rx_compl *rxcp;
  884. u16 tail;
  885. /* First cleanup pending rx completions */
  886. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  887. be_rx_compl_discard(adapter, rxcp);
  888. be_rx_compl_reset(rxcp);
  889. be_cq_notify(adapter, rx_cq->id, true, 1);
  890. }
  891. /* Then free posted rx buffer that were not used */
  892. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  893. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  894. page_info = get_rx_page_info(adapter, tail);
  895. put_page(page_info->page);
  896. memset(page_info, 0, sizeof(*page_info));
  897. }
  898. BUG_ON(atomic_read(&rxq->used));
  899. }
  900. static void be_tx_compl_clean(struct be_adapter *adapter)
  901. {
  902. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  903. struct be_queue_info *txq = &adapter->tx_obj.q;
  904. struct be_eth_tx_compl *txcp;
  905. u16 end_idx, cmpl = 0, timeo = 0;
  906. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  907. do {
  908. while ((txcp = be_tx_compl_get(tx_cq))) {
  909. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  910. wrb_index, txcp);
  911. be_tx_compl_process(adapter, end_idx);
  912. cmpl++;
  913. }
  914. if (cmpl) {
  915. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  916. cmpl = 0;
  917. }
  918. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  919. break;
  920. mdelay(1);
  921. } while (true);
  922. if (atomic_read(&txq->used))
  923. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  924. atomic_read(&txq->used));
  925. }
  926. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  927. {
  928. struct be_queue_info *q;
  929. q = &adapter->mcc_obj.q;
  930. if (q->created)
  931. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  932. be_queue_free(adapter, q);
  933. q = &adapter->mcc_obj.cq;
  934. if (q->created)
  935. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  936. be_queue_free(adapter, q);
  937. }
  938. /* Must be called only after TX qs are created as MCC shares TX EQ */
  939. static int be_mcc_queues_create(struct be_adapter *adapter)
  940. {
  941. struct be_queue_info *q, *cq;
  942. /* Alloc MCC compl queue */
  943. cq = &adapter->mcc_obj.cq;
  944. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  945. sizeof(struct be_mcc_compl)))
  946. goto err;
  947. /* Ask BE to create MCC compl queue; share TX's eq */
  948. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  949. goto mcc_cq_free;
  950. /* Alloc MCC queue */
  951. q = &adapter->mcc_obj.q;
  952. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  953. goto mcc_cq_destroy;
  954. /* Ask BE to create MCC queue */
  955. if (be_cmd_mccq_create(adapter, q, cq))
  956. goto mcc_q_free;
  957. return 0;
  958. mcc_q_free:
  959. be_queue_free(adapter, q);
  960. mcc_cq_destroy:
  961. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  962. mcc_cq_free:
  963. be_queue_free(adapter, cq);
  964. err:
  965. return -1;
  966. }
  967. static void be_tx_queues_destroy(struct be_adapter *adapter)
  968. {
  969. struct be_queue_info *q;
  970. q = &adapter->tx_obj.q;
  971. if (q->created)
  972. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  973. be_queue_free(adapter, q);
  974. q = &adapter->tx_obj.cq;
  975. if (q->created)
  976. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  977. be_queue_free(adapter, q);
  978. /* Clear any residual events */
  979. be_eq_clean(adapter, &adapter->tx_eq);
  980. q = &adapter->tx_eq.q;
  981. if (q->created)
  982. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  983. be_queue_free(adapter, q);
  984. }
  985. static int be_tx_queues_create(struct be_adapter *adapter)
  986. {
  987. struct be_queue_info *eq, *q, *cq;
  988. adapter->tx_eq.max_eqd = 0;
  989. adapter->tx_eq.min_eqd = 0;
  990. adapter->tx_eq.cur_eqd = 96;
  991. adapter->tx_eq.enable_aic = false;
  992. /* Alloc Tx Event queue */
  993. eq = &adapter->tx_eq.q;
  994. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  995. return -1;
  996. /* Ask BE to create Tx Event queue */
  997. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  998. goto tx_eq_free;
  999. /* Alloc TX eth compl queue */
  1000. cq = &adapter->tx_obj.cq;
  1001. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1002. sizeof(struct be_eth_tx_compl)))
  1003. goto tx_eq_destroy;
  1004. /* Ask BE to create Tx eth compl queue */
  1005. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1006. goto tx_cq_free;
  1007. /* Alloc TX eth queue */
  1008. q = &adapter->tx_obj.q;
  1009. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1010. goto tx_cq_destroy;
  1011. /* Ask BE to create Tx eth queue */
  1012. if (be_cmd_txq_create(adapter, q, cq))
  1013. goto tx_q_free;
  1014. return 0;
  1015. tx_q_free:
  1016. be_queue_free(adapter, q);
  1017. tx_cq_destroy:
  1018. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1019. tx_cq_free:
  1020. be_queue_free(adapter, cq);
  1021. tx_eq_destroy:
  1022. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1023. tx_eq_free:
  1024. be_queue_free(adapter, eq);
  1025. return -1;
  1026. }
  1027. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1028. {
  1029. struct be_queue_info *q;
  1030. q = &adapter->rx_obj.q;
  1031. if (q->created) {
  1032. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1033. be_rx_q_clean(adapter);
  1034. }
  1035. be_queue_free(adapter, q);
  1036. q = &adapter->rx_obj.cq;
  1037. if (q->created)
  1038. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1039. be_queue_free(adapter, q);
  1040. /* Clear any residual events */
  1041. be_eq_clean(adapter, &adapter->rx_eq);
  1042. q = &adapter->rx_eq.q;
  1043. if (q->created)
  1044. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1045. be_queue_free(adapter, q);
  1046. }
  1047. static int be_rx_queues_create(struct be_adapter *adapter)
  1048. {
  1049. struct be_queue_info *eq, *q, *cq;
  1050. int rc;
  1051. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1052. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1053. adapter->rx_eq.min_eqd = 0;
  1054. adapter->rx_eq.cur_eqd = 0;
  1055. adapter->rx_eq.enable_aic = true;
  1056. /* Alloc Rx Event queue */
  1057. eq = &adapter->rx_eq.q;
  1058. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1059. sizeof(struct be_eq_entry));
  1060. if (rc)
  1061. return rc;
  1062. /* Ask BE to create Rx Event queue */
  1063. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1064. if (rc)
  1065. goto rx_eq_free;
  1066. /* Alloc RX eth compl queue */
  1067. cq = &adapter->rx_obj.cq;
  1068. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1069. sizeof(struct be_eth_rx_compl));
  1070. if (rc)
  1071. goto rx_eq_destroy;
  1072. /* Ask BE to create Rx eth compl queue */
  1073. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1074. if (rc)
  1075. goto rx_cq_free;
  1076. /* Alloc RX eth queue */
  1077. q = &adapter->rx_obj.q;
  1078. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1079. if (rc)
  1080. goto rx_cq_destroy;
  1081. /* Ask BE to create Rx eth queue */
  1082. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1083. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1084. if (rc)
  1085. goto rx_q_free;
  1086. return 0;
  1087. rx_q_free:
  1088. be_queue_free(adapter, q);
  1089. rx_cq_destroy:
  1090. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1091. rx_cq_free:
  1092. be_queue_free(adapter, cq);
  1093. rx_eq_destroy:
  1094. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1095. rx_eq_free:
  1096. be_queue_free(adapter, eq);
  1097. return rc;
  1098. }
  1099. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1100. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1101. {
  1102. return eq_id - 8 * be_pci_func(adapter);
  1103. }
  1104. static irqreturn_t be_intx(int irq, void *dev)
  1105. {
  1106. struct be_adapter *adapter = dev;
  1107. int isr;
  1108. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1109. be_pci_func(adapter) * CEV_ISR_SIZE);
  1110. if (!isr)
  1111. return IRQ_NONE;
  1112. event_handle(adapter, &adapter->tx_eq);
  1113. event_handle(adapter, &adapter->rx_eq);
  1114. return IRQ_HANDLED;
  1115. }
  1116. static irqreturn_t be_msix_rx(int irq, void *dev)
  1117. {
  1118. struct be_adapter *adapter = dev;
  1119. event_handle(adapter, &adapter->rx_eq);
  1120. return IRQ_HANDLED;
  1121. }
  1122. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1123. {
  1124. struct be_adapter *adapter = dev;
  1125. event_handle(adapter, &adapter->tx_eq);
  1126. return IRQ_HANDLED;
  1127. }
  1128. static inline bool do_gro(struct be_adapter *adapter,
  1129. struct be_eth_rx_compl *rxcp)
  1130. {
  1131. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1132. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1133. if (err)
  1134. drvr_stats(adapter)->be_rxcp_err++;
  1135. return (tcp_frame && !err) ? true : false;
  1136. }
  1137. int be_poll_rx(struct napi_struct *napi, int budget)
  1138. {
  1139. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1140. struct be_adapter *adapter =
  1141. container_of(rx_eq, struct be_adapter, rx_eq);
  1142. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1143. struct be_eth_rx_compl *rxcp;
  1144. u32 work_done;
  1145. for (work_done = 0; work_done < budget; work_done++) {
  1146. rxcp = be_rx_compl_get(adapter);
  1147. if (!rxcp)
  1148. break;
  1149. if (do_gro(adapter, rxcp))
  1150. be_rx_compl_process_gro(adapter, rxcp);
  1151. else
  1152. be_rx_compl_process(adapter, rxcp);
  1153. be_rx_compl_reset(rxcp);
  1154. }
  1155. /* Refill the queue */
  1156. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1157. be_post_rx_frags(adapter);
  1158. /* All consumed */
  1159. if (work_done < budget) {
  1160. napi_complete(napi);
  1161. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1162. } else {
  1163. /* More to be consumed; continue with interrupts disabled */
  1164. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1165. }
  1166. return work_done;
  1167. }
  1168. void be_process_tx(struct be_adapter *adapter)
  1169. {
  1170. struct be_queue_info *txq = &adapter->tx_obj.q;
  1171. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1172. struct be_eth_tx_compl *txcp;
  1173. u32 num_cmpl = 0;
  1174. u16 end_idx;
  1175. while ((txcp = be_tx_compl_get(tx_cq))) {
  1176. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1177. wrb_index, txcp);
  1178. be_tx_compl_process(adapter, end_idx);
  1179. num_cmpl++;
  1180. }
  1181. if (num_cmpl) {
  1182. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1183. /* As Tx wrbs have been freed up, wake up netdev queue if
  1184. * it was stopped due to lack of tx wrbs.
  1185. */
  1186. if (netif_queue_stopped(adapter->netdev) &&
  1187. atomic_read(&txq->used) < txq->len / 2) {
  1188. netif_wake_queue(adapter->netdev);
  1189. }
  1190. drvr_stats(adapter)->be_tx_events++;
  1191. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1192. }
  1193. }
  1194. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1195. * For TX/MCC we don't honour budget; consume everything
  1196. */
  1197. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1198. {
  1199. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1200. struct be_adapter *adapter =
  1201. container_of(tx_eq, struct be_adapter, tx_eq);
  1202. napi_complete(napi);
  1203. be_process_tx(adapter);
  1204. be_process_mcc(adapter);
  1205. return 1;
  1206. }
  1207. static void be_worker(struct work_struct *work)
  1208. {
  1209. struct be_adapter *adapter =
  1210. container_of(work, struct be_adapter, work.work);
  1211. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1212. /* Set EQ delay */
  1213. be_rx_eqd_update(adapter);
  1214. be_tx_rate_update(adapter);
  1215. be_rx_rate_update(adapter);
  1216. if (adapter->rx_post_starved) {
  1217. adapter->rx_post_starved = false;
  1218. be_post_rx_frags(adapter);
  1219. }
  1220. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1221. }
  1222. static void be_msix_enable(struct be_adapter *adapter)
  1223. {
  1224. int i, status;
  1225. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1226. adapter->msix_entries[i].entry = i;
  1227. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1228. BE_NUM_MSIX_VECTORS);
  1229. if (status == 0)
  1230. adapter->msix_enabled = true;
  1231. return;
  1232. }
  1233. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1234. {
  1235. return adapter->msix_entries[
  1236. be_evt_bit_get(adapter, eq_id)].vector;
  1237. }
  1238. static int be_request_irq(struct be_adapter *adapter,
  1239. struct be_eq_obj *eq_obj,
  1240. void *handler, char *desc)
  1241. {
  1242. struct net_device *netdev = adapter->netdev;
  1243. int vec;
  1244. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1245. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1246. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1247. }
  1248. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1249. {
  1250. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1251. free_irq(vec, adapter);
  1252. }
  1253. static int be_msix_register(struct be_adapter *adapter)
  1254. {
  1255. int status;
  1256. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1257. if (status)
  1258. goto err;
  1259. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1260. if (status)
  1261. goto free_tx_irq;
  1262. return 0;
  1263. free_tx_irq:
  1264. be_free_irq(adapter, &adapter->tx_eq);
  1265. err:
  1266. dev_warn(&adapter->pdev->dev,
  1267. "MSIX Request IRQ failed - err %d\n", status);
  1268. pci_disable_msix(adapter->pdev);
  1269. adapter->msix_enabled = false;
  1270. return status;
  1271. }
  1272. static int be_irq_register(struct be_adapter *adapter)
  1273. {
  1274. struct net_device *netdev = adapter->netdev;
  1275. int status;
  1276. if (adapter->msix_enabled) {
  1277. status = be_msix_register(adapter);
  1278. if (status == 0)
  1279. goto done;
  1280. }
  1281. /* INTx */
  1282. netdev->irq = adapter->pdev->irq;
  1283. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1284. adapter);
  1285. if (status) {
  1286. dev_err(&adapter->pdev->dev,
  1287. "INTx request IRQ failed - err %d\n", status);
  1288. return status;
  1289. }
  1290. done:
  1291. adapter->isr_registered = true;
  1292. return 0;
  1293. }
  1294. static void be_irq_unregister(struct be_adapter *adapter)
  1295. {
  1296. struct net_device *netdev = adapter->netdev;
  1297. if (!adapter->isr_registered)
  1298. return;
  1299. /* INTx */
  1300. if (!adapter->msix_enabled) {
  1301. free_irq(netdev->irq, adapter);
  1302. goto done;
  1303. }
  1304. /* MSIx */
  1305. be_free_irq(adapter, &adapter->tx_eq);
  1306. be_free_irq(adapter, &adapter->rx_eq);
  1307. done:
  1308. adapter->isr_registered = false;
  1309. return;
  1310. }
  1311. static int be_open(struct net_device *netdev)
  1312. {
  1313. struct be_adapter *adapter = netdev_priv(netdev);
  1314. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1315. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1316. bool link_up;
  1317. int status;
  1318. /* First time posting */
  1319. be_post_rx_frags(adapter);
  1320. napi_enable(&rx_eq->napi);
  1321. napi_enable(&tx_eq->napi);
  1322. be_irq_register(adapter);
  1323. be_intr_set(adapter, true);
  1324. /* The evt queues are created in unarmed state; arm them */
  1325. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1326. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1327. /* Rx compl queue may be in unarmed state; rearm it */
  1328. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1329. status = be_cmd_link_status_query(adapter, &link_up);
  1330. if (status)
  1331. return status;
  1332. be_link_status_update(adapter, link_up);
  1333. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1334. return 0;
  1335. }
  1336. static int be_setup(struct be_adapter *adapter)
  1337. {
  1338. struct net_device *netdev = adapter->netdev;
  1339. u32 cap_flags, en_flags;
  1340. int status;
  1341. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1342. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1343. BE_IF_FLAGS_PROMISCUOUS |
  1344. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1345. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1346. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1347. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1348. netdev->dev_addr, false/* pmac_invalid */,
  1349. &adapter->if_handle, &adapter->pmac_id);
  1350. if (status != 0)
  1351. goto do_none;
  1352. status = be_tx_queues_create(adapter);
  1353. if (status != 0)
  1354. goto if_destroy;
  1355. status = be_rx_queues_create(adapter);
  1356. if (status != 0)
  1357. goto tx_qs_destroy;
  1358. status = be_mcc_queues_create(adapter);
  1359. if (status != 0)
  1360. goto rx_qs_destroy;
  1361. status = be_vid_config(adapter);
  1362. if (status != 0)
  1363. goto mccqs_destroy;
  1364. status = be_cmd_set_flow_control(adapter, true, true);
  1365. if (status != 0)
  1366. goto mccqs_destroy;
  1367. return 0;
  1368. mccqs_destroy:
  1369. be_mcc_queues_destroy(adapter);
  1370. rx_qs_destroy:
  1371. be_rx_queues_destroy(adapter);
  1372. tx_qs_destroy:
  1373. be_tx_queues_destroy(adapter);
  1374. if_destroy:
  1375. be_cmd_if_destroy(adapter, adapter->if_handle);
  1376. do_none:
  1377. return status;
  1378. }
  1379. static int be_clear(struct be_adapter *adapter)
  1380. {
  1381. be_mcc_queues_destroy(adapter);
  1382. be_rx_queues_destroy(adapter);
  1383. be_tx_queues_destroy(adapter);
  1384. be_cmd_if_destroy(adapter, adapter->if_handle);
  1385. return 0;
  1386. }
  1387. static int be_close(struct net_device *netdev)
  1388. {
  1389. struct be_adapter *adapter = netdev_priv(netdev);
  1390. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1391. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1392. int vec;
  1393. cancel_delayed_work_sync(&adapter->work);
  1394. netif_stop_queue(netdev);
  1395. netif_carrier_off(netdev);
  1396. adapter->link_up = false;
  1397. be_intr_set(adapter, false);
  1398. if (adapter->msix_enabled) {
  1399. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1400. synchronize_irq(vec);
  1401. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1402. synchronize_irq(vec);
  1403. } else {
  1404. synchronize_irq(netdev->irq);
  1405. }
  1406. be_irq_unregister(adapter);
  1407. napi_disable(&rx_eq->napi);
  1408. napi_disable(&tx_eq->napi);
  1409. /* Wait for all pending tx completions to arrive so that
  1410. * all tx skbs are freed.
  1411. */
  1412. be_tx_compl_clean(adapter);
  1413. return 0;
  1414. }
  1415. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1416. char flash_cookie[2][16] = {"*** SE FLAS",
  1417. "H DIRECTORY *** "};
  1418. static int be_flash_image(struct be_adapter *adapter,
  1419. const struct firmware *fw,
  1420. struct be_dma_mem *flash_cmd, u32 flash_type)
  1421. {
  1422. int status;
  1423. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1424. int num_bytes;
  1425. const u8 *p = fw->data;
  1426. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1427. switch (flash_type) {
  1428. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1429. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1430. image_size = FLASH_IMAGE_MAX_SIZE;
  1431. break;
  1432. case FLASHROM_TYPE_ISCSI_BACKUP:
  1433. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1434. image_size = FLASH_IMAGE_MAX_SIZE;
  1435. break;
  1436. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1437. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1438. image_size = FLASH_IMAGE_MAX_SIZE;
  1439. break;
  1440. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1441. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1442. image_size = FLASH_IMAGE_MAX_SIZE;
  1443. break;
  1444. case FLASHROM_TYPE_BIOS:
  1445. image_offset = FLASH_iSCSI_BIOS_START;
  1446. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1447. break;
  1448. case FLASHROM_TYPE_FCOE_BIOS:
  1449. image_offset = FLASH_FCoE_BIOS_START;
  1450. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1451. break;
  1452. case FLASHROM_TYPE_PXE_BIOS:
  1453. image_offset = FLASH_PXE_BIOS_START;
  1454. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1455. break;
  1456. default:
  1457. return 0;
  1458. }
  1459. p += sizeof(struct flash_file_hdr) + image_offset;
  1460. if (p + image_size > fw->data + fw->size)
  1461. return -1;
  1462. total_bytes = image_size;
  1463. while (total_bytes) {
  1464. if (total_bytes > 32*1024)
  1465. num_bytes = 32*1024;
  1466. else
  1467. num_bytes = total_bytes;
  1468. total_bytes -= num_bytes;
  1469. if (!total_bytes)
  1470. flash_op = FLASHROM_OPER_FLASH;
  1471. else
  1472. flash_op = FLASHROM_OPER_SAVE;
  1473. memcpy(req->params.data_buf, p, num_bytes);
  1474. p += num_bytes;
  1475. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1476. flash_type, flash_op, num_bytes);
  1477. if (status) {
  1478. dev_err(&adapter->pdev->dev,
  1479. "cmd to write to flash rom failed. type/op %d/%d\n",
  1480. flash_type, flash_op);
  1481. return -1;
  1482. }
  1483. yield();
  1484. }
  1485. return 0;
  1486. }
  1487. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1488. {
  1489. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1490. const struct firmware *fw;
  1491. struct flash_file_hdr *fhdr;
  1492. struct flash_section_info *fsec = NULL;
  1493. struct be_dma_mem flash_cmd;
  1494. int status;
  1495. const u8 *p;
  1496. bool entry_found = false;
  1497. int flash_type;
  1498. char fw_ver[FW_VER_LEN];
  1499. char fw_cfg;
  1500. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1501. if (status)
  1502. return status;
  1503. fw_cfg = *(fw_ver + 2);
  1504. if (fw_cfg == '0')
  1505. fw_cfg = '1';
  1506. strcpy(fw_file, func);
  1507. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1508. if (status)
  1509. goto fw_exit;
  1510. p = fw->data;
  1511. fhdr = (struct flash_file_hdr *) p;
  1512. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1513. dev_err(&adapter->pdev->dev,
  1514. "Firmware(%s) load error (signature did not match)\n",
  1515. fw_file);
  1516. status = -1;
  1517. goto fw_exit;
  1518. }
  1519. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1520. p += sizeof(struct flash_file_hdr);
  1521. while (p < (fw->data + fw->size)) {
  1522. fsec = (struct flash_section_info *)p;
  1523. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1524. entry_found = true;
  1525. break;
  1526. }
  1527. p += 32;
  1528. }
  1529. if (!entry_found) {
  1530. status = -1;
  1531. dev_err(&adapter->pdev->dev,
  1532. "Flash cookie not found in firmware image\n");
  1533. goto fw_exit;
  1534. }
  1535. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1536. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1537. &flash_cmd.dma);
  1538. if (!flash_cmd.va) {
  1539. status = -ENOMEM;
  1540. dev_err(&adapter->pdev->dev,
  1541. "Memory allocation failure while flashing\n");
  1542. goto fw_exit;
  1543. }
  1544. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1545. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1546. status = be_flash_image(adapter, fw, &flash_cmd,
  1547. flash_type);
  1548. if (status)
  1549. break;
  1550. }
  1551. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1552. flash_cmd.dma);
  1553. if (status) {
  1554. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1555. goto fw_exit;
  1556. }
  1557. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1558. fw_exit:
  1559. release_firmware(fw);
  1560. return status;
  1561. }
  1562. static struct net_device_ops be_netdev_ops = {
  1563. .ndo_open = be_open,
  1564. .ndo_stop = be_close,
  1565. .ndo_start_xmit = be_xmit,
  1566. .ndo_get_stats = be_get_stats,
  1567. .ndo_set_rx_mode = be_set_multicast_list,
  1568. .ndo_set_mac_address = be_mac_addr_set,
  1569. .ndo_change_mtu = be_change_mtu,
  1570. .ndo_validate_addr = eth_validate_addr,
  1571. .ndo_vlan_rx_register = be_vlan_register,
  1572. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1573. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1574. };
  1575. static void be_netdev_init(struct net_device *netdev)
  1576. {
  1577. struct be_adapter *adapter = netdev_priv(netdev);
  1578. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1579. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1580. NETIF_F_GRO;
  1581. netdev->flags |= IFF_MULTICAST;
  1582. adapter->rx_csum = true;
  1583. netif_set_gso_max_size(netdev, 65535);
  1584. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1585. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1586. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1587. BE_NAPI_WEIGHT);
  1588. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1589. BE_NAPI_WEIGHT);
  1590. netif_carrier_off(netdev);
  1591. netif_stop_queue(netdev);
  1592. }
  1593. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1594. {
  1595. if (adapter->csr)
  1596. iounmap(adapter->csr);
  1597. if (adapter->db)
  1598. iounmap(adapter->db);
  1599. if (adapter->pcicfg)
  1600. iounmap(adapter->pcicfg);
  1601. }
  1602. static int be_map_pci_bars(struct be_adapter *adapter)
  1603. {
  1604. u8 __iomem *addr;
  1605. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1606. pci_resource_len(adapter->pdev, 2));
  1607. if (addr == NULL)
  1608. return -ENOMEM;
  1609. adapter->csr = addr;
  1610. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1611. 128 * 1024);
  1612. if (addr == NULL)
  1613. goto pci_map_err;
  1614. adapter->db = addr;
  1615. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1616. pci_resource_len(adapter->pdev, 1));
  1617. if (addr == NULL)
  1618. goto pci_map_err;
  1619. adapter->pcicfg = addr;
  1620. return 0;
  1621. pci_map_err:
  1622. be_unmap_pci_bars(adapter);
  1623. return -ENOMEM;
  1624. }
  1625. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1626. {
  1627. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1628. be_unmap_pci_bars(adapter);
  1629. if (mem->va)
  1630. pci_free_consistent(adapter->pdev, mem->size,
  1631. mem->va, mem->dma);
  1632. }
  1633. static int be_ctrl_init(struct be_adapter *adapter)
  1634. {
  1635. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1636. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1637. int status;
  1638. status = be_map_pci_bars(adapter);
  1639. if (status)
  1640. return status;
  1641. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1642. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1643. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1644. if (!mbox_mem_alloc->va) {
  1645. be_unmap_pci_bars(adapter);
  1646. return -1;
  1647. }
  1648. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1649. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1650. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1651. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1652. spin_lock_init(&adapter->mbox_lock);
  1653. spin_lock_init(&adapter->mcc_lock);
  1654. spin_lock_init(&adapter->mcc_cq_lock);
  1655. return 0;
  1656. }
  1657. static void be_stats_cleanup(struct be_adapter *adapter)
  1658. {
  1659. struct be_stats_obj *stats = &adapter->stats;
  1660. struct be_dma_mem *cmd = &stats->cmd;
  1661. if (cmd->va)
  1662. pci_free_consistent(adapter->pdev, cmd->size,
  1663. cmd->va, cmd->dma);
  1664. }
  1665. static int be_stats_init(struct be_adapter *adapter)
  1666. {
  1667. struct be_stats_obj *stats = &adapter->stats;
  1668. struct be_dma_mem *cmd = &stats->cmd;
  1669. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1670. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1671. if (cmd->va == NULL)
  1672. return -1;
  1673. return 0;
  1674. }
  1675. static void __devexit be_remove(struct pci_dev *pdev)
  1676. {
  1677. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1678. if (!adapter)
  1679. return;
  1680. unregister_netdev(adapter->netdev);
  1681. be_clear(adapter);
  1682. be_stats_cleanup(adapter);
  1683. be_ctrl_cleanup(adapter);
  1684. if (adapter->msix_enabled) {
  1685. pci_disable_msix(adapter->pdev);
  1686. adapter->msix_enabled = false;
  1687. }
  1688. pci_set_drvdata(pdev, NULL);
  1689. pci_release_regions(pdev);
  1690. pci_disable_device(pdev);
  1691. free_netdev(adapter->netdev);
  1692. }
  1693. static int be_hw_up(struct be_adapter *adapter)
  1694. {
  1695. int status;
  1696. status = be_cmd_POST(adapter);
  1697. if (status)
  1698. return status;
  1699. status = be_cmd_reset_function(adapter);
  1700. if (status)
  1701. return status;
  1702. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1703. if (status)
  1704. return status;
  1705. status = be_cmd_query_fw_cfg(adapter,
  1706. &adapter->port_num, &adapter->cap);
  1707. return status;
  1708. }
  1709. static int __devinit be_probe(struct pci_dev *pdev,
  1710. const struct pci_device_id *pdev_id)
  1711. {
  1712. int status = 0;
  1713. struct be_adapter *adapter;
  1714. struct net_device *netdev;
  1715. u8 mac[ETH_ALEN];
  1716. status = pci_enable_device(pdev);
  1717. if (status)
  1718. goto do_none;
  1719. status = pci_request_regions(pdev, DRV_NAME);
  1720. if (status)
  1721. goto disable_dev;
  1722. pci_set_master(pdev);
  1723. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1724. if (netdev == NULL) {
  1725. status = -ENOMEM;
  1726. goto rel_reg;
  1727. }
  1728. adapter = netdev_priv(netdev);
  1729. adapter->pdev = pdev;
  1730. pci_set_drvdata(pdev, adapter);
  1731. adapter->netdev = netdev;
  1732. be_msix_enable(adapter);
  1733. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1734. if (!status) {
  1735. netdev->features |= NETIF_F_HIGHDMA;
  1736. } else {
  1737. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1738. if (status) {
  1739. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1740. goto free_netdev;
  1741. }
  1742. }
  1743. status = be_ctrl_init(adapter);
  1744. if (status)
  1745. goto free_netdev;
  1746. status = be_stats_init(adapter);
  1747. if (status)
  1748. goto ctrl_clean;
  1749. status = be_hw_up(adapter);
  1750. if (status)
  1751. goto stats_clean;
  1752. status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
  1753. true /* permanent */, 0);
  1754. if (status)
  1755. goto stats_clean;
  1756. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1757. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1758. be_netdev_init(netdev);
  1759. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1760. status = be_setup(adapter);
  1761. if (status)
  1762. goto stats_clean;
  1763. status = register_netdev(netdev);
  1764. if (status != 0)
  1765. goto unsetup;
  1766. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1767. return 0;
  1768. unsetup:
  1769. be_clear(adapter);
  1770. stats_clean:
  1771. be_stats_cleanup(adapter);
  1772. ctrl_clean:
  1773. be_ctrl_cleanup(adapter);
  1774. free_netdev:
  1775. free_netdev(adapter->netdev);
  1776. rel_reg:
  1777. pci_release_regions(pdev);
  1778. disable_dev:
  1779. pci_disable_device(pdev);
  1780. do_none:
  1781. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1782. return status;
  1783. }
  1784. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1785. {
  1786. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1787. struct net_device *netdev = adapter->netdev;
  1788. netif_device_detach(netdev);
  1789. if (netif_running(netdev)) {
  1790. rtnl_lock();
  1791. be_close(netdev);
  1792. rtnl_unlock();
  1793. }
  1794. be_clear(adapter);
  1795. pci_save_state(pdev);
  1796. pci_disable_device(pdev);
  1797. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1798. return 0;
  1799. }
  1800. static int be_resume(struct pci_dev *pdev)
  1801. {
  1802. int status = 0;
  1803. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1804. struct net_device *netdev = adapter->netdev;
  1805. netif_device_detach(netdev);
  1806. status = pci_enable_device(pdev);
  1807. if (status)
  1808. return status;
  1809. pci_set_power_state(pdev, 0);
  1810. pci_restore_state(pdev);
  1811. be_setup(adapter);
  1812. if (netif_running(netdev)) {
  1813. rtnl_lock();
  1814. be_open(netdev);
  1815. rtnl_unlock();
  1816. }
  1817. netif_device_attach(netdev);
  1818. return 0;
  1819. }
  1820. static struct pci_driver be_driver = {
  1821. .name = DRV_NAME,
  1822. .id_table = be_dev_ids,
  1823. .probe = be_probe,
  1824. .remove = be_remove,
  1825. .suspend = be_suspend,
  1826. .resume = be_resume
  1827. };
  1828. static int __init be_init_module(void)
  1829. {
  1830. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1831. && rx_frag_size != 2048) {
  1832. printk(KERN_WARNING DRV_NAME
  1833. " : Module param rx_frag_size must be 2048/4096/8192."
  1834. " Using 2048\n");
  1835. rx_frag_size = 2048;
  1836. }
  1837. return pci_register_driver(&be_driver);
  1838. }
  1839. module_init(be_init_module);
  1840. static void __exit be_exit_module(void)
  1841. {
  1842. pci_unregister_driver(&be_driver);
  1843. }
  1844. module_exit(be_exit_module);