ac97c.c 30 KB

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  1. /*
  2. * Driver for Atmel AC97C
  3. *
  4. * Copyright (C) 2005-2009 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/delay.h>
  12. #include <linux/bitmap.h>
  13. #include <linux/device.h>
  14. #include <linux/dmaengine.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/atmel_pdc.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/mutex.h>
  22. #include <linux/gpio.h>
  23. #include <linux/io.h>
  24. #include <sound/core.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/ac97_codec.h>
  29. #include <sound/atmel-ac97c.h>
  30. #include <sound/memalloc.h>
  31. #include <linux/dw_dmac.h>
  32. #include <mach/cpu.h>
  33. #include <mach/hardware.h>
  34. #include <mach/gpio.h>
  35. #include "ac97c.h"
  36. enum {
  37. DMA_TX_READY = 0,
  38. DMA_RX_READY,
  39. DMA_TX_CHAN_PRESENT,
  40. DMA_RX_CHAN_PRESENT,
  41. };
  42. /* Serialize access to opened variable */
  43. static DEFINE_MUTEX(opened_mutex);
  44. struct atmel_ac97c_dma {
  45. struct dma_chan *rx_chan;
  46. struct dma_chan *tx_chan;
  47. };
  48. struct atmel_ac97c {
  49. struct clk *pclk;
  50. struct platform_device *pdev;
  51. struct atmel_ac97c_dma dma;
  52. struct snd_pcm_substream *playback_substream;
  53. struct snd_pcm_substream *capture_substream;
  54. struct snd_card *card;
  55. struct snd_pcm *pcm;
  56. struct snd_ac97 *ac97;
  57. struct snd_ac97_bus *ac97_bus;
  58. u64 cur_format;
  59. unsigned int cur_rate;
  60. unsigned long flags;
  61. int playback_period, capture_period;
  62. /* Serialize access to opened variable */
  63. spinlock_t lock;
  64. void __iomem *regs;
  65. int irq;
  66. int opened;
  67. int reset_pin;
  68. };
  69. #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
  70. #define ac97c_writel(chip, reg, val) \
  71. __raw_writel((val), (chip)->regs + AC97C_##reg)
  72. #define ac97c_readl(chip, reg) \
  73. __raw_readl((chip)->regs + AC97C_##reg)
  74. /* This function is called by the DMA driver. */
  75. static void atmel_ac97c_dma_playback_period_done(void *arg)
  76. {
  77. struct atmel_ac97c *chip = arg;
  78. snd_pcm_period_elapsed(chip->playback_substream);
  79. }
  80. static void atmel_ac97c_dma_capture_period_done(void *arg)
  81. {
  82. struct atmel_ac97c *chip = arg;
  83. snd_pcm_period_elapsed(chip->capture_substream);
  84. }
  85. static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
  86. struct snd_pcm_substream *substream,
  87. enum dma_data_direction direction)
  88. {
  89. struct dma_chan *chan;
  90. struct dw_cyclic_desc *cdesc;
  91. struct snd_pcm_runtime *runtime = substream->runtime;
  92. unsigned long buffer_len, period_len;
  93. /*
  94. * We don't do DMA on "complex" transfers, i.e. with
  95. * non-halfword-aligned buffers or lengths.
  96. */
  97. if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
  98. dev_dbg(&chip->pdev->dev, "too complex transfer\n");
  99. return -EINVAL;
  100. }
  101. if (direction == DMA_TO_DEVICE)
  102. chan = chip->dma.tx_chan;
  103. else
  104. chan = chip->dma.rx_chan;
  105. buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
  106. period_len = frames_to_bytes(runtime, runtime->period_size);
  107. cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
  108. period_len, direction);
  109. if (IS_ERR(cdesc)) {
  110. dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
  111. return PTR_ERR(cdesc);
  112. }
  113. if (direction == DMA_TO_DEVICE) {
  114. cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
  115. set_bit(DMA_TX_READY, &chip->flags);
  116. } else {
  117. cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
  118. set_bit(DMA_RX_READY, &chip->flags);
  119. }
  120. cdesc->period_callback_param = chip;
  121. return 0;
  122. }
  123. static struct snd_pcm_hardware atmel_ac97c_hw = {
  124. .info = (SNDRV_PCM_INFO_MMAP
  125. | SNDRV_PCM_INFO_MMAP_VALID
  126. | SNDRV_PCM_INFO_INTERLEAVED
  127. | SNDRV_PCM_INFO_BLOCK_TRANSFER
  128. | SNDRV_PCM_INFO_JOINT_DUPLEX
  129. | SNDRV_PCM_INFO_RESUME
  130. | SNDRV_PCM_INFO_PAUSE),
  131. .formats = (SNDRV_PCM_FMTBIT_S16_BE
  132. | SNDRV_PCM_FMTBIT_S16_LE),
  133. .rates = (SNDRV_PCM_RATE_CONTINUOUS),
  134. .rate_min = 4000,
  135. .rate_max = 48000,
  136. .channels_min = 1,
  137. .channels_max = 2,
  138. .buffer_bytes_max = 2 * 2 * 64 * 2048,
  139. .period_bytes_min = 4096,
  140. .period_bytes_max = 4096,
  141. .periods_min = 6,
  142. .periods_max = 64,
  143. };
  144. static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
  145. {
  146. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  147. struct snd_pcm_runtime *runtime = substream->runtime;
  148. mutex_lock(&opened_mutex);
  149. chip->opened++;
  150. runtime->hw = atmel_ac97c_hw;
  151. if (chip->cur_rate) {
  152. runtime->hw.rate_min = chip->cur_rate;
  153. runtime->hw.rate_max = chip->cur_rate;
  154. }
  155. if (chip->cur_format)
  156. runtime->hw.formats = (1ULL << chip->cur_format);
  157. mutex_unlock(&opened_mutex);
  158. chip->playback_substream = substream;
  159. return 0;
  160. }
  161. static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
  162. {
  163. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  164. struct snd_pcm_runtime *runtime = substream->runtime;
  165. mutex_lock(&opened_mutex);
  166. chip->opened++;
  167. runtime->hw = atmel_ac97c_hw;
  168. if (chip->cur_rate) {
  169. runtime->hw.rate_min = chip->cur_rate;
  170. runtime->hw.rate_max = chip->cur_rate;
  171. }
  172. if (chip->cur_format)
  173. runtime->hw.formats = (1ULL << chip->cur_format);
  174. mutex_unlock(&opened_mutex);
  175. chip->capture_substream = substream;
  176. return 0;
  177. }
  178. static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
  179. {
  180. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  181. mutex_lock(&opened_mutex);
  182. chip->opened--;
  183. if (!chip->opened) {
  184. chip->cur_rate = 0;
  185. chip->cur_format = 0;
  186. }
  187. mutex_unlock(&opened_mutex);
  188. chip->playback_substream = NULL;
  189. return 0;
  190. }
  191. static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
  192. {
  193. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  194. mutex_lock(&opened_mutex);
  195. chip->opened--;
  196. if (!chip->opened) {
  197. chip->cur_rate = 0;
  198. chip->cur_format = 0;
  199. }
  200. mutex_unlock(&opened_mutex);
  201. chip->capture_substream = NULL;
  202. return 0;
  203. }
  204. static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
  205. struct snd_pcm_hw_params *hw_params)
  206. {
  207. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  208. int retval;
  209. retval = snd_pcm_lib_malloc_pages(substream,
  210. params_buffer_bytes(hw_params));
  211. if (retval < 0)
  212. return retval;
  213. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  214. if (cpu_is_at32ap7000()) {
  215. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  216. if (retval == 1)
  217. if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
  218. dw_dma_cyclic_free(chip->dma.tx_chan);
  219. }
  220. /* Set restrictions to params. */
  221. mutex_lock(&opened_mutex);
  222. chip->cur_rate = params_rate(hw_params);
  223. chip->cur_format = params_format(hw_params);
  224. mutex_unlock(&opened_mutex);
  225. return retval;
  226. }
  227. static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
  228. struct snd_pcm_hw_params *hw_params)
  229. {
  230. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  231. int retval;
  232. retval = snd_pcm_lib_malloc_pages(substream,
  233. params_buffer_bytes(hw_params));
  234. if (retval < 0)
  235. return retval;
  236. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  237. if (cpu_is_at32ap7000()) {
  238. if (retval < 0)
  239. return retval;
  240. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  241. if (retval == 1)
  242. if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
  243. dw_dma_cyclic_free(chip->dma.rx_chan);
  244. }
  245. /* Set restrictions to params. */
  246. mutex_lock(&opened_mutex);
  247. chip->cur_rate = params_rate(hw_params);
  248. chip->cur_format = params_format(hw_params);
  249. mutex_unlock(&opened_mutex);
  250. return retval;
  251. }
  252. static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
  253. {
  254. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  255. if (cpu_is_at32ap7000()) {
  256. if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
  257. dw_dma_cyclic_free(chip->dma.tx_chan);
  258. }
  259. return snd_pcm_lib_free_pages(substream);
  260. }
  261. static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
  262. {
  263. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  264. if (cpu_is_at32ap7000()) {
  265. if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
  266. dw_dma_cyclic_free(chip->dma.rx_chan);
  267. }
  268. return snd_pcm_lib_free_pages(substream);
  269. }
  270. static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
  271. {
  272. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  273. struct snd_pcm_runtime *runtime = substream->runtime;
  274. int block_size = frames_to_bytes(runtime, runtime->period_size);
  275. unsigned long word = ac97c_readl(chip, OCA);
  276. int retval;
  277. chip->playback_period = 0;
  278. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  279. /* assign channels to AC97C channel A */
  280. switch (runtime->channels) {
  281. case 1:
  282. word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
  283. break;
  284. case 2:
  285. word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
  286. | AC97C_CH_ASSIGN(PCM_RIGHT, A);
  287. break;
  288. default:
  289. /* TODO: support more than two channels */
  290. return -EINVAL;
  291. }
  292. ac97c_writel(chip, OCA, word);
  293. /* configure sample format and size */
  294. word = ac97c_readl(chip, CAMR);
  295. if (chip->opened <= 1)
  296. word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
  297. else
  298. word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
  299. switch (runtime->format) {
  300. case SNDRV_PCM_FORMAT_S16_LE:
  301. if (cpu_is_at32ap7000())
  302. word |= AC97C_CMR_CEM_LITTLE;
  303. break;
  304. case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
  305. word &= ~(AC97C_CMR_CEM_LITTLE);
  306. break;
  307. default:
  308. word = ac97c_readl(chip, OCA);
  309. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  310. ac97c_writel(chip, OCA, word);
  311. return -EINVAL;
  312. }
  313. /* Enable underrun interrupt on channel A */
  314. word |= AC97C_CSR_UNRUN;
  315. ac97c_writel(chip, CAMR, word);
  316. /* Enable channel A event interrupt */
  317. word = ac97c_readl(chip, IMR);
  318. word |= AC97C_SR_CAEVT;
  319. ac97c_writel(chip, IER, word);
  320. /* set variable rate if needed */
  321. if (runtime->rate != 48000) {
  322. word = ac97c_readl(chip, MR);
  323. word |= AC97C_MR_VRA;
  324. ac97c_writel(chip, MR, word);
  325. } else {
  326. word = ac97c_readl(chip, MR);
  327. word &= ~(AC97C_MR_VRA);
  328. ac97c_writel(chip, MR, word);
  329. }
  330. retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
  331. runtime->rate);
  332. if (retval)
  333. dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
  334. runtime->rate);
  335. if (cpu_is_at32ap7000()) {
  336. if (!test_bit(DMA_TX_READY, &chip->flags))
  337. retval = atmel_ac97c_prepare_dma(chip, substream,
  338. DMA_TO_DEVICE);
  339. } else {
  340. /* Initialize and start the PDC */
  341. writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
  342. writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
  343. writel(runtime->dma_addr + block_size,
  344. chip->regs + ATMEL_PDC_TNPR);
  345. writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
  346. }
  347. return retval;
  348. }
  349. static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
  350. {
  351. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  352. struct snd_pcm_runtime *runtime = substream->runtime;
  353. int block_size = frames_to_bytes(runtime, runtime->period_size);
  354. unsigned long word = ac97c_readl(chip, ICA);
  355. int retval;
  356. chip->capture_period = 0;
  357. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  358. /* assign channels to AC97C channel A */
  359. switch (runtime->channels) {
  360. case 1:
  361. word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
  362. break;
  363. case 2:
  364. word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
  365. | AC97C_CH_ASSIGN(PCM_RIGHT, A);
  366. break;
  367. default:
  368. /* TODO: support more than two channels */
  369. return -EINVAL;
  370. }
  371. ac97c_writel(chip, ICA, word);
  372. /* configure sample format and size */
  373. word = ac97c_readl(chip, CAMR);
  374. if (chip->opened <= 1)
  375. word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
  376. else
  377. word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
  378. switch (runtime->format) {
  379. case SNDRV_PCM_FORMAT_S16_LE:
  380. if (cpu_is_at32ap7000())
  381. word |= AC97C_CMR_CEM_LITTLE;
  382. break;
  383. case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
  384. word &= ~(AC97C_CMR_CEM_LITTLE);
  385. break;
  386. default:
  387. word = ac97c_readl(chip, ICA);
  388. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  389. ac97c_writel(chip, ICA, word);
  390. return -EINVAL;
  391. }
  392. /* Enable overrun interrupt on channel A */
  393. word |= AC97C_CSR_OVRUN;
  394. ac97c_writel(chip, CAMR, word);
  395. /* Enable channel A event interrupt */
  396. word = ac97c_readl(chip, IMR);
  397. word |= AC97C_SR_CAEVT;
  398. ac97c_writel(chip, IER, word);
  399. /* set variable rate if needed */
  400. if (runtime->rate != 48000) {
  401. word = ac97c_readl(chip, MR);
  402. word |= AC97C_MR_VRA;
  403. ac97c_writel(chip, MR, word);
  404. } else {
  405. word = ac97c_readl(chip, MR);
  406. word &= ~(AC97C_MR_VRA);
  407. ac97c_writel(chip, MR, word);
  408. }
  409. retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
  410. runtime->rate);
  411. if (retval)
  412. dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
  413. runtime->rate);
  414. if (cpu_is_at32ap7000()) {
  415. if (!test_bit(DMA_RX_READY, &chip->flags))
  416. retval = atmel_ac97c_prepare_dma(chip, substream,
  417. DMA_FROM_DEVICE);
  418. } else {
  419. /* Initialize and start the PDC */
  420. writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
  421. writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
  422. writel(runtime->dma_addr + block_size,
  423. chip->regs + ATMEL_PDC_RNPR);
  424. writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
  425. }
  426. return retval;
  427. }
  428. static int
  429. atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  430. {
  431. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  432. unsigned long camr, ptcr = 0;
  433. int retval = 0;
  434. camr = ac97c_readl(chip, CAMR);
  435. switch (cmd) {
  436. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
  437. case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
  438. case SNDRV_PCM_TRIGGER_START:
  439. if (cpu_is_at32ap7000()) {
  440. retval = dw_dma_cyclic_start(chip->dma.tx_chan);
  441. if (retval)
  442. goto out;
  443. } else {
  444. ptcr = ATMEL_PDC_TXTEN;
  445. }
  446. camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
  447. break;
  448. case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
  449. case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
  450. case SNDRV_PCM_TRIGGER_STOP:
  451. if (cpu_is_at32ap7000())
  452. dw_dma_cyclic_stop(chip->dma.tx_chan);
  453. else
  454. ptcr |= ATMEL_PDC_TXTDIS;
  455. if (chip->opened <= 1)
  456. camr &= ~AC97C_CMR_CENA;
  457. break;
  458. default:
  459. retval = -EINVAL;
  460. goto out;
  461. }
  462. ac97c_writel(chip, CAMR, camr);
  463. if (!cpu_is_at32ap7000())
  464. writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
  465. out:
  466. return retval;
  467. }
  468. static int
  469. atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  470. {
  471. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  472. unsigned long camr, ptcr = 0;
  473. int retval = 0;
  474. camr = ac97c_readl(chip, CAMR);
  475. ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
  476. switch (cmd) {
  477. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
  478. case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
  479. case SNDRV_PCM_TRIGGER_START:
  480. if (cpu_is_at32ap7000()) {
  481. retval = dw_dma_cyclic_start(chip->dma.rx_chan);
  482. if (retval)
  483. goto out;
  484. } else {
  485. ptcr = ATMEL_PDC_RXTEN;
  486. }
  487. camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
  488. break;
  489. case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
  490. case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
  491. case SNDRV_PCM_TRIGGER_STOP:
  492. if (cpu_is_at32ap7000())
  493. dw_dma_cyclic_stop(chip->dma.rx_chan);
  494. else
  495. ptcr |= (ATMEL_PDC_RXTDIS);
  496. if (chip->opened <= 1)
  497. camr &= ~AC97C_CMR_CENA;
  498. break;
  499. default:
  500. retval = -EINVAL;
  501. break;
  502. }
  503. ac97c_writel(chip, CAMR, camr);
  504. if (!cpu_is_at32ap7000())
  505. writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
  506. out:
  507. return retval;
  508. }
  509. static snd_pcm_uframes_t
  510. atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
  511. {
  512. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  513. struct snd_pcm_runtime *runtime = substream->runtime;
  514. snd_pcm_uframes_t frames;
  515. unsigned long bytes;
  516. if (cpu_is_at32ap7000())
  517. bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
  518. else
  519. bytes = readl(chip->regs + ATMEL_PDC_TPR);
  520. bytes -= runtime->dma_addr;
  521. frames = bytes_to_frames(runtime, bytes);
  522. if (frames >= runtime->buffer_size)
  523. frames -= runtime->buffer_size;
  524. return frames;
  525. }
  526. static snd_pcm_uframes_t
  527. atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
  528. {
  529. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  530. struct snd_pcm_runtime *runtime = substream->runtime;
  531. snd_pcm_uframes_t frames;
  532. unsigned long bytes;
  533. if (cpu_is_at32ap7000())
  534. bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
  535. else
  536. bytes = readl(chip->regs + ATMEL_PDC_RPR);
  537. bytes -= runtime->dma_addr;
  538. frames = bytes_to_frames(runtime, bytes);
  539. if (frames >= runtime->buffer_size)
  540. frames -= runtime->buffer_size;
  541. return frames;
  542. }
  543. static struct snd_pcm_ops atmel_ac97_playback_ops = {
  544. .open = atmel_ac97c_playback_open,
  545. .close = atmel_ac97c_playback_close,
  546. .ioctl = snd_pcm_lib_ioctl,
  547. .hw_params = atmel_ac97c_playback_hw_params,
  548. .hw_free = atmel_ac97c_playback_hw_free,
  549. .prepare = atmel_ac97c_playback_prepare,
  550. .trigger = atmel_ac97c_playback_trigger,
  551. .pointer = atmel_ac97c_playback_pointer,
  552. };
  553. static struct snd_pcm_ops atmel_ac97_capture_ops = {
  554. .open = atmel_ac97c_capture_open,
  555. .close = atmel_ac97c_capture_close,
  556. .ioctl = snd_pcm_lib_ioctl,
  557. .hw_params = atmel_ac97c_capture_hw_params,
  558. .hw_free = atmel_ac97c_capture_hw_free,
  559. .prepare = atmel_ac97c_capture_prepare,
  560. .trigger = atmel_ac97c_capture_trigger,
  561. .pointer = atmel_ac97c_capture_pointer,
  562. };
  563. static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
  564. {
  565. struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
  566. irqreturn_t retval = IRQ_NONE;
  567. u32 sr = ac97c_readl(chip, SR);
  568. u32 casr = ac97c_readl(chip, CASR);
  569. u32 cosr = ac97c_readl(chip, COSR);
  570. u32 camr = ac97c_readl(chip, CAMR);
  571. if (sr & AC97C_SR_CAEVT) {
  572. struct snd_pcm_runtime *runtime;
  573. int offset, next_period, block_size;
  574. dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
  575. casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
  576. casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
  577. casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
  578. casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
  579. casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
  580. !casr ? " NONE" : "");
  581. if (!cpu_is_at32ap7000()) {
  582. if ((casr & camr) & AC97C_CSR_ENDTX) {
  583. runtime = chip->playback_substream->runtime;
  584. block_size = frames_to_bytes(runtime,
  585. runtime->period_size);
  586. chip->playback_period++;
  587. if (chip->playback_period == runtime->periods)
  588. chip->playback_period = 0;
  589. next_period = chip->playback_period + 1;
  590. if (next_period == runtime->periods)
  591. next_period = 0;
  592. offset = block_size * next_period;
  593. writel(runtime->dma_addr + offset,
  594. chip->regs + ATMEL_PDC_TNPR);
  595. writel(block_size / 2,
  596. chip->regs + ATMEL_PDC_TNCR);
  597. snd_pcm_period_elapsed(
  598. chip->playback_substream);
  599. }
  600. if ((casr & camr) & AC97C_CSR_ENDRX) {
  601. runtime = chip->capture_substream->runtime;
  602. block_size = frames_to_bytes(runtime,
  603. runtime->period_size);
  604. chip->capture_period++;
  605. if (chip->capture_period == runtime->periods)
  606. chip->capture_period = 0;
  607. next_period = chip->capture_period + 1;
  608. if (next_period == runtime->periods)
  609. next_period = 0;
  610. offset = block_size * next_period;
  611. writel(runtime->dma_addr + offset,
  612. chip->regs + ATMEL_PDC_RNPR);
  613. writel(block_size / 2,
  614. chip->regs + ATMEL_PDC_RNCR);
  615. snd_pcm_period_elapsed(chip->capture_substream);
  616. }
  617. }
  618. retval = IRQ_HANDLED;
  619. }
  620. if (sr & AC97C_SR_COEVT) {
  621. dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
  622. cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
  623. cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
  624. cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
  625. cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
  626. !cosr ? " NONE" : "");
  627. retval = IRQ_HANDLED;
  628. }
  629. if (retval == IRQ_NONE) {
  630. dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
  631. "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
  632. }
  633. return retval;
  634. }
  635. static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = {
  636. /* Playback */
  637. {
  638. .exclusive = 1,
  639. .r = { {
  640. .slots = ((1 << AC97_SLOT_PCM_LEFT)
  641. | (1 << AC97_SLOT_PCM_RIGHT)),
  642. } },
  643. },
  644. /* PCM in */
  645. {
  646. .stream = 1,
  647. .exclusive = 1,
  648. .r = { {
  649. .slots = ((1 << AC97_SLOT_PCM_LEFT)
  650. | (1 << AC97_SLOT_PCM_RIGHT)),
  651. } }
  652. },
  653. /* Mic in */
  654. {
  655. .stream = 1,
  656. .exclusive = 1,
  657. .r = { {
  658. .slots = (1<<AC97_SLOT_MIC),
  659. } }
  660. },
  661. };
  662. static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
  663. {
  664. struct snd_pcm *pcm;
  665. struct snd_pcm_hardware hw = atmel_ac97c_hw;
  666. int capture, playback, retval, err;
  667. capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  668. playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  669. if (!cpu_is_at32ap7000()) {
  670. err = snd_ac97_pcm_assign(chip->ac97_bus,
  671. ARRAY_SIZE(at91_ac97_pcm_defs),
  672. at91_ac97_pcm_defs);
  673. if (err)
  674. return err;
  675. }
  676. retval = snd_pcm_new(chip->card, chip->card->shortname,
  677. chip->pdev->id, playback, capture, &pcm);
  678. if (retval)
  679. return retval;
  680. if (capture)
  681. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  682. &atmel_ac97_capture_ops);
  683. if (playback)
  684. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  685. &atmel_ac97_playback_ops);
  686. retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  687. &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
  688. hw.buffer_bytes_max);
  689. if (retval)
  690. return retval;
  691. pcm->private_data = chip;
  692. pcm->info_flags = 0;
  693. strcpy(pcm->name, chip->card->shortname);
  694. chip->pcm = pcm;
  695. return 0;
  696. }
  697. static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
  698. {
  699. struct snd_ac97_template template;
  700. memset(&template, 0, sizeof(template));
  701. template.private_data = chip;
  702. return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
  703. }
  704. static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
  705. unsigned short val)
  706. {
  707. struct atmel_ac97c *chip = get_chip(ac97);
  708. unsigned long word;
  709. int timeout = 40;
  710. word = (reg & 0x7f) << 16 | val;
  711. do {
  712. if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
  713. ac97c_writel(chip, COTHR, word);
  714. return;
  715. }
  716. udelay(1);
  717. } while (--timeout);
  718. dev_dbg(&chip->pdev->dev, "codec write timeout\n");
  719. }
  720. static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
  721. unsigned short reg)
  722. {
  723. struct atmel_ac97c *chip = get_chip(ac97);
  724. unsigned long word;
  725. int timeout = 40;
  726. int write = 10;
  727. word = (0x80 | (reg & 0x7f)) << 16;
  728. if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
  729. ac97c_readl(chip, CORHR);
  730. retry_write:
  731. timeout = 40;
  732. do {
  733. if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
  734. ac97c_writel(chip, COTHR, word);
  735. goto read_reg;
  736. }
  737. udelay(10);
  738. } while (--timeout);
  739. if (!--write)
  740. goto timed_out;
  741. goto retry_write;
  742. read_reg:
  743. do {
  744. if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
  745. unsigned short val = ac97c_readl(chip, CORHR);
  746. return val;
  747. }
  748. udelay(10);
  749. } while (--timeout);
  750. if (!--write)
  751. goto timed_out;
  752. goto retry_write;
  753. timed_out:
  754. dev_dbg(&chip->pdev->dev, "codec read timeout\n");
  755. return 0xffff;
  756. }
  757. static bool filter(struct dma_chan *chan, void *slave)
  758. {
  759. struct dw_dma_slave *dws = slave;
  760. if (dws->dma_dev == chan->device->dev) {
  761. chan->private = dws;
  762. return true;
  763. } else
  764. return false;
  765. }
  766. static void atmel_ac97c_reset(struct atmel_ac97c *chip)
  767. {
  768. ac97c_writel(chip, MR, 0);
  769. ac97c_writel(chip, MR, AC97C_MR_ENA);
  770. ac97c_writel(chip, CAMR, 0);
  771. ac97c_writel(chip, COMR, 0);
  772. if (gpio_is_valid(chip->reset_pin)) {
  773. gpio_set_value(chip->reset_pin, 0);
  774. /* AC97 v2.2 specifications says minimum 1 us. */
  775. udelay(2);
  776. gpio_set_value(chip->reset_pin, 1);
  777. }
  778. }
  779. static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
  780. {
  781. struct snd_card *card;
  782. struct atmel_ac97c *chip;
  783. struct resource *regs;
  784. struct ac97c_platform_data *pdata;
  785. struct clk *pclk;
  786. static struct snd_ac97_bus_ops ops = {
  787. .write = atmel_ac97c_write,
  788. .read = atmel_ac97c_read,
  789. };
  790. int retval;
  791. int irq;
  792. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  793. if (!regs) {
  794. dev_dbg(&pdev->dev, "no memory resource\n");
  795. return -ENXIO;
  796. }
  797. pdata = pdev->dev.platform_data;
  798. if (!pdata) {
  799. dev_dbg(&pdev->dev, "no platform data\n");
  800. return -ENXIO;
  801. }
  802. irq = platform_get_irq(pdev, 0);
  803. if (irq < 0) {
  804. dev_dbg(&pdev->dev, "could not get irq\n");
  805. return -ENXIO;
  806. }
  807. if (cpu_is_at32ap7000()) {
  808. pclk = clk_get(&pdev->dev, "pclk");
  809. } else {
  810. pclk = clk_get(&pdev->dev, "ac97_clk");
  811. }
  812. if (IS_ERR(pclk)) {
  813. dev_dbg(&pdev->dev, "no peripheral clock\n");
  814. return PTR_ERR(pclk);
  815. }
  816. clk_enable(pclk);
  817. retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
  818. THIS_MODULE, sizeof(struct atmel_ac97c), &card);
  819. if (retval) {
  820. dev_dbg(&pdev->dev, "could not create sound card device\n");
  821. goto err_snd_card_new;
  822. }
  823. chip = get_chip(card);
  824. retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
  825. if (retval) {
  826. dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
  827. goto err_request_irq;
  828. }
  829. chip->irq = irq;
  830. spin_lock_init(&chip->lock);
  831. strcpy(card->driver, "Atmel AC97C");
  832. strcpy(card->shortname, "Atmel AC97C");
  833. sprintf(card->longname, "Atmel AC97 controller");
  834. chip->card = card;
  835. chip->pclk = pclk;
  836. chip->pdev = pdev;
  837. chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
  838. if (!chip->regs) {
  839. dev_dbg(&pdev->dev, "could not remap register memory\n");
  840. goto err_ioremap;
  841. }
  842. if (gpio_is_valid(pdata->reset_pin)) {
  843. if (gpio_request(pdata->reset_pin, "reset_pin")) {
  844. dev_dbg(&pdev->dev, "reset pin not available\n");
  845. chip->reset_pin = -ENODEV;
  846. } else {
  847. gpio_direction_output(pdata->reset_pin, 1);
  848. chip->reset_pin = pdata->reset_pin;
  849. }
  850. }
  851. snd_card_set_dev(card, &pdev->dev);
  852. atmel_ac97c_reset(chip);
  853. /* Enable overrun interrupt from codec channel */
  854. ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
  855. ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
  856. retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
  857. if (retval) {
  858. dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
  859. goto err_ac97_bus;
  860. }
  861. retval = atmel_ac97c_mixer_new(chip);
  862. if (retval) {
  863. dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
  864. goto err_ac97_bus;
  865. }
  866. if (cpu_is_at32ap7000()) {
  867. if (pdata->rx_dws.dma_dev) {
  868. struct dw_dma_slave *dws = &pdata->rx_dws;
  869. dma_cap_mask_t mask;
  870. dws->rx_reg = regs->start + AC97C_CARHR + 2;
  871. dma_cap_zero(mask);
  872. dma_cap_set(DMA_SLAVE, mask);
  873. chip->dma.rx_chan = dma_request_channel(mask, filter,
  874. dws);
  875. dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
  876. dev_name(&chip->dma.rx_chan->dev->device));
  877. set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  878. }
  879. if (pdata->tx_dws.dma_dev) {
  880. struct dw_dma_slave *dws = &pdata->tx_dws;
  881. dma_cap_mask_t mask;
  882. dws->tx_reg = regs->start + AC97C_CATHR + 2;
  883. dma_cap_zero(mask);
  884. dma_cap_set(DMA_SLAVE, mask);
  885. chip->dma.tx_chan = dma_request_channel(mask, filter,
  886. dws);
  887. dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
  888. dev_name(&chip->dma.tx_chan->dev->device));
  889. set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  890. }
  891. if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
  892. !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
  893. dev_dbg(&pdev->dev, "DMA not available\n");
  894. retval = -ENODEV;
  895. goto err_dma;
  896. }
  897. } else {
  898. /* Just pretend that we have DMA channel(for at91 i is actually
  899. * the PDC) */
  900. set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  901. set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  902. }
  903. retval = atmel_ac97c_pcm_new(chip);
  904. if (retval) {
  905. dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
  906. goto err_dma;
  907. }
  908. retval = snd_card_register(card);
  909. if (retval) {
  910. dev_dbg(&pdev->dev, "could not register sound card\n");
  911. goto err_dma;
  912. }
  913. platform_set_drvdata(pdev, card);
  914. dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
  915. chip->regs, irq);
  916. return 0;
  917. err_dma:
  918. if (cpu_is_at32ap7000()) {
  919. if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
  920. dma_release_channel(chip->dma.rx_chan);
  921. if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
  922. dma_release_channel(chip->dma.tx_chan);
  923. clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  924. clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  925. chip->dma.rx_chan = NULL;
  926. chip->dma.tx_chan = NULL;
  927. }
  928. err_ac97_bus:
  929. snd_card_set_dev(card, NULL);
  930. if (gpio_is_valid(chip->reset_pin))
  931. gpio_free(chip->reset_pin);
  932. iounmap(chip->regs);
  933. err_ioremap:
  934. free_irq(irq, chip);
  935. err_request_irq:
  936. snd_card_free(card);
  937. err_snd_card_new:
  938. clk_disable(pclk);
  939. clk_put(pclk);
  940. return retval;
  941. }
  942. #ifdef CONFIG_PM
  943. static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg)
  944. {
  945. struct snd_card *card = platform_get_drvdata(pdev);
  946. struct atmel_ac97c *chip = card->private_data;
  947. if (cpu_is_at32ap7000()) {
  948. if (test_bit(DMA_RX_READY, &chip->flags))
  949. dw_dma_cyclic_stop(chip->dma.rx_chan);
  950. if (test_bit(DMA_TX_READY, &chip->flags))
  951. dw_dma_cyclic_stop(chip->dma.tx_chan);
  952. }
  953. clk_disable(chip->pclk);
  954. return 0;
  955. }
  956. static int atmel_ac97c_resume(struct platform_device *pdev)
  957. {
  958. struct snd_card *card = platform_get_drvdata(pdev);
  959. struct atmel_ac97c *chip = card->private_data;
  960. clk_enable(chip->pclk);
  961. if (cpu_is_at32ap7000()) {
  962. if (test_bit(DMA_RX_READY, &chip->flags))
  963. dw_dma_cyclic_start(chip->dma.rx_chan);
  964. if (test_bit(DMA_TX_READY, &chip->flags))
  965. dw_dma_cyclic_start(chip->dma.tx_chan);
  966. }
  967. return 0;
  968. }
  969. #else
  970. #define atmel_ac97c_suspend NULL
  971. #define atmel_ac97c_resume NULL
  972. #endif
  973. static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
  974. {
  975. struct snd_card *card = platform_get_drvdata(pdev);
  976. struct atmel_ac97c *chip = get_chip(card);
  977. if (gpio_is_valid(chip->reset_pin))
  978. gpio_free(chip->reset_pin);
  979. ac97c_writel(chip, CAMR, 0);
  980. ac97c_writel(chip, COMR, 0);
  981. ac97c_writel(chip, MR, 0);
  982. clk_disable(chip->pclk);
  983. clk_put(chip->pclk);
  984. iounmap(chip->regs);
  985. free_irq(chip->irq, chip);
  986. if (cpu_is_at32ap7000()) {
  987. if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
  988. dma_release_channel(chip->dma.rx_chan);
  989. if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
  990. dma_release_channel(chip->dma.tx_chan);
  991. clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  992. clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  993. chip->dma.rx_chan = NULL;
  994. chip->dma.tx_chan = NULL;
  995. }
  996. snd_card_set_dev(card, NULL);
  997. snd_card_free(card);
  998. platform_set_drvdata(pdev, NULL);
  999. return 0;
  1000. }
  1001. static struct platform_driver atmel_ac97c_driver = {
  1002. .remove = __devexit_p(atmel_ac97c_remove),
  1003. .driver = {
  1004. .name = "atmel_ac97c",
  1005. },
  1006. .suspend = atmel_ac97c_suspend,
  1007. .resume = atmel_ac97c_resume,
  1008. };
  1009. static int __init atmel_ac97c_init(void)
  1010. {
  1011. return platform_driver_probe(&atmel_ac97c_driver,
  1012. atmel_ac97c_probe);
  1013. }
  1014. module_init(atmel_ac97c_init);
  1015. static void __exit atmel_ac97c_exit(void)
  1016. {
  1017. platform_driver_unregister(&atmel_ac97c_driver);
  1018. }
  1019. module_exit(atmel_ac97c_exit);
  1020. MODULE_LICENSE("GPL");
  1021. MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
  1022. MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>");