pmcraid.c 166 KB

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  1. /*
  2. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  3. *
  4. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  5. * PMC-Sierra Inc
  6. *
  7. * Copyright (C) 2008, 2009 PMC Sierra Inc
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
  22. * USA
  23. *
  24. */
  25. #include <linux/fs.h>
  26. #include <linux/init.h>
  27. #include <linux/types.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ioport.h>
  31. #include <linux/delay.h>
  32. #include <linux/pci.h>
  33. #include <linux/wait.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/sched.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/firmware.h>
  39. #include <linux/module.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/hdreg.h>
  42. #include <linux/version.h>
  43. #include <linux/io.h>
  44. #include <linux/slab.h>
  45. #include <asm/irq.h>
  46. #include <asm/processor.h>
  47. #include <linux/libata.h>
  48. #include <linux/mutex.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/scsi_host.h>
  51. #include <scsi/scsi_device.h>
  52. #include <scsi/scsi_tcq.h>
  53. #include <scsi/scsi_eh.h>
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsicam.h>
  56. #include "pmcraid.h"
  57. /*
  58. * Module configuration parameters
  59. */
  60. static unsigned int pmcraid_debug_log;
  61. static unsigned int pmcraid_disable_aen;
  62. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  63. /*
  64. * Data structures to support multiple adapters by the LLD.
  65. * pmcraid_adapter_count - count of configured adapters
  66. */
  67. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  68. /*
  69. * Supporting user-level control interface through IOCTL commands.
  70. * pmcraid_major - major number to use
  71. * pmcraid_minor - minor number(s) to use
  72. */
  73. static unsigned int pmcraid_major;
  74. static struct class *pmcraid_class;
  75. DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  76. /*
  77. * Module parameters
  78. */
  79. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  80. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  81. MODULE_LICENSE("GPL");
  82. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  83. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  84. MODULE_PARM_DESC(log_level,
  85. "Enables firmware error code logging, default :1 high-severity"
  86. " errors, 2: all errors including high-severity errors,"
  87. " 0: disables logging");
  88. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  89. MODULE_PARM_DESC(debug,
  90. "Enable driver verbose message logging. Set 1 to enable."
  91. "(default: 0)");
  92. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  93. MODULE_PARM_DESC(disable_aen,
  94. "Disable driver aen notifications to apps. Set 1 to disable."
  95. "(default: 0)");
  96. /* chip specific constants for PMC MaxRAID controllers (same for
  97. * 0x5220 and 0x8010
  98. */
  99. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  100. {
  101. .ioastatus = 0x0,
  102. .ioarrin = 0x00040,
  103. .mailbox = 0x7FC30,
  104. .global_intr_mask = 0x00034,
  105. .ioa_host_intr = 0x0009C,
  106. .ioa_host_intr_clr = 0x000A0,
  107. .ioa_host_msix_intr = 0x7FC40,
  108. .ioa_host_mask = 0x7FC28,
  109. .ioa_host_mask_clr = 0x7FC28,
  110. .host_ioa_intr = 0x00020,
  111. .host_ioa_intr_clr = 0x00020,
  112. .transop_timeout = 300
  113. }
  114. };
  115. /*
  116. * PCI device ids supported by pmcraid driver
  117. */
  118. static struct pci_device_id pmcraid_pci_table[] __devinitdata = {
  119. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  120. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  121. },
  122. {}
  123. };
  124. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  125. /**
  126. * pmcraid_slave_alloc - Prepare for commands to a device
  127. * @scsi_dev: scsi device struct
  128. *
  129. * This function is called by mid-layer prior to sending any command to the new
  130. * device. Stores resource entry details of the device in scsi_device struct.
  131. * Queuecommand uses the resource handle and other details to fill up IOARCB
  132. * while sending commands to the device.
  133. *
  134. * Return value:
  135. * 0 on success / -ENXIO if device does not exist
  136. */
  137. static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
  138. {
  139. struct pmcraid_resource_entry *temp, *res = NULL;
  140. struct pmcraid_instance *pinstance;
  141. u8 target, bus, lun;
  142. unsigned long lock_flags;
  143. int rc = -ENXIO;
  144. u16 fw_version;
  145. pinstance = shost_priv(scsi_dev->host);
  146. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  147. /* Driver exposes VSET and GSCSI resources only; all other device types
  148. * are not exposed. Resource list is synchronized using resource lock
  149. * so any traversal or modifications to the list should be done inside
  150. * this lock
  151. */
  152. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  153. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  154. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  155. if (RES_IS_VSET(temp->cfg_entry)) {
  156. if (fw_version <= PMCRAID_FW_VERSION_1)
  157. target = temp->cfg_entry.unique_flags1;
  158. else
  159. target = temp->cfg_entry.array_id & 0xFF;
  160. if (target > PMCRAID_MAX_VSET_TARGETS)
  161. continue;
  162. bus = PMCRAID_VSET_BUS_ID;
  163. lun = 0;
  164. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  165. target = RES_TARGET(temp->cfg_entry.resource_address);
  166. bus = PMCRAID_PHYS_BUS_ID;
  167. lun = RES_LUN(temp->cfg_entry.resource_address);
  168. } else {
  169. continue;
  170. }
  171. if (bus == scsi_dev->channel &&
  172. target == scsi_dev->id &&
  173. lun == scsi_dev->lun) {
  174. res = temp;
  175. break;
  176. }
  177. }
  178. if (res) {
  179. res->scsi_dev = scsi_dev;
  180. scsi_dev->hostdata = res;
  181. res->change_detected = 0;
  182. atomic_set(&res->read_failures, 0);
  183. atomic_set(&res->write_failures, 0);
  184. rc = 0;
  185. }
  186. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  187. return rc;
  188. }
  189. /**
  190. * pmcraid_slave_configure - Configures a SCSI device
  191. * @scsi_dev: scsi device struct
  192. *
  193. * This fucntion is executed by SCSI mid layer just after a device is first
  194. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  195. * timeout value (default 30s) will be over-written to a higher value (60s)
  196. * and max_sectors value will be over-written to 512. It also sets queue depth
  197. * to host->cmd_per_lun value
  198. *
  199. * Return value:
  200. * 0 on success
  201. */
  202. static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
  203. {
  204. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  205. if (!res)
  206. return 0;
  207. /* LLD exposes VSETs and Enclosure devices only */
  208. if (RES_IS_GSCSI(res->cfg_entry) &&
  209. scsi_dev->type != TYPE_ENCLOSURE)
  210. return -ENXIO;
  211. pmcraid_info("configuring %x:%x:%x:%x\n",
  212. scsi_dev->host->unique_id,
  213. scsi_dev->channel,
  214. scsi_dev->id,
  215. scsi_dev->lun);
  216. if (RES_IS_GSCSI(res->cfg_entry)) {
  217. scsi_dev->allow_restart = 1;
  218. } else if (RES_IS_VSET(res->cfg_entry)) {
  219. scsi_dev->allow_restart = 1;
  220. blk_queue_rq_timeout(scsi_dev->request_queue,
  221. PMCRAID_VSET_IO_TIMEOUT);
  222. blk_queue_max_hw_sectors(scsi_dev->request_queue,
  223. PMCRAID_VSET_MAX_SECTORS);
  224. }
  225. if (scsi_dev->tagged_supported &&
  226. (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
  227. scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
  228. scsi_adjust_queue_depth(scsi_dev, MSG_SIMPLE_TAG,
  229. scsi_dev->host->cmd_per_lun);
  230. } else {
  231. scsi_adjust_queue_depth(scsi_dev, 0,
  232. scsi_dev->host->cmd_per_lun);
  233. }
  234. return 0;
  235. }
  236. /**
  237. * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
  238. *
  239. * @scsi_dev: scsi device struct
  240. *
  241. * This is called by mid-layer before removing a device. Pointer assignments
  242. * done in pmcraid_slave_alloc will be reset to NULL here.
  243. *
  244. * Return value
  245. * none
  246. */
  247. static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
  248. {
  249. struct pmcraid_resource_entry *res;
  250. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  251. if (res)
  252. res->scsi_dev = NULL;
  253. scsi_dev->hostdata = NULL;
  254. }
  255. /**
  256. * pmcraid_change_queue_depth - Change the device's queue depth
  257. * @scsi_dev: scsi device struct
  258. * @depth: depth to set
  259. * @reason: calling context
  260. *
  261. * Return value
  262. * actual depth set
  263. */
  264. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth,
  265. int reason)
  266. {
  267. if (reason != SCSI_QDEPTH_DEFAULT)
  268. return -EOPNOTSUPP;
  269. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  270. depth = PMCRAID_MAX_CMD_PER_LUN;
  271. scsi_adjust_queue_depth(scsi_dev, scsi_get_tag_type(scsi_dev), depth);
  272. return scsi_dev->queue_depth;
  273. }
  274. /**
  275. * pmcraid_change_queue_type - Change the device's queue type
  276. * @scsi_dev: scsi device struct
  277. * @tag: type of tags to use
  278. *
  279. * Return value:
  280. * actual queue type set
  281. */
  282. static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag)
  283. {
  284. struct pmcraid_resource_entry *res;
  285. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  286. if ((res) && scsi_dev->tagged_supported &&
  287. (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
  288. scsi_set_tag_type(scsi_dev, tag);
  289. if (tag)
  290. scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
  291. else
  292. scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth);
  293. } else
  294. tag = 0;
  295. return tag;
  296. }
  297. /**
  298. * pmcraid_init_cmdblk - initializes a command block
  299. *
  300. * @cmd: pointer to struct pmcraid_cmd to be initialized
  301. * @index: if >=0 first time initialization; otherwise reinitialization
  302. *
  303. * Return Value
  304. * None
  305. */
  306. void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  307. {
  308. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  309. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  310. if (index >= 0) {
  311. /* first time initialization (called from probe) */
  312. u32 ioasa_offset =
  313. offsetof(struct pmcraid_control_block, ioasa);
  314. cmd->index = index;
  315. ioarcb->response_handle = cpu_to_le32(index << 2);
  316. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  317. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  318. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  319. } else {
  320. /* re-initialization of various lengths, called once command is
  321. * processed by IOA
  322. */
  323. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  324. ioarcb->hrrq_id = 0;
  325. ioarcb->request_flags0 = 0;
  326. ioarcb->request_flags1 = 0;
  327. ioarcb->cmd_timeout = 0;
  328. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  329. ioarcb->ioadl_bus_addr = 0;
  330. ioarcb->ioadl_length = 0;
  331. ioarcb->data_transfer_length = 0;
  332. ioarcb->add_cmd_param_length = 0;
  333. ioarcb->add_cmd_param_offset = 0;
  334. cmd->ioa_cb->ioasa.ioasc = 0;
  335. cmd->ioa_cb->ioasa.residual_data_length = 0;
  336. cmd->time_left = 0;
  337. }
  338. cmd->cmd_done = NULL;
  339. cmd->scsi_cmd = NULL;
  340. cmd->release = 0;
  341. cmd->completion_req = 0;
  342. cmd->sense_buffer = 0;
  343. cmd->sense_buffer_dma = 0;
  344. cmd->dma_handle = 0;
  345. init_timer(&cmd->timer);
  346. }
  347. /**
  348. * pmcraid_reinit_cmdblk - reinitialize a command block
  349. *
  350. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  351. *
  352. * Return Value
  353. * None
  354. */
  355. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  356. {
  357. pmcraid_init_cmdblk(cmd, -1);
  358. }
  359. /**
  360. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  361. * @pinstance: adapter instance structure
  362. *
  363. * Return Value:
  364. * returns pointer to cmd block or NULL if no blocks are available
  365. */
  366. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  367. struct pmcraid_instance *pinstance
  368. )
  369. {
  370. struct pmcraid_cmd *cmd = NULL;
  371. unsigned long lock_flags;
  372. /* free cmd block list is protected by free_pool_lock */
  373. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  374. if (!list_empty(&pinstance->free_cmd_pool)) {
  375. cmd = list_entry(pinstance->free_cmd_pool.next,
  376. struct pmcraid_cmd, free_list);
  377. list_del(&cmd->free_list);
  378. }
  379. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  380. /* Initialize the command block before giving it the caller */
  381. if (cmd != NULL)
  382. pmcraid_reinit_cmdblk(cmd);
  383. return cmd;
  384. }
  385. /**
  386. * pmcraid_return_cmd - return a completed command block back into free pool
  387. * @cmd: pointer to the command block
  388. *
  389. * Return Value:
  390. * nothing
  391. */
  392. void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  393. {
  394. struct pmcraid_instance *pinstance = cmd->drv_inst;
  395. unsigned long lock_flags;
  396. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  397. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  398. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  399. }
  400. /**
  401. * pmcraid_read_interrupts - reads IOA interrupts
  402. *
  403. * @pinstance: pointer to adapter instance structure
  404. *
  405. * Return value
  406. * interrupts read from IOA
  407. */
  408. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  409. {
  410. return (pinstance->interrupt_mode) ?
  411. ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
  412. ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  413. }
  414. /**
  415. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  416. *
  417. * @pinstance: pointer to per adapter instance structure
  418. * @intrs: interrupts to disable
  419. *
  420. * Return Value
  421. * None
  422. */
  423. static void pmcraid_disable_interrupts(
  424. struct pmcraid_instance *pinstance,
  425. u32 intrs
  426. )
  427. {
  428. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  429. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  430. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  431. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  432. ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  433. if (!pinstance->interrupt_mode) {
  434. iowrite32(intrs,
  435. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  436. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  437. }
  438. }
  439. /**
  440. * pmcraid_enable_interrupts - Enables specified interrupts
  441. *
  442. * @pinstance: pointer to per adapter instance structure
  443. * @intr: interrupts to enable
  444. *
  445. * Return Value
  446. * None
  447. */
  448. static void pmcraid_enable_interrupts(
  449. struct pmcraid_instance *pinstance,
  450. u32 intrs
  451. )
  452. {
  453. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  454. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  455. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  456. if (!pinstance->interrupt_mode) {
  457. iowrite32(~intrs,
  458. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  459. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  460. }
  461. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  462. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  463. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  464. }
  465. /**
  466. * pmcraid_clr_trans_op - clear trans to op interrupt
  467. *
  468. * @pinstance: pointer to per adapter instance structure
  469. *
  470. * Return Value
  471. * None
  472. */
  473. static void pmcraid_clr_trans_op(
  474. struct pmcraid_instance *pinstance
  475. )
  476. {
  477. unsigned long lock_flags;
  478. if (!pinstance->interrupt_mode) {
  479. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  480. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  481. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  482. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  483. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  484. ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
  485. }
  486. if (pinstance->reset_cmd != NULL) {
  487. del_timer(&pinstance->reset_cmd->timer);
  488. spin_lock_irqsave(
  489. pinstance->host->host_lock, lock_flags);
  490. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  491. spin_unlock_irqrestore(
  492. pinstance->host->host_lock, lock_flags);
  493. }
  494. }
  495. /**
  496. * pmcraid_reset_type - Determine the required reset type
  497. * @pinstance: pointer to adapter instance structure
  498. *
  499. * IOA requires hard reset if any of the following conditions is true.
  500. * 1. If HRRQ valid interrupt is not masked
  501. * 2. IOA reset alert doorbell is set
  502. * 3. If there are any error interrupts
  503. */
  504. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  505. {
  506. u32 mask;
  507. u32 intrs;
  508. u32 alerts;
  509. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  510. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  511. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  512. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  513. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  514. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  515. pmcraid_info("IOA requires hard reset\n");
  516. pinstance->ioa_hard_reset = 1;
  517. }
  518. /* If unit check is active, trigger the dump */
  519. if (intrs & INTRS_IOA_UNIT_CHECK)
  520. pinstance->ioa_unit_check = 1;
  521. }
  522. /**
  523. * pmcraid_bist_done - completion function for PCI BIST
  524. * @cmd: pointer to reset command
  525. * Return Value
  526. * none
  527. */
  528. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  529. static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
  530. {
  531. struct pmcraid_instance *pinstance = cmd->drv_inst;
  532. unsigned long lock_flags;
  533. int rc;
  534. u16 pci_reg;
  535. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  536. /* If PCI config space can't be accessed wait for another two secs */
  537. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  538. cmd->time_left > 0) {
  539. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  540. cmd->timer.expires = jiffies + cmd->time_left;
  541. cmd->time_left = 0;
  542. cmd->timer.data = (unsigned long)cmd;
  543. cmd->timer.function =
  544. (void (*)(unsigned long))pmcraid_bist_done;
  545. add_timer(&cmd->timer);
  546. } else {
  547. cmd->time_left = 0;
  548. pmcraid_info("BIST is complete, proceeding with reset\n");
  549. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  550. pmcraid_ioa_reset(cmd);
  551. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  552. }
  553. }
  554. /**
  555. * pmcraid_start_bist - starts BIST
  556. * @cmd: pointer to reset cmd
  557. * Return Value
  558. * none
  559. */
  560. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  561. {
  562. struct pmcraid_instance *pinstance = cmd->drv_inst;
  563. u32 doorbells, intrs;
  564. /* proceed with bist and wait for 2 seconds */
  565. iowrite32(DOORBELL_IOA_START_BIST,
  566. pinstance->int_regs.host_ioa_interrupt_reg);
  567. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  568. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  569. pmcraid_info("doorbells after start bist: %x intrs: %x\n",
  570. doorbells, intrs);
  571. cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  572. cmd->timer.data = (unsigned long)cmd;
  573. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  574. cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
  575. add_timer(&cmd->timer);
  576. }
  577. /**
  578. * pmcraid_reset_alert_done - completion routine for reset_alert
  579. * @cmd: pointer to command block used in reset sequence
  580. * Return value
  581. * None
  582. */
  583. static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
  584. {
  585. struct pmcraid_instance *pinstance = cmd->drv_inst;
  586. u32 status = ioread32(pinstance->ioa_status);
  587. unsigned long lock_flags;
  588. /* if the critical operation in progress bit is set or the wait times
  589. * out, invoke reset engine to proceed with hard reset. If there is
  590. * some more time to wait, restart the timer
  591. */
  592. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  593. cmd->time_left <= 0) {
  594. pmcraid_info("critical op is reset proceeding with reset\n");
  595. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  596. pmcraid_ioa_reset(cmd);
  597. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  598. } else {
  599. pmcraid_info("critical op is not yet reset waiting again\n");
  600. /* restart timer if some more time is available to wait */
  601. cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  602. cmd->timer.data = (unsigned long)cmd;
  603. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  604. cmd->timer.function =
  605. (void (*)(unsigned long))pmcraid_reset_alert_done;
  606. add_timer(&cmd->timer);
  607. }
  608. }
  609. /**
  610. * pmcraid_reset_alert - alerts IOA for a possible reset
  611. * @cmd : command block to be used for reset sequence.
  612. *
  613. * Return Value
  614. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  615. * successfully written to IOA. Returns non-zero in case pci_config_space
  616. * is not accessible
  617. */
  618. static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
  619. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  620. {
  621. struct pmcraid_instance *pinstance = cmd->drv_inst;
  622. u32 doorbells;
  623. int rc;
  624. u16 pci_reg;
  625. /* If we are able to access IOA PCI config space, alert IOA that we are
  626. * going to reset it soon. This enables IOA to preserv persistent error
  627. * data if any. In case memory space is not accessible, proceed with
  628. * BIST or slot_reset
  629. */
  630. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  631. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  632. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  633. * reset IOA doesn't generate any interrupts when CRITICAL
  634. * OPERATION bit is reset. A timer is started to wait for this
  635. * bit to be reset.
  636. */
  637. cmd->time_left = PMCRAID_RESET_TIMEOUT;
  638. cmd->timer.data = (unsigned long)cmd;
  639. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  640. cmd->timer.function =
  641. (void (*)(unsigned long))pmcraid_reset_alert_done;
  642. add_timer(&cmd->timer);
  643. iowrite32(DOORBELL_IOA_RESET_ALERT,
  644. pinstance->int_regs.host_ioa_interrupt_reg);
  645. doorbells =
  646. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  647. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  648. } else {
  649. pmcraid_info("PCI config is not accessible starting BIST\n");
  650. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  651. pmcraid_start_bist(cmd);
  652. }
  653. }
  654. /**
  655. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  656. *
  657. * @cmd : pointer to command structure, that got timedout
  658. *
  659. * This function blocks host requests and initiates an adapter reset.
  660. *
  661. * Return value:
  662. * None
  663. */
  664. static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
  665. {
  666. struct pmcraid_instance *pinstance = cmd->drv_inst;
  667. unsigned long lock_flags;
  668. dev_info(&pinstance->pdev->dev,
  669. "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
  670. cmd->ioa_cb->ioarcb.cdb[0]);
  671. /* Command timeouts result in hard reset sequence. The command that got
  672. * timed out may be the one used as part of reset sequence. In this
  673. * case restart reset sequence using the same command block even if
  674. * reset is in progress. Otherwise fail this command and get a free
  675. * command block to restart the reset sequence.
  676. */
  677. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  678. if (!pinstance->ioa_reset_in_progress) {
  679. pinstance->ioa_reset_attempts = 0;
  680. cmd = pmcraid_get_free_cmd(pinstance);
  681. /* If we are out of command blocks, just return here itself.
  682. * Some other command's timeout handler can do the reset job
  683. */
  684. if (cmd == NULL) {
  685. spin_unlock_irqrestore(pinstance->host->host_lock,
  686. lock_flags);
  687. pmcraid_err("no free cmnd block for timeout handler\n");
  688. return;
  689. }
  690. pinstance->reset_cmd = cmd;
  691. pinstance->ioa_reset_in_progress = 1;
  692. } else {
  693. pmcraid_info("reset is already in progress\n");
  694. if (pinstance->reset_cmd != cmd) {
  695. /* This command should have been given to IOA, this
  696. * command will be completed by fail_outstanding_cmds
  697. * anyway
  698. */
  699. pmcraid_err("cmd is pending but reset in progress\n");
  700. }
  701. /* If this command was being used as part of the reset
  702. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  703. * causes fail_outstanding_commands not to return the command
  704. * block back to free pool
  705. */
  706. if (cmd == pinstance->reset_cmd)
  707. cmd->cmd_done = pmcraid_ioa_reset;
  708. }
  709. /* Notify apps of important IOA bringup/bringdown sequences */
  710. if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
  711. pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
  712. pmcraid_notify_ioastate(pinstance,
  713. PMC_DEVICE_EVENT_RESET_START);
  714. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  715. scsi_block_requests(pinstance->host);
  716. pmcraid_reset_alert(cmd);
  717. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  718. }
  719. /**
  720. * pmcraid_internal_done - completion routine for internally generated cmds
  721. *
  722. * @cmd: command that got response from IOA
  723. *
  724. * Return Value:
  725. * none
  726. */
  727. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  728. {
  729. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  730. cmd->ioa_cb->ioarcb.cdb[0],
  731. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  732. /* Some of the internal commands are sent with callers blocking for the
  733. * response. Same will be indicated as part of cmd->completion_req
  734. * field. Response path needs to wake up any waiters waiting for cmd
  735. * completion if this flag is set.
  736. */
  737. if (cmd->completion_req) {
  738. cmd->completion_req = 0;
  739. complete(&cmd->wait_for_completion);
  740. }
  741. /* most of the internal commands are completed by caller itself, so
  742. * no need to return the command block back to free pool until we are
  743. * required to do so (e.g once done with initialization).
  744. */
  745. if (cmd->release) {
  746. cmd->release = 0;
  747. pmcraid_return_cmd(cmd);
  748. }
  749. }
  750. /**
  751. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  752. *
  753. * @cmd: command that got response from IOA
  754. *
  755. * This routine is called after driver re-reads configuration table due to a
  756. * lost CCN. It returns the command block back to free pool and schedules
  757. * worker thread to add/delete devices into the system.
  758. *
  759. * Return Value:
  760. * none
  761. */
  762. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  763. {
  764. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  765. cmd->ioa_cb->ioarcb.cdb[0],
  766. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  767. if (cmd->release) {
  768. cmd->release = 0;
  769. pmcraid_return_cmd(cmd);
  770. }
  771. pmcraid_info("scheduling worker for config table reinitialization\n");
  772. schedule_work(&cmd->drv_inst->worker_q);
  773. }
  774. /**
  775. * pmcraid_erp_done - Process completion of SCSI error response from device
  776. * @cmd: pmcraid_command
  777. *
  778. * This function copies the sense buffer into the scsi_cmd struct and completes
  779. * scsi_cmd by calling scsi_done function.
  780. *
  781. * Return value:
  782. * none
  783. */
  784. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  785. {
  786. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  787. struct pmcraid_instance *pinstance = cmd->drv_inst;
  788. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  789. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  790. scsi_cmd->result |= (DID_ERROR << 16);
  791. scmd_printk(KERN_INFO, scsi_cmd,
  792. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  793. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  794. }
  795. /* if we had allocated sense buffers for request sense, copy the sense
  796. * release the buffers
  797. */
  798. if (cmd->sense_buffer != NULL) {
  799. memcpy(scsi_cmd->sense_buffer,
  800. cmd->sense_buffer,
  801. SCSI_SENSE_BUFFERSIZE);
  802. pci_free_consistent(pinstance->pdev,
  803. SCSI_SENSE_BUFFERSIZE,
  804. cmd->sense_buffer, cmd->sense_buffer_dma);
  805. cmd->sense_buffer = NULL;
  806. cmd->sense_buffer_dma = 0;
  807. }
  808. scsi_dma_unmap(scsi_cmd);
  809. pmcraid_return_cmd(cmd);
  810. scsi_cmd->scsi_done(scsi_cmd);
  811. }
  812. /**
  813. * pmcraid_fire_command - sends an IOA command to adapter
  814. *
  815. * This function adds the given block into pending command list
  816. * and returns without waiting
  817. *
  818. * @cmd : command to be sent to the device
  819. *
  820. * Return Value
  821. * None
  822. */
  823. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  824. {
  825. struct pmcraid_instance *pinstance = cmd->drv_inst;
  826. unsigned long lock_flags;
  827. /* Add this command block to pending cmd pool. We do this prior to
  828. * writting IOARCB to ioarrin because IOA might complete the command
  829. * by the time we are about to add it to the list. Response handler
  830. * (isr/tasklet) looks for cmd block in the pending pending list.
  831. */
  832. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  833. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  834. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  835. atomic_inc(&pinstance->outstanding_cmds);
  836. /* driver writes lower 32-bit value of IOARCB address only */
  837. mb();
  838. iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
  839. pinstance->ioarrin);
  840. }
  841. /**
  842. * pmcraid_send_cmd - fires a command to IOA
  843. *
  844. * This function also sets up timeout function, and command completion
  845. * function
  846. *
  847. * @cmd: pointer to the command block to be fired to IOA
  848. * @cmd_done: command completion function, called once IOA responds
  849. * @timeout: timeout to wait for this command completion
  850. * @timeout_func: timeout handler
  851. *
  852. * Return value
  853. * none
  854. */
  855. static void pmcraid_send_cmd(
  856. struct pmcraid_cmd *cmd,
  857. void (*cmd_done) (struct pmcraid_cmd *),
  858. unsigned long timeout,
  859. void (*timeout_func) (struct pmcraid_cmd *)
  860. )
  861. {
  862. /* initialize done function */
  863. cmd->cmd_done = cmd_done;
  864. if (timeout_func) {
  865. /* setup timeout handler */
  866. cmd->timer.data = (unsigned long)cmd;
  867. cmd->timer.expires = jiffies + timeout;
  868. cmd->timer.function = (void (*)(unsigned long))timeout_func;
  869. add_timer(&cmd->timer);
  870. }
  871. /* fire the command to IOA */
  872. _pmcraid_fire_command(cmd);
  873. }
  874. /**
  875. * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
  876. * @cmd: pointer to the command block used for sending IOA shutdown command
  877. *
  878. * Return value
  879. * None
  880. */
  881. static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
  882. {
  883. struct pmcraid_instance *pinstance = cmd->drv_inst;
  884. unsigned long lock_flags;
  885. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  886. pmcraid_ioa_reset(cmd);
  887. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  888. }
  889. /**
  890. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  891. *
  892. * @cmd: pointer to the command block used as part of reset sequence
  893. *
  894. * Return Value
  895. * None
  896. */
  897. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  898. {
  899. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  900. cmd->ioa_cb->ioarcb.cdb[0],
  901. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  902. /* Note that commands sent during reset require next command to be sent
  903. * to IOA. Hence reinit the done function as well as timeout function
  904. */
  905. pmcraid_reinit_cmdblk(cmd);
  906. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  907. cmd->ioa_cb->ioarcb.resource_handle =
  908. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  909. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  910. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  911. /* fire shutdown command to hardware. */
  912. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  913. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  914. pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
  915. pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
  916. PMCRAID_SHUTDOWN_TIMEOUT,
  917. pmcraid_timeout_handler);
  918. }
  919. /**
  920. * pmcraid_get_fwversion_done - completion function for get_fwversion
  921. *
  922. * @cmd: pointer to command block used to send INQUIRY command
  923. *
  924. * Return Value
  925. * none
  926. */
  927. static void pmcraid_querycfg(struct pmcraid_cmd *);
  928. static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
  929. {
  930. struct pmcraid_instance *pinstance = cmd->drv_inst;
  931. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  932. unsigned long lock_flags;
  933. /* configuration table entry size depends on firmware version. If fw
  934. * version is not known, it is not possible to interpret IOA config
  935. * table
  936. */
  937. if (ioasc) {
  938. pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
  939. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  940. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  941. pmcraid_reset_alert(cmd);
  942. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  943. } else {
  944. pmcraid_querycfg(cmd);
  945. }
  946. }
  947. /**
  948. * pmcraid_get_fwversion - reads firmware version information
  949. *
  950. * @cmd: pointer to command block used to send INQUIRY command
  951. *
  952. * Return Value
  953. * none
  954. */
  955. static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
  956. {
  957. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  958. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  959. struct pmcraid_instance *pinstance = cmd->drv_inst;
  960. u16 data_size = sizeof(struct pmcraid_inquiry_data);
  961. pmcraid_reinit_cmdblk(cmd);
  962. ioarcb->request_type = REQ_TYPE_SCSI;
  963. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  964. ioarcb->cdb[0] = INQUIRY;
  965. ioarcb->cdb[1] = 1;
  966. ioarcb->cdb[2] = 0xD0;
  967. ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
  968. ioarcb->cdb[4] = data_size & 0xFF;
  969. /* Since entire inquiry data it can be part of IOARCB itself
  970. */
  971. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  972. offsetof(struct pmcraid_ioarcb,
  973. add_data.u.ioadl[0]));
  974. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  975. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  976. ioarcb->request_flags0 |= NO_LINK_DESCS;
  977. ioarcb->data_transfer_length = cpu_to_le32(data_size);
  978. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  979. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  980. ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
  981. ioadl->data_len = cpu_to_le32(data_size);
  982. pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
  983. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  984. }
  985. /**
  986. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  987. * @cmd: pointer to command block to be used for identify hrrq
  988. *
  989. * Return Value
  990. * none
  991. */
  992. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  993. {
  994. struct pmcraid_instance *pinstance = cmd->drv_inst;
  995. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  996. int index = cmd->hrrq_index;
  997. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  998. u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  999. void (*done_function)(struct pmcraid_cmd *);
  1000. pmcraid_reinit_cmdblk(cmd);
  1001. cmd->hrrq_index = index + 1;
  1002. if (cmd->hrrq_index < pinstance->num_hrrq) {
  1003. done_function = pmcraid_identify_hrrq;
  1004. } else {
  1005. cmd->hrrq_index = 0;
  1006. done_function = pmcraid_get_fwversion;
  1007. }
  1008. /* Initialize ioarcb */
  1009. ioarcb->request_type = REQ_TYPE_IOACMD;
  1010. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  1011. /* initialize the hrrq number where IOA will respond to this command */
  1012. ioarcb->hrrq_id = index;
  1013. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  1014. ioarcb->cdb[1] = index;
  1015. /* IOA expects 64-bit pci address to be written in B.E format
  1016. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  1017. */
  1018. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
  1019. hrrq_addr, ioarcb->ioarcb_bus_addr, index);
  1020. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  1021. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  1022. /* Subsequent commands require HRRQ identification to be successful.
  1023. * Note that this gets called even during reset from SCSI mid-layer
  1024. * or tasklet
  1025. */
  1026. pmcraid_send_cmd(cmd, done_function,
  1027. PMCRAID_INTERNAL_TIMEOUT,
  1028. pmcraid_timeout_handler);
  1029. }
  1030. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  1031. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  1032. /**
  1033. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  1034. *
  1035. * @cmd: initialized command block pointer
  1036. *
  1037. * Return Value
  1038. * none
  1039. */
  1040. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  1041. {
  1042. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  1043. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  1044. else
  1045. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  1046. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  1047. }
  1048. /**
  1049. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  1050. *
  1051. * @pinstance: pointer to adapter instance structure
  1052. * @type: HCAM type
  1053. *
  1054. * Return Value
  1055. * pointer to initialized pmcraid_cmd structure or NULL
  1056. */
  1057. static struct pmcraid_cmd *pmcraid_init_hcam
  1058. (
  1059. struct pmcraid_instance *pinstance,
  1060. u8 type
  1061. )
  1062. {
  1063. struct pmcraid_cmd *cmd;
  1064. struct pmcraid_ioarcb *ioarcb;
  1065. struct pmcraid_ioadl_desc *ioadl;
  1066. struct pmcraid_hostrcb *hcam;
  1067. void (*cmd_done) (struct pmcraid_cmd *);
  1068. dma_addr_t dma;
  1069. int rcb_size;
  1070. cmd = pmcraid_get_free_cmd(pinstance);
  1071. if (!cmd) {
  1072. pmcraid_err("no free command blocks for hcam\n");
  1073. return cmd;
  1074. }
  1075. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  1076. rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
  1077. cmd_done = pmcraid_process_ccn;
  1078. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  1079. hcam = &pinstance->ccn;
  1080. } else {
  1081. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  1082. cmd_done = pmcraid_process_ldn;
  1083. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  1084. hcam = &pinstance->ldn;
  1085. }
  1086. /* initialize command pointer used for HCAM registration */
  1087. hcam->cmd = cmd;
  1088. ioarcb = &cmd->ioa_cb->ioarcb;
  1089. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1090. offsetof(struct pmcraid_ioarcb,
  1091. add_data.u.ioadl[0]));
  1092. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1093. ioadl = ioarcb->add_data.u.ioadl;
  1094. /* Initialize ioarcb */
  1095. ioarcb->request_type = REQ_TYPE_HCAM;
  1096. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  1097. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  1098. ioarcb->cdb[1] = type;
  1099. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  1100. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  1101. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  1102. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  1103. ioadl[0].data_len = cpu_to_le32(rcb_size);
  1104. ioadl[0].address = cpu_to_le32(dma);
  1105. cmd->cmd_done = cmd_done;
  1106. return cmd;
  1107. }
  1108. /**
  1109. * pmcraid_send_hcam - Send an HCAM to IOA
  1110. * @pinstance: ioa config struct
  1111. * @type: HCAM type
  1112. *
  1113. * This function will send a Host Controlled Async command to IOA.
  1114. *
  1115. * Return value:
  1116. * none
  1117. */
  1118. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  1119. {
  1120. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  1121. pmcraid_send_hcam_cmd(cmd);
  1122. }
  1123. /**
  1124. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  1125. *
  1126. * @cmd: pointer to cmd that is used as cancelling command
  1127. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  1128. */
  1129. static void pmcraid_prepare_cancel_cmd(
  1130. struct pmcraid_cmd *cmd,
  1131. struct pmcraid_cmd *cmd_to_cancel
  1132. )
  1133. {
  1134. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1135. __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
  1136. /* Get the resource handle to where the command to be aborted has been
  1137. * sent.
  1138. */
  1139. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  1140. ioarcb->request_type = REQ_TYPE_IOACMD;
  1141. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1142. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  1143. /* IOARCB address of the command to be cancelled is given in
  1144. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1145. * IOARCB address are not masked.
  1146. */
  1147. ioarcb_addr = cpu_to_be64(ioarcb_addr);
  1148. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1149. }
  1150. /**
  1151. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1152. *
  1153. * @cmd: command to be used as cancelling command
  1154. * @type: HCAM type
  1155. * @cmd_done: op done function for the cancelling command
  1156. */
  1157. static void pmcraid_cancel_hcam(
  1158. struct pmcraid_cmd *cmd,
  1159. u8 type,
  1160. void (*cmd_done) (struct pmcraid_cmd *)
  1161. )
  1162. {
  1163. struct pmcraid_instance *pinstance;
  1164. struct pmcraid_hostrcb *hcam;
  1165. pinstance = cmd->drv_inst;
  1166. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1167. &pinstance->ldn : &pinstance->ccn;
  1168. /* prepare for cancelling previous hcam command. If the HCAM is
  1169. * currently not pending with IOA, we would have hcam->cmd as non-null
  1170. */
  1171. if (hcam->cmd == NULL)
  1172. return;
  1173. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1174. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1175. * schedule queuecommand while we are doing this
  1176. */
  1177. pmcraid_send_cmd(cmd, cmd_done,
  1178. PMCRAID_INTERNAL_TIMEOUT,
  1179. pmcraid_timeout_handler);
  1180. }
  1181. /**
  1182. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1183. *
  1184. * @cmd: command block to be used for cancelling the HCAM
  1185. */
  1186. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1187. {
  1188. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1189. cmd->ioa_cb->ioarcb.cdb[0],
  1190. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1191. pmcraid_reinit_cmdblk(cmd);
  1192. pmcraid_cancel_hcam(cmd,
  1193. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1194. pmcraid_ioa_shutdown);
  1195. }
  1196. /**
  1197. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1198. *
  1199. * @cmd: command block to be used for cancelling the HCAM
  1200. */
  1201. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1202. {
  1203. pmcraid_cancel_hcam(cmd,
  1204. PMCRAID_HCAM_CODE_LOG_DATA,
  1205. pmcraid_cancel_ccn);
  1206. }
  1207. /**
  1208. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1209. *
  1210. * @fw_version: firmware version code
  1211. * @cfgte: pointer to configuration table entry of the resource
  1212. *
  1213. * Return value:
  1214. * true if resource can be added to midlayer, false(0) otherwise
  1215. */
  1216. static int pmcraid_expose_resource(u16 fw_version,
  1217. struct pmcraid_config_table_entry *cfgte)
  1218. {
  1219. int retval = 0;
  1220. if (cfgte->resource_type == RES_TYPE_VSET) {
  1221. if (fw_version <= PMCRAID_FW_VERSION_1)
  1222. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1223. else
  1224. retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
  1225. (cfgte->unique_flags1 & 0x80) == 0);
  1226. } else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1227. retval = (RES_BUS(cfgte->resource_address) !=
  1228. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1229. return retval;
  1230. }
  1231. /* attributes supported by pmcraid_event_family */
  1232. enum {
  1233. PMCRAID_AEN_ATTR_UNSPEC,
  1234. PMCRAID_AEN_ATTR_EVENT,
  1235. __PMCRAID_AEN_ATTR_MAX,
  1236. };
  1237. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1238. /* commands supported by pmcraid_event_family */
  1239. enum {
  1240. PMCRAID_AEN_CMD_UNSPEC,
  1241. PMCRAID_AEN_CMD_EVENT,
  1242. __PMCRAID_AEN_CMD_MAX,
  1243. };
  1244. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1245. static struct genl_family pmcraid_event_family = {
  1246. .id = GENL_ID_GENERATE,
  1247. .name = "pmcraid",
  1248. .version = 1,
  1249. .maxattr = PMCRAID_AEN_ATTR_MAX
  1250. };
  1251. /**
  1252. * pmcraid_netlink_init - registers pmcraid_event_family
  1253. *
  1254. * Return value:
  1255. * 0 if the pmcraid_event_family is successfully registered
  1256. * with netlink generic, non-zero otherwise
  1257. */
  1258. static int pmcraid_netlink_init(void)
  1259. {
  1260. int result;
  1261. result = genl_register_family(&pmcraid_event_family);
  1262. if (result)
  1263. return result;
  1264. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1265. pmcraid_event_family.id);
  1266. return result;
  1267. }
  1268. /**
  1269. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1270. *
  1271. * Return value:
  1272. * none
  1273. */
  1274. static void pmcraid_netlink_release(void)
  1275. {
  1276. genl_unregister_family(&pmcraid_event_family);
  1277. }
  1278. /**
  1279. * pmcraid_notify_aen - sends event msg to user space application
  1280. * @pinstance: pointer to adapter instance structure
  1281. * @type: HCAM type
  1282. *
  1283. * Return value:
  1284. * 0 if success, error value in case of any failure.
  1285. */
  1286. static int pmcraid_notify_aen(
  1287. struct pmcraid_instance *pinstance,
  1288. struct pmcraid_aen_msg *aen_msg,
  1289. u32 data_size
  1290. )
  1291. {
  1292. struct sk_buff *skb;
  1293. void *msg_header;
  1294. u32 total_size, nla_genl_hdr_total_size;
  1295. int result;
  1296. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1297. MINOR(pinstance->cdev.dev));
  1298. aen_msg->length = data_size;
  1299. data_size += sizeof(*aen_msg);
  1300. total_size = nla_total_size(data_size);
  1301. /* Add GENL_HDR to total_size */
  1302. nla_genl_hdr_total_size =
  1303. (total_size + (GENL_HDRLEN +
  1304. ((struct genl_family *)&pmcraid_event_family)->hdrsize)
  1305. + NLMSG_HDRLEN);
  1306. skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
  1307. if (!skb) {
  1308. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1309. total_size);
  1310. return -ENOMEM;
  1311. }
  1312. /* add the genetlink message header */
  1313. msg_header = genlmsg_put(skb, 0, 0,
  1314. &pmcraid_event_family, 0,
  1315. PMCRAID_AEN_CMD_EVENT);
  1316. if (!msg_header) {
  1317. pmcraid_err("failed to copy command details\n");
  1318. nlmsg_free(skb);
  1319. return -ENOMEM;
  1320. }
  1321. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1322. if (result) {
  1323. pmcraid_err("failed to copy AEN attribute data\n");
  1324. nlmsg_free(skb);
  1325. return -EINVAL;
  1326. }
  1327. /* send genetlink multicast message to notify appplications */
  1328. result = genlmsg_end(skb, msg_header);
  1329. if (result < 0) {
  1330. pmcraid_err("genlmsg_end failed\n");
  1331. nlmsg_free(skb);
  1332. return result;
  1333. }
  1334. result =
  1335. genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC);
  1336. /* If there are no listeners, genlmsg_multicast may return non-zero
  1337. * value.
  1338. */
  1339. if (result)
  1340. pmcraid_info("error (%x) sending aen event message\n", result);
  1341. return result;
  1342. }
  1343. /**
  1344. * pmcraid_notify_ccn - notifies about CCN event msg to user space
  1345. * @pinstance: pointer adapter instance structure
  1346. *
  1347. * Return value:
  1348. * 0 if success, error value in case of any failure
  1349. */
  1350. static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
  1351. {
  1352. return pmcraid_notify_aen(pinstance,
  1353. pinstance->ccn.msg,
  1354. pinstance->ccn.hcam->data_len +
  1355. sizeof(struct pmcraid_hcam_hdr));
  1356. }
  1357. /**
  1358. * pmcraid_notify_ldn - notifies about CCN event msg to user space
  1359. * @pinstance: pointer adapter instance structure
  1360. *
  1361. * Return value:
  1362. * 0 if success, error value in case of any failure
  1363. */
  1364. static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
  1365. {
  1366. return pmcraid_notify_aen(pinstance,
  1367. pinstance->ldn.msg,
  1368. pinstance->ldn.hcam->data_len +
  1369. sizeof(struct pmcraid_hcam_hdr));
  1370. }
  1371. /**
  1372. * pmcraid_notify_ioastate - sends IOA state event msg to user space
  1373. * @pinstance: pointer adapter instance structure
  1374. * @evt: controller state event to be sent
  1375. *
  1376. * Return value:
  1377. * 0 if success, error value in case of any failure
  1378. */
  1379. static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
  1380. {
  1381. pinstance->scn.ioa_state = evt;
  1382. pmcraid_notify_aen(pinstance,
  1383. &pinstance->scn.msg,
  1384. sizeof(u32));
  1385. }
  1386. /**
  1387. * pmcraid_handle_config_change - Handle a config change from the adapter
  1388. * @pinstance: pointer to per adapter instance structure
  1389. *
  1390. * Return value:
  1391. * none
  1392. */
  1393. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1394. {
  1395. struct pmcraid_config_table_entry *cfg_entry;
  1396. struct pmcraid_hcam_ccn *ccn_hcam;
  1397. struct pmcraid_cmd *cmd;
  1398. struct pmcraid_cmd *cfgcmd;
  1399. struct pmcraid_resource_entry *res = NULL;
  1400. unsigned long lock_flags;
  1401. unsigned long host_lock_flags;
  1402. u32 new_entry = 1;
  1403. u32 hidden_entry = 0;
  1404. u16 fw_version;
  1405. int rc;
  1406. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1407. cfg_entry = &ccn_hcam->cfg_entry;
  1408. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  1409. pmcraid_info
  1410. ("CCN(%x): %x type: %x lost: %x flags: %x res: %x:%x:%x:%x\n",
  1411. pinstance->ccn.hcam->ilid,
  1412. pinstance->ccn.hcam->op_code,
  1413. pinstance->ccn.hcam->notification_type,
  1414. pinstance->ccn.hcam->notification_lost,
  1415. pinstance->ccn.hcam->flags,
  1416. pinstance->host->unique_id,
  1417. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1418. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1419. RES_BUS(cfg_entry->resource_address)),
  1420. RES_IS_VSET(*cfg_entry) ?
  1421. (fw_version <= PMCRAID_FW_VERSION_1 ?
  1422. cfg_entry->unique_flags1 :
  1423. cfg_entry->array_id & 0xFF) :
  1424. RES_TARGET(cfg_entry->resource_address),
  1425. RES_LUN(cfg_entry->resource_address));
  1426. /* If this HCAM indicates a lost notification, read the config table */
  1427. if (pinstance->ccn.hcam->notification_lost) {
  1428. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1429. if (cfgcmd) {
  1430. pmcraid_info("lost CCN, reading config table\b");
  1431. pinstance->reinit_cfg_table = 1;
  1432. pmcraid_querycfg(cfgcmd);
  1433. } else {
  1434. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1435. }
  1436. goto out_notify_apps;
  1437. }
  1438. /* If this resource is not going to be added to mid-layer, just notify
  1439. * applications and return. If this notification is about hiding a VSET
  1440. * resource, check if it was exposed already.
  1441. */
  1442. if (pinstance->ccn.hcam->notification_type ==
  1443. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1444. cfg_entry->resource_type == RES_TYPE_VSET) {
  1445. if (fw_version <= PMCRAID_FW_VERSION_1)
  1446. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1447. else
  1448. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1449. } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
  1450. goto out_notify_apps;
  1451. }
  1452. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1453. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1454. rc = memcmp(&res->cfg_entry.resource_address,
  1455. &cfg_entry->resource_address,
  1456. sizeof(cfg_entry->resource_address));
  1457. if (!rc) {
  1458. new_entry = 0;
  1459. break;
  1460. }
  1461. }
  1462. if (new_entry) {
  1463. if (hidden_entry) {
  1464. spin_unlock_irqrestore(&pinstance->resource_lock,
  1465. lock_flags);
  1466. goto out_notify_apps;
  1467. }
  1468. /* If there are more number of resources than what driver can
  1469. * manage, do not notify the applications about the CCN. Just
  1470. * ignore this notifications and re-register the same HCAM
  1471. */
  1472. if (list_empty(&pinstance->free_res_q)) {
  1473. spin_unlock_irqrestore(&pinstance->resource_lock,
  1474. lock_flags);
  1475. pmcraid_err("too many resources attached\n");
  1476. spin_lock_irqsave(pinstance->host->host_lock,
  1477. host_lock_flags);
  1478. pmcraid_send_hcam(pinstance,
  1479. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1480. spin_unlock_irqrestore(pinstance->host->host_lock,
  1481. host_lock_flags);
  1482. return;
  1483. }
  1484. res = list_entry(pinstance->free_res_q.next,
  1485. struct pmcraid_resource_entry, queue);
  1486. list_del(&res->queue);
  1487. res->scsi_dev = NULL;
  1488. res->reset_progress = 0;
  1489. list_add_tail(&res->queue, &pinstance->used_res_q);
  1490. }
  1491. memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
  1492. if (pinstance->ccn.hcam->notification_type ==
  1493. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1494. if (res->scsi_dev) {
  1495. if (fw_version <= PMCRAID_FW_VERSION_1)
  1496. res->cfg_entry.unique_flags1 &= 0x7F;
  1497. else
  1498. res->cfg_entry.array_id &= 0xFF;
  1499. res->change_detected = RES_CHANGE_DEL;
  1500. res->cfg_entry.resource_handle =
  1501. PMCRAID_INVALID_RES_HANDLE;
  1502. schedule_work(&pinstance->worker_q);
  1503. } else {
  1504. /* This may be one of the non-exposed resources */
  1505. list_move_tail(&res->queue, &pinstance->free_res_q);
  1506. }
  1507. } else if (!res->scsi_dev) {
  1508. res->change_detected = RES_CHANGE_ADD;
  1509. schedule_work(&pinstance->worker_q);
  1510. }
  1511. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1512. out_notify_apps:
  1513. /* Notify configuration changes to registered applications.*/
  1514. if (!pmcraid_disable_aen)
  1515. pmcraid_notify_ccn(pinstance);
  1516. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1517. if (cmd)
  1518. pmcraid_send_hcam_cmd(cmd);
  1519. }
  1520. /**
  1521. * pmcraid_get_error_info - return error string for an ioasc
  1522. * @ioasc: ioasc code
  1523. * Return Value
  1524. * none
  1525. */
  1526. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1527. {
  1528. int i;
  1529. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1530. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1531. return &pmcraid_ioasc_error_table[i];
  1532. }
  1533. return NULL;
  1534. }
  1535. /**
  1536. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1537. * @ioasc: ioasc code
  1538. * @cmd: pointer to command that resulted in 'ioasc'
  1539. */
  1540. void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1541. {
  1542. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1543. if (error_info == NULL ||
  1544. cmd->drv_inst->current_log_level < error_info->log_level)
  1545. return;
  1546. /* log the error string */
  1547. pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
  1548. cmd->ioa_cb->ioarcb.cdb[0],
  1549. cmd->ioa_cb->ioarcb.resource_handle,
  1550. le32_to_cpu(ioasc), error_info->error_string);
  1551. }
  1552. /**
  1553. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1554. *
  1555. * @pinstance: pointer to per adapter instance structure
  1556. *
  1557. * Return value:
  1558. * none
  1559. */
  1560. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1561. {
  1562. struct pmcraid_hcam_ldn *hcam_ldn;
  1563. u32 ioasc;
  1564. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1565. pmcraid_info
  1566. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1567. pinstance->ldn.hcam->ilid,
  1568. pinstance->ldn.hcam->op_code,
  1569. pinstance->ldn.hcam->notification_type,
  1570. pinstance->ldn.hcam->notification_lost,
  1571. pinstance->ldn.hcam->flags,
  1572. pinstance->ldn.hcam->overlay_id);
  1573. /* log only the errors, no need to log informational log entries */
  1574. if (pinstance->ldn.hcam->notification_type !=
  1575. NOTIFICATION_TYPE_ERROR_LOG)
  1576. return;
  1577. if (pinstance->ldn.hcam->notification_lost ==
  1578. HOSTRCB_NOTIFICATIONS_LOST)
  1579. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1580. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1581. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1582. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1583. dev_info(&pinstance->pdev->dev,
  1584. "UnitAttention due to IOA Bus Reset\n");
  1585. scsi_report_bus_reset(
  1586. pinstance->host,
  1587. RES_BUS(hcam_ldn->error_log.fd_ra));
  1588. }
  1589. return;
  1590. }
  1591. /**
  1592. * pmcraid_process_ccn - Op done function for a CCN.
  1593. * @cmd: pointer to command struct
  1594. *
  1595. * This function is the op done function for a configuration
  1596. * change notification
  1597. *
  1598. * Return value:
  1599. * none
  1600. */
  1601. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1602. {
  1603. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1604. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1605. unsigned long lock_flags;
  1606. pinstance->ccn.cmd = NULL;
  1607. pmcraid_return_cmd(cmd);
  1608. /* If driver initiated IOA reset happened while this hcam was pending
  1609. * with IOA, or IOA bringdown sequence is in progress, no need to
  1610. * re-register the hcam
  1611. */
  1612. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1613. atomic_read(&pinstance->ccn.ignore) == 1) {
  1614. return;
  1615. } else if (ioasc) {
  1616. dev_info(&pinstance->pdev->dev,
  1617. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1618. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1619. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1620. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1621. } else {
  1622. pmcraid_handle_config_change(pinstance);
  1623. }
  1624. }
  1625. /**
  1626. * pmcraid_process_ldn - op done function for an LDN
  1627. * @cmd: pointer to command block
  1628. *
  1629. * Return value
  1630. * none
  1631. */
  1632. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1633. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1634. {
  1635. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1636. struct pmcraid_hcam_ldn *ldn_hcam =
  1637. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1638. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1639. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1640. unsigned long lock_flags;
  1641. /* return the command block back to freepool */
  1642. pinstance->ldn.cmd = NULL;
  1643. pmcraid_return_cmd(cmd);
  1644. /* If driver initiated IOA reset happened while this hcam was pending
  1645. * with IOA, no need to re-register the hcam as reset engine will do it
  1646. * once reset sequence is complete
  1647. */
  1648. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1649. atomic_read(&pinstance->ccn.ignore) == 1) {
  1650. return;
  1651. } else if (!ioasc) {
  1652. pmcraid_handle_error_log(pinstance);
  1653. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1654. spin_lock_irqsave(pinstance->host->host_lock,
  1655. lock_flags);
  1656. pmcraid_initiate_reset(pinstance);
  1657. spin_unlock_irqrestore(pinstance->host->host_lock,
  1658. lock_flags);
  1659. return;
  1660. }
  1661. } else {
  1662. dev_info(&pinstance->pdev->dev,
  1663. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1664. }
  1665. /* send netlink message for HCAM notification if enabled */
  1666. if (!pmcraid_disable_aen)
  1667. pmcraid_notify_ldn(pinstance);
  1668. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1669. if (cmd)
  1670. pmcraid_send_hcam_cmd(cmd);
  1671. }
  1672. /**
  1673. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1674. *
  1675. * @pinstance: pointer per adapter instance structure
  1676. *
  1677. * Return Value
  1678. * none
  1679. */
  1680. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1681. {
  1682. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1683. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1684. }
  1685. /**
  1686. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1687. * @cmd: pointer to command used as part of reset sequence
  1688. */
  1689. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1690. {
  1691. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1692. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1693. * handling hcam response though it is not necessary. In order to
  1694. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1695. * re-send any more hcams
  1696. */
  1697. atomic_set(&pinstance->ccn.ignore, 1);
  1698. atomic_set(&pinstance->ldn.ignore, 1);
  1699. /* If adapter reset was forced as part of runtime reset sequence,
  1700. * start the reset sequence. Reset will be triggered even in case
  1701. * IOA unit_check.
  1702. */
  1703. if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
  1704. pinstance->ioa_unit_check) {
  1705. pinstance->force_ioa_reset = 0;
  1706. pinstance->ioa_unit_check = 0;
  1707. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1708. pmcraid_reset_alert(cmd);
  1709. return;
  1710. }
  1711. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1712. * one after the other. So CCN cancellation will be triggered by
  1713. * pmcraid_cancel_ldn itself.
  1714. */
  1715. pmcraid_cancel_ldn(cmd);
  1716. }
  1717. /**
  1718. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1719. * @pinstance: pointer to adapter instance structure
  1720. * Return Value
  1721. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1722. */
  1723. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1724. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1725. {
  1726. u32 intrs;
  1727. pmcraid_reinit_buffers(pinstance);
  1728. intrs = pmcraid_read_interrupts(pinstance);
  1729. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1730. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1731. if (!pinstance->interrupt_mode) {
  1732. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1733. pinstance->int_regs.
  1734. ioa_host_interrupt_mask_reg);
  1735. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1736. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1737. }
  1738. return 1;
  1739. } else {
  1740. return 0;
  1741. }
  1742. }
  1743. /**
  1744. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1745. * @cmd : pointer to reset command block
  1746. *
  1747. * Return Value
  1748. * none
  1749. */
  1750. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1751. {
  1752. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1753. u32 int_reg;
  1754. u32 doorbell;
  1755. /* There will be an interrupt when Transition to Operational bit is
  1756. * set so tasklet would execute next reset task. The timeout handler
  1757. * would re-initiate a reset
  1758. */
  1759. cmd->cmd_done = pmcraid_ioa_reset;
  1760. cmd->timer.data = (unsigned long)cmd;
  1761. cmd->timer.expires = jiffies +
  1762. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1763. cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
  1764. if (!timer_pending(&cmd->timer))
  1765. add_timer(&cmd->timer);
  1766. /* Enable destructive diagnostics on IOA if it is not yet in
  1767. * operational state
  1768. */
  1769. doorbell = DOORBELL_RUNTIME_RESET |
  1770. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1771. /* Since we do RESET_ALERT and Start BIST we have to again write
  1772. * MSIX Doorbell to indicate the interrupt mode
  1773. */
  1774. if (pinstance->interrupt_mode) {
  1775. iowrite32(DOORBELL_INTR_MODE_MSIX,
  1776. pinstance->int_regs.host_ioa_interrupt_reg);
  1777. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  1778. }
  1779. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1780. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1781. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1782. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1783. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1784. int_reg);
  1785. }
  1786. /**
  1787. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1788. *
  1789. * @pinstance: pointer to adapter instance structure
  1790. *
  1791. * Return Value
  1792. * none
  1793. */
  1794. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1795. {
  1796. pmcraid_info("%s is not yet implemented\n", __func__);
  1797. }
  1798. /**
  1799. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1800. * @pinstance: pointer to adapter instance structure
  1801. *
  1802. * This function fails all outstanding ops. If they are submitted to IOA
  1803. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1804. * otherwise just completes the commands and returns the cmd blocks to free
  1805. * pool.
  1806. *
  1807. * Return value:
  1808. * none
  1809. */
  1810. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1811. {
  1812. struct pmcraid_cmd *cmd, *temp;
  1813. unsigned long lock_flags;
  1814. /* pending command list is protected by pending_pool_lock. Its
  1815. * traversal must be done as within this lock
  1816. */
  1817. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1818. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1819. free_list) {
  1820. list_del(&cmd->free_list);
  1821. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1822. lock_flags);
  1823. cmd->ioa_cb->ioasa.ioasc =
  1824. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1825. cmd->ioa_cb->ioasa.ilid =
  1826. cpu_to_be32(PMCRAID_DRIVER_ILID);
  1827. /* In case the command timer is still running */
  1828. del_timer(&cmd->timer);
  1829. /* If this is an IO command, complete it by invoking scsi_done
  1830. * function. If this is one of the internal commands other
  1831. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1832. * complete it
  1833. */
  1834. if (cmd->scsi_cmd) {
  1835. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1836. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1837. scsi_cmd->result |= DID_ERROR << 16;
  1838. scsi_dma_unmap(scsi_cmd);
  1839. pmcraid_return_cmd(cmd);
  1840. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1841. le32_to_cpu(resp) >> 2,
  1842. cmd->ioa_cb->ioarcb.cdb[0],
  1843. scsi_cmd->result);
  1844. scsi_cmd->scsi_done(scsi_cmd);
  1845. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1846. cmd->cmd_done == pmcraid_erp_done) {
  1847. cmd->cmd_done(cmd);
  1848. } else if (cmd->cmd_done != pmcraid_ioa_reset &&
  1849. cmd->cmd_done != pmcraid_ioa_shutdown_done) {
  1850. pmcraid_return_cmd(cmd);
  1851. }
  1852. atomic_dec(&pinstance->outstanding_cmds);
  1853. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1854. }
  1855. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1856. }
  1857. /**
  1858. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1859. *
  1860. * @cmd: pointer to the cmd block to be used for entire reset process
  1861. *
  1862. * This function executes most of the steps required for IOA reset. This gets
  1863. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1864. * 'eh_' thread. Access to variables used for controling the reset sequence is
  1865. * synchronized using host lock. Various functions called during reset process
  1866. * would make use of a single command block, pointer to which is also stored in
  1867. * adapter instance structure.
  1868. *
  1869. * Return Value
  1870. * None
  1871. */
  1872. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1873. {
  1874. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1875. u8 reset_complete = 0;
  1876. pinstance->ioa_reset_in_progress = 1;
  1877. if (pinstance->reset_cmd != cmd) {
  1878. pmcraid_err("reset is called with different command block\n");
  1879. pinstance->reset_cmd = cmd;
  1880. }
  1881. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1882. pinstance->ioa_state, cmd);
  1883. switch (pinstance->ioa_state) {
  1884. case IOA_STATE_DEAD:
  1885. /* If IOA is offline, whatever may be the reset reason, just
  1886. * return. callers might be waiting on the reset wait_q, wake
  1887. * up them
  1888. */
  1889. pmcraid_err("IOA is offline no reset is possible\n");
  1890. reset_complete = 1;
  1891. break;
  1892. case IOA_STATE_IN_BRINGDOWN:
  1893. /* we enter here, once ioa shutdown command is processed by IOA
  1894. * Alert IOA for a possible reset. If reset alert fails, IOA
  1895. * goes through hard-reset
  1896. */
  1897. pmcraid_disable_interrupts(pinstance, ~0);
  1898. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1899. pmcraid_reset_alert(cmd);
  1900. break;
  1901. case IOA_STATE_UNKNOWN:
  1902. /* We may be called during probe or resume. Some pre-processing
  1903. * is required for prior to reset
  1904. */
  1905. scsi_block_requests(pinstance->host);
  1906. /* If asked to reset while IOA was processing responses or
  1907. * there are any error responses then IOA may require
  1908. * hard-reset.
  1909. */
  1910. if (pinstance->ioa_hard_reset == 0) {
  1911. if (ioread32(pinstance->ioa_status) &
  1912. INTRS_TRANSITION_TO_OPERATIONAL) {
  1913. pmcraid_info("sticky bit set, bring-up\n");
  1914. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1915. pmcraid_reinit_cmdblk(cmd);
  1916. pmcraid_identify_hrrq(cmd);
  1917. } else {
  1918. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1919. pmcraid_soft_reset(cmd);
  1920. }
  1921. } else {
  1922. /* Alert IOA of a possible reset and wait for critical
  1923. * operation in progress bit to reset
  1924. */
  1925. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1926. pmcraid_reset_alert(cmd);
  1927. }
  1928. break;
  1929. case IOA_STATE_IN_RESET_ALERT:
  1930. /* If critical operation in progress bit is reset or wait gets
  1931. * timed out, reset proceeds with starting BIST on the IOA.
  1932. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1933. * they are 3 or more, reset engine marks IOA dead and returns
  1934. */
  1935. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1936. pmcraid_start_bist(cmd);
  1937. break;
  1938. case IOA_STATE_IN_HARD_RESET:
  1939. pinstance->ioa_reset_attempts++;
  1940. /* retry reset if we haven't reached maximum allowed limit */
  1941. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1942. pinstance->ioa_reset_attempts = 0;
  1943. pmcraid_err("IOA didn't respond marking it as dead\n");
  1944. pinstance->ioa_state = IOA_STATE_DEAD;
  1945. if (pinstance->ioa_bringdown)
  1946. pmcraid_notify_ioastate(pinstance,
  1947. PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
  1948. else
  1949. pmcraid_notify_ioastate(pinstance,
  1950. PMC_DEVICE_EVENT_RESET_FAILED);
  1951. reset_complete = 1;
  1952. break;
  1953. }
  1954. /* Once either bist or pci reset is done, restore PCI config
  1955. * space. If this fails, proceed with hard reset again
  1956. */
  1957. if (pci_restore_state(pinstance->pdev)) {
  1958. pmcraid_info("config-space error resetting again\n");
  1959. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1960. pmcraid_reset_alert(cmd);
  1961. break;
  1962. }
  1963. /* fail all pending commands */
  1964. pmcraid_fail_outstanding_cmds(pinstance);
  1965. /* check if unit check is active, if so extract dump */
  1966. if (pinstance->ioa_unit_check) {
  1967. pmcraid_info("unit check is active\n");
  1968. pinstance->ioa_unit_check = 0;
  1969. pmcraid_get_dump(pinstance);
  1970. pinstance->ioa_reset_attempts--;
  1971. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1972. pmcraid_reset_alert(cmd);
  1973. break;
  1974. }
  1975. /* if the reset reason is to bring-down the ioa, we might be
  1976. * done with the reset restore pci_config_space and complete
  1977. * the reset
  1978. */
  1979. if (pinstance->ioa_bringdown) {
  1980. pmcraid_info("bringing down the adapter\n");
  1981. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1982. pinstance->ioa_bringdown = 0;
  1983. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1984. pmcraid_notify_ioastate(pinstance,
  1985. PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
  1986. reset_complete = 1;
  1987. } else {
  1988. /* bring-up IOA, so proceed with soft reset
  1989. * Reinitialize hrrq_buffers and their indices also
  1990. * enable interrupts after a pci_restore_state
  1991. */
  1992. if (pmcraid_reset_enable_ioa(pinstance)) {
  1993. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1994. pmcraid_info("bringing up the adapter\n");
  1995. pmcraid_reinit_cmdblk(cmd);
  1996. pmcraid_identify_hrrq(cmd);
  1997. } else {
  1998. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1999. pmcraid_soft_reset(cmd);
  2000. }
  2001. }
  2002. break;
  2003. case IOA_STATE_IN_SOFT_RESET:
  2004. /* TRANSITION TO OPERATIONAL is on so start initialization
  2005. * sequence
  2006. */
  2007. pmcraid_info("In softreset proceeding with bring-up\n");
  2008. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  2009. /* Initialization commands start with HRRQ identification. From
  2010. * now on tasklet completes most of the commands as IOA is up
  2011. * and intrs are enabled
  2012. */
  2013. pmcraid_identify_hrrq(cmd);
  2014. break;
  2015. case IOA_STATE_IN_BRINGUP:
  2016. /* we are done with bringing up of IOA, change the ioa_state to
  2017. * operational and wake up any waiters
  2018. */
  2019. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  2020. reset_complete = 1;
  2021. break;
  2022. case IOA_STATE_OPERATIONAL:
  2023. default:
  2024. /* When IOA is operational and a reset is requested, check for
  2025. * the reset reason. If reset is to bring down IOA, unregister
  2026. * HCAMs and initiate shutdown; if adapter reset is forced then
  2027. * restart reset sequence again
  2028. */
  2029. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  2030. pinstance->force_ioa_reset == 0) {
  2031. pmcraid_notify_ioastate(pinstance,
  2032. PMC_DEVICE_EVENT_RESET_SUCCESS);
  2033. reset_complete = 1;
  2034. } else {
  2035. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  2036. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  2037. pmcraid_reinit_cmdblk(cmd);
  2038. pmcraid_unregister_hcams(cmd);
  2039. }
  2040. break;
  2041. }
  2042. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  2043. * OPERATIONAL. Reset all control variables used during reset, wake up
  2044. * any waiting threads and let the SCSI mid-layer send commands. Note
  2045. * that host_lock must be held before invoking scsi_report_bus_reset.
  2046. */
  2047. if (reset_complete) {
  2048. pinstance->ioa_reset_in_progress = 0;
  2049. pinstance->ioa_reset_attempts = 0;
  2050. pinstance->reset_cmd = NULL;
  2051. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2052. pinstance->ioa_bringdown = 0;
  2053. pmcraid_return_cmd(cmd);
  2054. /* If target state is to bring up the adapter, proceed with
  2055. * hcam registration and resource exposure to mid-layer.
  2056. */
  2057. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  2058. pmcraid_register_hcams(pinstance);
  2059. wake_up_all(&pinstance->reset_wait_q);
  2060. }
  2061. return;
  2062. }
  2063. /**
  2064. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  2065. * ISR/tasklet during error interrupts including IOA unit check. If reset
  2066. * is already in progress, it just returns, otherwise initiates IOA reset
  2067. * to bring IOA up to operational state.
  2068. *
  2069. * @pinstance: pointer to adapter instance structure
  2070. *
  2071. * Return value
  2072. * none
  2073. */
  2074. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  2075. {
  2076. struct pmcraid_cmd *cmd;
  2077. /* If the reset is already in progress, just return, otherwise start
  2078. * reset sequence and return
  2079. */
  2080. if (!pinstance->ioa_reset_in_progress) {
  2081. scsi_block_requests(pinstance->host);
  2082. cmd = pmcraid_get_free_cmd(pinstance);
  2083. if (cmd == NULL) {
  2084. pmcraid_err("no cmnd blocks for initiate_reset\n");
  2085. return;
  2086. }
  2087. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2088. pinstance->reset_cmd = cmd;
  2089. pinstance->force_ioa_reset = 1;
  2090. pmcraid_notify_ioastate(pinstance,
  2091. PMC_DEVICE_EVENT_RESET_START);
  2092. pmcraid_ioa_reset(cmd);
  2093. }
  2094. }
  2095. /**
  2096. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  2097. * or bringdown IOA
  2098. * @pinstance: pointer adapter instance structure
  2099. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  2100. * @target_state: expected target state after reset
  2101. *
  2102. * Note: This command initiates reset and waits for its completion. Hence this
  2103. * should not be called from isr/timer/tasklet functions (timeout handlers,
  2104. * error response handlers and interrupt handlers).
  2105. *
  2106. * Return Value
  2107. * 1 in case ioa_state is not target_state, 0 otherwise.
  2108. */
  2109. static int pmcraid_reset_reload(
  2110. struct pmcraid_instance *pinstance,
  2111. u8 shutdown_type,
  2112. u8 target_state
  2113. )
  2114. {
  2115. struct pmcraid_cmd *reset_cmd = NULL;
  2116. unsigned long lock_flags;
  2117. int reset = 1;
  2118. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2119. if (pinstance->ioa_reset_in_progress) {
  2120. pmcraid_info("reset_reload: reset is already in progress\n");
  2121. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2122. wait_event(pinstance->reset_wait_q,
  2123. !pinstance->ioa_reset_in_progress);
  2124. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2125. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2126. spin_unlock_irqrestore(pinstance->host->host_lock,
  2127. lock_flags);
  2128. pmcraid_info("reset_reload: IOA is dead\n");
  2129. return reset;
  2130. } else if (pinstance->ioa_state == target_state) {
  2131. reset = 0;
  2132. }
  2133. }
  2134. if (reset) {
  2135. pmcraid_info("reset_reload: proceeding with reset\n");
  2136. scsi_block_requests(pinstance->host);
  2137. reset_cmd = pmcraid_get_free_cmd(pinstance);
  2138. if (reset_cmd == NULL) {
  2139. pmcraid_err("no free cmnd for reset_reload\n");
  2140. spin_unlock_irqrestore(pinstance->host->host_lock,
  2141. lock_flags);
  2142. return reset;
  2143. }
  2144. if (shutdown_type == SHUTDOWN_NORMAL)
  2145. pinstance->ioa_bringdown = 1;
  2146. pinstance->ioa_shutdown_type = shutdown_type;
  2147. pinstance->reset_cmd = reset_cmd;
  2148. pinstance->force_ioa_reset = reset;
  2149. pmcraid_info("reset_reload: initiating reset\n");
  2150. pmcraid_ioa_reset(reset_cmd);
  2151. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2152. pmcraid_info("reset_reload: waiting for reset to complete\n");
  2153. wait_event(pinstance->reset_wait_q,
  2154. !pinstance->ioa_reset_in_progress);
  2155. pmcraid_info("reset_reload: reset is complete !!\n");
  2156. scsi_unblock_requests(pinstance->host);
  2157. if (pinstance->ioa_state == target_state)
  2158. reset = 0;
  2159. }
  2160. return reset;
  2161. }
  2162. /**
  2163. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  2164. *
  2165. * @pinstance: pointer to adapter instance structure
  2166. *
  2167. * Return Value
  2168. * whatever is returned from pmcraid_reset_reload
  2169. */
  2170. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  2171. {
  2172. return pmcraid_reset_reload(pinstance,
  2173. SHUTDOWN_NORMAL,
  2174. IOA_STATE_UNKNOWN);
  2175. }
  2176. /**
  2177. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  2178. *
  2179. * @pinstance: pointer to adapter instance structure
  2180. *
  2181. * Return Value
  2182. * whatever is returned from pmcraid_reset_reload
  2183. */
  2184. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  2185. {
  2186. pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
  2187. return pmcraid_reset_reload(pinstance,
  2188. SHUTDOWN_NONE,
  2189. IOA_STATE_OPERATIONAL);
  2190. }
  2191. /**
  2192. * pmcraid_request_sense - Send request sense to a device
  2193. * @cmd: pmcraid command struct
  2194. *
  2195. * This function sends a request sense to a device as a result of a check
  2196. * condition. This method re-uses the same command block that failed earlier.
  2197. */
  2198. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  2199. {
  2200. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2201. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2202. /* allocate DMAable memory for sense buffers */
  2203. cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
  2204. SCSI_SENSE_BUFFERSIZE,
  2205. &cmd->sense_buffer_dma);
  2206. if (cmd->sense_buffer == NULL) {
  2207. pmcraid_err
  2208. ("couldn't allocate sense buffer for request sense\n");
  2209. pmcraid_erp_done(cmd);
  2210. return;
  2211. }
  2212. /* re-use the command block */
  2213. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  2214. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2215. ioarcb->request_flags0 = (SYNC_COMPLETE |
  2216. NO_LINK_DESCS |
  2217. INHIBIT_UL_CHECK);
  2218. ioarcb->request_type = REQ_TYPE_SCSI;
  2219. ioarcb->cdb[0] = REQUEST_SENSE;
  2220. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  2221. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2222. offsetof(struct pmcraid_ioarcb,
  2223. add_data.u.ioadl[0]));
  2224. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  2225. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2226. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  2227. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2228. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  2229. /* request sense might be called as part of error response processing
  2230. * which runs in tasklets context. It is possible that mid-layer might
  2231. * schedule queuecommand during this time, hence, writting to IOARRIN
  2232. * must be protect by host_lock
  2233. */
  2234. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2235. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2236. pmcraid_timeout_handler);
  2237. }
  2238. /**
  2239. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2240. * @cmd: command that failed
  2241. * @sense: true if request_sense is required after cancel all
  2242. *
  2243. * This function sends a cancel all to a device to clear the queue.
  2244. */
  2245. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
  2246. {
  2247. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2248. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2249. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2250. void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
  2251. : pmcraid_request_sense;
  2252. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2253. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2254. ioarcb->request_type = REQ_TYPE_IOACMD;
  2255. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2256. if (RES_IS_GSCSI(res->cfg_entry))
  2257. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2258. ioarcb->ioadl_bus_addr = 0;
  2259. ioarcb->ioadl_length = 0;
  2260. ioarcb->data_transfer_length = 0;
  2261. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  2262. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2263. * schedule queuecommand while we are doing this
  2264. */
  2265. pmcraid_send_cmd(cmd, cmd_done,
  2266. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2267. pmcraid_timeout_handler);
  2268. }
  2269. /**
  2270. * pmcraid_frame_auto_sense: frame fixed format sense information
  2271. *
  2272. * @cmd: pointer to failing command block
  2273. *
  2274. * Return value
  2275. * none
  2276. */
  2277. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2278. {
  2279. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2280. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2281. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2282. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2283. u32 failing_lba = 0;
  2284. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2285. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2286. if (RES_IS_VSET(res->cfg_entry) &&
  2287. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2288. ioasa->u.vset.failing_lba_hi != 0) {
  2289. sense_buf[0] = 0x72;
  2290. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2291. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2292. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2293. sense_buf[7] = 12;
  2294. sense_buf[8] = 0;
  2295. sense_buf[9] = 0x0A;
  2296. sense_buf[10] = 0x80;
  2297. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2298. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2299. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2300. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2301. sense_buf[15] = failing_lba & 0x000000ff;
  2302. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2303. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2304. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2305. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2306. sense_buf[19] = failing_lba & 0x000000ff;
  2307. } else {
  2308. sense_buf[0] = 0x70;
  2309. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2310. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2311. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2312. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2313. if (RES_IS_VSET(res->cfg_entry))
  2314. failing_lba =
  2315. le32_to_cpu(ioasa->u.
  2316. vset.failing_lba_lo);
  2317. sense_buf[0] |= 0x80;
  2318. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2319. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2320. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2321. sense_buf[6] = failing_lba & 0xff;
  2322. }
  2323. sense_buf[7] = 6; /* additional length */
  2324. }
  2325. }
  2326. /**
  2327. * pmcraid_error_handler - Error response handlers for a SCSI op
  2328. * @cmd: pointer to pmcraid_cmd that has failed
  2329. *
  2330. * This function determines whether or not to initiate ERP on the affected
  2331. * device. This is called from a tasklet, which doesn't hold any locks.
  2332. *
  2333. * Return value:
  2334. * 0 it caller can complete the request, otherwise 1 where in error
  2335. * handler itself completes the request and returns the command block
  2336. * back to free-pool
  2337. */
  2338. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2339. {
  2340. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2341. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2342. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2343. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2344. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2345. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2346. u32 sense_copied = 0;
  2347. if (!res) {
  2348. pmcraid_info("resource pointer is NULL\n");
  2349. return 0;
  2350. }
  2351. /* If this was a SCSI read/write command keep count of errors */
  2352. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2353. atomic_inc(&res->read_failures);
  2354. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2355. atomic_inc(&res->write_failures);
  2356. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2357. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2358. pmcraid_frame_auto_sense(cmd);
  2359. }
  2360. /* Log IOASC/IOASA information based on user settings */
  2361. pmcraid_ioasc_logger(ioasc, cmd);
  2362. switch (masked_ioasc) {
  2363. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2364. scsi_cmd->result |= (DID_ABORT << 16);
  2365. break;
  2366. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2367. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2368. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2369. break;
  2370. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2371. res->sync_reqd = 1;
  2372. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2373. break;
  2374. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2375. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2376. break;
  2377. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2378. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2379. if (!res->reset_progress)
  2380. scsi_report_bus_reset(pinstance->host,
  2381. scsi_cmd->device->channel);
  2382. scsi_cmd->result |= (DID_ERROR << 16);
  2383. break;
  2384. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2385. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2386. res->sync_reqd = 1;
  2387. /* if check_condition is not active return with error otherwise
  2388. * get/frame the sense buffer
  2389. */
  2390. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2391. SAM_STAT_CHECK_CONDITION &&
  2392. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2393. return 0;
  2394. /* If we have auto sense data as part of IOASA pass it to
  2395. * mid-layer
  2396. */
  2397. if (ioasa->auto_sense_length != 0) {
  2398. short sense_len = ioasa->auto_sense_length;
  2399. int data_size = min_t(u16, le16_to_cpu(sense_len),
  2400. SCSI_SENSE_BUFFERSIZE);
  2401. memcpy(scsi_cmd->sense_buffer,
  2402. ioasa->sense_data,
  2403. data_size);
  2404. sense_copied = 1;
  2405. }
  2406. if (RES_IS_GSCSI(res->cfg_entry))
  2407. pmcraid_cancel_all(cmd, sense_copied);
  2408. else if (sense_copied)
  2409. pmcraid_erp_done(cmd);
  2410. else
  2411. pmcraid_request_sense(cmd);
  2412. return 1;
  2413. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2414. break;
  2415. default:
  2416. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2417. scsi_cmd->result |= (DID_ERROR << 16);
  2418. break;
  2419. }
  2420. return 0;
  2421. }
  2422. /**
  2423. * pmcraid_reset_device - device reset handler functions
  2424. *
  2425. * @scsi_cmd: scsi command struct
  2426. * @modifier: reset modifier indicating the reset sequence to be performed
  2427. *
  2428. * This function issues a device reset to the affected device.
  2429. * A LUN reset will be sent to the device first. If that does
  2430. * not work, a target reset will be sent.
  2431. *
  2432. * Return value:
  2433. * SUCCESS / FAILED
  2434. */
  2435. static int pmcraid_reset_device(
  2436. struct scsi_cmnd *scsi_cmd,
  2437. unsigned long timeout,
  2438. u8 modifier
  2439. )
  2440. {
  2441. struct pmcraid_cmd *cmd;
  2442. struct pmcraid_instance *pinstance;
  2443. struct pmcraid_resource_entry *res;
  2444. struct pmcraid_ioarcb *ioarcb;
  2445. unsigned long lock_flags;
  2446. u32 ioasc;
  2447. pinstance =
  2448. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2449. res = scsi_cmd->device->hostdata;
  2450. if (!res) {
  2451. sdev_printk(KERN_ERR, scsi_cmd->device,
  2452. "reset_device: NULL resource pointer\n");
  2453. return FAILED;
  2454. }
  2455. /* If adapter is currently going through reset/reload, return failed.
  2456. * This will force the mid-layer to call _eh_bus/host reset, which
  2457. * will then go to sleep and wait for the reset to complete
  2458. */
  2459. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2460. if (pinstance->ioa_reset_in_progress ||
  2461. pinstance->ioa_state == IOA_STATE_DEAD) {
  2462. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2463. return FAILED;
  2464. }
  2465. res->reset_progress = 1;
  2466. pmcraid_info("Resetting %s resource with addr %x\n",
  2467. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2468. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2469. le32_to_cpu(res->cfg_entry.resource_address));
  2470. /* get a free cmd block */
  2471. cmd = pmcraid_get_free_cmd(pinstance);
  2472. if (cmd == NULL) {
  2473. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2474. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2475. return FAILED;
  2476. }
  2477. ioarcb = &cmd->ioa_cb->ioarcb;
  2478. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2479. ioarcb->request_type = REQ_TYPE_IOACMD;
  2480. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2481. /* Initialize reset modifier bits */
  2482. if (modifier)
  2483. modifier = ENABLE_RESET_MODIFIER | modifier;
  2484. ioarcb->cdb[1] = modifier;
  2485. init_completion(&cmd->wait_for_completion);
  2486. cmd->completion_req = 1;
  2487. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2488. cmd->ioa_cb->ioarcb.cdb[0],
  2489. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2490. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2491. pmcraid_send_cmd(cmd,
  2492. pmcraid_internal_done,
  2493. timeout,
  2494. pmcraid_timeout_handler);
  2495. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2496. /* RESET_DEVICE command completes after all pending IOARCBs are
  2497. * completed. Once this command is completed, pmcraind_internal_done
  2498. * will wake up the 'completion' queue.
  2499. */
  2500. wait_for_completion(&cmd->wait_for_completion);
  2501. /* complete the command here itself and return the command block
  2502. * to free list
  2503. */
  2504. pmcraid_return_cmd(cmd);
  2505. res->reset_progress = 0;
  2506. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2507. /* set the return value based on the returned ioasc */
  2508. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2509. }
  2510. /**
  2511. * _pmcraid_io_done - helper for pmcraid_io_done function
  2512. *
  2513. * @cmd: pointer to pmcraid command struct
  2514. * @reslen: residual data length to be set in the ioasa
  2515. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2516. *
  2517. * This function is invoked by pmcraid_io_done to complete mid-layer
  2518. * scsi ops.
  2519. *
  2520. * Return value:
  2521. * 0 if caller is required to return it to free_pool. Returns 1 if
  2522. * caller need not worry about freeing command block as error handler
  2523. * will take care of that.
  2524. */
  2525. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2526. {
  2527. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2528. int rc = 0;
  2529. scsi_set_resid(scsi_cmd, reslen);
  2530. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2531. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2532. cmd->ioa_cb->ioarcb.cdb[0],
  2533. ioasc, scsi_cmd->result);
  2534. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2535. rc = pmcraid_error_handler(cmd);
  2536. if (rc == 0) {
  2537. scsi_dma_unmap(scsi_cmd);
  2538. scsi_cmd->scsi_done(scsi_cmd);
  2539. }
  2540. return rc;
  2541. }
  2542. /**
  2543. * pmcraid_io_done - SCSI completion function
  2544. *
  2545. * @cmd: pointer to pmcraid command struct
  2546. *
  2547. * This function is invoked by tasklet/mid-layer error handler to completing
  2548. * the SCSI ops sent from mid-layer.
  2549. *
  2550. * Return value
  2551. * none
  2552. */
  2553. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2554. {
  2555. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2556. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2557. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2558. pmcraid_return_cmd(cmd);
  2559. }
  2560. /**
  2561. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2562. *
  2563. * @cmd: command block of the command to be aborted
  2564. *
  2565. * Return Value:
  2566. * returns pointer to command structure used as cancelling cmd
  2567. */
  2568. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2569. {
  2570. struct pmcraid_cmd *cancel_cmd;
  2571. struct pmcraid_instance *pinstance;
  2572. struct pmcraid_resource_entry *res;
  2573. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2574. res = cmd->scsi_cmd->device->hostdata;
  2575. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2576. if (cancel_cmd == NULL) {
  2577. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2578. return NULL;
  2579. }
  2580. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2581. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2582. cmd->ioa_cb->ioarcb.cdb[0],
  2583. cmd->ioa_cb->ioarcb.response_handle >> 2);
  2584. init_completion(&cancel_cmd->wait_for_completion);
  2585. cancel_cmd->completion_req = 1;
  2586. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2587. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2588. cancel_cmd->ioa_cb->ioarcb.cdb[0],
  2589. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2590. pmcraid_send_cmd(cancel_cmd,
  2591. pmcraid_internal_done,
  2592. PMCRAID_INTERNAL_TIMEOUT,
  2593. pmcraid_timeout_handler);
  2594. return cancel_cmd;
  2595. }
  2596. /**
  2597. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2598. *
  2599. * @cancel_cmd: command block use as cancelling command
  2600. *
  2601. * Return Value:
  2602. * returns SUCCESS if ABORT TASK has good completion
  2603. * otherwise FAILED
  2604. */
  2605. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2606. {
  2607. struct pmcraid_resource_entry *res;
  2608. u32 ioasc;
  2609. wait_for_completion(&cancel_cmd->wait_for_completion);
  2610. res = cancel_cmd->res;
  2611. cancel_cmd->res = NULL;
  2612. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2613. /* If the abort task is not timed out we will get a Good completion
  2614. * as sense_key, otherwise we may get one the following responses
  2615. * due to subsquent bus reset or device reset. In case IOASC is
  2616. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2617. */
  2618. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2619. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2620. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2621. res->sync_reqd = 1;
  2622. ioasc = 0;
  2623. }
  2624. /* complete the command here itself */
  2625. pmcraid_return_cmd(cancel_cmd);
  2626. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2627. }
  2628. /**
  2629. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2630. *
  2631. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2632. * mid-layer ensures that no other commands are queued. This
  2633. * never gets called under interrupt, but a separate eh thread.
  2634. *
  2635. * Return value:
  2636. * SUCCESS / FAILED
  2637. */
  2638. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2639. {
  2640. struct pmcraid_instance *pinstance;
  2641. struct pmcraid_cmd *cmd;
  2642. struct pmcraid_resource_entry *res;
  2643. unsigned long host_lock_flags;
  2644. unsigned long pending_lock_flags;
  2645. struct pmcraid_cmd *cancel_cmd = NULL;
  2646. int cmd_found = 0;
  2647. int rc = FAILED;
  2648. pinstance =
  2649. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2650. scmd_printk(KERN_INFO, scsi_cmd,
  2651. "I/O command timed out, aborting it.\n");
  2652. res = scsi_cmd->device->hostdata;
  2653. if (res == NULL)
  2654. return rc;
  2655. /* If we are currently going through reset/reload, return failed.
  2656. * This will force the mid-layer to eventually call
  2657. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2658. * reset to complete
  2659. */
  2660. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2661. if (pinstance->ioa_reset_in_progress ||
  2662. pinstance->ioa_state == IOA_STATE_DEAD) {
  2663. spin_unlock_irqrestore(pinstance->host->host_lock,
  2664. host_lock_flags);
  2665. return rc;
  2666. }
  2667. /* loop over pending cmd list to find cmd corresponding to this
  2668. * scsi_cmd. Note that this command might not have been completed
  2669. * already. locking: all pending commands are protected with
  2670. * pending_pool_lock.
  2671. */
  2672. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2673. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2674. if (cmd->scsi_cmd == scsi_cmd) {
  2675. cmd_found = 1;
  2676. break;
  2677. }
  2678. }
  2679. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2680. pending_lock_flags);
  2681. /* If the command to be aborted was given to IOA and still pending with
  2682. * it, send ABORT_TASK to abort this and wait for its completion
  2683. */
  2684. if (cmd_found)
  2685. cancel_cmd = pmcraid_abort_cmd(cmd);
  2686. spin_unlock_irqrestore(pinstance->host->host_lock,
  2687. host_lock_flags);
  2688. if (cancel_cmd) {
  2689. cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
  2690. rc = pmcraid_abort_complete(cancel_cmd);
  2691. }
  2692. return cmd_found ? rc : SUCCESS;
  2693. }
  2694. /**
  2695. * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
  2696. *
  2697. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2698. *
  2699. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2700. * Since these are called from mid-layer EH thread, no other IO will be queued
  2701. * to the resource being reset. However, control path (IOCTL) may be active so
  2702. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2703. * takes care by locking/unlocking host_lock.
  2704. *
  2705. * Return value
  2706. * SUCCESS or FAILED
  2707. */
  2708. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2709. {
  2710. scmd_printk(KERN_INFO, scmd,
  2711. "resetting device due to an I/O command timeout.\n");
  2712. return pmcraid_reset_device(scmd,
  2713. PMCRAID_INTERNAL_TIMEOUT,
  2714. RESET_DEVICE_LUN);
  2715. }
  2716. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2717. {
  2718. scmd_printk(KERN_INFO, scmd,
  2719. "Doing bus reset due to an I/O command timeout.\n");
  2720. return pmcraid_reset_device(scmd,
  2721. PMCRAID_RESET_BUS_TIMEOUT,
  2722. RESET_DEVICE_BUS);
  2723. }
  2724. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2725. {
  2726. scmd_printk(KERN_INFO, scmd,
  2727. "Doing target reset due to an I/O command timeout.\n");
  2728. return pmcraid_reset_device(scmd,
  2729. PMCRAID_INTERNAL_TIMEOUT,
  2730. RESET_DEVICE_TARGET);
  2731. }
  2732. /**
  2733. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2734. *
  2735. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2736. *
  2737. * Initiates adapter reset to bring it up to operational state
  2738. *
  2739. * Return value
  2740. * SUCCESS or FAILED
  2741. */
  2742. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2743. {
  2744. unsigned long interval = 10000; /* 10 seconds interval */
  2745. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2746. struct pmcraid_instance *pinstance =
  2747. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2748. /* wait for an additional 150 seconds just in case firmware could come
  2749. * up and if it could complete all the pending commands excluding the
  2750. * two HCAM (CCN and LDN).
  2751. */
  2752. while (waits--) {
  2753. if (atomic_read(&pinstance->outstanding_cmds) <=
  2754. PMCRAID_MAX_HCAM_CMD)
  2755. return SUCCESS;
  2756. msleep(interval);
  2757. }
  2758. dev_err(&pinstance->pdev->dev,
  2759. "Adapter being reset due to an I/O command timeout.\n");
  2760. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2761. }
  2762. /**
  2763. * pmcraid_task_attributes - Translate SPI Q-Tags to task attributes
  2764. * @scsi_cmd: scsi command struct
  2765. *
  2766. * Return value
  2767. * number of tags or 0 if the task is not tagged
  2768. */
  2769. static u8 pmcraid_task_attributes(struct scsi_cmnd *scsi_cmd)
  2770. {
  2771. char tag[2];
  2772. u8 rc = 0;
  2773. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  2774. switch (tag[0]) {
  2775. case MSG_SIMPLE_TAG:
  2776. rc = TASK_TAG_SIMPLE;
  2777. break;
  2778. case MSG_HEAD_TAG:
  2779. rc = TASK_TAG_QUEUE_HEAD;
  2780. break;
  2781. case MSG_ORDERED_TAG:
  2782. rc = TASK_TAG_ORDERED;
  2783. break;
  2784. };
  2785. }
  2786. return rc;
  2787. }
  2788. /**
  2789. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2790. * @cmd: pmcraid command struct
  2791. * @sgcount: count of scatter-gather elements
  2792. *
  2793. * Return value
  2794. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2795. * or external IOADLs
  2796. */
  2797. struct pmcraid_ioadl_desc *
  2798. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2799. {
  2800. struct pmcraid_ioadl_desc *ioadl;
  2801. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2802. int ioadl_count = 0;
  2803. if (ioarcb->add_cmd_param_length)
  2804. ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
  2805. ioarcb->ioadl_length =
  2806. sizeof(struct pmcraid_ioadl_desc) * sgcount;
  2807. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2808. /* external ioadls start at offset 0x80 from control_block
  2809. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2810. * It is necessary to indicate to firmware that driver is
  2811. * using ioadls to be treated as external to IOARCB.
  2812. */
  2813. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  2814. ioarcb->ioadl_bus_addr =
  2815. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2816. offsetof(struct pmcraid_ioarcb,
  2817. add_data.u.ioadl[3]));
  2818. ioadl = &ioarcb->add_data.u.ioadl[3];
  2819. } else {
  2820. ioarcb->ioadl_bus_addr =
  2821. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2822. offsetof(struct pmcraid_ioarcb,
  2823. add_data.u.ioadl[ioadl_count]));
  2824. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2825. ioarcb->ioarcb_bus_addr |=
  2826. DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
  2827. }
  2828. return ioadl;
  2829. }
  2830. /**
  2831. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2832. * @pinstance: pointer to adapter instance structure
  2833. * @cmd: pmcraid command struct
  2834. *
  2835. * This function is invoked by queuecommand entry point while sending a command
  2836. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2837. *
  2838. * Return value:
  2839. * 0 on success or -1 on failure
  2840. */
  2841. static int pmcraid_build_ioadl(
  2842. struct pmcraid_instance *pinstance,
  2843. struct pmcraid_cmd *cmd
  2844. )
  2845. {
  2846. int i, nseg;
  2847. struct scatterlist *sglist;
  2848. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2849. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2850. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2851. u32 length = scsi_bufflen(scsi_cmd);
  2852. if (!length)
  2853. return 0;
  2854. nseg = scsi_dma_map(scsi_cmd);
  2855. if (nseg < 0) {
  2856. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2857. return -1;
  2858. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2859. scsi_dma_unmap(scsi_cmd);
  2860. scmd_printk(KERN_ERR, scsi_cmd,
  2861. "sg count is (%d) more than allowed!\n", nseg);
  2862. return -1;
  2863. }
  2864. /* Initialize IOARCB data transfer length fields */
  2865. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2866. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2867. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2868. ioarcb->data_transfer_length = cpu_to_le32(length);
  2869. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2870. /* Initialize IOADL descriptor addresses */
  2871. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2872. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2873. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2874. ioadl[i].flags = 0;
  2875. }
  2876. /* setup last descriptor */
  2877. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2878. return 0;
  2879. }
  2880. /**
  2881. * pmcraid_free_sglist - Frees an allocated SG buffer list
  2882. * @sglist: scatter/gather list pointer
  2883. *
  2884. * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
  2885. *
  2886. * Return value:
  2887. * none
  2888. */
  2889. static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
  2890. {
  2891. int i;
  2892. for (i = 0; i < sglist->num_sg; i++)
  2893. __free_pages(sg_page(&(sglist->scatterlist[i])),
  2894. sglist->order);
  2895. kfree(sglist);
  2896. }
  2897. /**
  2898. * pmcraid_alloc_sglist - Allocates memory for a SG list
  2899. * @buflen: buffer length
  2900. *
  2901. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  2902. * list.
  2903. *
  2904. * Return value
  2905. * pointer to sglist / NULL on failure
  2906. */
  2907. static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
  2908. {
  2909. struct pmcraid_sglist *sglist;
  2910. struct scatterlist *scatterlist;
  2911. struct page *page;
  2912. int num_elem, i, j;
  2913. int sg_size;
  2914. int order;
  2915. int bsize_elem;
  2916. sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
  2917. order = (sg_size > 0) ? get_order(sg_size) : 0;
  2918. bsize_elem = PAGE_SIZE * (1 << order);
  2919. /* Determine the actual number of sg entries needed */
  2920. if (buflen % bsize_elem)
  2921. num_elem = (buflen / bsize_elem) + 1;
  2922. else
  2923. num_elem = buflen / bsize_elem;
  2924. /* Allocate a scatter/gather list for the DMA */
  2925. sglist = kzalloc(sizeof(struct pmcraid_sglist) +
  2926. (sizeof(struct scatterlist) * (num_elem - 1)),
  2927. GFP_KERNEL);
  2928. if (sglist == NULL)
  2929. return NULL;
  2930. scatterlist = sglist->scatterlist;
  2931. sg_init_table(scatterlist, num_elem);
  2932. sglist->order = order;
  2933. sglist->num_sg = num_elem;
  2934. sg_size = buflen;
  2935. for (i = 0; i < num_elem; i++) {
  2936. page = alloc_pages(GFP_KERNEL|GFP_DMA, order);
  2937. if (!page) {
  2938. for (j = i - 1; j >= 0; j--)
  2939. __free_pages(sg_page(&scatterlist[j]), order);
  2940. kfree(sglist);
  2941. return NULL;
  2942. }
  2943. sg_set_page(&scatterlist[i], page,
  2944. sg_size < bsize_elem ? sg_size : bsize_elem, 0);
  2945. sg_size -= bsize_elem;
  2946. }
  2947. return sglist;
  2948. }
  2949. /**
  2950. * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
  2951. * @sglist: scatter/gather list pointer
  2952. * @buffer: buffer pointer
  2953. * @len: buffer length
  2954. * @direction: data transfer direction
  2955. *
  2956. * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
  2957. *
  2958. * Return value:
  2959. * 0 on success / other on failure
  2960. */
  2961. static int pmcraid_copy_sglist(
  2962. struct pmcraid_sglist *sglist,
  2963. unsigned long buffer,
  2964. u32 len,
  2965. int direction
  2966. )
  2967. {
  2968. struct scatterlist *scatterlist;
  2969. void *kaddr;
  2970. int bsize_elem;
  2971. int i;
  2972. int rc = 0;
  2973. /* Determine the actual number of bytes per element */
  2974. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  2975. scatterlist = sglist->scatterlist;
  2976. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  2977. struct page *page = sg_page(&scatterlist[i]);
  2978. kaddr = kmap(page);
  2979. if (direction == DMA_TO_DEVICE)
  2980. rc = __copy_from_user(kaddr,
  2981. (void *)buffer,
  2982. bsize_elem);
  2983. else
  2984. rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
  2985. kunmap(page);
  2986. if (rc) {
  2987. pmcraid_err("failed to copy user data into sg list\n");
  2988. return -EFAULT;
  2989. }
  2990. scatterlist[i].length = bsize_elem;
  2991. }
  2992. if (len % bsize_elem) {
  2993. struct page *page = sg_page(&scatterlist[i]);
  2994. kaddr = kmap(page);
  2995. if (direction == DMA_TO_DEVICE)
  2996. rc = __copy_from_user(kaddr,
  2997. (void *)buffer,
  2998. len % bsize_elem);
  2999. else
  3000. rc = __copy_to_user((void *)buffer,
  3001. kaddr,
  3002. len % bsize_elem);
  3003. kunmap(page);
  3004. scatterlist[i].length = len % bsize_elem;
  3005. }
  3006. if (rc) {
  3007. pmcraid_err("failed to copy user data into sg list\n");
  3008. rc = -EFAULT;
  3009. }
  3010. return rc;
  3011. }
  3012. /**
  3013. * pmcraid_queuecommand - Queue a mid-layer request
  3014. * @scsi_cmd: scsi command struct
  3015. * @done: done function
  3016. *
  3017. * This function queues a request generated by the mid-layer. Midlayer calls
  3018. * this routine within host->lock. Some of the functions called by queuecommand
  3019. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  3020. *
  3021. * Return value:
  3022. * 0 on success
  3023. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  3024. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  3025. */
  3026. static int pmcraid_queuecommand(
  3027. struct scsi_cmnd *scsi_cmd,
  3028. void (*done) (struct scsi_cmnd *)
  3029. )
  3030. {
  3031. struct pmcraid_instance *pinstance;
  3032. struct pmcraid_resource_entry *res;
  3033. struct pmcraid_ioarcb *ioarcb;
  3034. struct pmcraid_cmd *cmd;
  3035. u32 fw_version;
  3036. int rc = 0;
  3037. pinstance =
  3038. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  3039. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  3040. scsi_cmd->scsi_done = done;
  3041. res = scsi_cmd->device->hostdata;
  3042. scsi_cmd->result = (DID_OK << 16);
  3043. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  3044. * the command
  3045. */
  3046. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  3047. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  3048. scsi_cmd->result = (DID_NO_CONNECT << 16);
  3049. scsi_cmd->scsi_done(scsi_cmd);
  3050. return 0;
  3051. }
  3052. /* If IOA reset is in progress, can't queue the commands */
  3053. if (pinstance->ioa_reset_in_progress)
  3054. return SCSI_MLQUEUE_HOST_BUSY;
  3055. /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
  3056. * the command here itself with success return
  3057. */
  3058. if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
  3059. pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
  3060. scsi_cmd->scsi_done(scsi_cmd);
  3061. return 0;
  3062. }
  3063. /* initialize the command and IOARCB to be sent to IOA */
  3064. cmd = pmcraid_get_free_cmd(pinstance);
  3065. if (cmd == NULL) {
  3066. pmcraid_err("free command block is not available\n");
  3067. return SCSI_MLQUEUE_HOST_BUSY;
  3068. }
  3069. cmd->scsi_cmd = scsi_cmd;
  3070. ioarcb = &(cmd->ioa_cb->ioarcb);
  3071. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  3072. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  3073. ioarcb->request_type = REQ_TYPE_SCSI;
  3074. /* set hrrq number where the IOA should respond to. Note that all cmds
  3075. * generated internally uses hrrq_id 0, exception to this is the cmd
  3076. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3077. * hrrq_id assigned here in queuecommand
  3078. */
  3079. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3080. pinstance->num_hrrq;
  3081. cmd->cmd_done = pmcraid_io_done;
  3082. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  3083. if (scsi_cmd->underflow == 0)
  3084. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  3085. if (res->sync_reqd) {
  3086. ioarcb->request_flags0 |= SYNC_COMPLETE;
  3087. res->sync_reqd = 0;
  3088. }
  3089. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3090. ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd);
  3091. if (RES_IS_GSCSI(res->cfg_entry))
  3092. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  3093. }
  3094. rc = pmcraid_build_ioadl(pinstance, cmd);
  3095. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  3096. le32_to_cpu(ioarcb->response_handle) >> 2,
  3097. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  3098. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  3099. PMCRAID_PHYS_BUS_ID,
  3100. RES_IS_VSET(res->cfg_entry) ?
  3101. (fw_version <= PMCRAID_FW_VERSION_1 ?
  3102. res->cfg_entry.unique_flags1 :
  3103. res->cfg_entry.array_id & 0xFF) :
  3104. RES_TARGET(res->cfg_entry.resource_address),
  3105. RES_LUN(res->cfg_entry.resource_address));
  3106. if (likely(rc == 0)) {
  3107. _pmcraid_fire_command(cmd);
  3108. } else {
  3109. pmcraid_err("queuecommand could not build ioadl\n");
  3110. pmcraid_return_cmd(cmd);
  3111. rc = SCSI_MLQUEUE_HOST_BUSY;
  3112. }
  3113. return rc;
  3114. }
  3115. /**
  3116. * pmcraid_open -char node "open" entry, allowed only users with admin access
  3117. */
  3118. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  3119. {
  3120. struct pmcraid_instance *pinstance;
  3121. if (!capable(CAP_SYS_ADMIN))
  3122. return -EACCES;
  3123. /* Populate adapter instance * pointer for use by ioctl */
  3124. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  3125. filep->private_data = pinstance;
  3126. return 0;
  3127. }
  3128. /**
  3129. * pmcraid_release - char node "release" entry point
  3130. */
  3131. static int pmcraid_chr_release(struct inode *inode, struct file *filep)
  3132. {
  3133. struct pmcraid_instance *pinstance = filep->private_data;
  3134. filep->private_data = NULL;
  3135. fasync_helper(-1, filep, 0, &pinstance->aen_queue);
  3136. return 0;
  3137. }
  3138. /**
  3139. * pmcraid_fasync - Async notifier registration from applications
  3140. *
  3141. * This function adds the calling process to a driver global queue. When an
  3142. * event occurs, SIGIO will be sent to all processes in this queue.
  3143. */
  3144. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  3145. {
  3146. struct pmcraid_instance *pinstance;
  3147. int rc;
  3148. pinstance = filep->private_data;
  3149. mutex_lock(&pinstance->aen_queue_lock);
  3150. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  3151. mutex_unlock(&pinstance->aen_queue_lock);
  3152. return rc;
  3153. }
  3154. /**
  3155. * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
  3156. * commands sent over IOCTL interface
  3157. *
  3158. * @cmd : pointer to struct pmcraid_cmd
  3159. * @buflen : length of the request buffer
  3160. * @direction : data transfer direction
  3161. *
  3162. * Return value
  3163. * 0 on success, non-zero error code on failure
  3164. */
  3165. static int pmcraid_build_passthrough_ioadls(
  3166. struct pmcraid_cmd *cmd,
  3167. int buflen,
  3168. int direction
  3169. )
  3170. {
  3171. struct pmcraid_sglist *sglist = NULL;
  3172. struct scatterlist *sg = NULL;
  3173. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  3174. struct pmcraid_ioadl_desc *ioadl;
  3175. int i;
  3176. sglist = pmcraid_alloc_sglist(buflen);
  3177. if (!sglist) {
  3178. pmcraid_err("can't allocate memory for passthrough SGls\n");
  3179. return -ENOMEM;
  3180. }
  3181. sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
  3182. sglist->scatterlist,
  3183. sglist->num_sg, direction);
  3184. if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
  3185. dev_err(&cmd->drv_inst->pdev->dev,
  3186. "Failed to map passthrough buffer!\n");
  3187. pmcraid_free_sglist(sglist);
  3188. return -EIO;
  3189. }
  3190. cmd->sglist = sglist;
  3191. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3192. ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
  3193. /* Initialize IOADL descriptor addresses */
  3194. for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
  3195. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
  3196. ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
  3197. ioadl[i].flags = 0;
  3198. }
  3199. /* setup the last descriptor */
  3200. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  3201. return 0;
  3202. }
  3203. /**
  3204. * pmcraid_release_passthrough_ioadls - release passthrough ioadls
  3205. *
  3206. * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
  3207. * @buflen: size of the request buffer
  3208. * @direction: data transfer direction
  3209. *
  3210. * Return value
  3211. * 0 on success, non-zero error code on failure
  3212. */
  3213. static void pmcraid_release_passthrough_ioadls(
  3214. struct pmcraid_cmd *cmd,
  3215. int buflen,
  3216. int direction
  3217. )
  3218. {
  3219. struct pmcraid_sglist *sglist = cmd->sglist;
  3220. if (buflen > 0) {
  3221. pci_unmap_sg(cmd->drv_inst->pdev,
  3222. sglist->scatterlist,
  3223. sglist->num_sg,
  3224. direction);
  3225. pmcraid_free_sglist(sglist);
  3226. cmd->sglist = NULL;
  3227. }
  3228. }
  3229. /**
  3230. * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
  3231. *
  3232. * @pinstance: pointer to adapter instance structure
  3233. * @cmd: ioctl code
  3234. * @arg: pointer to pmcraid_passthrough_buffer user buffer
  3235. *
  3236. * Return value
  3237. * 0 on success, non-zero error code on failure
  3238. */
  3239. static long pmcraid_ioctl_passthrough(
  3240. struct pmcraid_instance *pinstance,
  3241. unsigned int ioctl_cmd,
  3242. unsigned int buflen,
  3243. unsigned long arg
  3244. )
  3245. {
  3246. struct pmcraid_passthrough_ioctl_buffer *buffer;
  3247. struct pmcraid_ioarcb *ioarcb;
  3248. struct pmcraid_cmd *cmd;
  3249. struct pmcraid_cmd *cancel_cmd;
  3250. unsigned long request_buffer;
  3251. unsigned long request_offset;
  3252. unsigned long lock_flags;
  3253. u32 ioasc;
  3254. int request_size;
  3255. int buffer_size;
  3256. u8 access, direction;
  3257. int rc = 0;
  3258. /* If IOA reset is in progress, wait 10 secs for reset to complete */
  3259. if (pinstance->ioa_reset_in_progress) {
  3260. rc = wait_event_interruptible_timeout(
  3261. pinstance->reset_wait_q,
  3262. !pinstance->ioa_reset_in_progress,
  3263. msecs_to_jiffies(10000));
  3264. if (!rc)
  3265. return -ETIMEDOUT;
  3266. else if (rc < 0)
  3267. return -ERESTARTSYS;
  3268. }
  3269. /* If adapter is not in operational state, return error */
  3270. if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
  3271. pmcraid_err("IOA is not operational\n");
  3272. return -ENOTTY;
  3273. }
  3274. buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
  3275. buffer = kmalloc(buffer_size, GFP_KERNEL);
  3276. if (!buffer) {
  3277. pmcraid_err("no memory for passthrough buffer\n");
  3278. return -ENOMEM;
  3279. }
  3280. request_offset =
  3281. offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
  3282. request_buffer = arg + request_offset;
  3283. rc = __copy_from_user(buffer,
  3284. (struct pmcraid_passthrough_ioctl_buffer *) arg,
  3285. sizeof(struct pmcraid_passthrough_ioctl_buffer));
  3286. if (rc) {
  3287. pmcraid_err("ioctl: can't copy passthrough buffer\n");
  3288. rc = -EFAULT;
  3289. goto out_free_buffer;
  3290. }
  3291. request_size = buffer->ioarcb.data_transfer_length;
  3292. if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
  3293. access = VERIFY_READ;
  3294. direction = DMA_TO_DEVICE;
  3295. } else {
  3296. access = VERIFY_WRITE;
  3297. direction = DMA_FROM_DEVICE;
  3298. }
  3299. if (request_size > 0) {
  3300. rc = access_ok(access, arg, request_offset + request_size);
  3301. if (!rc) {
  3302. rc = -EFAULT;
  3303. goto out_free_buffer;
  3304. }
  3305. }
  3306. /* check if we have any additional command parameters */
  3307. if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) {
  3308. rc = -EINVAL;
  3309. goto out_free_buffer;
  3310. }
  3311. cmd = pmcraid_get_free_cmd(pinstance);
  3312. if (!cmd) {
  3313. pmcraid_err("free command block is not available\n");
  3314. rc = -ENOMEM;
  3315. goto out_free_buffer;
  3316. }
  3317. cmd->scsi_cmd = NULL;
  3318. ioarcb = &(cmd->ioa_cb->ioarcb);
  3319. /* Copy the user-provided IOARCB stuff field by field */
  3320. ioarcb->resource_handle = buffer->ioarcb.resource_handle;
  3321. ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
  3322. ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
  3323. ioarcb->request_type = buffer->ioarcb.request_type;
  3324. ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
  3325. ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
  3326. memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
  3327. if (buffer->ioarcb.add_cmd_param_length) {
  3328. ioarcb->add_cmd_param_length =
  3329. buffer->ioarcb.add_cmd_param_length;
  3330. ioarcb->add_cmd_param_offset =
  3331. buffer->ioarcb.add_cmd_param_offset;
  3332. memcpy(ioarcb->add_data.u.add_cmd_params,
  3333. buffer->ioarcb.add_data.u.add_cmd_params,
  3334. buffer->ioarcb.add_cmd_param_length);
  3335. }
  3336. /* set hrrq number where the IOA should respond to. Note that all cmds
  3337. * generated internally uses hrrq_id 0, exception to this is the cmd
  3338. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3339. * hrrq_id assigned here in queuecommand
  3340. */
  3341. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3342. pinstance->num_hrrq;
  3343. if (request_size) {
  3344. rc = pmcraid_build_passthrough_ioadls(cmd,
  3345. request_size,
  3346. direction);
  3347. if (rc) {
  3348. pmcraid_err("couldn't build passthrough ioadls\n");
  3349. goto out_free_buffer;
  3350. }
  3351. }
  3352. /* If data is being written into the device, copy the data from user
  3353. * buffers
  3354. */
  3355. if (direction == DMA_TO_DEVICE && request_size > 0) {
  3356. rc = pmcraid_copy_sglist(cmd->sglist,
  3357. request_buffer,
  3358. request_size,
  3359. direction);
  3360. if (rc) {
  3361. pmcraid_err("failed to copy user buffer\n");
  3362. goto out_free_sglist;
  3363. }
  3364. }
  3365. /* passthrough ioctl is a blocking command so, put the user to sleep
  3366. * until timeout. Note that a timeout value of 0 means, do timeout.
  3367. */
  3368. cmd->cmd_done = pmcraid_internal_done;
  3369. init_completion(&cmd->wait_for_completion);
  3370. cmd->completion_req = 1;
  3371. pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
  3372. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3373. cmd->ioa_cb->ioarcb.cdb[0],
  3374. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
  3375. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3376. _pmcraid_fire_command(cmd);
  3377. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3378. /* NOTE ! Remove the below line once abort_task is implemented
  3379. * in firmware. This line disables ioctl command timeout handling logic
  3380. * similar to IO command timeout handling, making ioctl commands to wait
  3381. * until the command completion regardless of timeout value specified in
  3382. * ioarcb
  3383. */
  3384. buffer->ioarcb.cmd_timeout = 0;
  3385. /* If command timeout is specified put caller to wait till that time,
  3386. * otherwise it would be blocking wait. If command gets timed out, it
  3387. * will be aborted.
  3388. */
  3389. if (buffer->ioarcb.cmd_timeout == 0) {
  3390. wait_for_completion(&cmd->wait_for_completion);
  3391. } else if (!wait_for_completion_timeout(
  3392. &cmd->wait_for_completion,
  3393. msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) {
  3394. pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
  3395. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2),
  3396. cmd->ioa_cb->ioarcb.cdb[0]);
  3397. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3398. cancel_cmd = pmcraid_abort_cmd(cmd);
  3399. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3400. if (cancel_cmd) {
  3401. wait_for_completion(&cancel_cmd->wait_for_completion);
  3402. ioasc = cancel_cmd->ioa_cb->ioasa.ioasc;
  3403. pmcraid_return_cmd(cancel_cmd);
  3404. /* if abort task couldn't find the command i.e it got
  3405. * completed prior to aborting, return good completion.
  3406. * if command got aborted succesfully or there was IOA
  3407. * reset due to abort task itself getting timedout then
  3408. * return -ETIMEDOUT
  3409. */
  3410. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  3411. PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
  3412. if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
  3413. rc = -ETIMEDOUT;
  3414. goto out_handle_response;
  3415. }
  3416. }
  3417. /* no command block for abort task or abort task failed to abort
  3418. * the IOARCB, then wait for 150 more seconds and initiate reset
  3419. * sequence after timeout
  3420. */
  3421. if (!wait_for_completion_timeout(
  3422. &cmd->wait_for_completion,
  3423. msecs_to_jiffies(150 * 1000))) {
  3424. pmcraid_reset_bringup(cmd->drv_inst);
  3425. rc = -ETIMEDOUT;
  3426. }
  3427. }
  3428. out_handle_response:
  3429. /* If the command failed for any reason, copy entire IOASA buffer and
  3430. * return IOCTL success. If copying IOASA to user-buffer fails, return
  3431. * EFAULT
  3432. */
  3433. if (PMCRAID_IOASC_SENSE_KEY(le32_to_cpu(cmd->ioa_cb->ioasa.ioasc))) {
  3434. void *ioasa =
  3435. (void *)(arg +
  3436. offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa));
  3437. pmcraid_info("command failed with %x\n",
  3438. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  3439. if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
  3440. sizeof(struct pmcraid_ioasa))) {
  3441. pmcraid_err("failed to copy ioasa buffer to user\n");
  3442. rc = -EFAULT;
  3443. }
  3444. }
  3445. /* If the data transfer was from device, copy the data onto user
  3446. * buffers
  3447. */
  3448. else if (direction == DMA_FROM_DEVICE && request_size > 0) {
  3449. rc = pmcraid_copy_sglist(cmd->sglist,
  3450. request_buffer,
  3451. request_size,
  3452. direction);
  3453. if (rc) {
  3454. pmcraid_err("failed to copy user buffer\n");
  3455. rc = -EFAULT;
  3456. }
  3457. }
  3458. out_free_sglist:
  3459. pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
  3460. pmcraid_return_cmd(cmd);
  3461. out_free_buffer:
  3462. kfree(buffer);
  3463. return rc;
  3464. }
  3465. /**
  3466. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  3467. *
  3468. * @pinstance: pointer to adapter instance structure
  3469. * @cmd: ioctl command passed in
  3470. * @buflen: length of user_buffer
  3471. * @user_buffer: user buffer pointer
  3472. *
  3473. * Return Value
  3474. * 0 in case of success, otherwise appropriate error code
  3475. */
  3476. static long pmcraid_ioctl_driver(
  3477. struct pmcraid_instance *pinstance,
  3478. unsigned int cmd,
  3479. unsigned int buflen,
  3480. void __user *user_buffer
  3481. )
  3482. {
  3483. int rc = -ENOSYS;
  3484. if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) {
  3485. pmcraid_err("ioctl_driver: access fault in request buffer\n");
  3486. return -EFAULT;
  3487. }
  3488. switch (cmd) {
  3489. case PMCRAID_IOCTL_RESET_ADAPTER:
  3490. pmcraid_reset_bringup(pinstance);
  3491. rc = 0;
  3492. break;
  3493. default:
  3494. break;
  3495. }
  3496. return rc;
  3497. }
  3498. /**
  3499. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  3500. *
  3501. * @cmd: ioctl command
  3502. * @arg: user buffer
  3503. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  3504. *
  3505. * Return Value
  3506. * negetive error code if there are access issues, otherwise zero.
  3507. * Upon success, returns ioctl header copied out of user buffer.
  3508. */
  3509. static int pmcraid_check_ioctl_buffer(
  3510. int cmd,
  3511. void __user *arg,
  3512. struct pmcraid_ioctl_header *hdr
  3513. )
  3514. {
  3515. int rc = 0;
  3516. int access = VERIFY_READ;
  3517. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3518. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3519. return -EFAULT;
  3520. }
  3521. /* check for valid driver signature */
  3522. rc = memcmp(hdr->signature,
  3523. PMCRAID_IOCTL_SIGNATURE,
  3524. sizeof(hdr->signature));
  3525. if (rc) {
  3526. pmcraid_err("signature verification failed\n");
  3527. return -EINVAL;
  3528. }
  3529. /* check for appropriate buffer access */
  3530. if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
  3531. access = VERIFY_WRITE;
  3532. rc = access_ok(access,
  3533. (arg + sizeof(struct pmcraid_ioctl_header)),
  3534. hdr->buffer_length);
  3535. if (!rc) {
  3536. pmcraid_err("access failed for user buffer of size %d\n",
  3537. hdr->buffer_length);
  3538. return -EFAULT;
  3539. }
  3540. return 0;
  3541. }
  3542. /**
  3543. * pmcraid_ioctl - char node ioctl entry point
  3544. */
  3545. static long pmcraid_chr_ioctl(
  3546. struct file *filep,
  3547. unsigned int cmd,
  3548. unsigned long arg
  3549. )
  3550. {
  3551. struct pmcraid_instance *pinstance = NULL;
  3552. struct pmcraid_ioctl_header *hdr = NULL;
  3553. int retval = -ENOTTY;
  3554. hdr = kmalloc(GFP_KERNEL, sizeof(struct pmcraid_ioctl_header));
  3555. if (!hdr) {
  3556. pmcraid_err("faile to allocate memory for ioctl header\n");
  3557. return -ENOMEM;
  3558. }
  3559. retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr);
  3560. if (retval) {
  3561. pmcraid_info("chr_ioctl: header check failed\n");
  3562. kfree(hdr);
  3563. return retval;
  3564. }
  3565. pinstance = filep->private_data;
  3566. if (!pinstance) {
  3567. pmcraid_info("adapter instance is not found\n");
  3568. kfree(hdr);
  3569. return -ENOTTY;
  3570. }
  3571. switch (_IOC_TYPE(cmd)) {
  3572. case PMCRAID_PASSTHROUGH_IOCTL:
  3573. /* If ioctl code is to download microcode, we need to block
  3574. * mid-layer requests.
  3575. */
  3576. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3577. scsi_block_requests(pinstance->host);
  3578. retval = pmcraid_ioctl_passthrough(pinstance,
  3579. cmd,
  3580. hdr->buffer_length,
  3581. arg);
  3582. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3583. scsi_unblock_requests(pinstance->host);
  3584. break;
  3585. case PMCRAID_DRIVER_IOCTL:
  3586. arg += sizeof(struct pmcraid_ioctl_header);
  3587. retval = pmcraid_ioctl_driver(pinstance,
  3588. cmd,
  3589. hdr->buffer_length,
  3590. (void __user *)arg);
  3591. break;
  3592. default:
  3593. retval = -ENOTTY;
  3594. break;
  3595. }
  3596. kfree(hdr);
  3597. return retval;
  3598. }
  3599. /**
  3600. * File operations structure for management interface
  3601. */
  3602. static const struct file_operations pmcraid_fops = {
  3603. .owner = THIS_MODULE,
  3604. .open = pmcraid_chr_open,
  3605. .release = pmcraid_chr_release,
  3606. .fasync = pmcraid_chr_fasync,
  3607. .unlocked_ioctl = pmcraid_chr_ioctl,
  3608. #ifdef CONFIG_COMPAT
  3609. .compat_ioctl = pmcraid_chr_ioctl,
  3610. #endif
  3611. };
  3612. /**
  3613. * pmcraid_show_log_level - Display adapter's error logging level
  3614. * @dev: class device struct
  3615. * @buf: buffer
  3616. *
  3617. * Return value:
  3618. * number of bytes printed to buffer
  3619. */
  3620. static ssize_t pmcraid_show_log_level(
  3621. struct device *dev,
  3622. struct device_attribute *attr,
  3623. char *buf)
  3624. {
  3625. struct Scsi_Host *shost = class_to_shost(dev);
  3626. struct pmcraid_instance *pinstance =
  3627. (struct pmcraid_instance *)shost->hostdata;
  3628. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3629. }
  3630. /**
  3631. * pmcraid_store_log_level - Change the adapter's error logging level
  3632. * @dev: class device struct
  3633. * @buf: buffer
  3634. * @count: not used
  3635. *
  3636. * Return value:
  3637. * number of bytes printed to buffer
  3638. */
  3639. static ssize_t pmcraid_store_log_level(
  3640. struct device *dev,
  3641. struct device_attribute *attr,
  3642. const char *buf,
  3643. size_t count
  3644. )
  3645. {
  3646. struct Scsi_Host *shost;
  3647. struct pmcraid_instance *pinstance;
  3648. unsigned long val;
  3649. if (strict_strtoul(buf, 10, &val))
  3650. return -EINVAL;
  3651. /* log-level should be from 0 to 2 */
  3652. if (val > 2)
  3653. return -EINVAL;
  3654. shost = class_to_shost(dev);
  3655. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3656. pinstance->current_log_level = val;
  3657. return strlen(buf);
  3658. }
  3659. static struct device_attribute pmcraid_log_level_attr = {
  3660. .attr = {
  3661. .name = "log_level",
  3662. .mode = S_IRUGO | S_IWUSR,
  3663. },
  3664. .show = pmcraid_show_log_level,
  3665. .store = pmcraid_store_log_level,
  3666. };
  3667. /**
  3668. * pmcraid_show_drv_version - Display driver version
  3669. * @dev: class device struct
  3670. * @buf: buffer
  3671. *
  3672. * Return value:
  3673. * number of bytes printed to buffer
  3674. */
  3675. static ssize_t pmcraid_show_drv_version(
  3676. struct device *dev,
  3677. struct device_attribute *attr,
  3678. char *buf
  3679. )
  3680. {
  3681. return snprintf(buf, PAGE_SIZE, "version: %s, build date: %s\n",
  3682. PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
  3683. }
  3684. static struct device_attribute pmcraid_driver_version_attr = {
  3685. .attr = {
  3686. .name = "drv_version",
  3687. .mode = S_IRUGO,
  3688. },
  3689. .show = pmcraid_show_drv_version,
  3690. };
  3691. /**
  3692. * pmcraid_show_io_adapter_id - Display driver assigned adapter id
  3693. * @dev: class device struct
  3694. * @buf: buffer
  3695. *
  3696. * Return value:
  3697. * number of bytes printed to buffer
  3698. */
  3699. static ssize_t pmcraid_show_adapter_id(
  3700. struct device *dev,
  3701. struct device_attribute *attr,
  3702. char *buf
  3703. )
  3704. {
  3705. struct Scsi_Host *shost = class_to_shost(dev);
  3706. struct pmcraid_instance *pinstance =
  3707. (struct pmcraid_instance *)shost->hostdata;
  3708. u32 adapter_id = (pinstance->pdev->bus->number << 8) |
  3709. pinstance->pdev->devfn;
  3710. u32 aen_group = pmcraid_event_family.id;
  3711. return snprintf(buf, PAGE_SIZE,
  3712. "adapter id: %d\nminor: %d\naen group: %d\n",
  3713. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3714. }
  3715. static struct device_attribute pmcraid_adapter_id_attr = {
  3716. .attr = {
  3717. .name = "adapter_id",
  3718. .mode = S_IRUGO | S_IWUSR,
  3719. },
  3720. .show = pmcraid_show_adapter_id,
  3721. };
  3722. static struct device_attribute *pmcraid_host_attrs[] = {
  3723. &pmcraid_log_level_attr,
  3724. &pmcraid_driver_version_attr,
  3725. &pmcraid_adapter_id_attr,
  3726. NULL,
  3727. };
  3728. /* host template structure for pmcraid driver */
  3729. static struct scsi_host_template pmcraid_host_template = {
  3730. .module = THIS_MODULE,
  3731. .name = PMCRAID_DRIVER_NAME,
  3732. .queuecommand = pmcraid_queuecommand,
  3733. .eh_abort_handler = pmcraid_eh_abort_handler,
  3734. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3735. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3736. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3737. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3738. .slave_alloc = pmcraid_slave_alloc,
  3739. .slave_configure = pmcraid_slave_configure,
  3740. .slave_destroy = pmcraid_slave_destroy,
  3741. .change_queue_depth = pmcraid_change_queue_depth,
  3742. .change_queue_type = pmcraid_change_queue_type,
  3743. .can_queue = PMCRAID_MAX_IO_CMD,
  3744. .this_id = -1,
  3745. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3746. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3747. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3748. .use_clustering = ENABLE_CLUSTERING,
  3749. .shost_attrs = pmcraid_host_attrs,
  3750. .proc_name = PMCRAID_DRIVER_NAME
  3751. };
  3752. /*
  3753. * pmcraid_isr_msix - implements MSI-X interrupt handling routine
  3754. * @irq: interrupt vector number
  3755. * @dev_id: pointer hrrq_vector
  3756. *
  3757. * Return Value
  3758. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3759. */
  3760. static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
  3761. {
  3762. struct pmcraid_isr_param *hrrq_vector;
  3763. struct pmcraid_instance *pinstance;
  3764. unsigned long lock_flags;
  3765. u32 intrs_val;
  3766. int hrrq_id;
  3767. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3768. hrrq_id = hrrq_vector->hrrq_id;
  3769. pinstance = hrrq_vector->drv_inst;
  3770. if (!hrrq_id) {
  3771. /* Read the interrupt */
  3772. intrs_val = pmcraid_read_interrupts(pinstance);
  3773. if (intrs_val &&
  3774. ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
  3775. & DOORBELL_INTR_MSIX_CLR) == 0)) {
  3776. /* Any error interrupts including unit_check,
  3777. * initiate IOA reset.In case of unit check indicate
  3778. * to reset_sequence that IOA unit checked and prepare
  3779. * for a dump during reset sequence
  3780. */
  3781. if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
  3782. if (intrs_val & INTRS_IOA_UNIT_CHECK)
  3783. pinstance->ioa_unit_check = 1;
  3784. pmcraid_err("ISR: error interrupts: %x \
  3785. initiating reset\n", intrs_val);
  3786. spin_lock_irqsave(pinstance->host->host_lock,
  3787. lock_flags);
  3788. pmcraid_initiate_reset(pinstance);
  3789. spin_unlock_irqrestore(
  3790. pinstance->host->host_lock,
  3791. lock_flags);
  3792. }
  3793. /* If interrupt was as part of the ioa initialization,
  3794. * clear it. Delete the timer and wakeup the
  3795. * reset engine to proceed with reset sequence
  3796. */
  3797. if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
  3798. pmcraid_clr_trans_op(pinstance);
  3799. /* Clear the interrupt register by writing
  3800. * to host to ioa doorbell. Once done
  3801. * FW will clear the interrupt.
  3802. */
  3803. iowrite32(DOORBELL_INTR_MSIX_CLR,
  3804. pinstance->int_regs.host_ioa_interrupt_reg);
  3805. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3806. }
  3807. }
  3808. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3809. return IRQ_HANDLED;
  3810. }
  3811. /**
  3812. * pmcraid_isr - implements legacy interrupt handling routine
  3813. *
  3814. * @irq: interrupt vector number
  3815. * @dev_id: pointer hrrq_vector
  3816. *
  3817. * Return Value
  3818. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3819. */
  3820. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3821. {
  3822. struct pmcraid_isr_param *hrrq_vector;
  3823. struct pmcraid_instance *pinstance;
  3824. u32 intrs;
  3825. unsigned long lock_flags;
  3826. int hrrq_id = 0;
  3827. /* In case of legacy interrupt mode where interrupts are shared across
  3828. * isrs, it may be possible that the current interrupt is not from IOA
  3829. */
  3830. if (!dev_id) {
  3831. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3832. return IRQ_NONE;
  3833. }
  3834. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3835. pinstance = hrrq_vector->drv_inst;
  3836. intrs = pmcraid_read_interrupts(pinstance);
  3837. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
  3838. return IRQ_NONE;
  3839. /* Any error interrupts including unit_check, initiate IOA reset.
  3840. * In case of unit check indicate to reset_sequence that IOA unit
  3841. * checked and prepare for a dump during reset sequence
  3842. */
  3843. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3844. if (intrs & INTRS_IOA_UNIT_CHECK)
  3845. pinstance->ioa_unit_check = 1;
  3846. iowrite32(intrs,
  3847. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3848. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3849. intrs);
  3850. intrs = ioread32(
  3851. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3852. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3853. pmcraid_initiate_reset(pinstance);
  3854. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3855. } else {
  3856. /* If interrupt was as part of the ioa initialization,
  3857. * clear. Delete the timer and wakeup the
  3858. * reset engine to proceed with reset sequence
  3859. */
  3860. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3861. pmcraid_clr_trans_op(pinstance);
  3862. } else {
  3863. iowrite32(intrs,
  3864. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3865. ioread32(
  3866. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3867. tasklet_schedule(
  3868. &(pinstance->isr_tasklet[hrrq_id]));
  3869. }
  3870. }
  3871. return IRQ_HANDLED;
  3872. }
  3873. /**
  3874. * pmcraid_worker_function - worker thread function
  3875. *
  3876. * @workp: pointer to struct work queue
  3877. *
  3878. * Return Value
  3879. * None
  3880. */
  3881. static void pmcraid_worker_function(struct work_struct *workp)
  3882. {
  3883. struct pmcraid_instance *pinstance;
  3884. struct pmcraid_resource_entry *res;
  3885. struct pmcraid_resource_entry *temp;
  3886. struct scsi_device *sdev;
  3887. unsigned long lock_flags;
  3888. unsigned long host_lock_flags;
  3889. u16 fw_version;
  3890. u8 bus, target, lun;
  3891. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3892. /* add resources only after host is added into system */
  3893. if (!atomic_read(&pinstance->expose_resources))
  3894. return;
  3895. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  3896. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3897. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3898. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3899. sdev = res->scsi_dev;
  3900. /* host_lock must be held before calling
  3901. * scsi_device_get
  3902. */
  3903. spin_lock_irqsave(pinstance->host->host_lock,
  3904. host_lock_flags);
  3905. if (!scsi_device_get(sdev)) {
  3906. spin_unlock_irqrestore(
  3907. pinstance->host->host_lock,
  3908. host_lock_flags);
  3909. pmcraid_info("deleting %x from midlayer\n",
  3910. res->cfg_entry.resource_address);
  3911. list_move_tail(&res->queue,
  3912. &pinstance->free_res_q);
  3913. spin_unlock_irqrestore(
  3914. &pinstance->resource_lock,
  3915. lock_flags);
  3916. scsi_remove_device(sdev);
  3917. scsi_device_put(sdev);
  3918. spin_lock_irqsave(&pinstance->resource_lock,
  3919. lock_flags);
  3920. res->change_detected = 0;
  3921. } else {
  3922. spin_unlock_irqrestore(
  3923. pinstance->host->host_lock,
  3924. host_lock_flags);
  3925. }
  3926. }
  3927. }
  3928. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3929. if (res->change_detected == RES_CHANGE_ADD) {
  3930. if (!pmcraid_expose_resource(fw_version,
  3931. &res->cfg_entry))
  3932. continue;
  3933. if (RES_IS_VSET(res->cfg_entry)) {
  3934. bus = PMCRAID_VSET_BUS_ID;
  3935. if (fw_version <= PMCRAID_FW_VERSION_1)
  3936. target = res->cfg_entry.unique_flags1;
  3937. else
  3938. target = res->cfg_entry.array_id & 0xFF;
  3939. lun = PMCRAID_VSET_LUN_ID;
  3940. } else {
  3941. bus = PMCRAID_PHYS_BUS_ID;
  3942. target =
  3943. RES_TARGET(
  3944. res->cfg_entry.resource_address);
  3945. lun = RES_LUN(res->cfg_entry.resource_address);
  3946. }
  3947. res->change_detected = 0;
  3948. spin_unlock_irqrestore(&pinstance->resource_lock,
  3949. lock_flags);
  3950. scsi_add_device(pinstance->host, bus, target, lun);
  3951. spin_lock_irqsave(&pinstance->resource_lock,
  3952. lock_flags);
  3953. }
  3954. }
  3955. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3956. }
  3957. /**
  3958. * pmcraid_tasklet_function - Tasklet function
  3959. *
  3960. * @instance: pointer to msix param structure
  3961. *
  3962. * Return Value
  3963. * None
  3964. */
  3965. static void pmcraid_tasklet_function(unsigned long instance)
  3966. {
  3967. struct pmcraid_isr_param *hrrq_vector;
  3968. struct pmcraid_instance *pinstance;
  3969. unsigned long hrrq_lock_flags;
  3970. unsigned long pending_lock_flags;
  3971. unsigned long host_lock_flags;
  3972. spinlock_t *lockp; /* hrrq buffer lock */
  3973. int id;
  3974. __le32 resp;
  3975. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3976. pinstance = hrrq_vector->drv_inst;
  3977. id = hrrq_vector->hrrq_id;
  3978. lockp = &(pinstance->hrrq_lock[id]);
  3979. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3980. * protected by its own lock. Traversals must be done within this lock
  3981. * as there may be multiple tasklets running on multiple CPUs. Note
  3982. * that the lock is held just for picking up the response handle and
  3983. * manipulating hrrq_curr/toggle_bit values.
  3984. */
  3985. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3986. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3987. while ((resp & HRRQ_TOGGLE_BIT) ==
  3988. pinstance->host_toggle_bit[id]) {
  3989. int cmd_index = resp >> 2;
  3990. struct pmcraid_cmd *cmd = NULL;
  3991. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3992. pinstance->hrrq_curr[id]++;
  3993. } else {
  3994. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3995. pinstance->host_toggle_bit[id] ^= 1u;
  3996. }
  3997. if (cmd_index >= PMCRAID_MAX_CMD) {
  3998. /* In case of invalid response handle, log message */
  3999. pmcraid_err("Invalid response handle %d\n", cmd_index);
  4000. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  4001. continue;
  4002. }
  4003. cmd = pinstance->cmd_list[cmd_index];
  4004. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  4005. spin_lock_irqsave(&pinstance->pending_pool_lock,
  4006. pending_lock_flags);
  4007. list_del(&cmd->free_list);
  4008. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  4009. pending_lock_flags);
  4010. del_timer(&cmd->timer);
  4011. atomic_dec(&pinstance->outstanding_cmds);
  4012. if (cmd->cmd_done == pmcraid_ioa_reset) {
  4013. spin_lock_irqsave(pinstance->host->host_lock,
  4014. host_lock_flags);
  4015. cmd->cmd_done(cmd);
  4016. spin_unlock_irqrestore(pinstance->host->host_lock,
  4017. host_lock_flags);
  4018. } else if (cmd->cmd_done != NULL) {
  4019. cmd->cmd_done(cmd);
  4020. }
  4021. /* loop over until we are done with all responses */
  4022. spin_lock_irqsave(lockp, hrrq_lock_flags);
  4023. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  4024. }
  4025. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  4026. }
  4027. /**
  4028. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  4029. * @pinstance: pointer to adapter instance structure
  4030. *
  4031. * This routine un-registers registered interrupt handler and
  4032. * also frees irqs/vectors.
  4033. *
  4034. * Retun Value
  4035. * None
  4036. */
  4037. static
  4038. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  4039. {
  4040. int i;
  4041. for (i = 0; i < pinstance->num_hrrq; i++)
  4042. free_irq(pinstance->hrrq_vector[i].vector,
  4043. &(pinstance->hrrq_vector[i]));
  4044. if (pinstance->interrupt_mode) {
  4045. pci_disable_msix(pinstance->pdev);
  4046. pinstance->interrupt_mode = 0;
  4047. }
  4048. }
  4049. /**
  4050. * pmcraid_register_interrupt_handler - registers interrupt handler
  4051. * @pinstance: pointer to per-adapter instance structure
  4052. *
  4053. * Return Value
  4054. * 0 on success, non-zero error code otherwise.
  4055. */
  4056. static int
  4057. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  4058. {
  4059. int rc;
  4060. struct pci_dev *pdev = pinstance->pdev;
  4061. if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
  4062. int num_hrrq = PMCRAID_NUM_MSIX_VECTORS;
  4063. struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS];
  4064. int i;
  4065. for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++)
  4066. entries[i].entry = i;
  4067. rc = pci_enable_msix(pdev, entries, num_hrrq);
  4068. if (rc < 0)
  4069. goto pmcraid_isr_legacy;
  4070. /* Check how many MSIX vectors are allocated and register
  4071. * msi-x handlers for each of them giving appropriate buffer
  4072. */
  4073. if (rc > 0) {
  4074. num_hrrq = rc;
  4075. if (pci_enable_msix(pdev, entries, num_hrrq))
  4076. goto pmcraid_isr_legacy;
  4077. }
  4078. for (i = 0; i < num_hrrq; i++) {
  4079. pinstance->hrrq_vector[i].hrrq_id = i;
  4080. pinstance->hrrq_vector[i].drv_inst = pinstance;
  4081. pinstance->hrrq_vector[i].vector = entries[i].vector;
  4082. rc = request_irq(pinstance->hrrq_vector[i].vector,
  4083. pmcraid_isr_msix, 0,
  4084. PMCRAID_DRIVER_NAME,
  4085. &(pinstance->hrrq_vector[i]));
  4086. if (rc) {
  4087. int j;
  4088. for (j = 0; j < i; j++)
  4089. free_irq(entries[j].vector,
  4090. &(pinstance->hrrq_vector[j]));
  4091. pci_disable_msix(pdev);
  4092. goto pmcraid_isr_legacy;
  4093. }
  4094. }
  4095. pinstance->num_hrrq = num_hrrq;
  4096. pinstance->interrupt_mode = 1;
  4097. iowrite32(DOORBELL_INTR_MODE_MSIX,
  4098. pinstance->int_regs.host_ioa_interrupt_reg);
  4099. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  4100. goto pmcraid_isr_out;
  4101. }
  4102. pmcraid_isr_legacy:
  4103. /* If MSI-X registration failed fallback to legacy mode, where
  4104. * only one hrrq entry will be used
  4105. */
  4106. pinstance->hrrq_vector[0].hrrq_id = 0;
  4107. pinstance->hrrq_vector[0].drv_inst = pinstance;
  4108. pinstance->hrrq_vector[0].vector = pdev->irq;
  4109. pinstance->num_hrrq = 1;
  4110. rc = 0;
  4111. rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
  4112. PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
  4113. pmcraid_isr_out:
  4114. return rc;
  4115. }
  4116. /**
  4117. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  4118. * @pinstance: per adapter instance structure pointer
  4119. * @max_index: number of buffer blocks to release
  4120. *
  4121. * Return Value
  4122. * None
  4123. */
  4124. static void
  4125. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  4126. {
  4127. int i;
  4128. for (i = 0; i < max_index; i++) {
  4129. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  4130. pinstance->cmd_list[i] = NULL;
  4131. }
  4132. kmem_cache_destroy(pinstance->cmd_cachep);
  4133. pinstance->cmd_cachep = NULL;
  4134. }
  4135. /**
  4136. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  4137. * @pinstance: pointer to per adapter instance structure
  4138. * @max_index: number of buffers (from 0 onwards) to release
  4139. *
  4140. * This function assumes that the command blocks for which control blocks are
  4141. * linked are not released.
  4142. *
  4143. * Return Value
  4144. * None
  4145. */
  4146. static void
  4147. pmcraid_release_control_blocks(
  4148. struct pmcraid_instance *pinstance,
  4149. int max_index
  4150. )
  4151. {
  4152. int i;
  4153. if (pinstance->control_pool == NULL)
  4154. return;
  4155. for (i = 0; i < max_index; i++) {
  4156. pci_pool_free(pinstance->control_pool,
  4157. pinstance->cmd_list[i]->ioa_cb,
  4158. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  4159. pinstance->cmd_list[i]->ioa_cb = NULL;
  4160. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  4161. }
  4162. pci_pool_destroy(pinstance->control_pool);
  4163. pinstance->control_pool = NULL;
  4164. }
  4165. /**
  4166. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  4167. * @pinstance - pointer to per adapter instance structure
  4168. *
  4169. * Allocates memory for command blocks using kernel slab allocator.
  4170. *
  4171. * Return Value
  4172. * 0 in case of success; -ENOMEM in case of failure
  4173. */
  4174. static int __devinit
  4175. pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  4176. {
  4177. int i;
  4178. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  4179. pinstance->host->unique_id);
  4180. pinstance->cmd_cachep = kmem_cache_create(
  4181. pinstance->cmd_pool_name,
  4182. sizeof(struct pmcraid_cmd), 0,
  4183. SLAB_HWCACHE_ALIGN, NULL);
  4184. if (!pinstance->cmd_cachep)
  4185. return -ENOMEM;
  4186. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4187. pinstance->cmd_list[i] =
  4188. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  4189. if (!pinstance->cmd_list[i]) {
  4190. pmcraid_release_cmd_blocks(pinstance, i);
  4191. return -ENOMEM;
  4192. }
  4193. }
  4194. return 0;
  4195. }
  4196. /**
  4197. * pmcraid_allocate_control_blocks - allocates memory control blocks
  4198. * @pinstance : pointer to per adapter instance structure
  4199. *
  4200. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  4201. * and IOASAs. This is called after command blocks are already allocated.
  4202. *
  4203. * Return Value
  4204. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  4205. */
  4206. static int __devinit
  4207. pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  4208. {
  4209. int i;
  4210. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  4211. pinstance->host->unique_id);
  4212. pinstance->control_pool =
  4213. pci_pool_create(pinstance->ctl_pool_name,
  4214. pinstance->pdev,
  4215. sizeof(struct pmcraid_control_block),
  4216. PMCRAID_IOARCB_ALIGNMENT, 0);
  4217. if (!pinstance->control_pool)
  4218. return -ENOMEM;
  4219. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4220. pinstance->cmd_list[i]->ioa_cb =
  4221. pci_pool_alloc(
  4222. pinstance->control_pool,
  4223. GFP_KERNEL,
  4224. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  4225. if (!pinstance->cmd_list[i]->ioa_cb) {
  4226. pmcraid_release_control_blocks(pinstance, i);
  4227. return -ENOMEM;
  4228. }
  4229. memset(pinstance->cmd_list[i]->ioa_cb, 0,
  4230. sizeof(struct pmcraid_control_block));
  4231. }
  4232. return 0;
  4233. }
  4234. /**
  4235. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  4236. * @pinstance: pointer to per adapter instance structure
  4237. * @maxindex: size of hrrq buffer pointer array
  4238. *
  4239. * Return Value
  4240. * None
  4241. */
  4242. static void
  4243. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  4244. {
  4245. int i;
  4246. for (i = 0; i < maxindex; i++) {
  4247. pci_free_consistent(pinstance->pdev,
  4248. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  4249. pinstance->hrrq_start[i],
  4250. pinstance->hrrq_start_bus_addr[i]);
  4251. /* reset pointers and toggle bit to zeros */
  4252. pinstance->hrrq_start[i] = NULL;
  4253. pinstance->hrrq_start_bus_addr[i] = 0;
  4254. pinstance->host_toggle_bit[i] = 0;
  4255. }
  4256. }
  4257. /**
  4258. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  4259. * @pinstance: pointer to per adapter instance structure
  4260. *
  4261. * Return value
  4262. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  4263. */
  4264. static int __devinit
  4265. pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  4266. {
  4267. int i, buffer_size;
  4268. buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4269. for (i = 0; i < pinstance->num_hrrq; i++) {
  4270. pinstance->hrrq_start[i] =
  4271. pci_alloc_consistent(
  4272. pinstance->pdev,
  4273. buffer_size,
  4274. &(pinstance->hrrq_start_bus_addr[i]));
  4275. if (pinstance->hrrq_start[i] == 0) {
  4276. pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
  4277. i);
  4278. pmcraid_release_host_rrqs(pinstance, i);
  4279. return -ENOMEM;
  4280. }
  4281. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4282. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4283. pinstance->hrrq_end[i] =
  4284. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4285. pinstance->host_toggle_bit[i] = 1;
  4286. spin_lock_init(&pinstance->hrrq_lock[i]);
  4287. }
  4288. return 0;
  4289. }
  4290. /**
  4291. * pmcraid_release_hcams - release HCAM buffers
  4292. *
  4293. * @pinstance: pointer to per adapter instance structure
  4294. *
  4295. * Return value
  4296. * none
  4297. */
  4298. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  4299. {
  4300. if (pinstance->ccn.msg != NULL) {
  4301. pci_free_consistent(pinstance->pdev,
  4302. PMCRAID_AEN_HDR_SIZE +
  4303. sizeof(struct pmcraid_hcam_ccn_ext),
  4304. pinstance->ccn.msg,
  4305. pinstance->ccn.baddr);
  4306. pinstance->ccn.msg = NULL;
  4307. pinstance->ccn.hcam = NULL;
  4308. pinstance->ccn.baddr = 0;
  4309. }
  4310. if (pinstance->ldn.msg != NULL) {
  4311. pci_free_consistent(pinstance->pdev,
  4312. PMCRAID_AEN_HDR_SIZE +
  4313. sizeof(struct pmcraid_hcam_ldn),
  4314. pinstance->ldn.msg,
  4315. pinstance->ldn.baddr);
  4316. pinstance->ldn.msg = NULL;
  4317. pinstance->ldn.hcam = NULL;
  4318. pinstance->ldn.baddr = 0;
  4319. }
  4320. }
  4321. /**
  4322. * pmcraid_allocate_hcams - allocates HCAM buffers
  4323. * @pinstance : pointer to per adapter instance structure
  4324. *
  4325. * Return Value:
  4326. * 0 in case of successful allocation, non-zero otherwise
  4327. */
  4328. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  4329. {
  4330. pinstance->ccn.msg = pci_alloc_consistent(
  4331. pinstance->pdev,
  4332. PMCRAID_AEN_HDR_SIZE +
  4333. sizeof(struct pmcraid_hcam_ccn_ext),
  4334. &(pinstance->ccn.baddr));
  4335. pinstance->ldn.msg = pci_alloc_consistent(
  4336. pinstance->pdev,
  4337. PMCRAID_AEN_HDR_SIZE +
  4338. sizeof(struct pmcraid_hcam_ldn),
  4339. &(pinstance->ldn.baddr));
  4340. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  4341. pmcraid_release_hcams(pinstance);
  4342. } else {
  4343. pinstance->ccn.hcam =
  4344. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  4345. pinstance->ldn.hcam =
  4346. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  4347. atomic_set(&pinstance->ccn.ignore, 0);
  4348. atomic_set(&pinstance->ldn.ignore, 0);
  4349. }
  4350. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  4351. }
  4352. /**
  4353. * pmcraid_release_config_buffers - release config.table buffers
  4354. * @pinstance: pointer to per adapter instance structure
  4355. *
  4356. * Return Value
  4357. * none
  4358. */
  4359. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  4360. {
  4361. if (pinstance->cfg_table != NULL &&
  4362. pinstance->cfg_table_bus_addr != 0) {
  4363. pci_free_consistent(pinstance->pdev,
  4364. sizeof(struct pmcraid_config_table),
  4365. pinstance->cfg_table,
  4366. pinstance->cfg_table_bus_addr);
  4367. pinstance->cfg_table = NULL;
  4368. pinstance->cfg_table_bus_addr = 0;
  4369. }
  4370. if (pinstance->res_entries != NULL) {
  4371. int i;
  4372. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4373. list_del(&pinstance->res_entries[i].queue);
  4374. kfree(pinstance->res_entries);
  4375. pinstance->res_entries = NULL;
  4376. }
  4377. pmcraid_release_hcams(pinstance);
  4378. }
  4379. /**
  4380. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  4381. * @pinstance : pointer to per adapter instance structure
  4382. *
  4383. * Return Value
  4384. * 0 for successful allocation, -ENOMEM for any failure
  4385. */
  4386. static int __devinit
  4387. pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  4388. {
  4389. int i;
  4390. pinstance->res_entries =
  4391. kzalloc(sizeof(struct pmcraid_resource_entry) *
  4392. PMCRAID_MAX_RESOURCES, GFP_KERNEL);
  4393. if (NULL == pinstance->res_entries) {
  4394. pmcraid_err("failed to allocate memory for resource table\n");
  4395. return -ENOMEM;
  4396. }
  4397. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4398. list_add_tail(&pinstance->res_entries[i].queue,
  4399. &pinstance->free_res_q);
  4400. pinstance->cfg_table =
  4401. pci_alloc_consistent(pinstance->pdev,
  4402. sizeof(struct pmcraid_config_table),
  4403. &pinstance->cfg_table_bus_addr);
  4404. if (NULL == pinstance->cfg_table) {
  4405. pmcraid_err("couldn't alloc DMA memory for config table\n");
  4406. pmcraid_release_config_buffers(pinstance);
  4407. return -ENOMEM;
  4408. }
  4409. if (pmcraid_allocate_hcams(pinstance)) {
  4410. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  4411. pmcraid_release_config_buffers(pinstance);
  4412. return -ENOMEM;
  4413. }
  4414. return 0;
  4415. }
  4416. /**
  4417. * pmcraid_init_tasklets - registers tasklets for response handling
  4418. *
  4419. * @pinstance: pointer adapter instance structure
  4420. *
  4421. * Return value
  4422. * none
  4423. */
  4424. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  4425. {
  4426. int i;
  4427. for (i = 0; i < pinstance->num_hrrq; i++)
  4428. tasklet_init(&pinstance->isr_tasklet[i],
  4429. pmcraid_tasklet_function,
  4430. (unsigned long)&pinstance->hrrq_vector[i]);
  4431. }
  4432. /**
  4433. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  4434. *
  4435. * @pinstance: pointer to adapter instance structure
  4436. *
  4437. * Return value
  4438. * none
  4439. */
  4440. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  4441. {
  4442. int i;
  4443. for (i = 0; i < pinstance->num_hrrq; i++)
  4444. tasklet_kill(&pinstance->isr_tasklet[i]);
  4445. }
  4446. /**
  4447. * pmcraid_release_buffers - release per-adapter buffers allocated
  4448. *
  4449. * @pinstance: pointer to adapter soft state
  4450. *
  4451. * Return Value
  4452. * none
  4453. */
  4454. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  4455. {
  4456. pmcraid_release_config_buffers(pinstance);
  4457. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  4458. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4459. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4460. if (pinstance->inq_data != NULL) {
  4461. pci_free_consistent(pinstance->pdev,
  4462. sizeof(struct pmcraid_inquiry_data),
  4463. pinstance->inq_data,
  4464. pinstance->inq_data_baddr);
  4465. pinstance->inq_data = NULL;
  4466. pinstance->inq_data_baddr = 0;
  4467. }
  4468. }
  4469. /**
  4470. * pmcraid_init_buffers - allocates memory and initializes various structures
  4471. * @pinstance: pointer to per adapter instance structure
  4472. *
  4473. * This routine pre-allocates memory based on the type of block as below:
  4474. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  4475. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  4476. * config-table entries : DMAable memory using pci_alloc_consistent
  4477. * HostRRQs : DMAable memory, using pci_alloc_consistent
  4478. *
  4479. * Return Value
  4480. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  4481. */
  4482. static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  4483. {
  4484. int i;
  4485. if (pmcraid_allocate_host_rrqs(pinstance)) {
  4486. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  4487. pinstance->num_hrrq);
  4488. return -ENOMEM;
  4489. }
  4490. if (pmcraid_allocate_config_buffers(pinstance)) {
  4491. pmcraid_err("couldn't allocate memory for config buffers\n");
  4492. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4493. return -ENOMEM;
  4494. }
  4495. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  4496. pmcraid_err("couldn't allocate memory for cmd blocks\n");
  4497. pmcraid_release_config_buffers(pinstance);
  4498. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4499. return -ENOMEM;
  4500. }
  4501. if (pmcraid_allocate_control_blocks(pinstance)) {
  4502. pmcraid_err("couldn't allocate memory control blocks\n");
  4503. pmcraid_release_config_buffers(pinstance);
  4504. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4505. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4506. return -ENOMEM;
  4507. }
  4508. /* allocate DMAable memory for page D0 INQUIRY buffer */
  4509. pinstance->inq_data = pci_alloc_consistent(
  4510. pinstance->pdev,
  4511. sizeof(struct pmcraid_inquiry_data),
  4512. &pinstance->inq_data_baddr);
  4513. if (pinstance->inq_data == NULL) {
  4514. pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
  4515. pmcraid_release_buffers(pinstance);
  4516. return -ENOMEM;
  4517. }
  4518. /* Initialize all the command blocks and add them to free pool. No
  4519. * need to lock (free_pool_lock) as this is done in initialization
  4520. * itself
  4521. */
  4522. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4523. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  4524. pmcraid_init_cmdblk(cmdp, i);
  4525. cmdp->drv_inst = pinstance;
  4526. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  4527. }
  4528. return 0;
  4529. }
  4530. /**
  4531. * pmcraid_reinit_buffers - resets various buffer pointers
  4532. * @pinstance: pointer to adapter instance
  4533. * Return value
  4534. * none
  4535. */
  4536. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  4537. {
  4538. int i;
  4539. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4540. for (i = 0; i < pinstance->num_hrrq; i++) {
  4541. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4542. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4543. pinstance->hrrq_end[i] =
  4544. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4545. pinstance->host_toggle_bit[i] = 1;
  4546. }
  4547. }
  4548. /**
  4549. * pmcraid_init_instance - initialize per instance data structure
  4550. * @pdev: pointer to pci device structure
  4551. * @host: pointer to Scsi_Host structure
  4552. * @mapped_pci_addr: memory mapped IOA configuration registers
  4553. *
  4554. * Return Value
  4555. * 0 on success, non-zero in case of any failure
  4556. */
  4557. static int __devinit pmcraid_init_instance(
  4558. struct pci_dev *pdev,
  4559. struct Scsi_Host *host,
  4560. void __iomem *mapped_pci_addr
  4561. )
  4562. {
  4563. struct pmcraid_instance *pinstance =
  4564. (struct pmcraid_instance *)host->hostdata;
  4565. pinstance->host = host;
  4566. pinstance->pdev = pdev;
  4567. /* Initialize register addresses */
  4568. pinstance->mapped_dma_addr = mapped_pci_addr;
  4569. /* Initialize chip-specific details */
  4570. {
  4571. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4572. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4573. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4574. pint_regs->ioa_host_interrupt_reg =
  4575. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4576. pint_regs->ioa_host_interrupt_clr_reg =
  4577. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4578. pint_regs->ioa_host_msix_interrupt_reg =
  4579. mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
  4580. pint_regs->host_ioa_interrupt_reg =
  4581. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4582. pint_regs->host_ioa_interrupt_clr_reg =
  4583. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4584. /* Current version of firmware exposes interrupt mask set
  4585. * and mask clr registers through memory mapped bar0.
  4586. */
  4587. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4588. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4589. pint_regs->ioa_host_interrupt_mask_reg =
  4590. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4591. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4592. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4593. pint_regs->global_interrupt_mask_reg =
  4594. mapped_pci_addr + chip_cfg->global_intr_mask;
  4595. };
  4596. pinstance->ioa_reset_attempts = 0;
  4597. init_waitqueue_head(&pinstance->reset_wait_q);
  4598. atomic_set(&pinstance->outstanding_cmds, 0);
  4599. atomic_set(&pinstance->last_message_id, 0);
  4600. atomic_set(&pinstance->expose_resources, 0);
  4601. INIT_LIST_HEAD(&pinstance->free_res_q);
  4602. INIT_LIST_HEAD(&pinstance->used_res_q);
  4603. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4604. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4605. spin_lock_init(&pinstance->free_pool_lock);
  4606. spin_lock_init(&pinstance->pending_pool_lock);
  4607. spin_lock_init(&pinstance->resource_lock);
  4608. mutex_init(&pinstance->aen_queue_lock);
  4609. /* Work-queue (Shared) for deferred processing error handling */
  4610. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4611. /* Initialize the default log_level */
  4612. pinstance->current_log_level = pmcraid_log_level;
  4613. /* Setup variables required for reset engine */
  4614. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4615. pinstance->reset_cmd = NULL;
  4616. return 0;
  4617. }
  4618. /**
  4619. * pmcraid_shutdown - shutdown adapter controller.
  4620. * @pdev: pci device struct
  4621. *
  4622. * Issues an adapter shutdown to the card waits for its completion
  4623. *
  4624. * Return value
  4625. * none
  4626. */
  4627. static void pmcraid_shutdown(struct pci_dev *pdev)
  4628. {
  4629. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4630. pmcraid_reset_bringdown(pinstance);
  4631. }
  4632. /**
  4633. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4634. */
  4635. static unsigned short pmcraid_get_minor(void)
  4636. {
  4637. int minor;
  4638. minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
  4639. __set_bit(minor, pmcraid_minor);
  4640. return minor;
  4641. }
  4642. /**
  4643. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4644. */
  4645. static void pmcraid_release_minor(unsigned short minor)
  4646. {
  4647. __clear_bit(minor, pmcraid_minor);
  4648. }
  4649. /**
  4650. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4651. *
  4652. * @pinstance: pointer to adapter instance for which to register device
  4653. *
  4654. * Return value
  4655. * 0 in case of success, otherwise non-zero
  4656. */
  4657. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4658. {
  4659. int minor;
  4660. int error;
  4661. minor = pmcraid_get_minor();
  4662. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4663. pinstance->cdev.owner = THIS_MODULE;
  4664. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4665. if (error)
  4666. pmcraid_release_minor(minor);
  4667. else
  4668. device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4669. NULL, "%s%u", PMCRAID_DEVFILE, minor);
  4670. return error;
  4671. }
  4672. /**
  4673. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4674. *
  4675. * @pinstance: pointer to adapter instance structure
  4676. *
  4677. * Return value
  4678. * none
  4679. */
  4680. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4681. {
  4682. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4683. device_destroy(pmcraid_class,
  4684. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4685. cdev_del(&pinstance->cdev);
  4686. }
  4687. /**
  4688. * pmcraid_remove - IOA hot plug remove entry point
  4689. * @pdev: pci device struct
  4690. *
  4691. * Return value
  4692. * none
  4693. */
  4694. static void __devexit pmcraid_remove(struct pci_dev *pdev)
  4695. {
  4696. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4697. /* remove the management interface (/dev file) for this device */
  4698. pmcraid_release_chrdev(pinstance);
  4699. /* remove host template from scsi midlayer */
  4700. scsi_remove_host(pinstance->host);
  4701. /* block requests from mid-layer */
  4702. scsi_block_requests(pinstance->host);
  4703. /* initiate shutdown adapter */
  4704. pmcraid_shutdown(pdev);
  4705. pmcraid_disable_interrupts(pinstance, ~0);
  4706. flush_scheduled_work();
  4707. pmcraid_kill_tasklets(pinstance);
  4708. pmcraid_unregister_interrupt_handler(pinstance);
  4709. pmcraid_release_buffers(pinstance);
  4710. iounmap(pinstance->mapped_dma_addr);
  4711. pci_release_regions(pdev);
  4712. scsi_host_put(pinstance->host);
  4713. pci_disable_device(pdev);
  4714. return;
  4715. }
  4716. #ifdef CONFIG_PM
  4717. /**
  4718. * pmcraid_suspend - driver suspend entry point for power management
  4719. * @pdev: PCI device structure
  4720. * @state: PCI power state to suspend routine
  4721. *
  4722. * Return Value - 0 always
  4723. */
  4724. static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
  4725. {
  4726. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4727. pmcraid_shutdown(pdev);
  4728. pmcraid_disable_interrupts(pinstance, ~0);
  4729. pmcraid_kill_tasklets(pinstance);
  4730. pci_set_drvdata(pinstance->pdev, pinstance);
  4731. pmcraid_unregister_interrupt_handler(pinstance);
  4732. pci_save_state(pdev);
  4733. pci_disable_device(pdev);
  4734. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4735. return 0;
  4736. }
  4737. /**
  4738. * pmcraid_resume - driver resume entry point PCI power management
  4739. * @pdev: PCI device structure
  4740. *
  4741. * Return Value - 0 in case of success. Error code in case of any failure
  4742. */
  4743. static int pmcraid_resume(struct pci_dev *pdev)
  4744. {
  4745. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4746. struct Scsi_Host *host = pinstance->host;
  4747. int rc;
  4748. pci_set_power_state(pdev, PCI_D0);
  4749. pci_enable_wake(pdev, PCI_D0, 0);
  4750. pci_restore_state(pdev);
  4751. rc = pci_enable_device(pdev);
  4752. if (rc) {
  4753. dev_err(&pdev->dev, "resume: Enable device failed\n");
  4754. return rc;
  4755. }
  4756. pci_set_master(pdev);
  4757. if ((sizeof(dma_addr_t) == 4) ||
  4758. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4759. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4760. if (rc == 0)
  4761. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4762. if (rc != 0) {
  4763. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4764. goto disable_device;
  4765. }
  4766. pmcraid_disable_interrupts(pinstance, ~0);
  4767. atomic_set(&pinstance->outstanding_cmds, 0);
  4768. rc = pmcraid_register_interrupt_handler(pinstance);
  4769. if (rc) {
  4770. dev_err(&pdev->dev,
  4771. "resume: couldn't register interrupt handlers\n");
  4772. rc = -ENODEV;
  4773. goto release_host;
  4774. }
  4775. pmcraid_init_tasklets(pinstance);
  4776. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4777. /* Start with hard reset sequence which brings up IOA to operational
  4778. * state as well as completes the reset sequence.
  4779. */
  4780. pinstance->ioa_hard_reset = 1;
  4781. /* Start IOA firmware initialization and bring card to Operational
  4782. * state.
  4783. */
  4784. if (pmcraid_reset_bringup(pinstance)) {
  4785. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4786. rc = -ENODEV;
  4787. goto release_tasklets;
  4788. }
  4789. return 0;
  4790. release_tasklets:
  4791. pmcraid_disable_interrupts(pinstance, ~0);
  4792. pmcraid_kill_tasklets(pinstance);
  4793. pmcraid_unregister_interrupt_handler(pinstance);
  4794. release_host:
  4795. scsi_host_put(host);
  4796. disable_device:
  4797. pci_disable_device(pdev);
  4798. return rc;
  4799. }
  4800. #else
  4801. #define pmcraid_suspend NULL
  4802. #define pmcraid_resume NULL
  4803. #endif /* CONFIG_PM */
  4804. /**
  4805. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4806. * completion of the ioa reset
  4807. * @cmd: pointer to reset command block
  4808. */
  4809. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4810. {
  4811. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4812. unsigned long flags;
  4813. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4814. pmcraid_ioa_reset(cmd);
  4815. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4816. scsi_unblock_requests(pinstance->host);
  4817. schedule_work(&pinstance->worker_q);
  4818. }
  4819. /**
  4820. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4821. *
  4822. * @cmd: pointer to pmcraid_cmd structure
  4823. *
  4824. * Return Value
  4825. * 0 for success or non-zero for failure cases
  4826. */
  4827. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4828. {
  4829. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4830. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4831. pmcraid_reinit_cmdblk(cmd);
  4832. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4833. ioarcb->request_type = REQ_TYPE_IOACMD;
  4834. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4835. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4836. /* If this was called as part of resource table reinitialization due to
  4837. * lost CCN, it is enough to return the command block back to free pool
  4838. * as part of set_supported_devs completion function.
  4839. */
  4840. if (cmd->drv_inst->reinit_cfg_table) {
  4841. cmd->drv_inst->reinit_cfg_table = 0;
  4842. cmd->release = 1;
  4843. cmd_done = pmcraid_reinit_cfgtable_done;
  4844. }
  4845. /* we will be done with the reset sequence after set supported devices,
  4846. * setup the done function to return the command block back to free
  4847. * pool
  4848. */
  4849. pmcraid_send_cmd(cmd,
  4850. cmd_done,
  4851. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4852. pmcraid_timeout_handler);
  4853. return;
  4854. }
  4855. /**
  4856. * pmcraid_init_res_table - Initialize the resource table
  4857. * @cmd: pointer to pmcraid command struct
  4858. *
  4859. * This function looks through the existing resource table, comparing
  4860. * it with the config table. This function will take care of old/new
  4861. * devices and schedule adding/removing them from the mid-layer
  4862. * as appropriate.
  4863. *
  4864. * Return value
  4865. * None
  4866. */
  4867. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4868. {
  4869. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4870. struct pmcraid_resource_entry *res, *temp;
  4871. struct pmcraid_config_table_entry *cfgte;
  4872. unsigned long lock_flags;
  4873. int found, rc, i;
  4874. u16 fw_version;
  4875. LIST_HEAD(old_res);
  4876. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4877. pmcraid_err("IOA requires microcode download\n");
  4878. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  4879. /* resource list is protected by pinstance->resource_lock.
  4880. * init_res_table can be called from probe (user-thread) or runtime
  4881. * reset (timer/tasklet)
  4882. */
  4883. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4884. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4885. list_move_tail(&res->queue, &old_res);
  4886. for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
  4887. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4888. PMCRAID_FW_VERSION_1)
  4889. cfgte = &pinstance->cfg_table->entries[i];
  4890. else
  4891. cfgte = (struct pmcraid_config_table_entry *)
  4892. &pinstance->cfg_table->entries_ext[i];
  4893. if (!pmcraid_expose_resource(fw_version, cfgte))
  4894. continue;
  4895. found = 0;
  4896. /* If this entry was already detected and initialized */
  4897. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4898. rc = memcmp(&res->cfg_entry.resource_address,
  4899. &cfgte->resource_address,
  4900. sizeof(cfgte->resource_address));
  4901. if (!rc) {
  4902. list_move_tail(&res->queue,
  4903. &pinstance->used_res_q);
  4904. found = 1;
  4905. break;
  4906. }
  4907. }
  4908. /* If this is new entry, initialize it and add it the queue */
  4909. if (!found) {
  4910. if (list_empty(&pinstance->free_res_q)) {
  4911. pmcraid_err("Too many devices attached\n");
  4912. break;
  4913. }
  4914. found = 1;
  4915. res = list_entry(pinstance->free_res_q.next,
  4916. struct pmcraid_resource_entry, queue);
  4917. res->scsi_dev = NULL;
  4918. res->change_detected = RES_CHANGE_ADD;
  4919. res->reset_progress = 0;
  4920. list_move_tail(&res->queue, &pinstance->used_res_q);
  4921. }
  4922. /* copy new configuration table entry details into driver
  4923. * maintained resource entry
  4924. */
  4925. if (found) {
  4926. memcpy(&res->cfg_entry, cfgte,
  4927. pinstance->config_table_entry_size);
  4928. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4929. res->cfg_entry.resource_type,
  4930. (fw_version <= PMCRAID_FW_VERSION_1 ?
  4931. res->cfg_entry.unique_flags1 :
  4932. res->cfg_entry.array_id & 0xFF),
  4933. le32_to_cpu(res->cfg_entry.resource_address));
  4934. }
  4935. }
  4936. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4937. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4938. if (res->scsi_dev) {
  4939. res->change_detected = RES_CHANGE_DEL;
  4940. res->cfg_entry.resource_handle =
  4941. PMCRAID_INVALID_RES_HANDLE;
  4942. list_move_tail(&res->queue, &pinstance->used_res_q);
  4943. } else {
  4944. list_move_tail(&res->queue, &pinstance->free_res_q);
  4945. }
  4946. }
  4947. /* release the resource list lock */
  4948. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4949. pmcraid_set_supported_devs(cmd);
  4950. }
  4951. /**
  4952. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4953. * @cmd: pointer pmcraid_cmd struct
  4954. *
  4955. * This function sends a Query IOA Configuration command to the adapter to
  4956. * retrieve the IOA configuration table.
  4957. *
  4958. * Return value:
  4959. * none
  4960. */
  4961. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4962. {
  4963. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4964. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4965. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4966. int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4967. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4968. PMCRAID_FW_VERSION_1)
  4969. pinstance->config_table_entry_size =
  4970. sizeof(struct pmcraid_config_table_entry);
  4971. else
  4972. pinstance->config_table_entry_size =
  4973. sizeof(struct pmcraid_config_table_entry_ext);
  4974. ioarcb->request_type = REQ_TYPE_IOACMD;
  4975. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4976. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4977. /* firmware requires 4-byte length field, specified in B.E format */
  4978. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4979. /* Since entire config table can be described by single IOADL, it can
  4980. * be part of IOARCB itself
  4981. */
  4982. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4983. offsetof(struct pmcraid_ioarcb,
  4984. add_data.u.ioadl[0]));
  4985. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4986. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  4987. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4988. ioarcb->data_transfer_length =
  4989. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4990. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4991. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4992. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4993. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4994. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4995. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4996. }
  4997. /**
  4998. * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
  4999. * @pdev: pointer to pci device structure
  5000. * @dev_id: pointer to device ids structure
  5001. *
  5002. * Return Value
  5003. * returns 0 if the device is claimed and successfully configured.
  5004. * returns non-zero error code in case of any failure
  5005. */
  5006. static int __devinit pmcraid_probe(
  5007. struct pci_dev *pdev,
  5008. const struct pci_device_id *dev_id
  5009. )
  5010. {
  5011. struct pmcraid_instance *pinstance;
  5012. struct Scsi_Host *host;
  5013. void __iomem *mapped_pci_addr;
  5014. int rc = PCIBIOS_SUCCESSFUL;
  5015. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  5016. pmcraid_err
  5017. ("maximum number(%d) of supported adapters reached\n",
  5018. atomic_read(&pmcraid_adapter_count));
  5019. return -ENOMEM;
  5020. }
  5021. atomic_inc(&pmcraid_adapter_count);
  5022. rc = pci_enable_device(pdev);
  5023. if (rc) {
  5024. dev_err(&pdev->dev, "Cannot enable adapter\n");
  5025. atomic_dec(&pmcraid_adapter_count);
  5026. return rc;
  5027. }
  5028. dev_info(&pdev->dev,
  5029. "Found new IOA(%x:%x), Total IOA count: %d\n",
  5030. pdev->vendor, pdev->device,
  5031. atomic_read(&pmcraid_adapter_count));
  5032. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  5033. if (rc < 0) {
  5034. dev_err(&pdev->dev,
  5035. "Couldn't register memory range of registers\n");
  5036. goto out_disable_device;
  5037. }
  5038. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  5039. if (!mapped_pci_addr) {
  5040. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  5041. rc = -ENOMEM;
  5042. goto out_release_regions;
  5043. }
  5044. pci_set_master(pdev);
  5045. /* Firmware requires the system bus address of IOARCB to be within
  5046. * 32-bit addressable range though it has 64-bit IOARRIN register.
  5047. * However, firmware supports 64-bit streaming DMA buffers, whereas
  5048. * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
  5049. * returns memory within 4GB (if not, change this logic), coherent
  5050. * buffers are within firmware acceptible address ranges.
  5051. */
  5052. if ((sizeof(dma_addr_t) == 4) ||
  5053. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  5054. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  5055. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  5056. * bit mask for pci_alloc_consistent to return addresses within 4GB
  5057. */
  5058. if (rc == 0)
  5059. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  5060. if (rc != 0) {
  5061. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  5062. goto cleanup_nomem;
  5063. }
  5064. host = scsi_host_alloc(&pmcraid_host_template,
  5065. sizeof(struct pmcraid_instance));
  5066. if (!host) {
  5067. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  5068. rc = -ENOMEM;
  5069. goto cleanup_nomem;
  5070. }
  5071. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  5072. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  5073. host->unique_id = host->host_no;
  5074. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  5075. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  5076. /* zero out entire instance structure */
  5077. pinstance = (struct pmcraid_instance *)host->hostdata;
  5078. memset(pinstance, 0, sizeof(*pinstance));
  5079. pinstance->chip_cfg =
  5080. (struct pmcraid_chip_details *)(dev_id->driver_data);
  5081. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  5082. if (rc < 0) {
  5083. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  5084. goto out_scsi_host_put;
  5085. }
  5086. pci_set_drvdata(pdev, pinstance);
  5087. /* Save PCI config-space for use following the reset */
  5088. rc = pci_save_state(pinstance->pdev);
  5089. if (rc != 0) {
  5090. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  5091. goto out_scsi_host_put;
  5092. }
  5093. pmcraid_disable_interrupts(pinstance, ~0);
  5094. rc = pmcraid_register_interrupt_handler(pinstance);
  5095. if (rc) {
  5096. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  5097. goto out_scsi_host_put;
  5098. }
  5099. pmcraid_init_tasklets(pinstance);
  5100. /* allocate verious buffers used by LLD.*/
  5101. rc = pmcraid_init_buffers(pinstance);
  5102. if (rc) {
  5103. pmcraid_err("couldn't allocate memory blocks\n");
  5104. goto out_unregister_isr;
  5105. }
  5106. /* check the reset type required */
  5107. pmcraid_reset_type(pinstance);
  5108. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  5109. /* Start IOA firmware initialization and bring card to Operational
  5110. * state.
  5111. */
  5112. pmcraid_info("starting IOA initialization sequence\n");
  5113. if (pmcraid_reset_bringup(pinstance)) {
  5114. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  5115. rc = 1;
  5116. goto out_release_bufs;
  5117. }
  5118. /* Add adapter instance into mid-layer list */
  5119. rc = scsi_add_host(pinstance->host, &pdev->dev);
  5120. if (rc != 0) {
  5121. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  5122. goto out_release_bufs;
  5123. }
  5124. scsi_scan_host(pinstance->host);
  5125. rc = pmcraid_setup_chrdev(pinstance);
  5126. if (rc != 0) {
  5127. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  5128. rc);
  5129. goto out_remove_host;
  5130. }
  5131. /* Schedule worker thread to handle CCN and take care of adding and
  5132. * removing devices to OS
  5133. */
  5134. atomic_set(&pinstance->expose_resources, 1);
  5135. schedule_work(&pinstance->worker_q);
  5136. return rc;
  5137. out_remove_host:
  5138. scsi_remove_host(host);
  5139. out_release_bufs:
  5140. pmcraid_release_buffers(pinstance);
  5141. out_unregister_isr:
  5142. pmcraid_kill_tasklets(pinstance);
  5143. pmcraid_unregister_interrupt_handler(pinstance);
  5144. out_scsi_host_put:
  5145. scsi_host_put(host);
  5146. cleanup_nomem:
  5147. iounmap(mapped_pci_addr);
  5148. out_release_regions:
  5149. pci_release_regions(pdev);
  5150. out_disable_device:
  5151. atomic_dec(&pmcraid_adapter_count);
  5152. pci_set_drvdata(pdev, NULL);
  5153. pci_disable_device(pdev);
  5154. return -ENODEV;
  5155. }
  5156. /*
  5157. * PCI driver structure of pcmraid driver
  5158. */
  5159. static struct pci_driver pmcraid_driver = {
  5160. .name = PMCRAID_DRIVER_NAME,
  5161. .id_table = pmcraid_pci_table,
  5162. .probe = pmcraid_probe,
  5163. .remove = pmcraid_remove,
  5164. .suspend = pmcraid_suspend,
  5165. .resume = pmcraid_resume,
  5166. .shutdown = pmcraid_shutdown
  5167. };
  5168. /**
  5169. * pmcraid_init - module load entry point
  5170. */
  5171. static int __init pmcraid_init(void)
  5172. {
  5173. dev_t dev;
  5174. int error;
  5175. pmcraid_info("%s Device Driver version: %s %s\n",
  5176. PMCRAID_DRIVER_NAME,
  5177. PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
  5178. error = alloc_chrdev_region(&dev, 0,
  5179. PMCRAID_MAX_ADAPTERS,
  5180. PMCRAID_DEVFILE);
  5181. if (error) {
  5182. pmcraid_err("failed to get a major number for adapters\n");
  5183. goto out_init;
  5184. }
  5185. pmcraid_major = MAJOR(dev);
  5186. pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
  5187. if (IS_ERR(pmcraid_class)) {
  5188. error = PTR_ERR(pmcraid_class);
  5189. pmcraid_err("failed to register with with sysfs, error = %x\n",
  5190. error);
  5191. goto out_unreg_chrdev;
  5192. }
  5193. error = pmcraid_netlink_init();
  5194. if (error)
  5195. goto out_unreg_chrdev;
  5196. error = pci_register_driver(&pmcraid_driver);
  5197. if (error == 0)
  5198. goto out_init;
  5199. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  5200. error);
  5201. class_destroy(pmcraid_class);
  5202. pmcraid_netlink_release();
  5203. out_unreg_chrdev:
  5204. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  5205. out_init:
  5206. return error;
  5207. }
  5208. /**
  5209. * pmcraid_exit - module unload entry point
  5210. */
  5211. static void __exit pmcraid_exit(void)
  5212. {
  5213. pmcraid_netlink_release();
  5214. class_destroy(pmcraid_class);
  5215. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  5216. PMCRAID_MAX_ADAPTERS);
  5217. pci_unregister_driver(&pmcraid_driver);
  5218. }
  5219. module_init(pmcraid_init);
  5220. module_exit(pmcraid_exit);