mpt2sas_base.c 111 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933
  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
  63. static int max_queue_depth = -1;
  64. module_param(max_queue_depth, int, 0);
  65. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  66. static int max_sgl_entries = -1;
  67. module_param(max_sgl_entries, int, 0);
  68. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  69. static int msix_disable = -1;
  70. module_param(msix_disable, int, 0);
  71. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  72. /* diag_buffer_enable is bitwise
  73. * bit 0 set = TRACE
  74. * bit 1 set = SNAPSHOT
  75. * bit 2 set = EXTENDED
  76. *
  77. * Either bit can be set, or both
  78. */
  79. static int diag_buffer_enable;
  80. module_param(diag_buffer_enable, int, 0);
  81. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  82. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  83. int mpt2sas_fwfault_debug;
  84. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  85. "and halt firmware - (default=0)");
  86. static int disable_discovery = -1;
  87. module_param(disable_discovery, int, 0);
  88. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  89. /**
  90. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  91. *
  92. */
  93. static int
  94. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  95. {
  96. int ret = param_set_int(val, kp);
  97. struct MPT2SAS_ADAPTER *ioc;
  98. if (ret)
  99. return ret;
  100. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  101. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  102. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  103. return 0;
  104. }
  105. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  106. param_get_int, &mpt2sas_fwfault_debug, 0644);
  107. /**
  108. * _base_fault_reset_work - workq handling ioc fault conditions
  109. * @work: input argument, used to derive ioc
  110. * Context: sleep.
  111. *
  112. * Return nothing.
  113. */
  114. static void
  115. _base_fault_reset_work(struct work_struct *work)
  116. {
  117. struct MPT2SAS_ADAPTER *ioc =
  118. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  119. unsigned long flags;
  120. u32 doorbell;
  121. int rc;
  122. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  123. if (ioc->shost_recovery)
  124. goto rearm_timer;
  125. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  126. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  127. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  128. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  129. FORCE_BIG_HAMMER);
  130. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  131. __func__, (rc == 0) ? "success" : "failed");
  132. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  133. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  134. mpt2sas_base_fault_info(ioc, doorbell &
  135. MPI2_DOORBELL_DATA_MASK);
  136. }
  137. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  138. rearm_timer:
  139. if (ioc->fault_reset_work_q)
  140. queue_delayed_work(ioc->fault_reset_work_q,
  141. &ioc->fault_reset_work,
  142. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  143. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  144. }
  145. /**
  146. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  147. * @ioc: per adapter object
  148. * Context: sleep.
  149. *
  150. * Return nothing.
  151. */
  152. void
  153. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  154. {
  155. unsigned long flags;
  156. if (ioc->fault_reset_work_q)
  157. return;
  158. /* initialize fault polling */
  159. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  160. snprintf(ioc->fault_reset_work_q_name,
  161. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  162. ioc->fault_reset_work_q =
  163. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  164. if (!ioc->fault_reset_work_q) {
  165. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  166. ioc->name, __func__, __LINE__);
  167. return;
  168. }
  169. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  170. if (ioc->fault_reset_work_q)
  171. queue_delayed_work(ioc->fault_reset_work_q,
  172. &ioc->fault_reset_work,
  173. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  174. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  175. }
  176. /**
  177. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  178. * @ioc: per adapter object
  179. * Context: sleep.
  180. *
  181. * Return nothing.
  182. */
  183. void
  184. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  185. {
  186. unsigned long flags;
  187. struct workqueue_struct *wq;
  188. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  189. wq = ioc->fault_reset_work_q;
  190. ioc->fault_reset_work_q = NULL;
  191. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  192. if (wq) {
  193. if (!cancel_delayed_work(&ioc->fault_reset_work))
  194. flush_workqueue(wq);
  195. destroy_workqueue(wq);
  196. }
  197. }
  198. /**
  199. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  200. * @ioc: per adapter object
  201. * @fault_code: fault code
  202. *
  203. * Return nothing.
  204. */
  205. void
  206. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  207. {
  208. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  209. ioc->name, fault_code);
  210. }
  211. /**
  212. * mpt2sas_halt_firmware - halt's mpt controller firmware
  213. * @ioc: per adapter object
  214. *
  215. * For debugging timeout related issues. Writing 0xCOFFEE00
  216. * to the doorbell register will halt controller firmware. With
  217. * the purpose to stop both driver and firmware, the enduser can
  218. * obtain a ring buffer from controller UART.
  219. */
  220. void
  221. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  222. {
  223. u32 doorbell;
  224. if (!ioc->fwfault_debug)
  225. return;
  226. dump_stack();
  227. doorbell = readl(&ioc->chip->Doorbell);
  228. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  229. mpt2sas_base_fault_info(ioc , doorbell);
  230. else {
  231. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  232. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  233. "timeout\n", ioc->name);
  234. }
  235. panic("panic in %s\n", __func__);
  236. }
  237. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  238. /**
  239. * _base_sas_ioc_info - verbose translation of the ioc status
  240. * @ioc: per adapter object
  241. * @mpi_reply: reply mf payload returned from firmware
  242. * @request_hdr: request mf
  243. *
  244. * Return nothing.
  245. */
  246. static void
  247. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  248. MPI2RequestHeader_t *request_hdr)
  249. {
  250. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  251. MPI2_IOCSTATUS_MASK;
  252. char *desc = NULL;
  253. u16 frame_sz;
  254. char *func_str = NULL;
  255. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  256. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  257. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  258. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  259. return;
  260. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  261. return;
  262. switch (ioc_status) {
  263. /****************************************************************************
  264. * Common IOCStatus values for all replies
  265. ****************************************************************************/
  266. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  267. desc = "invalid function";
  268. break;
  269. case MPI2_IOCSTATUS_BUSY:
  270. desc = "busy";
  271. break;
  272. case MPI2_IOCSTATUS_INVALID_SGL:
  273. desc = "invalid sgl";
  274. break;
  275. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  276. desc = "internal error";
  277. break;
  278. case MPI2_IOCSTATUS_INVALID_VPID:
  279. desc = "invalid vpid";
  280. break;
  281. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  282. desc = "insufficient resources";
  283. break;
  284. case MPI2_IOCSTATUS_INVALID_FIELD:
  285. desc = "invalid field";
  286. break;
  287. case MPI2_IOCSTATUS_INVALID_STATE:
  288. desc = "invalid state";
  289. break;
  290. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  291. desc = "op state not supported";
  292. break;
  293. /****************************************************************************
  294. * Config IOCStatus values
  295. ****************************************************************************/
  296. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  297. desc = "config invalid action";
  298. break;
  299. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  300. desc = "config invalid type";
  301. break;
  302. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  303. desc = "config invalid page";
  304. break;
  305. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  306. desc = "config invalid data";
  307. break;
  308. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  309. desc = "config no defaults";
  310. break;
  311. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  312. desc = "config cant commit";
  313. break;
  314. /****************************************************************************
  315. * SCSI IO Reply
  316. ****************************************************************************/
  317. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  318. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  319. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  320. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  321. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  322. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  323. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  324. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  325. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  326. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  327. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  328. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  329. break;
  330. /****************************************************************************
  331. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  332. ****************************************************************************/
  333. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  334. desc = "eedp guard error";
  335. break;
  336. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  337. desc = "eedp ref tag error";
  338. break;
  339. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  340. desc = "eedp app tag error";
  341. break;
  342. /****************************************************************************
  343. * SCSI Target values
  344. ****************************************************************************/
  345. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  346. desc = "target invalid io index";
  347. break;
  348. case MPI2_IOCSTATUS_TARGET_ABORTED:
  349. desc = "target aborted";
  350. break;
  351. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  352. desc = "target no conn retryable";
  353. break;
  354. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  355. desc = "target no connection";
  356. break;
  357. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  358. desc = "target xfer count mismatch";
  359. break;
  360. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  361. desc = "target data offset error";
  362. break;
  363. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  364. desc = "target too much write data";
  365. break;
  366. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  367. desc = "target iu too short";
  368. break;
  369. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  370. desc = "target ack nak timeout";
  371. break;
  372. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  373. desc = "target nak received";
  374. break;
  375. /****************************************************************************
  376. * Serial Attached SCSI values
  377. ****************************************************************************/
  378. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  379. desc = "smp request failed";
  380. break;
  381. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  382. desc = "smp data overrun";
  383. break;
  384. /****************************************************************************
  385. * Diagnostic Buffer Post / Diagnostic Release values
  386. ****************************************************************************/
  387. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  388. desc = "diagnostic released";
  389. break;
  390. default:
  391. break;
  392. }
  393. if (!desc)
  394. return;
  395. switch (request_hdr->Function) {
  396. case MPI2_FUNCTION_CONFIG:
  397. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  398. func_str = "config_page";
  399. break;
  400. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  401. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  402. func_str = "task_mgmt";
  403. break;
  404. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  405. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  406. func_str = "sas_iounit_ctl";
  407. break;
  408. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  409. frame_sz = sizeof(Mpi2SepRequest_t);
  410. func_str = "enclosure";
  411. break;
  412. case MPI2_FUNCTION_IOC_INIT:
  413. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  414. func_str = "ioc_init";
  415. break;
  416. case MPI2_FUNCTION_PORT_ENABLE:
  417. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  418. func_str = "port_enable";
  419. break;
  420. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  421. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  422. func_str = "smp_passthru";
  423. break;
  424. default:
  425. frame_sz = 32;
  426. func_str = "unknown";
  427. break;
  428. }
  429. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  430. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  431. _debug_dump_mf(request_hdr, frame_sz/4);
  432. }
  433. /**
  434. * _base_display_event_data - verbose translation of firmware asyn events
  435. * @ioc: per adapter object
  436. * @mpi_reply: reply mf payload returned from firmware
  437. *
  438. * Return nothing.
  439. */
  440. static void
  441. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  442. Mpi2EventNotificationReply_t *mpi_reply)
  443. {
  444. char *desc = NULL;
  445. u16 event;
  446. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  447. return;
  448. event = le16_to_cpu(mpi_reply->Event);
  449. switch (event) {
  450. case MPI2_EVENT_LOG_DATA:
  451. desc = "Log Data";
  452. break;
  453. case MPI2_EVENT_STATE_CHANGE:
  454. desc = "Status Change";
  455. break;
  456. case MPI2_EVENT_HARD_RESET_RECEIVED:
  457. desc = "Hard Reset Received";
  458. break;
  459. case MPI2_EVENT_EVENT_CHANGE:
  460. desc = "Event Change";
  461. break;
  462. case MPI2_EVENT_TASK_SET_FULL:
  463. desc = "Task Set Full";
  464. break;
  465. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  466. desc = "Device Status Change";
  467. break;
  468. case MPI2_EVENT_IR_OPERATION_STATUS:
  469. desc = "IR Operation Status";
  470. break;
  471. case MPI2_EVENT_SAS_DISCOVERY:
  472. {
  473. Mpi2EventDataSasDiscovery_t *event_data =
  474. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  475. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  476. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  477. "start" : "stop");
  478. if (event_data->DiscoveryStatus)
  479. printk("discovery_status(0x%08x)",
  480. le32_to_cpu(event_data->DiscoveryStatus));
  481. printk("\n");
  482. return;
  483. }
  484. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  485. desc = "SAS Broadcast Primitive";
  486. break;
  487. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  488. desc = "SAS Init Device Status Change";
  489. break;
  490. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  491. desc = "SAS Init Table Overflow";
  492. break;
  493. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  494. desc = "SAS Topology Change List";
  495. break;
  496. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  497. desc = "SAS Enclosure Device Status Change";
  498. break;
  499. case MPI2_EVENT_IR_VOLUME:
  500. desc = "IR Volume";
  501. break;
  502. case MPI2_EVENT_IR_PHYSICAL_DISK:
  503. desc = "IR Physical Disk";
  504. break;
  505. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  506. desc = "IR Configuration Change List";
  507. break;
  508. case MPI2_EVENT_LOG_ENTRY_ADDED:
  509. desc = "Log Entry Added";
  510. break;
  511. }
  512. if (!desc)
  513. return;
  514. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  515. }
  516. #endif
  517. /**
  518. * _base_sas_log_info - verbose translation of firmware log info
  519. * @ioc: per adapter object
  520. * @log_info: log info
  521. *
  522. * Return nothing.
  523. */
  524. static void
  525. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  526. {
  527. union loginfo_type {
  528. u32 loginfo;
  529. struct {
  530. u32 subcode:16;
  531. u32 code:8;
  532. u32 originator:4;
  533. u32 bus_type:4;
  534. } dw;
  535. };
  536. union loginfo_type sas_loginfo;
  537. char *originator_str = NULL;
  538. sas_loginfo.loginfo = log_info;
  539. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  540. return;
  541. /* each nexus loss loginfo */
  542. if (log_info == 0x31170000)
  543. return;
  544. /* eat the loginfos associated with task aborts */
  545. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  546. 0x31140000 || log_info == 0x31130000))
  547. return;
  548. switch (sas_loginfo.dw.originator) {
  549. case 0:
  550. originator_str = "IOP";
  551. break;
  552. case 1:
  553. originator_str = "PL";
  554. break;
  555. case 2:
  556. originator_str = "IR";
  557. break;
  558. }
  559. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  560. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  561. originator_str, sas_loginfo.dw.code,
  562. sas_loginfo.dw.subcode);
  563. }
  564. /**
  565. * _base_display_reply_info -
  566. * @ioc: per adapter object
  567. * @smid: system request message index
  568. * @msix_index: MSIX table index supplied by the OS
  569. * @reply: reply message frame(lower 32bit addr)
  570. *
  571. * Return nothing.
  572. */
  573. static void
  574. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  575. u32 reply)
  576. {
  577. MPI2DefaultReply_t *mpi_reply;
  578. u16 ioc_status;
  579. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  580. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  581. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  582. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  583. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  584. _base_sas_ioc_info(ioc , mpi_reply,
  585. mpt2sas_base_get_msg_frame(ioc, smid));
  586. }
  587. #endif
  588. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  589. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  590. }
  591. /**
  592. * mpt2sas_base_done - base internal command completion routine
  593. * @ioc: per adapter object
  594. * @smid: system request message index
  595. * @msix_index: MSIX table index supplied by the OS
  596. * @reply: reply message frame(lower 32bit addr)
  597. *
  598. * Return 1 meaning mf should be freed from _base_interrupt
  599. * 0 means the mf is freed from this function.
  600. */
  601. u8
  602. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  603. u32 reply)
  604. {
  605. MPI2DefaultReply_t *mpi_reply;
  606. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  607. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  608. return 1;
  609. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  610. return 1;
  611. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  612. if (mpi_reply) {
  613. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  614. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  615. }
  616. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  617. complete(&ioc->base_cmds.done);
  618. return 1;
  619. }
  620. /**
  621. * _base_async_event - main callback handler for firmware asyn events
  622. * @ioc: per adapter object
  623. * @msix_index: MSIX table index supplied by the OS
  624. * @reply: reply message frame(lower 32bit addr)
  625. *
  626. * Return 1 meaning mf should be freed from _base_interrupt
  627. * 0 means the mf is freed from this function.
  628. */
  629. static u8
  630. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  631. {
  632. Mpi2EventNotificationReply_t *mpi_reply;
  633. Mpi2EventAckRequest_t *ack_request;
  634. u16 smid;
  635. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  636. if (!mpi_reply)
  637. return 1;
  638. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  639. return 1;
  640. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  641. _base_display_event_data(ioc, mpi_reply);
  642. #endif
  643. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  644. goto out;
  645. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  646. if (!smid) {
  647. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  648. ioc->name, __func__);
  649. goto out;
  650. }
  651. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  652. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  653. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  654. ack_request->Event = mpi_reply->Event;
  655. ack_request->EventContext = mpi_reply->EventContext;
  656. ack_request->VF_ID = 0; /* TODO */
  657. ack_request->VP_ID = 0;
  658. mpt2sas_base_put_smid_default(ioc, smid);
  659. out:
  660. /* scsih callback handler */
  661. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  662. /* ctl callback handler */
  663. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  664. return 1;
  665. }
  666. /**
  667. * _base_get_cb_idx - obtain the callback index
  668. * @ioc: per adapter object
  669. * @smid: system request message index
  670. *
  671. * Return callback index.
  672. */
  673. static u8
  674. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  675. {
  676. int i;
  677. u8 cb_idx = 0xFF;
  678. if (smid >= ioc->hi_priority_smid) {
  679. if (smid < ioc->internal_smid) {
  680. i = smid - ioc->hi_priority_smid;
  681. cb_idx = ioc->hpr_lookup[i].cb_idx;
  682. } else {
  683. i = smid - ioc->internal_smid;
  684. cb_idx = ioc->internal_lookup[i].cb_idx;
  685. }
  686. } else {
  687. i = smid - 1;
  688. cb_idx = ioc->scsi_lookup[i].cb_idx;
  689. }
  690. return cb_idx;
  691. }
  692. /**
  693. * _base_mask_interrupts - disable interrupts
  694. * @ioc: per adapter object
  695. *
  696. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  697. *
  698. * Return nothing.
  699. */
  700. static void
  701. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  702. {
  703. u32 him_register;
  704. ioc->mask_interrupts = 1;
  705. him_register = readl(&ioc->chip->HostInterruptMask);
  706. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  707. writel(him_register, &ioc->chip->HostInterruptMask);
  708. readl(&ioc->chip->HostInterruptMask);
  709. }
  710. /**
  711. * _base_unmask_interrupts - enable interrupts
  712. * @ioc: per adapter object
  713. *
  714. * Enabling only Reply Interrupts
  715. *
  716. * Return nothing.
  717. */
  718. static void
  719. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  720. {
  721. u32 him_register;
  722. him_register = readl(&ioc->chip->HostInterruptMask);
  723. him_register &= ~MPI2_HIM_RIM;
  724. writel(him_register, &ioc->chip->HostInterruptMask);
  725. ioc->mask_interrupts = 0;
  726. }
  727. union reply_descriptor {
  728. u64 word;
  729. struct {
  730. u32 low;
  731. u32 high;
  732. } u;
  733. };
  734. /**
  735. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  736. * @irq: irq number (not used)
  737. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  738. * @r: pt_regs pointer (not used)
  739. *
  740. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  741. */
  742. static irqreturn_t
  743. _base_interrupt(int irq, void *bus_id)
  744. {
  745. union reply_descriptor rd;
  746. u32 completed_cmds;
  747. u8 request_desript_type;
  748. u16 smid;
  749. u8 cb_idx;
  750. u32 reply;
  751. u8 msix_index;
  752. struct MPT2SAS_ADAPTER *ioc = bus_id;
  753. Mpi2ReplyDescriptorsUnion_t *rpf;
  754. u8 rc;
  755. if (ioc->mask_interrupts)
  756. return IRQ_NONE;
  757. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  758. request_desript_type = rpf->Default.ReplyFlags
  759. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  760. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  761. return IRQ_NONE;
  762. completed_cmds = 0;
  763. do {
  764. rd.word = rpf->Words;
  765. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  766. goto out;
  767. reply = 0;
  768. cb_idx = 0xFF;
  769. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  770. msix_index = rpf->Default.MSIxIndex;
  771. if (request_desript_type ==
  772. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  773. reply = le32_to_cpu
  774. (rpf->AddressReply.ReplyFrameAddress);
  775. } else if (request_desript_type ==
  776. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  777. goto next;
  778. else if (request_desript_type ==
  779. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  780. goto next;
  781. if (smid)
  782. cb_idx = _base_get_cb_idx(ioc, smid);
  783. if (smid && cb_idx != 0xFF) {
  784. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  785. reply);
  786. if (reply)
  787. _base_display_reply_info(ioc, smid, msix_index,
  788. reply);
  789. if (rc)
  790. mpt2sas_base_free_smid(ioc, smid);
  791. }
  792. if (!smid)
  793. _base_async_event(ioc, msix_index, reply);
  794. /* reply free queue handling */
  795. if (reply) {
  796. ioc->reply_free_host_index =
  797. (ioc->reply_free_host_index ==
  798. (ioc->reply_free_queue_depth - 1)) ?
  799. 0 : ioc->reply_free_host_index + 1;
  800. ioc->reply_free[ioc->reply_free_host_index] =
  801. cpu_to_le32(reply);
  802. wmb();
  803. writel(ioc->reply_free_host_index,
  804. &ioc->chip->ReplyFreeHostIndex);
  805. }
  806. next:
  807. rpf->Words = ULLONG_MAX;
  808. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  809. (ioc->reply_post_queue_depth - 1)) ? 0 :
  810. ioc->reply_post_host_index + 1;
  811. request_desript_type =
  812. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  813. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  814. completed_cmds++;
  815. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  816. goto out;
  817. if (!ioc->reply_post_host_index)
  818. rpf = ioc->reply_post_free;
  819. else
  820. rpf++;
  821. } while (1);
  822. out:
  823. if (!completed_cmds)
  824. return IRQ_NONE;
  825. wmb();
  826. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  827. return IRQ_HANDLED;
  828. }
  829. /**
  830. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  831. * @cb_idx: callback index
  832. *
  833. * Return nothing.
  834. */
  835. void
  836. mpt2sas_base_release_callback_handler(u8 cb_idx)
  837. {
  838. mpt_callbacks[cb_idx] = NULL;
  839. }
  840. /**
  841. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  842. * @cb_func: callback function
  843. *
  844. * Returns cb_func.
  845. */
  846. u8
  847. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  848. {
  849. u8 cb_idx;
  850. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  851. if (mpt_callbacks[cb_idx] == NULL)
  852. break;
  853. mpt_callbacks[cb_idx] = cb_func;
  854. return cb_idx;
  855. }
  856. /**
  857. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  858. *
  859. * Return nothing.
  860. */
  861. void
  862. mpt2sas_base_initialize_callback_handler(void)
  863. {
  864. u8 cb_idx;
  865. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  866. mpt2sas_base_release_callback_handler(cb_idx);
  867. }
  868. /**
  869. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  870. * @ioc: per adapter object
  871. * @paddr: virtual address for SGE
  872. *
  873. * Create a zero length scatter gather entry to insure the IOCs hardware has
  874. * something to use if the target device goes brain dead and tries
  875. * to send data even when none is asked for.
  876. *
  877. * Return nothing.
  878. */
  879. void
  880. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  881. {
  882. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  883. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  884. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  885. MPI2_SGE_FLAGS_SHIFT);
  886. ioc->base_add_sg_single(paddr, flags_length, -1);
  887. }
  888. /**
  889. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  890. * @paddr: virtual address for SGE
  891. * @flags_length: SGE flags and data transfer length
  892. * @dma_addr: Physical address
  893. *
  894. * Return nothing.
  895. */
  896. static void
  897. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  898. {
  899. Mpi2SGESimple32_t *sgel = paddr;
  900. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  901. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  902. sgel->FlagsLength = cpu_to_le32(flags_length);
  903. sgel->Address = cpu_to_le32(dma_addr);
  904. }
  905. /**
  906. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  907. * @paddr: virtual address for SGE
  908. * @flags_length: SGE flags and data transfer length
  909. * @dma_addr: Physical address
  910. *
  911. * Return nothing.
  912. */
  913. static void
  914. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  915. {
  916. Mpi2SGESimple64_t *sgel = paddr;
  917. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  918. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  919. sgel->FlagsLength = cpu_to_le32(flags_length);
  920. sgel->Address = cpu_to_le64(dma_addr);
  921. }
  922. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  923. /**
  924. * _base_config_dma_addressing - set dma addressing
  925. * @ioc: per adapter object
  926. * @pdev: PCI device struct
  927. *
  928. * Returns 0 for success, non-zero for failure.
  929. */
  930. static int
  931. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  932. {
  933. struct sysinfo s;
  934. char *desc = NULL;
  935. if (sizeof(dma_addr_t) > 4) {
  936. const uint64_t required_mask =
  937. dma_get_required_mask(&pdev->dev);
  938. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  939. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  940. DMA_BIT_MASK(64))) {
  941. ioc->base_add_sg_single = &_base_add_sg_single_64;
  942. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  943. desc = "64";
  944. goto out;
  945. }
  946. }
  947. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  948. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  949. ioc->base_add_sg_single = &_base_add_sg_single_32;
  950. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  951. desc = "32";
  952. } else
  953. return -ENODEV;
  954. out:
  955. si_meminfo(&s);
  956. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  957. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  958. return 0;
  959. }
  960. /**
  961. * _base_save_msix_table - backup msix vector table
  962. * @ioc: per adapter object
  963. *
  964. * This address an errata where diag reset clears out the table
  965. */
  966. static void
  967. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  968. {
  969. int i;
  970. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  971. return;
  972. for (i = 0; i < ioc->msix_vector_count; i++)
  973. ioc->msix_table_backup[i] = ioc->msix_table[i];
  974. }
  975. /**
  976. * _base_restore_msix_table - this restores the msix vector table
  977. * @ioc: per adapter object
  978. *
  979. */
  980. static void
  981. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  982. {
  983. int i;
  984. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  985. return;
  986. for (i = 0; i < ioc->msix_vector_count; i++)
  987. ioc->msix_table[i] = ioc->msix_table_backup[i];
  988. }
  989. /**
  990. * _base_check_enable_msix - checks MSIX capabable.
  991. * @ioc: per adapter object
  992. *
  993. * Check to see if card is capable of MSIX, and set number
  994. * of avaliable msix vectors
  995. */
  996. static int
  997. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  998. {
  999. int base;
  1000. u16 message_control;
  1001. u32 msix_table_offset;
  1002. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1003. if (!base) {
  1004. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1005. "supported\n", ioc->name));
  1006. return -EINVAL;
  1007. }
  1008. /* get msix vector count */
  1009. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1010. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1011. /* get msix table */
  1012. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1013. msix_table_offset &= 0xFFFFFFF8;
  1014. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1015. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1016. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1017. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1018. return 0;
  1019. }
  1020. /**
  1021. * _base_disable_msix - disables msix
  1022. * @ioc: per adapter object
  1023. *
  1024. */
  1025. static void
  1026. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1027. {
  1028. if (ioc->msix_enable) {
  1029. pci_disable_msix(ioc->pdev);
  1030. kfree(ioc->msix_table_backup);
  1031. ioc->msix_table_backup = NULL;
  1032. ioc->msix_enable = 0;
  1033. }
  1034. }
  1035. /**
  1036. * _base_enable_msix - enables msix, failback to io_apic
  1037. * @ioc: per adapter object
  1038. *
  1039. */
  1040. static int
  1041. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1042. {
  1043. struct msix_entry entries;
  1044. int r;
  1045. u8 try_msix = 0;
  1046. if (msix_disable == -1 || msix_disable == 0)
  1047. try_msix = 1;
  1048. if (!try_msix)
  1049. goto try_ioapic;
  1050. if (_base_check_enable_msix(ioc) != 0)
  1051. goto try_ioapic;
  1052. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1053. sizeof(u32), GFP_KERNEL);
  1054. if (!ioc->msix_table_backup) {
  1055. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1056. "msix_table_backup failed!!!\n", ioc->name));
  1057. goto try_ioapic;
  1058. }
  1059. memset(&entries, 0, sizeof(struct msix_entry));
  1060. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1061. if (r) {
  1062. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1063. "failed (r=%d) !!!\n", ioc->name, r));
  1064. goto try_ioapic;
  1065. }
  1066. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1067. ioc->name, ioc);
  1068. if (r) {
  1069. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1070. "interrupt %d !!!\n", ioc->name, entries.vector));
  1071. pci_disable_msix(ioc->pdev);
  1072. goto try_ioapic;
  1073. }
  1074. ioc->pci_irq = entries.vector;
  1075. ioc->msix_enable = 1;
  1076. return 0;
  1077. /* failback to io_apic interrupt routing */
  1078. try_ioapic:
  1079. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1080. ioc->name, ioc);
  1081. if (r) {
  1082. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1083. ioc->name, ioc->pdev->irq);
  1084. r = -EBUSY;
  1085. goto out_fail;
  1086. }
  1087. ioc->pci_irq = ioc->pdev->irq;
  1088. return 0;
  1089. out_fail:
  1090. return r;
  1091. }
  1092. /**
  1093. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1094. * @ioc: per adapter object
  1095. *
  1096. * Returns 0 for success, non-zero for failure.
  1097. */
  1098. int
  1099. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1100. {
  1101. struct pci_dev *pdev = ioc->pdev;
  1102. u32 memap_sz;
  1103. u32 pio_sz;
  1104. int i, r = 0;
  1105. u64 pio_chip = 0;
  1106. u64 chip_phys = 0;
  1107. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1108. ioc->name, __func__));
  1109. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1110. if (pci_enable_device_mem(pdev)) {
  1111. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1112. "failed\n", ioc->name);
  1113. return -ENODEV;
  1114. }
  1115. if (pci_request_selected_regions(pdev, ioc->bars,
  1116. MPT2SAS_DRIVER_NAME)) {
  1117. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1118. "failed\n", ioc->name);
  1119. r = -ENODEV;
  1120. goto out_fail;
  1121. }
  1122. /* AER (Advanced Error Reporting) hooks */
  1123. pci_enable_pcie_error_reporting(pdev);
  1124. pci_set_master(pdev);
  1125. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1126. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1127. ioc->name, pci_name(pdev));
  1128. r = -ENODEV;
  1129. goto out_fail;
  1130. }
  1131. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1132. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1133. if (pio_sz)
  1134. continue;
  1135. pio_chip = (u64)pci_resource_start(pdev, i);
  1136. pio_sz = pci_resource_len(pdev, i);
  1137. } else {
  1138. if (memap_sz)
  1139. continue;
  1140. /* verify memory resource is valid before using */
  1141. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1142. ioc->chip_phys = pci_resource_start(pdev, i);
  1143. chip_phys = (u64)ioc->chip_phys;
  1144. memap_sz = pci_resource_len(pdev, i);
  1145. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1146. if (ioc->chip == NULL) {
  1147. printk(MPT2SAS_ERR_FMT "unable to map "
  1148. "adapter memory!\n", ioc->name);
  1149. r = -EINVAL;
  1150. goto out_fail;
  1151. }
  1152. }
  1153. }
  1154. }
  1155. _base_mask_interrupts(ioc);
  1156. r = _base_enable_msix(ioc);
  1157. if (r)
  1158. goto out_fail;
  1159. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1160. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1161. "IO-APIC enabled"), ioc->pci_irq);
  1162. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1163. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1164. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1165. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1166. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1167. pci_save_state(pdev);
  1168. return 0;
  1169. out_fail:
  1170. if (ioc->chip_phys)
  1171. iounmap(ioc->chip);
  1172. ioc->chip_phys = 0;
  1173. ioc->pci_irq = -1;
  1174. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1175. pci_disable_pcie_error_reporting(pdev);
  1176. pci_disable_device(pdev);
  1177. return r;
  1178. }
  1179. /**
  1180. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1181. * @ioc: per adapter object
  1182. * @smid: system request message index(smid zero is invalid)
  1183. *
  1184. * Returns virt pointer to message frame.
  1185. */
  1186. void *
  1187. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1188. {
  1189. return (void *)(ioc->request + (smid * ioc->request_sz));
  1190. }
  1191. /**
  1192. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1193. * @ioc: per adapter object
  1194. * @smid: system request message index
  1195. *
  1196. * Returns virt pointer to sense buffer.
  1197. */
  1198. void *
  1199. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1200. {
  1201. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1202. }
  1203. /**
  1204. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1205. * @ioc: per adapter object
  1206. * @smid: system request message index
  1207. *
  1208. * Returns phys pointer to the low 32bit address of the sense buffer.
  1209. */
  1210. __le32
  1211. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1212. {
  1213. return cpu_to_le32(ioc->sense_dma +
  1214. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1215. }
  1216. /**
  1217. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1218. * @ioc: per adapter object
  1219. * @phys_addr: lower 32 physical addr of the reply
  1220. *
  1221. * Converts 32bit lower physical addr into a virt address.
  1222. */
  1223. void *
  1224. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1225. {
  1226. if (!phys_addr)
  1227. return NULL;
  1228. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1229. }
  1230. /**
  1231. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1232. * @ioc: per adapter object
  1233. * @cb_idx: callback index
  1234. *
  1235. * Returns smid (zero is invalid)
  1236. */
  1237. u16
  1238. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1239. {
  1240. unsigned long flags;
  1241. struct request_tracker *request;
  1242. u16 smid;
  1243. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1244. if (list_empty(&ioc->internal_free_list)) {
  1245. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1246. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1247. ioc->name, __func__);
  1248. return 0;
  1249. }
  1250. request = list_entry(ioc->internal_free_list.next,
  1251. struct request_tracker, tracker_list);
  1252. request->cb_idx = cb_idx;
  1253. smid = request->smid;
  1254. list_del(&request->tracker_list);
  1255. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1256. return smid;
  1257. }
  1258. /**
  1259. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1260. * @ioc: per adapter object
  1261. * @cb_idx: callback index
  1262. * @scmd: pointer to scsi command object
  1263. *
  1264. * Returns smid (zero is invalid)
  1265. */
  1266. u16
  1267. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1268. struct scsi_cmnd *scmd)
  1269. {
  1270. unsigned long flags;
  1271. struct request_tracker *request;
  1272. u16 smid;
  1273. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1274. if (list_empty(&ioc->free_list)) {
  1275. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1276. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1277. ioc->name, __func__);
  1278. return 0;
  1279. }
  1280. request = list_entry(ioc->free_list.next,
  1281. struct request_tracker, tracker_list);
  1282. request->scmd = scmd;
  1283. request->cb_idx = cb_idx;
  1284. smid = request->smid;
  1285. list_del(&request->tracker_list);
  1286. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1287. return smid;
  1288. }
  1289. /**
  1290. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1291. * @ioc: per adapter object
  1292. * @cb_idx: callback index
  1293. *
  1294. * Returns smid (zero is invalid)
  1295. */
  1296. u16
  1297. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1298. {
  1299. unsigned long flags;
  1300. struct request_tracker *request;
  1301. u16 smid;
  1302. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1303. if (list_empty(&ioc->hpr_free_list)) {
  1304. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1305. return 0;
  1306. }
  1307. request = list_entry(ioc->hpr_free_list.next,
  1308. struct request_tracker, tracker_list);
  1309. request->cb_idx = cb_idx;
  1310. smid = request->smid;
  1311. list_del(&request->tracker_list);
  1312. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1313. return smid;
  1314. }
  1315. /**
  1316. * mpt2sas_base_free_smid - put smid back on free_list
  1317. * @ioc: per adapter object
  1318. * @smid: system request message index
  1319. *
  1320. * Return nothing.
  1321. */
  1322. void
  1323. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1324. {
  1325. unsigned long flags;
  1326. int i;
  1327. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1328. if (smid >= ioc->hi_priority_smid) {
  1329. if (smid < ioc->internal_smid) {
  1330. /* hi-priority */
  1331. i = smid - ioc->hi_priority_smid;
  1332. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1333. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1334. &ioc->hpr_free_list);
  1335. } else {
  1336. /* internal queue */
  1337. i = smid - ioc->internal_smid;
  1338. ioc->internal_lookup[i].cb_idx = 0xFF;
  1339. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1340. &ioc->internal_free_list);
  1341. }
  1342. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1343. return;
  1344. }
  1345. /* scsiio queue */
  1346. i = smid - 1;
  1347. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1348. ioc->scsi_lookup[i].scmd = NULL;
  1349. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1350. &ioc->free_list);
  1351. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1352. /*
  1353. * See _wait_for_commands_to_complete() call with regards to this code.
  1354. */
  1355. if (ioc->shost_recovery && ioc->pending_io_count) {
  1356. if (ioc->pending_io_count == 1)
  1357. wake_up(&ioc->reset_wq);
  1358. ioc->pending_io_count--;
  1359. }
  1360. }
  1361. /**
  1362. * _base_writeq - 64 bit write to MMIO
  1363. * @ioc: per adapter object
  1364. * @b: data payload
  1365. * @addr: address in MMIO space
  1366. * @writeq_lock: spin lock
  1367. *
  1368. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1369. * care of 32 bit environment where its not quarenteed to send the entire word
  1370. * in one transfer.
  1371. */
  1372. #ifndef writeq
  1373. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1374. spinlock_t *writeq_lock)
  1375. {
  1376. unsigned long flags;
  1377. __u64 data_out = cpu_to_le64(b);
  1378. spin_lock_irqsave(writeq_lock, flags);
  1379. writel((u32)(data_out), addr);
  1380. writel((u32)(data_out >> 32), (addr + 4));
  1381. spin_unlock_irqrestore(writeq_lock, flags);
  1382. }
  1383. #else
  1384. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1385. spinlock_t *writeq_lock)
  1386. {
  1387. writeq(cpu_to_le64(b), addr);
  1388. }
  1389. #endif
  1390. /**
  1391. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1392. * @ioc: per adapter object
  1393. * @smid: system request message index
  1394. * @handle: device handle
  1395. *
  1396. * Return nothing.
  1397. */
  1398. void
  1399. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1400. {
  1401. Mpi2RequestDescriptorUnion_t descriptor;
  1402. u64 *request = (u64 *)&descriptor;
  1403. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1404. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1405. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1406. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1407. descriptor.SCSIIO.LMID = 0;
  1408. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1409. &ioc->scsi_lookup_lock);
  1410. }
  1411. /**
  1412. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1413. * @ioc: per adapter object
  1414. * @smid: system request message index
  1415. *
  1416. * Return nothing.
  1417. */
  1418. void
  1419. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1420. {
  1421. Mpi2RequestDescriptorUnion_t descriptor;
  1422. u64 *request = (u64 *)&descriptor;
  1423. descriptor.HighPriority.RequestFlags =
  1424. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1425. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1426. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1427. descriptor.HighPriority.LMID = 0;
  1428. descriptor.HighPriority.Reserved1 = 0;
  1429. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1430. &ioc->scsi_lookup_lock);
  1431. }
  1432. /**
  1433. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1434. * @ioc: per adapter object
  1435. * @smid: system request message index
  1436. *
  1437. * Return nothing.
  1438. */
  1439. void
  1440. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1441. {
  1442. Mpi2RequestDescriptorUnion_t descriptor;
  1443. u64 *request = (u64 *)&descriptor;
  1444. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1445. descriptor.Default.MSIxIndex = 0; /* TODO */
  1446. descriptor.Default.SMID = cpu_to_le16(smid);
  1447. descriptor.Default.LMID = 0;
  1448. descriptor.Default.DescriptorTypeDependent = 0;
  1449. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1450. &ioc->scsi_lookup_lock);
  1451. }
  1452. /**
  1453. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1454. * @ioc: per adapter object
  1455. * @smid: system request message index
  1456. * @io_index: value used to track the IO
  1457. *
  1458. * Return nothing.
  1459. */
  1460. void
  1461. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1462. u16 io_index)
  1463. {
  1464. Mpi2RequestDescriptorUnion_t descriptor;
  1465. u64 *request = (u64 *)&descriptor;
  1466. descriptor.SCSITarget.RequestFlags =
  1467. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1468. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1469. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1470. descriptor.SCSITarget.LMID = 0;
  1471. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1472. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1473. &ioc->scsi_lookup_lock);
  1474. }
  1475. /**
  1476. * _base_display_dell_branding - Disply branding string
  1477. * @ioc: per adapter object
  1478. *
  1479. * Return nothing.
  1480. */
  1481. static void
  1482. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1483. {
  1484. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1485. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1486. return;
  1487. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1488. switch (ioc->pdev->subsystem_device) {
  1489. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1490. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1491. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1492. break;
  1493. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1494. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1495. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1496. break;
  1497. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1498. strncpy(dell_branding,
  1499. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1500. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1501. break;
  1502. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1503. strncpy(dell_branding,
  1504. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1505. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1506. break;
  1507. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1508. strncpy(dell_branding,
  1509. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1510. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1511. break;
  1512. case MPT2SAS_DELL_PERC_H200_SSDID:
  1513. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1514. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1515. break;
  1516. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1517. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1518. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1519. break;
  1520. default:
  1521. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1522. break;
  1523. }
  1524. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1525. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1526. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1527. ioc->pdev->subsystem_device);
  1528. }
  1529. /**
  1530. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1531. * @ioc: per adapter object
  1532. *
  1533. * Return nothing.
  1534. */
  1535. static void
  1536. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1537. {
  1538. int i = 0;
  1539. char desc[16];
  1540. u8 revision;
  1541. u32 iounit_pg1_flags;
  1542. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1543. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1544. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1545. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1546. ioc->name, desc,
  1547. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1548. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1549. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1550. ioc->facts.FWVersion.Word & 0x000000FF,
  1551. revision,
  1552. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1553. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1554. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1555. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1556. _base_display_dell_branding(ioc);
  1557. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1558. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1559. printk("Initiator");
  1560. i++;
  1561. }
  1562. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1563. printk("%sTarget", i ? "," : "");
  1564. i++;
  1565. }
  1566. i = 0;
  1567. printk("), ");
  1568. printk("Capabilities=(");
  1569. if (ioc->facts.IOCCapabilities &
  1570. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1571. printk("Raid");
  1572. i++;
  1573. }
  1574. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1575. printk("%sTLR", i ? "," : "");
  1576. i++;
  1577. }
  1578. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1579. printk("%sMulticast", i ? "," : "");
  1580. i++;
  1581. }
  1582. if (ioc->facts.IOCCapabilities &
  1583. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1584. printk("%sBIDI Target", i ? "," : "");
  1585. i++;
  1586. }
  1587. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1588. printk("%sEEDP", i ? "," : "");
  1589. i++;
  1590. }
  1591. if (ioc->facts.IOCCapabilities &
  1592. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1593. printk("%sSnapshot Buffer", i ? "," : "");
  1594. i++;
  1595. }
  1596. if (ioc->facts.IOCCapabilities &
  1597. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1598. printk("%sDiag Trace Buffer", i ? "," : "");
  1599. i++;
  1600. }
  1601. if (ioc->facts.IOCCapabilities &
  1602. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1603. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1604. i++;
  1605. }
  1606. if (ioc->facts.IOCCapabilities &
  1607. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1608. printk("%sTask Set Full", i ? "," : "");
  1609. i++;
  1610. }
  1611. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1612. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1613. printk("%sNCQ", i ? "," : "");
  1614. i++;
  1615. }
  1616. printk(")\n");
  1617. }
  1618. /**
  1619. * _base_static_config_pages - static start of day config pages
  1620. * @ioc: per adapter object
  1621. *
  1622. * Return nothing.
  1623. */
  1624. static void
  1625. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1626. {
  1627. Mpi2ConfigReply_t mpi_reply;
  1628. u32 iounit_pg1_flags;
  1629. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1630. if (ioc->ir_firmware)
  1631. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1632. &ioc->manu_pg10);
  1633. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1634. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1635. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1636. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1637. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1638. _base_display_ioc_capabilities(ioc);
  1639. /*
  1640. * Enable task_set_full handling in iounit_pg1 when the
  1641. * facts capabilities indicate that its supported.
  1642. */
  1643. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1644. if ((ioc->facts.IOCCapabilities &
  1645. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1646. iounit_pg1_flags &=
  1647. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1648. else
  1649. iounit_pg1_flags |=
  1650. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1651. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1652. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1653. }
  1654. /**
  1655. * _base_release_memory_pools - release memory
  1656. * @ioc: per adapter object
  1657. *
  1658. * Free memory allocated from _base_allocate_memory_pools.
  1659. *
  1660. * Return nothing.
  1661. */
  1662. static void
  1663. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1664. {
  1665. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1666. __func__));
  1667. if (ioc->request) {
  1668. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1669. ioc->request, ioc->request_dma);
  1670. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1671. ": free\n", ioc->name, ioc->request));
  1672. ioc->request = NULL;
  1673. }
  1674. if (ioc->sense) {
  1675. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1676. if (ioc->sense_dma_pool)
  1677. pci_pool_destroy(ioc->sense_dma_pool);
  1678. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1679. ": free\n", ioc->name, ioc->sense));
  1680. ioc->sense = NULL;
  1681. }
  1682. if (ioc->reply) {
  1683. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1684. if (ioc->reply_dma_pool)
  1685. pci_pool_destroy(ioc->reply_dma_pool);
  1686. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1687. ": free\n", ioc->name, ioc->reply));
  1688. ioc->reply = NULL;
  1689. }
  1690. if (ioc->reply_free) {
  1691. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1692. ioc->reply_free_dma);
  1693. if (ioc->reply_free_dma_pool)
  1694. pci_pool_destroy(ioc->reply_free_dma_pool);
  1695. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1696. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1697. ioc->reply_free = NULL;
  1698. }
  1699. if (ioc->reply_post_free) {
  1700. pci_pool_free(ioc->reply_post_free_dma_pool,
  1701. ioc->reply_post_free, ioc->reply_post_free_dma);
  1702. if (ioc->reply_post_free_dma_pool)
  1703. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1704. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1705. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1706. ioc->reply_post_free));
  1707. ioc->reply_post_free = NULL;
  1708. }
  1709. if (ioc->config_page) {
  1710. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1711. "config_page(0x%p): free\n", ioc->name,
  1712. ioc->config_page));
  1713. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1714. ioc->config_page, ioc->config_page_dma);
  1715. }
  1716. if (ioc->scsi_lookup) {
  1717. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1718. ioc->scsi_lookup = NULL;
  1719. }
  1720. kfree(ioc->hpr_lookup);
  1721. kfree(ioc->internal_lookup);
  1722. }
  1723. /**
  1724. * _base_allocate_memory_pools - allocate start of day memory pools
  1725. * @ioc: per adapter object
  1726. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1727. *
  1728. * Returns 0 success, anything else error
  1729. */
  1730. static int
  1731. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1732. {
  1733. Mpi2IOCFactsReply_t *facts;
  1734. u32 queue_size, queue_diff;
  1735. u16 max_sge_elements;
  1736. u16 num_of_reply_frames;
  1737. u16 chains_needed_per_io;
  1738. u32 sz, total_sz;
  1739. u32 retry_sz;
  1740. u16 max_request_credit;
  1741. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1742. __func__));
  1743. retry_sz = 0;
  1744. facts = &ioc->facts;
  1745. /* command line tunables for max sgl entries */
  1746. if (max_sgl_entries != -1) {
  1747. ioc->shost->sg_tablesize = (max_sgl_entries <
  1748. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1749. MPT2SAS_SG_DEPTH;
  1750. } else {
  1751. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1752. }
  1753. /* command line tunables for max controller queue depth */
  1754. if (max_queue_depth != -1) {
  1755. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1756. ? max_queue_depth : facts->RequestCredit;
  1757. } else {
  1758. max_request_credit = (facts->RequestCredit >
  1759. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1760. facts->RequestCredit;
  1761. }
  1762. ioc->hba_queue_depth = max_request_credit;
  1763. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1764. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1765. /* request frame size */
  1766. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1767. /* reply frame size */
  1768. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1769. retry_allocation:
  1770. total_sz = 0;
  1771. /* calculate number of sg elements left over in the 1st frame */
  1772. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1773. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1774. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1775. /* now do the same for a chain buffer */
  1776. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1777. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1778. ioc->chain_offset_value_for_main_message =
  1779. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1780. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1781. /*
  1782. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1783. */
  1784. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1785. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1786. + 1;
  1787. if (chains_needed_per_io > facts->MaxChainDepth) {
  1788. chains_needed_per_io = facts->MaxChainDepth;
  1789. ioc->shost->sg_tablesize = min_t(u16,
  1790. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1791. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1792. }
  1793. ioc->chains_needed_per_io = chains_needed_per_io;
  1794. /* reply free queue sizing - taking into account for events */
  1795. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1796. /* number of replies frames can't be a multiple of 16 */
  1797. /* decrease number of reply frames by 1 */
  1798. if (!(num_of_reply_frames % 16))
  1799. num_of_reply_frames--;
  1800. /* calculate number of reply free queue entries
  1801. * (must be multiple of 16)
  1802. */
  1803. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1804. queue_size = num_of_reply_frames;
  1805. queue_size += 16 - (queue_size % 16);
  1806. ioc->reply_free_queue_depth = queue_size;
  1807. /* reply descriptor post queue sizing */
  1808. /* this size should be the number of request frames + number of reply
  1809. * frames
  1810. */
  1811. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1812. /* round up to 16 byte boundary */
  1813. if (queue_size % 16)
  1814. queue_size += 16 - (queue_size % 16);
  1815. /* check against IOC maximum reply post queue depth */
  1816. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1817. queue_diff = queue_size -
  1818. facts->MaxReplyDescriptorPostQueueDepth;
  1819. /* round queue_diff up to multiple of 16 */
  1820. if (queue_diff % 16)
  1821. queue_diff += 16 - (queue_diff % 16);
  1822. /* adjust hba_queue_depth, reply_free_queue_depth,
  1823. * and queue_size
  1824. */
  1825. ioc->hba_queue_depth -= queue_diff;
  1826. ioc->reply_free_queue_depth -= queue_diff;
  1827. queue_size -= queue_diff;
  1828. }
  1829. ioc->reply_post_queue_depth = queue_size;
  1830. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1831. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1832. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1833. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1834. ioc->chains_needed_per_io));
  1835. ioc->scsiio_depth = ioc->hba_queue_depth -
  1836. ioc->hi_priority_depth - ioc->internal_depth;
  1837. /* set the scsi host can_queue depth
  1838. * with some internal commands that could be outstanding
  1839. */
  1840. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  1841. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  1842. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  1843. /* contiguous pool for request and chains, 16 byte align, one extra "
  1844. * "frame for smid=0
  1845. */
  1846. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  1847. sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1848. /* hi-priority queue */
  1849. sz += (ioc->hi_priority_depth * ioc->request_sz);
  1850. /* internal queue */
  1851. sz += (ioc->internal_depth * ioc->request_sz);
  1852. ioc->request_dma_sz = sz;
  1853. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1854. if (!ioc->request) {
  1855. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1856. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1857. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  1858. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1859. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1860. goto out;
  1861. retry_sz += 64;
  1862. ioc->hba_queue_depth = max_request_credit - retry_sz;
  1863. goto retry_allocation;
  1864. }
  1865. if (retry_sz)
  1866. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1867. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1868. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  1869. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1870. /* hi-priority queue */
  1871. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  1872. ioc->request_sz);
  1873. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  1874. ioc->request_sz);
  1875. /* internal queue */
  1876. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  1877. ioc->request_sz);
  1878. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  1879. ioc->request_sz);
  1880. ioc->chain = ioc->internal + (ioc->internal_depth *
  1881. ioc->request_sz);
  1882. ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
  1883. ioc->request_sz);
  1884. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1885. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1886. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  1887. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  1888. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1889. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1890. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1891. ioc->request_sz))/1024));
  1892. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1893. ioc->name, (unsigned long long) ioc->request_dma));
  1894. total_sz += sz;
  1895. sz = ioc->scsiio_depth * sizeof(struct request_tracker);
  1896. ioc->scsi_lookup_pages = get_order(sz);
  1897. ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
  1898. GFP_KERNEL, ioc->scsi_lookup_pages);
  1899. if (!ioc->scsi_lookup) {
  1900. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  1901. "sz(%d)\n", ioc->name, (int)sz);
  1902. goto out;
  1903. }
  1904. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  1905. "depth(%d)\n", ioc->name, ioc->request,
  1906. ioc->scsiio_depth));
  1907. /* initialize hi-priority queue smid's */
  1908. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  1909. sizeof(struct request_tracker), GFP_KERNEL);
  1910. if (!ioc->hpr_lookup) {
  1911. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  1912. ioc->name);
  1913. goto out;
  1914. }
  1915. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  1916. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  1917. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  1918. ioc->hi_priority_depth, ioc->hi_priority_smid));
  1919. /* initialize internal queue smid's */
  1920. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  1921. sizeof(struct request_tracker), GFP_KERNEL);
  1922. if (!ioc->internal_lookup) {
  1923. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  1924. ioc->name);
  1925. goto out;
  1926. }
  1927. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  1928. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  1929. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  1930. ioc->internal_depth, ioc->internal_smid));
  1931. /* sense buffers, 4 byte align */
  1932. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  1933. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1934. 0);
  1935. if (!ioc->sense_dma_pool) {
  1936. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1937. ioc->name);
  1938. goto out;
  1939. }
  1940. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1941. &ioc->sense_dma);
  1942. if (!ioc->sense) {
  1943. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1944. ioc->name);
  1945. goto out;
  1946. }
  1947. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1948. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1949. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  1950. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1951. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1952. ioc->name, (unsigned long long)ioc->sense_dma));
  1953. total_sz += sz;
  1954. /* reply pool, 4 byte align */
  1955. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1956. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1957. 0);
  1958. if (!ioc->reply_dma_pool) {
  1959. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1960. ioc->name);
  1961. goto out;
  1962. }
  1963. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1964. &ioc->reply_dma);
  1965. if (!ioc->reply) {
  1966. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1967. ioc->name);
  1968. goto out;
  1969. }
  1970. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1971. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1972. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1973. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1974. ioc->name, (unsigned long long)ioc->reply_dma));
  1975. total_sz += sz;
  1976. /* reply free queue, 16 byte align */
  1977. sz = ioc->reply_free_queue_depth * 4;
  1978. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1979. ioc->pdev, sz, 16, 0);
  1980. if (!ioc->reply_free_dma_pool) {
  1981. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1982. "failed\n", ioc->name);
  1983. goto out;
  1984. }
  1985. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1986. &ioc->reply_free_dma);
  1987. if (!ioc->reply_free) {
  1988. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1989. "failed\n", ioc->name);
  1990. goto out;
  1991. }
  1992. memset(ioc->reply_free, 0, sz);
  1993. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1994. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1995. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1996. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1997. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1998. total_sz += sz;
  1999. /* reply post queue, 16 byte align */
  2000. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  2001. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2002. ioc->pdev, sz, 16, 0);
  2003. if (!ioc->reply_post_free_dma_pool) {
  2004. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2005. "failed\n", ioc->name);
  2006. goto out;
  2007. }
  2008. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2009. GFP_KERNEL, &ioc->reply_post_free_dma);
  2010. if (!ioc->reply_post_free) {
  2011. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2012. "failed\n", ioc->name);
  2013. goto out;
  2014. }
  2015. memset(ioc->reply_post_free, 0, sz);
  2016. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2017. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2018. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2019. sz/1024));
  2020. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2021. "(0x%llx)\n", ioc->name, (unsigned long long)
  2022. ioc->reply_post_free_dma));
  2023. total_sz += sz;
  2024. ioc->config_page_sz = 512;
  2025. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2026. ioc->config_page_sz, &ioc->config_page_dma);
  2027. if (!ioc->config_page) {
  2028. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2029. "failed\n", ioc->name);
  2030. goto out;
  2031. }
  2032. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2033. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2034. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2035. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2036. total_sz += ioc->config_page_sz;
  2037. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2038. ioc->name, total_sz/1024);
  2039. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2040. "Max Controller Queue Depth(%d)\n",
  2041. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2042. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2043. ioc->name, ioc->shost->sg_tablesize);
  2044. return 0;
  2045. out:
  2046. _base_release_memory_pools(ioc);
  2047. return -ENOMEM;
  2048. }
  2049. /**
  2050. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2051. * @ioc: Pointer to MPT_ADAPTER structure
  2052. * @cooked: Request raw or cooked IOC state
  2053. *
  2054. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2055. * Doorbell bits in MPI_IOC_STATE_MASK.
  2056. */
  2057. u32
  2058. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2059. {
  2060. u32 s, sc;
  2061. s = readl(&ioc->chip->Doorbell);
  2062. sc = s & MPI2_IOC_STATE_MASK;
  2063. return cooked ? sc : s;
  2064. }
  2065. /**
  2066. * _base_wait_on_iocstate - waiting on a particular ioc state
  2067. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2068. * @timeout: timeout in second
  2069. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2070. *
  2071. * Returns 0 for success, non-zero for failure.
  2072. */
  2073. static int
  2074. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2075. int sleep_flag)
  2076. {
  2077. u32 count, cntdn;
  2078. u32 current_state;
  2079. count = 0;
  2080. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2081. do {
  2082. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2083. if (current_state == ioc_state)
  2084. return 0;
  2085. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2086. break;
  2087. if (sleep_flag == CAN_SLEEP)
  2088. msleep(1);
  2089. else
  2090. udelay(500);
  2091. count++;
  2092. } while (--cntdn);
  2093. return current_state;
  2094. }
  2095. /**
  2096. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2097. * a write to the doorbell)
  2098. * @ioc: per adapter object
  2099. * @timeout: timeout in second
  2100. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2101. *
  2102. * Returns 0 for success, non-zero for failure.
  2103. *
  2104. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2105. */
  2106. static int
  2107. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2108. int sleep_flag)
  2109. {
  2110. u32 cntdn, count;
  2111. u32 int_status;
  2112. count = 0;
  2113. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2114. do {
  2115. int_status = readl(&ioc->chip->HostInterruptStatus);
  2116. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2117. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2118. "successfull count(%d), timeout(%d)\n", ioc->name,
  2119. __func__, count, timeout));
  2120. return 0;
  2121. }
  2122. if (sleep_flag == CAN_SLEEP)
  2123. msleep(1);
  2124. else
  2125. udelay(500);
  2126. count++;
  2127. } while (--cntdn);
  2128. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2129. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2130. return -EFAULT;
  2131. }
  2132. /**
  2133. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2134. * @ioc: per adapter object
  2135. * @timeout: timeout in second
  2136. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2137. *
  2138. * Returns 0 for success, non-zero for failure.
  2139. *
  2140. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2141. * doorbell.
  2142. */
  2143. static int
  2144. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2145. int sleep_flag)
  2146. {
  2147. u32 cntdn, count;
  2148. u32 int_status;
  2149. u32 doorbell;
  2150. count = 0;
  2151. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2152. do {
  2153. int_status = readl(&ioc->chip->HostInterruptStatus);
  2154. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2155. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2156. "successfull count(%d), timeout(%d)\n", ioc->name,
  2157. __func__, count, timeout));
  2158. return 0;
  2159. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2160. doorbell = readl(&ioc->chip->Doorbell);
  2161. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2162. MPI2_IOC_STATE_FAULT) {
  2163. mpt2sas_base_fault_info(ioc , doorbell);
  2164. return -EFAULT;
  2165. }
  2166. } else if (int_status == 0xFFFFFFFF)
  2167. goto out;
  2168. if (sleep_flag == CAN_SLEEP)
  2169. msleep(1);
  2170. else
  2171. udelay(500);
  2172. count++;
  2173. } while (--cntdn);
  2174. out:
  2175. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2176. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2177. return -EFAULT;
  2178. }
  2179. /**
  2180. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2181. * @ioc: per adapter object
  2182. * @timeout: timeout in second
  2183. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2184. *
  2185. * Returns 0 for success, non-zero for failure.
  2186. *
  2187. */
  2188. static int
  2189. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2190. int sleep_flag)
  2191. {
  2192. u32 cntdn, count;
  2193. u32 doorbell_reg;
  2194. count = 0;
  2195. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2196. do {
  2197. doorbell_reg = readl(&ioc->chip->Doorbell);
  2198. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2199. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2200. "successfull count(%d), timeout(%d)\n", ioc->name,
  2201. __func__, count, timeout));
  2202. return 0;
  2203. }
  2204. if (sleep_flag == CAN_SLEEP)
  2205. msleep(1);
  2206. else
  2207. udelay(500);
  2208. count++;
  2209. } while (--cntdn);
  2210. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2211. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2212. return -EFAULT;
  2213. }
  2214. /**
  2215. * _base_send_ioc_reset - send doorbell reset
  2216. * @ioc: per adapter object
  2217. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2218. * @timeout: timeout in second
  2219. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2220. *
  2221. * Returns 0 for success, non-zero for failure.
  2222. */
  2223. static int
  2224. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2225. int sleep_flag)
  2226. {
  2227. u32 ioc_state;
  2228. int r = 0;
  2229. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2230. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2231. ioc->name, __func__);
  2232. return -EFAULT;
  2233. }
  2234. if (!(ioc->facts.IOCCapabilities &
  2235. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2236. return -EFAULT;
  2237. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2238. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2239. &ioc->chip->Doorbell);
  2240. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2241. r = -EFAULT;
  2242. goto out;
  2243. }
  2244. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2245. timeout, sleep_flag);
  2246. if (ioc_state) {
  2247. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2248. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2249. r = -EFAULT;
  2250. goto out;
  2251. }
  2252. out:
  2253. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2254. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2255. return r;
  2256. }
  2257. /**
  2258. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2259. * @ioc: per adapter object
  2260. * @request_bytes: request length
  2261. * @request: pointer having request payload
  2262. * @reply_bytes: reply length
  2263. * @reply: pointer to reply payload
  2264. * @timeout: timeout in second
  2265. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2266. *
  2267. * Returns 0 for success, non-zero for failure.
  2268. */
  2269. static int
  2270. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2271. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2272. {
  2273. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2274. int i;
  2275. u8 failed;
  2276. u16 dummy;
  2277. u32 *mfp;
  2278. /* make sure doorbell is not in use */
  2279. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2280. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2281. " (line=%d)\n", ioc->name, __LINE__);
  2282. return -EFAULT;
  2283. }
  2284. /* clear pending doorbell interrupts from previous state changes */
  2285. if (readl(&ioc->chip->HostInterruptStatus) &
  2286. MPI2_HIS_IOC2SYS_DB_STATUS)
  2287. writel(0, &ioc->chip->HostInterruptStatus);
  2288. /* send message to ioc */
  2289. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2290. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2291. &ioc->chip->Doorbell);
  2292. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2293. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2294. "int failed (line=%d)\n", ioc->name, __LINE__);
  2295. return -EFAULT;
  2296. }
  2297. writel(0, &ioc->chip->HostInterruptStatus);
  2298. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2299. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2300. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2301. return -EFAULT;
  2302. }
  2303. /* send message 32-bits at a time */
  2304. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2305. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2306. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2307. failed = 1;
  2308. }
  2309. if (failed) {
  2310. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2311. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2312. return -EFAULT;
  2313. }
  2314. /* now wait for the reply */
  2315. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2316. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2317. "int failed (line=%d)\n", ioc->name, __LINE__);
  2318. return -EFAULT;
  2319. }
  2320. /* read the first two 16-bits, it gives the total length of the reply */
  2321. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2322. & MPI2_DOORBELL_DATA_MASK);
  2323. writel(0, &ioc->chip->HostInterruptStatus);
  2324. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2325. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2326. "int failed (line=%d)\n", ioc->name, __LINE__);
  2327. return -EFAULT;
  2328. }
  2329. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2330. & MPI2_DOORBELL_DATA_MASK);
  2331. writel(0, &ioc->chip->HostInterruptStatus);
  2332. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2333. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2334. printk(MPT2SAS_ERR_FMT "doorbell "
  2335. "handshake int failed (line=%d)\n", ioc->name,
  2336. __LINE__);
  2337. return -EFAULT;
  2338. }
  2339. if (i >= reply_bytes/2) /* overflow case */
  2340. dummy = readl(&ioc->chip->Doorbell);
  2341. else
  2342. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2343. & MPI2_DOORBELL_DATA_MASK);
  2344. writel(0, &ioc->chip->HostInterruptStatus);
  2345. }
  2346. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2347. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2348. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2349. " (line=%d)\n", ioc->name, __LINE__));
  2350. }
  2351. writel(0, &ioc->chip->HostInterruptStatus);
  2352. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2353. mfp = (u32 *)reply;
  2354. printk(KERN_INFO "\toffset:data\n");
  2355. for (i = 0; i < reply_bytes/4; i++)
  2356. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2357. le32_to_cpu(mfp[i]));
  2358. }
  2359. return 0;
  2360. }
  2361. /**
  2362. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2363. * @ioc: per adapter object
  2364. * @mpi_reply: the reply payload from FW
  2365. * @mpi_request: the request payload sent to FW
  2366. *
  2367. * The SAS IO Unit Control Request message allows the host to perform low-level
  2368. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2369. * to obtain the IOC assigned device handles for a device if it has other
  2370. * identifying information about the device, in addition allows the host to
  2371. * remove IOC resources associated with the device.
  2372. *
  2373. * Returns 0 for success, non-zero for failure.
  2374. */
  2375. int
  2376. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2377. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2378. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2379. {
  2380. u16 smid;
  2381. u32 ioc_state;
  2382. unsigned long timeleft;
  2383. u8 issue_reset;
  2384. int rc;
  2385. void *request;
  2386. u16 wait_state_count;
  2387. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2388. __func__));
  2389. mutex_lock(&ioc->base_cmds.mutex);
  2390. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2391. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2392. ioc->name, __func__);
  2393. rc = -EAGAIN;
  2394. goto out;
  2395. }
  2396. wait_state_count = 0;
  2397. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2398. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2399. if (wait_state_count++ == 10) {
  2400. printk(MPT2SAS_ERR_FMT
  2401. "%s: failed due to ioc not operational\n",
  2402. ioc->name, __func__);
  2403. rc = -EFAULT;
  2404. goto out;
  2405. }
  2406. ssleep(1);
  2407. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2408. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2409. "operational state(count=%d)\n", ioc->name,
  2410. __func__, wait_state_count);
  2411. }
  2412. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2413. if (!smid) {
  2414. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2415. ioc->name, __func__);
  2416. rc = -EAGAIN;
  2417. goto out;
  2418. }
  2419. rc = 0;
  2420. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2421. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2422. ioc->base_cmds.smid = smid;
  2423. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2424. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2425. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2426. ioc->ioc_link_reset_in_progress = 1;
  2427. mpt2sas_base_put_smid_default(ioc, smid);
  2428. init_completion(&ioc->base_cmds.done);
  2429. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2430. msecs_to_jiffies(10000));
  2431. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2432. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2433. ioc->ioc_link_reset_in_progress)
  2434. ioc->ioc_link_reset_in_progress = 0;
  2435. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2436. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2437. ioc->name, __func__);
  2438. _debug_dump_mf(mpi_request,
  2439. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2440. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2441. issue_reset = 1;
  2442. goto issue_host_reset;
  2443. }
  2444. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2445. memcpy(mpi_reply, ioc->base_cmds.reply,
  2446. sizeof(Mpi2SasIoUnitControlReply_t));
  2447. else
  2448. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2449. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2450. goto out;
  2451. issue_host_reset:
  2452. if (issue_reset)
  2453. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2454. FORCE_BIG_HAMMER);
  2455. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2456. rc = -EFAULT;
  2457. out:
  2458. mutex_unlock(&ioc->base_cmds.mutex);
  2459. return rc;
  2460. }
  2461. /**
  2462. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2463. * @ioc: per adapter object
  2464. * @mpi_reply: the reply payload from FW
  2465. * @mpi_request: the request payload sent to FW
  2466. *
  2467. * The SCSI Enclosure Processor request message causes the IOC to
  2468. * communicate with SES devices to control LED status signals.
  2469. *
  2470. * Returns 0 for success, non-zero for failure.
  2471. */
  2472. int
  2473. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2474. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2475. {
  2476. u16 smid;
  2477. u32 ioc_state;
  2478. unsigned long timeleft;
  2479. u8 issue_reset;
  2480. int rc;
  2481. void *request;
  2482. u16 wait_state_count;
  2483. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2484. __func__));
  2485. mutex_lock(&ioc->base_cmds.mutex);
  2486. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2487. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2488. ioc->name, __func__);
  2489. rc = -EAGAIN;
  2490. goto out;
  2491. }
  2492. wait_state_count = 0;
  2493. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2494. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2495. if (wait_state_count++ == 10) {
  2496. printk(MPT2SAS_ERR_FMT
  2497. "%s: failed due to ioc not operational\n",
  2498. ioc->name, __func__);
  2499. rc = -EFAULT;
  2500. goto out;
  2501. }
  2502. ssleep(1);
  2503. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2504. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2505. "operational state(count=%d)\n", ioc->name,
  2506. __func__, wait_state_count);
  2507. }
  2508. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2509. if (!smid) {
  2510. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2511. ioc->name, __func__);
  2512. rc = -EAGAIN;
  2513. goto out;
  2514. }
  2515. rc = 0;
  2516. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2517. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2518. ioc->base_cmds.smid = smid;
  2519. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2520. mpt2sas_base_put_smid_default(ioc, smid);
  2521. init_completion(&ioc->base_cmds.done);
  2522. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2523. msecs_to_jiffies(10000));
  2524. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2525. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2526. ioc->name, __func__);
  2527. _debug_dump_mf(mpi_request,
  2528. sizeof(Mpi2SepRequest_t)/4);
  2529. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2530. issue_reset = 1;
  2531. goto issue_host_reset;
  2532. }
  2533. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2534. memcpy(mpi_reply, ioc->base_cmds.reply,
  2535. sizeof(Mpi2SepReply_t));
  2536. else
  2537. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2538. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2539. goto out;
  2540. issue_host_reset:
  2541. if (issue_reset)
  2542. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2543. FORCE_BIG_HAMMER);
  2544. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2545. rc = -EFAULT;
  2546. out:
  2547. mutex_unlock(&ioc->base_cmds.mutex);
  2548. return rc;
  2549. }
  2550. /**
  2551. * _base_get_port_facts - obtain port facts reply and save in ioc
  2552. * @ioc: per adapter object
  2553. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2554. *
  2555. * Returns 0 for success, non-zero for failure.
  2556. */
  2557. static int
  2558. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2559. {
  2560. Mpi2PortFactsRequest_t mpi_request;
  2561. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2562. int mpi_reply_sz, mpi_request_sz, r;
  2563. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2564. __func__));
  2565. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2566. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2567. memset(&mpi_request, 0, mpi_request_sz);
  2568. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2569. mpi_request.PortNumber = port;
  2570. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2571. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2572. if (r != 0) {
  2573. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2574. ioc->name, __func__, r);
  2575. return r;
  2576. }
  2577. pfacts = &ioc->pfacts[port];
  2578. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2579. pfacts->PortNumber = mpi_reply.PortNumber;
  2580. pfacts->VP_ID = mpi_reply.VP_ID;
  2581. pfacts->VF_ID = mpi_reply.VF_ID;
  2582. pfacts->MaxPostedCmdBuffers =
  2583. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2584. return 0;
  2585. }
  2586. /**
  2587. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2588. * @ioc: per adapter object
  2589. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2590. *
  2591. * Returns 0 for success, non-zero for failure.
  2592. */
  2593. static int
  2594. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2595. {
  2596. Mpi2IOCFactsRequest_t mpi_request;
  2597. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2598. int mpi_reply_sz, mpi_request_sz, r;
  2599. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2600. __func__));
  2601. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2602. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2603. memset(&mpi_request, 0, mpi_request_sz);
  2604. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2605. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2606. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2607. if (r != 0) {
  2608. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2609. ioc->name, __func__, r);
  2610. return r;
  2611. }
  2612. facts = &ioc->facts;
  2613. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2614. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2615. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2616. facts->VP_ID = mpi_reply.VP_ID;
  2617. facts->VF_ID = mpi_reply.VF_ID;
  2618. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2619. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2620. facts->WhoInit = mpi_reply.WhoInit;
  2621. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2622. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2623. facts->MaxReplyDescriptorPostQueueDepth =
  2624. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2625. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2626. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2627. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2628. ioc->ir_firmware = 1;
  2629. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2630. facts->IOCRequestFrameSize =
  2631. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2632. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2633. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2634. ioc->shost->max_id = -1;
  2635. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2636. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2637. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2638. facts->HighPriorityCredit =
  2639. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2640. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2641. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2642. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2643. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2644. facts->MaxChainDepth));
  2645. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2646. "reply frame size(%d)\n", ioc->name,
  2647. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2648. return 0;
  2649. }
  2650. /**
  2651. * _base_send_ioc_init - send ioc_init to firmware
  2652. * @ioc: per adapter object
  2653. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2654. *
  2655. * Returns 0 for success, non-zero for failure.
  2656. */
  2657. static int
  2658. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2659. {
  2660. Mpi2IOCInitRequest_t mpi_request;
  2661. Mpi2IOCInitReply_t mpi_reply;
  2662. int r;
  2663. struct timeval current_time;
  2664. u16 ioc_status;
  2665. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2666. __func__));
  2667. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2668. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2669. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2670. mpi_request.VF_ID = 0; /* TODO */
  2671. mpi_request.VP_ID = 0;
  2672. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2673. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2674. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2675. * removed and made reserved. For those with older firmware will need
  2676. * this fix. It was decided that the Reply and Request frame sizes are
  2677. * the same.
  2678. */
  2679. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2680. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2681. /* mpi_request.SystemReplyFrameSize =
  2682. * cpu_to_le16(ioc->reply_sz);
  2683. */
  2684. }
  2685. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2686. mpi_request.ReplyDescriptorPostQueueDepth =
  2687. cpu_to_le16(ioc->reply_post_queue_depth);
  2688. mpi_request.ReplyFreeQueueDepth =
  2689. cpu_to_le16(ioc->reply_free_queue_depth);
  2690. #if BITS_PER_LONG > 32
  2691. mpi_request.SenseBufferAddressHigh =
  2692. cpu_to_le32(ioc->sense_dma >> 32);
  2693. mpi_request.SystemReplyAddressHigh =
  2694. cpu_to_le32(ioc->reply_dma >> 32);
  2695. mpi_request.SystemRequestFrameBaseAddress =
  2696. cpu_to_le64(ioc->request_dma);
  2697. mpi_request.ReplyFreeQueueAddress =
  2698. cpu_to_le64(ioc->reply_free_dma);
  2699. mpi_request.ReplyDescriptorPostQueueAddress =
  2700. cpu_to_le64(ioc->reply_post_free_dma);
  2701. #else
  2702. mpi_request.SystemRequestFrameBaseAddress =
  2703. cpu_to_le32(ioc->request_dma);
  2704. mpi_request.ReplyFreeQueueAddress =
  2705. cpu_to_le32(ioc->reply_free_dma);
  2706. mpi_request.ReplyDescriptorPostQueueAddress =
  2707. cpu_to_le32(ioc->reply_post_free_dma);
  2708. #endif
  2709. /* This time stamp specifies number of milliseconds
  2710. * since epoch ~ midnight January 1, 1970.
  2711. */
  2712. do_gettimeofday(&current_time);
  2713. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2714. (current_time.tv_usec / 1000));
  2715. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2716. u32 *mfp;
  2717. int i;
  2718. mfp = (u32 *)&mpi_request;
  2719. printk(KERN_INFO "\toffset:data\n");
  2720. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2721. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2722. le32_to_cpu(mfp[i]));
  2723. }
  2724. r = _base_handshake_req_reply_wait(ioc,
  2725. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2726. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2727. sleep_flag);
  2728. if (r != 0) {
  2729. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2730. ioc->name, __func__, r);
  2731. return r;
  2732. }
  2733. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2734. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2735. mpi_reply.IOCLogInfo) {
  2736. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2737. r = -EIO;
  2738. }
  2739. return 0;
  2740. }
  2741. /**
  2742. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2743. * @ioc: per adapter object
  2744. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2745. *
  2746. * Returns 0 for success, non-zero for failure.
  2747. */
  2748. static int
  2749. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2750. {
  2751. Mpi2PortEnableRequest_t *mpi_request;
  2752. u32 ioc_state;
  2753. unsigned long timeleft;
  2754. int r = 0;
  2755. u16 smid;
  2756. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2757. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2758. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2759. ioc->name, __func__);
  2760. return -EAGAIN;
  2761. }
  2762. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2763. if (!smid) {
  2764. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2765. ioc->name, __func__);
  2766. return -EAGAIN;
  2767. }
  2768. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2769. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2770. ioc->base_cmds.smid = smid;
  2771. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2772. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2773. mpi_request->VF_ID = 0; /* TODO */
  2774. mpi_request->VP_ID = 0;
  2775. mpt2sas_base_put_smid_default(ioc, smid);
  2776. init_completion(&ioc->base_cmds.done);
  2777. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2778. 300*HZ);
  2779. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2780. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2781. ioc->name, __func__);
  2782. _debug_dump_mf(mpi_request,
  2783. sizeof(Mpi2PortEnableRequest_t)/4);
  2784. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2785. r = -EFAULT;
  2786. else
  2787. r = -ETIME;
  2788. goto out;
  2789. } else
  2790. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2791. ioc->name, __func__));
  2792. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2793. 60, sleep_flag);
  2794. if (ioc_state) {
  2795. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2796. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2797. r = -EFAULT;
  2798. }
  2799. out:
  2800. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2801. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2802. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2803. return r;
  2804. }
  2805. /**
  2806. * _base_unmask_events - turn on notification for this event
  2807. * @ioc: per adapter object
  2808. * @event: firmware event
  2809. *
  2810. * The mask is stored in ioc->event_masks.
  2811. */
  2812. static void
  2813. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2814. {
  2815. u32 desired_event;
  2816. if (event >= 128)
  2817. return;
  2818. desired_event = (1 << (event % 32));
  2819. if (event < 32)
  2820. ioc->event_masks[0] &= ~desired_event;
  2821. else if (event < 64)
  2822. ioc->event_masks[1] &= ~desired_event;
  2823. else if (event < 96)
  2824. ioc->event_masks[2] &= ~desired_event;
  2825. else if (event < 128)
  2826. ioc->event_masks[3] &= ~desired_event;
  2827. }
  2828. /**
  2829. * _base_event_notification - send event notification
  2830. * @ioc: per adapter object
  2831. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2832. *
  2833. * Returns 0 for success, non-zero for failure.
  2834. */
  2835. static int
  2836. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2837. {
  2838. Mpi2EventNotificationRequest_t *mpi_request;
  2839. unsigned long timeleft;
  2840. u16 smid;
  2841. int r = 0;
  2842. int i;
  2843. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2844. __func__));
  2845. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2846. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2847. ioc->name, __func__);
  2848. return -EAGAIN;
  2849. }
  2850. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2851. if (!smid) {
  2852. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2853. ioc->name, __func__);
  2854. return -EAGAIN;
  2855. }
  2856. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2857. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2858. ioc->base_cmds.smid = smid;
  2859. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2860. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2861. mpi_request->VF_ID = 0; /* TODO */
  2862. mpi_request->VP_ID = 0;
  2863. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2864. mpi_request->EventMasks[i] =
  2865. cpu_to_le32(ioc->event_masks[i]);
  2866. mpt2sas_base_put_smid_default(ioc, smid);
  2867. init_completion(&ioc->base_cmds.done);
  2868. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2869. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2870. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2871. ioc->name, __func__);
  2872. _debug_dump_mf(mpi_request,
  2873. sizeof(Mpi2EventNotificationRequest_t)/4);
  2874. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2875. r = -EFAULT;
  2876. else
  2877. r = -ETIME;
  2878. } else
  2879. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2880. ioc->name, __func__));
  2881. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2882. return r;
  2883. }
  2884. /**
  2885. * mpt2sas_base_validate_event_type - validating event types
  2886. * @ioc: per adapter object
  2887. * @event: firmware event
  2888. *
  2889. * This will turn on firmware event notification when application
  2890. * ask for that event. We don't mask events that are already enabled.
  2891. */
  2892. void
  2893. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2894. {
  2895. int i, j;
  2896. u32 event_mask, desired_event;
  2897. u8 send_update_to_fw;
  2898. for (i = 0, send_update_to_fw = 0; i <
  2899. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2900. event_mask = ~event_type[i];
  2901. desired_event = 1;
  2902. for (j = 0; j < 32; j++) {
  2903. if (!(event_mask & desired_event) &&
  2904. (ioc->event_masks[i] & desired_event)) {
  2905. ioc->event_masks[i] &= ~desired_event;
  2906. send_update_to_fw = 1;
  2907. }
  2908. desired_event = (desired_event << 1);
  2909. }
  2910. }
  2911. if (!send_update_to_fw)
  2912. return;
  2913. mutex_lock(&ioc->base_cmds.mutex);
  2914. _base_event_notification(ioc, CAN_SLEEP);
  2915. mutex_unlock(&ioc->base_cmds.mutex);
  2916. }
  2917. /**
  2918. * _base_diag_reset - the "big hammer" start of day reset
  2919. * @ioc: per adapter object
  2920. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2921. *
  2922. * Returns 0 for success, non-zero for failure.
  2923. */
  2924. static int
  2925. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2926. {
  2927. u32 host_diagnostic;
  2928. u32 ioc_state;
  2929. u32 count;
  2930. u32 hcb_size;
  2931. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2932. _base_save_msix_table(ioc);
  2933. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  2934. ioc->name));
  2935. count = 0;
  2936. do {
  2937. /* Write magic sequence to WriteSequence register
  2938. * Loop until in diagnostic mode
  2939. */
  2940. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  2941. "sequence\n", ioc->name));
  2942. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2943. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2944. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2945. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2946. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2947. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2948. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2949. /* wait 100 msec */
  2950. if (sleep_flag == CAN_SLEEP)
  2951. msleep(100);
  2952. else
  2953. mdelay(100);
  2954. if (count++ > 20)
  2955. goto out;
  2956. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2957. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  2958. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2959. ioc->name, count, host_diagnostic));
  2960. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2961. hcb_size = readl(&ioc->chip->HCBSize);
  2962. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  2963. ioc->name));
  2964. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2965. &ioc->chip->HostDiagnostic);
  2966. /* don't access any registers for 50 milliseconds */
  2967. msleep(50);
  2968. /* 300 second max wait */
  2969. for (count = 0; count < 3000000 ; count++) {
  2970. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2971. if (host_diagnostic == 0xFFFFFFFF)
  2972. goto out;
  2973. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2974. break;
  2975. /* wait 100 msec */
  2976. if (sleep_flag == CAN_SLEEP)
  2977. msleep(1);
  2978. else
  2979. mdelay(1);
  2980. }
  2981. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2982. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  2983. "assuming the HCB Address points to good F/W\n",
  2984. ioc->name));
  2985. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2986. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2987. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2988. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  2989. "re-enable the HCDW\n", ioc->name));
  2990. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2991. &ioc->chip->HCBSize);
  2992. }
  2993. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  2994. ioc->name));
  2995. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2996. &ioc->chip->HostDiagnostic);
  2997. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  2998. "diagnostic register\n", ioc->name));
  2999. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3000. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3001. "READY state\n", ioc->name));
  3002. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3003. sleep_flag);
  3004. if (ioc_state) {
  3005. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3006. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3007. goto out;
  3008. }
  3009. _base_restore_msix_table(ioc);
  3010. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3011. return 0;
  3012. out:
  3013. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3014. return -EFAULT;
  3015. }
  3016. /**
  3017. * _base_make_ioc_ready - put controller in READY state
  3018. * @ioc: per adapter object
  3019. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3020. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3021. *
  3022. * Returns 0 for success, non-zero for failure.
  3023. */
  3024. static int
  3025. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3026. enum reset_type type)
  3027. {
  3028. u32 ioc_state;
  3029. int rc;
  3030. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3031. __func__));
  3032. if (ioc->pci_error_recovery)
  3033. return 0;
  3034. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3035. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3036. ioc->name, __func__, ioc_state));
  3037. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3038. return 0;
  3039. if (ioc_state & MPI2_DOORBELL_USED) {
  3040. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3041. "active!\n", ioc->name));
  3042. goto issue_diag_reset;
  3043. }
  3044. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3045. mpt2sas_base_fault_info(ioc, ioc_state &
  3046. MPI2_DOORBELL_DATA_MASK);
  3047. goto issue_diag_reset;
  3048. }
  3049. if (type == FORCE_BIG_HAMMER)
  3050. goto issue_diag_reset;
  3051. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3052. if (!(_base_send_ioc_reset(ioc,
  3053. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3054. ioc->ioc_reset_count++;
  3055. return 0;
  3056. }
  3057. issue_diag_reset:
  3058. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3059. ioc->ioc_reset_count++;
  3060. return rc;
  3061. }
  3062. /**
  3063. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3064. * @ioc: per adapter object
  3065. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3066. *
  3067. * Returns 0 for success, non-zero for failure.
  3068. */
  3069. static int
  3070. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3071. {
  3072. int r, i;
  3073. unsigned long flags;
  3074. u32 reply_address;
  3075. u16 smid;
  3076. struct _tr_list *delayed_tr, *delayed_tr_next;
  3077. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3078. __func__));
  3079. /* clean the delayed target reset list */
  3080. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3081. &ioc->delayed_tr_list, list) {
  3082. list_del(&delayed_tr->list);
  3083. kfree(delayed_tr);
  3084. }
  3085. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3086. &ioc->delayed_tr_volume_list, list) {
  3087. list_del(&delayed_tr->list);
  3088. kfree(delayed_tr);
  3089. }
  3090. /* initialize the scsi lookup free list */
  3091. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3092. INIT_LIST_HEAD(&ioc->free_list);
  3093. smid = 1;
  3094. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3095. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3096. ioc->scsi_lookup[i].smid = smid;
  3097. ioc->scsi_lookup[i].scmd = NULL;
  3098. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3099. &ioc->free_list);
  3100. }
  3101. /* hi-priority queue */
  3102. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3103. smid = ioc->hi_priority_smid;
  3104. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3105. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3106. ioc->hpr_lookup[i].smid = smid;
  3107. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3108. &ioc->hpr_free_list);
  3109. }
  3110. /* internal queue */
  3111. INIT_LIST_HEAD(&ioc->internal_free_list);
  3112. smid = ioc->internal_smid;
  3113. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3114. ioc->internal_lookup[i].cb_idx = 0xFF;
  3115. ioc->internal_lookup[i].smid = smid;
  3116. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3117. &ioc->internal_free_list);
  3118. }
  3119. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3120. /* initialize Reply Free Queue */
  3121. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3122. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3123. ioc->reply_sz)
  3124. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3125. /* initialize Reply Post Free Queue */
  3126. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3127. ioc->reply_post_free[i].Words = ULLONG_MAX;
  3128. r = _base_send_ioc_init(ioc, sleep_flag);
  3129. if (r)
  3130. return r;
  3131. /* initialize the index's */
  3132. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3133. ioc->reply_post_host_index = 0;
  3134. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3135. writel(0, &ioc->chip->ReplyPostHostIndex);
  3136. _base_unmask_interrupts(ioc);
  3137. r = _base_event_notification(ioc, sleep_flag);
  3138. if (r)
  3139. return r;
  3140. if (sleep_flag == CAN_SLEEP)
  3141. _base_static_config_pages(ioc);
  3142. if (ioc->wait_for_port_enable_to_complete) {
  3143. if (diag_buffer_enable != 0)
  3144. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3145. if (disable_discovery > 0)
  3146. return r;
  3147. }
  3148. r = _base_send_port_enable(ioc, sleep_flag);
  3149. if (r)
  3150. return r;
  3151. return r;
  3152. }
  3153. /**
  3154. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3155. * @ioc: per adapter object
  3156. *
  3157. * Return nothing.
  3158. */
  3159. void
  3160. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3161. {
  3162. struct pci_dev *pdev = ioc->pdev;
  3163. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3164. __func__));
  3165. _base_mask_interrupts(ioc);
  3166. ioc->shost_recovery = 1;
  3167. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3168. ioc->shost_recovery = 0;
  3169. if (ioc->pci_irq) {
  3170. synchronize_irq(pdev->irq);
  3171. free_irq(ioc->pci_irq, ioc);
  3172. }
  3173. _base_disable_msix(ioc);
  3174. if (ioc->chip_phys)
  3175. iounmap(ioc->chip);
  3176. ioc->pci_irq = -1;
  3177. ioc->chip_phys = 0;
  3178. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3179. pci_disable_pcie_error_reporting(pdev);
  3180. pci_disable_device(pdev);
  3181. return;
  3182. }
  3183. /**
  3184. * mpt2sas_base_attach - attach controller instance
  3185. * @ioc: per adapter object
  3186. *
  3187. * Returns 0 for success, non-zero for failure.
  3188. */
  3189. int
  3190. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3191. {
  3192. int r, i;
  3193. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3194. __func__));
  3195. r = mpt2sas_base_map_resources(ioc);
  3196. if (r)
  3197. return r;
  3198. pci_set_drvdata(ioc->pdev, ioc->shost);
  3199. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3200. if (r)
  3201. goto out_free_resources;
  3202. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3203. if (r)
  3204. goto out_free_resources;
  3205. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3206. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3207. if (!ioc->pfacts) {
  3208. r = -ENOMEM;
  3209. goto out_free_resources;
  3210. }
  3211. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3212. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3213. if (r)
  3214. goto out_free_resources;
  3215. }
  3216. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3217. if (r)
  3218. goto out_free_resources;
  3219. init_waitqueue_head(&ioc->reset_wq);
  3220. /* allocate memory pd handle bitmask list */
  3221. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3222. if (ioc->facts.MaxDevHandle % 8)
  3223. ioc->pd_handles_sz++;
  3224. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3225. GFP_KERNEL);
  3226. if (!ioc->pd_handles) {
  3227. r = -ENOMEM;
  3228. goto out_free_resources;
  3229. }
  3230. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3231. /* base internal command bits */
  3232. mutex_init(&ioc->base_cmds.mutex);
  3233. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3234. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3235. /* transport internal command bits */
  3236. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3237. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3238. mutex_init(&ioc->transport_cmds.mutex);
  3239. /* scsih internal command bits */
  3240. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3241. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3242. mutex_init(&ioc->scsih_cmds.mutex);
  3243. /* task management internal command bits */
  3244. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3245. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3246. mutex_init(&ioc->tm_cmds.mutex);
  3247. /* config page internal command bits */
  3248. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3249. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3250. mutex_init(&ioc->config_cmds.mutex);
  3251. /* ctl module internal command bits */
  3252. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3253. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3254. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3255. mutex_init(&ioc->ctl_cmds.mutex);
  3256. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3257. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3258. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3259. !ioc->ctl_cmds.sense) {
  3260. r = -ENOMEM;
  3261. goto out_free_resources;
  3262. }
  3263. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3264. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3265. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3266. r = -ENOMEM;
  3267. goto out_free_resources;
  3268. }
  3269. init_completion(&ioc->shost_recovery_done);
  3270. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3271. ioc->event_masks[i] = -1;
  3272. /* here we enable the events we care about */
  3273. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3274. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3275. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3276. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3277. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3278. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3279. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3280. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3281. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3282. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  3283. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3284. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3285. if (r)
  3286. goto out_free_resources;
  3287. mpt2sas_base_start_watchdog(ioc);
  3288. return 0;
  3289. out_free_resources:
  3290. ioc->remove_host = 1;
  3291. mpt2sas_base_free_resources(ioc);
  3292. _base_release_memory_pools(ioc);
  3293. pci_set_drvdata(ioc->pdev, NULL);
  3294. kfree(ioc->pd_handles);
  3295. kfree(ioc->tm_cmds.reply);
  3296. kfree(ioc->transport_cmds.reply);
  3297. kfree(ioc->scsih_cmds.reply);
  3298. kfree(ioc->config_cmds.reply);
  3299. kfree(ioc->base_cmds.reply);
  3300. kfree(ioc->ctl_cmds.reply);
  3301. kfree(ioc->ctl_cmds.sense);
  3302. kfree(ioc->pfacts);
  3303. ioc->ctl_cmds.reply = NULL;
  3304. ioc->base_cmds.reply = NULL;
  3305. ioc->tm_cmds.reply = NULL;
  3306. ioc->scsih_cmds.reply = NULL;
  3307. ioc->transport_cmds.reply = NULL;
  3308. ioc->config_cmds.reply = NULL;
  3309. ioc->pfacts = NULL;
  3310. return r;
  3311. }
  3312. /**
  3313. * mpt2sas_base_detach - remove controller instance
  3314. * @ioc: per adapter object
  3315. *
  3316. * Return nothing.
  3317. */
  3318. void
  3319. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3320. {
  3321. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3322. __func__));
  3323. mpt2sas_base_stop_watchdog(ioc);
  3324. mpt2sas_base_free_resources(ioc);
  3325. _base_release_memory_pools(ioc);
  3326. pci_set_drvdata(ioc->pdev, NULL);
  3327. kfree(ioc->pd_handles);
  3328. kfree(ioc->pfacts);
  3329. kfree(ioc->ctl_cmds.reply);
  3330. kfree(ioc->ctl_cmds.sense);
  3331. kfree(ioc->base_cmds.reply);
  3332. kfree(ioc->tm_cmds.reply);
  3333. kfree(ioc->transport_cmds.reply);
  3334. kfree(ioc->scsih_cmds.reply);
  3335. kfree(ioc->config_cmds.reply);
  3336. }
  3337. /**
  3338. * _base_reset_handler - reset callback handler (for base)
  3339. * @ioc: per adapter object
  3340. * @reset_phase: phase
  3341. *
  3342. * The handler for doing any required cleanup or initialization.
  3343. *
  3344. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3345. * MPT2_IOC_DONE_RESET
  3346. *
  3347. * Return nothing.
  3348. */
  3349. static void
  3350. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3351. {
  3352. switch (reset_phase) {
  3353. case MPT2_IOC_PRE_RESET:
  3354. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3355. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3356. break;
  3357. case MPT2_IOC_AFTER_RESET:
  3358. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3359. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3360. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3361. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3362. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3363. complete(&ioc->transport_cmds.done);
  3364. }
  3365. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3366. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3367. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3368. complete(&ioc->base_cmds.done);
  3369. }
  3370. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3371. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3372. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3373. ioc->config_cmds.smid = USHRT_MAX;
  3374. complete(&ioc->config_cmds.done);
  3375. }
  3376. break;
  3377. case MPT2_IOC_DONE_RESET:
  3378. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3379. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3380. break;
  3381. }
  3382. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3383. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3384. }
  3385. /**
  3386. * _wait_for_commands_to_complete - reset controller
  3387. * @ioc: Pointer to MPT_ADAPTER structure
  3388. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3389. *
  3390. * This function waiting(3s) for all pending commands to complete
  3391. * prior to putting controller in reset.
  3392. */
  3393. static void
  3394. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3395. {
  3396. u32 ioc_state;
  3397. unsigned long flags;
  3398. u16 i;
  3399. ioc->pending_io_count = 0;
  3400. if (sleep_flag != CAN_SLEEP)
  3401. return;
  3402. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3403. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3404. return;
  3405. /* pending command count */
  3406. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3407. for (i = 0; i < ioc->scsiio_depth; i++)
  3408. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3409. ioc->pending_io_count++;
  3410. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3411. if (!ioc->pending_io_count)
  3412. return;
  3413. /* wait for pending commands to complete */
  3414. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3415. }
  3416. /**
  3417. * mpt2sas_base_hard_reset_handler - reset controller
  3418. * @ioc: Pointer to MPT_ADAPTER structure
  3419. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3420. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3421. *
  3422. * Returns 0 for success, non-zero for failure.
  3423. */
  3424. int
  3425. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3426. enum reset_type type)
  3427. {
  3428. int r;
  3429. unsigned long flags;
  3430. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  3431. __func__));
  3432. if (ioc->pci_error_recovery) {
  3433. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  3434. ioc->name, __func__);
  3435. r = 0;
  3436. goto out;
  3437. }
  3438. if (mpt2sas_fwfault_debug)
  3439. mpt2sas_halt_firmware(ioc);
  3440. /* TODO - What we really should be doing is pulling
  3441. * out all the code associated with NO_SLEEP; its never used.
  3442. * That is legacy code from mpt fusion driver, ported over.
  3443. * I will leave this BUG_ON here for now till its been resolved.
  3444. */
  3445. BUG_ON(sleep_flag == NO_SLEEP);
  3446. /* wait for an active reset in progress to complete */
  3447. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  3448. do {
  3449. ssleep(1);
  3450. } while (ioc->shost_recovery == 1);
  3451. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3452. __func__));
  3453. return ioc->ioc_reset_in_progress_status;
  3454. }
  3455. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3456. ioc->shost_recovery = 1;
  3457. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3458. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3459. _wait_for_commands_to_complete(ioc, sleep_flag);
  3460. _base_mask_interrupts(ioc);
  3461. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3462. if (r)
  3463. goto out;
  3464. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3465. r = _base_make_ioc_operational(ioc, sleep_flag);
  3466. if (!r)
  3467. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3468. out:
  3469. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  3470. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3471. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3472. ioc->ioc_reset_in_progress_status = r;
  3473. ioc->shost_recovery = 0;
  3474. complete(&ioc->shost_recovery_done);
  3475. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3476. mutex_unlock(&ioc->reset_in_progress_mutex);
  3477. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3478. __func__));
  3479. return r;
  3480. }