hpsa.c 114 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <asm/atomic.h>
  50. #include <linux/kthread.h>
  51. #include "hpsa_cmd.h"
  52. #include "hpsa.h"
  53. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  54. #define HPSA_DRIVER_VERSION "2.0.2-1"
  55. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  56. /* How long to wait (in milliseconds) for board to go into simple mode */
  57. #define MAX_CONFIG_WAIT 30000
  58. #define MAX_IOCTL_CONFIG_WAIT 1000
  59. /*define how many times we will try a command because of bus resets */
  60. #define MAX_CMD_RETRIES 3
  61. /* Embedded module documentation macros - see modules.h */
  62. MODULE_AUTHOR("Hewlett-Packard Company");
  63. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  64. HPSA_DRIVER_VERSION);
  65. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  66. MODULE_VERSION(HPSA_DRIVER_VERSION);
  67. MODULE_LICENSE("GPL");
  68. static int hpsa_allow_any;
  69. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  70. MODULE_PARM_DESC(hpsa_allow_any,
  71. "Allow hpsa driver to access unknown HP Smart Array hardware");
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id hpsa_pci_device_id[] = {
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  87. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  89. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  90. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  91. {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  92. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  93. {0,}
  94. };
  95. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  96. /* board_id = Subsystem Device ID & Vendor ID
  97. * product = Marketing Name for the board
  98. * access = Address of the struct of function pointers
  99. */
  100. static struct board_type products[] = {
  101. {0x3241103C, "Smart Array P212", &SA5_access},
  102. {0x3243103C, "Smart Array P410", &SA5_access},
  103. {0x3245103C, "Smart Array P410i", &SA5_access},
  104. {0x3247103C, "Smart Array P411", &SA5_access},
  105. {0x3249103C, "Smart Array P812", &SA5_access},
  106. {0x324a103C, "Smart Array P712m", &SA5_access},
  107. {0x324b103C, "Smart Array P711m", &SA5_access},
  108. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  109. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  110. {0x3250103C, "Smart Array", &SA5_access},
  111. {0x3250113C, "Smart Array", &SA5_access},
  112. {0x3250123C, "Smart Array", &SA5_access},
  113. {0x3250133C, "Smart Array", &SA5_access},
  114. {0x3250143C, "Smart Array", &SA5_access},
  115. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  116. };
  117. static int number_of_controllers;
  118. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  119. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  120. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  121. static void start_io(struct ctlr_info *h);
  122. #ifdef CONFIG_COMPAT
  123. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  124. #endif
  125. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  126. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  127. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  128. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  129. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  130. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  131. int cmd_type);
  132. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  133. void (*done)(struct scsi_cmnd *));
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static ssize_t raid_level_show(struct device *dev,
  143. struct device_attribute *attr, char *buf);
  144. static ssize_t lunid_show(struct device *dev,
  145. struct device_attribute *attr, char *buf);
  146. static ssize_t unique_id_show(struct device *dev,
  147. struct device_attribute *attr, char *buf);
  148. static ssize_t host_show_firmware_revision(struct device *dev,
  149. struct device_attribute *attr, char *buf);
  150. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  151. static ssize_t host_store_rescan(struct device *dev,
  152. struct device_attribute *attr, const char *buf, size_t count);
  153. static int check_for_unit_attention(struct ctlr_info *h,
  154. struct CommandList *c);
  155. static void check_ioctl_unit_attention(struct ctlr_info *h,
  156. struct CommandList *c);
  157. /* performant mode helper functions */
  158. static void calc_bucket_map(int *bucket, int num_buckets,
  159. int nsgs, int *bucket_map);
  160. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  161. static inline u32 next_command(struct ctlr_info *h);
  162. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  163. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  164. u64 *cfg_offset);
  165. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  166. unsigned long *memory_bar);
  167. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  168. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  169. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  170. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  171. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  172. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  173. host_show_firmware_revision, NULL);
  174. static struct device_attribute *hpsa_sdev_attrs[] = {
  175. &dev_attr_raid_level,
  176. &dev_attr_lunid,
  177. &dev_attr_unique_id,
  178. NULL,
  179. };
  180. static struct device_attribute *hpsa_shost_attrs[] = {
  181. &dev_attr_rescan,
  182. &dev_attr_firmware_revision,
  183. NULL,
  184. };
  185. static struct scsi_host_template hpsa_driver_template = {
  186. .module = THIS_MODULE,
  187. .name = "hpsa",
  188. .proc_name = "hpsa",
  189. .queuecommand = hpsa_scsi_queue_command,
  190. .scan_start = hpsa_scan_start,
  191. .scan_finished = hpsa_scan_finished,
  192. .change_queue_depth = hpsa_change_queue_depth,
  193. .this_id = -1,
  194. .use_clustering = ENABLE_CLUSTERING,
  195. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  196. .ioctl = hpsa_ioctl,
  197. .slave_alloc = hpsa_slave_alloc,
  198. .slave_destroy = hpsa_slave_destroy,
  199. #ifdef CONFIG_COMPAT
  200. .compat_ioctl = hpsa_compat_ioctl,
  201. #endif
  202. .sdev_attrs = hpsa_sdev_attrs,
  203. .shost_attrs = hpsa_shost_attrs,
  204. };
  205. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  206. {
  207. unsigned long *priv = shost_priv(sdev->host);
  208. return (struct ctlr_info *) *priv;
  209. }
  210. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  211. {
  212. unsigned long *priv = shost_priv(sh);
  213. return (struct ctlr_info *) *priv;
  214. }
  215. static int check_for_unit_attention(struct ctlr_info *h,
  216. struct CommandList *c)
  217. {
  218. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  219. return 0;
  220. switch (c->err_info->SenseInfo[12]) {
  221. case STATE_CHANGED:
  222. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  223. "detected, command retried\n", h->ctlr);
  224. break;
  225. case LUN_FAILED:
  226. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  227. "detected, action required\n", h->ctlr);
  228. break;
  229. case REPORT_LUNS_CHANGED:
  230. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  231. "changed, action required\n", h->ctlr);
  232. /*
  233. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  234. */
  235. break;
  236. case POWER_OR_RESET:
  237. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  238. "or device reset detected\n", h->ctlr);
  239. break;
  240. case UNIT_ATTENTION_CLEARED:
  241. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  242. "cleared by another initiator\n", h->ctlr);
  243. break;
  244. default:
  245. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  246. "unit attention detected\n", h->ctlr);
  247. break;
  248. }
  249. return 1;
  250. }
  251. static ssize_t host_store_rescan(struct device *dev,
  252. struct device_attribute *attr,
  253. const char *buf, size_t count)
  254. {
  255. struct ctlr_info *h;
  256. struct Scsi_Host *shost = class_to_shost(dev);
  257. h = shost_to_hba(shost);
  258. hpsa_scan_start(h->scsi_host);
  259. return count;
  260. }
  261. static ssize_t host_show_firmware_revision(struct device *dev,
  262. struct device_attribute *attr, char *buf)
  263. {
  264. struct ctlr_info *h;
  265. struct Scsi_Host *shost = class_to_shost(dev);
  266. unsigned char *fwrev;
  267. h = shost_to_hba(shost);
  268. if (!h->hba_inquiry_data)
  269. return 0;
  270. fwrev = &h->hba_inquiry_data[32];
  271. return snprintf(buf, 20, "%c%c%c%c\n",
  272. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  273. }
  274. /* Enqueuing and dequeuing functions for cmdlists. */
  275. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  276. {
  277. hlist_add_head(&c->list, list);
  278. }
  279. static inline u32 next_command(struct ctlr_info *h)
  280. {
  281. u32 a;
  282. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  283. return h->access.command_completed(h);
  284. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  285. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  286. (h->reply_pool_head)++;
  287. h->commands_outstanding--;
  288. } else {
  289. a = FIFO_EMPTY;
  290. }
  291. /* Check for wraparound */
  292. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  293. h->reply_pool_head = h->reply_pool;
  294. h->reply_pool_wraparound ^= 1;
  295. }
  296. return a;
  297. }
  298. /* set_performant_mode: Modify the tag for cciss performant
  299. * set bit 0 for pull model, bits 3-1 for block fetch
  300. * register number
  301. */
  302. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  303. {
  304. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  305. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  306. }
  307. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  308. struct CommandList *c)
  309. {
  310. unsigned long flags;
  311. set_performant_mode(h, c);
  312. spin_lock_irqsave(&h->lock, flags);
  313. addQ(&h->reqQ, c);
  314. h->Qdepth++;
  315. start_io(h);
  316. spin_unlock_irqrestore(&h->lock, flags);
  317. }
  318. static inline void removeQ(struct CommandList *c)
  319. {
  320. if (WARN_ON(hlist_unhashed(&c->list)))
  321. return;
  322. hlist_del_init(&c->list);
  323. }
  324. static inline int is_hba_lunid(unsigned char scsi3addr[])
  325. {
  326. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  327. }
  328. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  329. {
  330. return (scsi3addr[3] & 0xC0) == 0x40;
  331. }
  332. static inline int is_scsi_rev_5(struct ctlr_info *h)
  333. {
  334. if (!h->hba_inquiry_data)
  335. return 0;
  336. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  337. return 1;
  338. return 0;
  339. }
  340. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  341. "UNKNOWN"
  342. };
  343. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  344. static ssize_t raid_level_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. ssize_t l = 0;
  348. unsigned char rlevel;
  349. struct ctlr_info *h;
  350. struct scsi_device *sdev;
  351. struct hpsa_scsi_dev_t *hdev;
  352. unsigned long flags;
  353. sdev = to_scsi_device(dev);
  354. h = sdev_to_hba(sdev);
  355. spin_lock_irqsave(&h->lock, flags);
  356. hdev = sdev->hostdata;
  357. if (!hdev) {
  358. spin_unlock_irqrestore(&h->lock, flags);
  359. return -ENODEV;
  360. }
  361. /* Is this even a logical drive? */
  362. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  363. spin_unlock_irqrestore(&h->lock, flags);
  364. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  365. return l;
  366. }
  367. rlevel = hdev->raid_level;
  368. spin_unlock_irqrestore(&h->lock, flags);
  369. if (rlevel > RAID_UNKNOWN)
  370. rlevel = RAID_UNKNOWN;
  371. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  372. return l;
  373. }
  374. static ssize_t lunid_show(struct device *dev,
  375. struct device_attribute *attr, char *buf)
  376. {
  377. struct ctlr_info *h;
  378. struct scsi_device *sdev;
  379. struct hpsa_scsi_dev_t *hdev;
  380. unsigned long flags;
  381. unsigned char lunid[8];
  382. sdev = to_scsi_device(dev);
  383. h = sdev_to_hba(sdev);
  384. spin_lock_irqsave(&h->lock, flags);
  385. hdev = sdev->hostdata;
  386. if (!hdev) {
  387. spin_unlock_irqrestore(&h->lock, flags);
  388. return -ENODEV;
  389. }
  390. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  391. spin_unlock_irqrestore(&h->lock, flags);
  392. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  393. lunid[0], lunid[1], lunid[2], lunid[3],
  394. lunid[4], lunid[5], lunid[6], lunid[7]);
  395. }
  396. static ssize_t unique_id_show(struct device *dev,
  397. struct device_attribute *attr, char *buf)
  398. {
  399. struct ctlr_info *h;
  400. struct scsi_device *sdev;
  401. struct hpsa_scsi_dev_t *hdev;
  402. unsigned long flags;
  403. unsigned char sn[16];
  404. sdev = to_scsi_device(dev);
  405. h = sdev_to_hba(sdev);
  406. spin_lock_irqsave(&h->lock, flags);
  407. hdev = sdev->hostdata;
  408. if (!hdev) {
  409. spin_unlock_irqrestore(&h->lock, flags);
  410. return -ENODEV;
  411. }
  412. memcpy(sn, hdev->device_id, sizeof(sn));
  413. spin_unlock_irqrestore(&h->lock, flags);
  414. return snprintf(buf, 16 * 2 + 2,
  415. "%02X%02X%02X%02X%02X%02X%02X%02X"
  416. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  417. sn[0], sn[1], sn[2], sn[3],
  418. sn[4], sn[5], sn[6], sn[7],
  419. sn[8], sn[9], sn[10], sn[11],
  420. sn[12], sn[13], sn[14], sn[15]);
  421. }
  422. static int hpsa_find_target_lun(struct ctlr_info *h,
  423. unsigned char scsi3addr[], int bus, int *target, int *lun)
  424. {
  425. /* finds an unused bus, target, lun for a new physical device
  426. * assumes h->devlock is held
  427. */
  428. int i, found = 0;
  429. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  430. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  431. for (i = 0; i < h->ndevices; i++) {
  432. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  433. set_bit(h->dev[i]->target, lun_taken);
  434. }
  435. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  436. if (!test_bit(i, lun_taken)) {
  437. /* *bus = 1; */
  438. *target = i;
  439. *lun = 0;
  440. found = 1;
  441. break;
  442. }
  443. }
  444. return !found;
  445. }
  446. /* Add an entry into h->dev[] array. */
  447. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  448. struct hpsa_scsi_dev_t *device,
  449. struct hpsa_scsi_dev_t *added[], int *nadded)
  450. {
  451. /* assumes h->devlock is held */
  452. int n = h->ndevices;
  453. int i;
  454. unsigned char addr1[8], addr2[8];
  455. struct hpsa_scsi_dev_t *sd;
  456. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  457. dev_err(&h->pdev->dev, "too many devices, some will be "
  458. "inaccessible.\n");
  459. return -1;
  460. }
  461. /* physical devices do not have lun or target assigned until now. */
  462. if (device->lun != -1)
  463. /* Logical device, lun is already assigned. */
  464. goto lun_assigned;
  465. /* If this device a non-zero lun of a multi-lun device
  466. * byte 4 of the 8-byte LUN addr will contain the logical
  467. * unit no, zero otherise.
  468. */
  469. if (device->scsi3addr[4] == 0) {
  470. /* This is not a non-zero lun of a multi-lun device */
  471. if (hpsa_find_target_lun(h, device->scsi3addr,
  472. device->bus, &device->target, &device->lun) != 0)
  473. return -1;
  474. goto lun_assigned;
  475. }
  476. /* This is a non-zero lun of a multi-lun device.
  477. * Search through our list and find the device which
  478. * has the same 8 byte LUN address, excepting byte 4.
  479. * Assign the same bus and target for this new LUN.
  480. * Use the logical unit number from the firmware.
  481. */
  482. memcpy(addr1, device->scsi3addr, 8);
  483. addr1[4] = 0;
  484. for (i = 0; i < n; i++) {
  485. sd = h->dev[i];
  486. memcpy(addr2, sd->scsi3addr, 8);
  487. addr2[4] = 0;
  488. /* differ only in byte 4? */
  489. if (memcmp(addr1, addr2, 8) == 0) {
  490. device->bus = sd->bus;
  491. device->target = sd->target;
  492. device->lun = device->scsi3addr[4];
  493. break;
  494. }
  495. }
  496. if (device->lun == -1) {
  497. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  498. " suspect firmware bug or unsupported hardware "
  499. "configuration.\n");
  500. return -1;
  501. }
  502. lun_assigned:
  503. h->dev[n] = device;
  504. h->ndevices++;
  505. added[*nadded] = device;
  506. (*nadded)++;
  507. /* initially, (before registering with scsi layer) we don't
  508. * know our hostno and we don't want to print anything first
  509. * time anyway (the scsi layer's inquiries will show that info)
  510. */
  511. /* if (hostno != -1) */
  512. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  513. scsi_device_type(device->devtype), hostno,
  514. device->bus, device->target, device->lun);
  515. return 0;
  516. }
  517. /* Replace an entry from h->dev[] array. */
  518. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  519. int entry, struct hpsa_scsi_dev_t *new_entry,
  520. struct hpsa_scsi_dev_t *added[], int *nadded,
  521. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  522. {
  523. /* assumes h->devlock is held */
  524. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  525. removed[*nremoved] = h->dev[entry];
  526. (*nremoved)++;
  527. h->dev[entry] = new_entry;
  528. added[*nadded] = new_entry;
  529. (*nadded)++;
  530. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  531. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  532. new_entry->target, new_entry->lun);
  533. }
  534. /* Remove an entry from h->dev[] array. */
  535. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  536. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  537. {
  538. /* assumes h->devlock is held */
  539. int i;
  540. struct hpsa_scsi_dev_t *sd;
  541. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  542. sd = h->dev[entry];
  543. removed[*nremoved] = h->dev[entry];
  544. (*nremoved)++;
  545. for (i = entry; i < h->ndevices-1; i++)
  546. h->dev[i] = h->dev[i+1];
  547. h->ndevices--;
  548. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  549. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  550. sd->lun);
  551. }
  552. #define SCSI3ADDR_EQ(a, b) ( \
  553. (a)[7] == (b)[7] && \
  554. (a)[6] == (b)[6] && \
  555. (a)[5] == (b)[5] && \
  556. (a)[4] == (b)[4] && \
  557. (a)[3] == (b)[3] && \
  558. (a)[2] == (b)[2] && \
  559. (a)[1] == (b)[1] && \
  560. (a)[0] == (b)[0])
  561. static void fixup_botched_add(struct ctlr_info *h,
  562. struct hpsa_scsi_dev_t *added)
  563. {
  564. /* called when scsi_add_device fails in order to re-adjust
  565. * h->dev[] to match the mid layer's view.
  566. */
  567. unsigned long flags;
  568. int i, j;
  569. spin_lock_irqsave(&h->lock, flags);
  570. for (i = 0; i < h->ndevices; i++) {
  571. if (h->dev[i] == added) {
  572. for (j = i; j < h->ndevices-1; j++)
  573. h->dev[j] = h->dev[j+1];
  574. h->ndevices--;
  575. break;
  576. }
  577. }
  578. spin_unlock_irqrestore(&h->lock, flags);
  579. kfree(added);
  580. }
  581. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  582. struct hpsa_scsi_dev_t *dev2)
  583. {
  584. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  585. (dev1->lun != -1 && dev2->lun != -1)) &&
  586. dev1->devtype != 0x0C)
  587. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  588. /* we compare everything except lun and target as these
  589. * are not yet assigned. Compare parts likely
  590. * to differ first
  591. */
  592. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  593. sizeof(dev1->scsi3addr)) != 0)
  594. return 0;
  595. if (memcmp(dev1->device_id, dev2->device_id,
  596. sizeof(dev1->device_id)) != 0)
  597. return 0;
  598. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  599. return 0;
  600. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  601. return 0;
  602. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  603. return 0;
  604. if (dev1->devtype != dev2->devtype)
  605. return 0;
  606. if (dev1->raid_level != dev2->raid_level)
  607. return 0;
  608. if (dev1->bus != dev2->bus)
  609. return 0;
  610. return 1;
  611. }
  612. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  613. * and return needle location in *index. If scsi3addr matches, but not
  614. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  615. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  616. */
  617. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  618. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  619. int *index)
  620. {
  621. int i;
  622. #define DEVICE_NOT_FOUND 0
  623. #define DEVICE_CHANGED 1
  624. #define DEVICE_SAME 2
  625. for (i = 0; i < haystack_size; i++) {
  626. if (haystack[i] == NULL) /* previously removed. */
  627. continue;
  628. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  629. *index = i;
  630. if (device_is_the_same(needle, haystack[i]))
  631. return DEVICE_SAME;
  632. else
  633. return DEVICE_CHANGED;
  634. }
  635. }
  636. *index = -1;
  637. return DEVICE_NOT_FOUND;
  638. }
  639. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  640. struct hpsa_scsi_dev_t *sd[], int nsds)
  641. {
  642. /* sd contains scsi3 addresses and devtypes, and inquiry
  643. * data. This function takes what's in sd to be the current
  644. * reality and updates h->dev[] to reflect that reality.
  645. */
  646. int i, entry, device_change, changes = 0;
  647. struct hpsa_scsi_dev_t *csd;
  648. unsigned long flags;
  649. struct hpsa_scsi_dev_t **added, **removed;
  650. int nadded, nremoved;
  651. struct Scsi_Host *sh = NULL;
  652. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  653. GFP_KERNEL);
  654. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  655. GFP_KERNEL);
  656. if (!added || !removed) {
  657. dev_warn(&h->pdev->dev, "out of memory in "
  658. "adjust_hpsa_scsi_table\n");
  659. goto free_and_out;
  660. }
  661. spin_lock_irqsave(&h->devlock, flags);
  662. /* find any devices in h->dev[] that are not in
  663. * sd[] and remove them from h->dev[], and for any
  664. * devices which have changed, remove the old device
  665. * info and add the new device info.
  666. */
  667. i = 0;
  668. nremoved = 0;
  669. nadded = 0;
  670. while (i < h->ndevices) {
  671. csd = h->dev[i];
  672. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  673. if (device_change == DEVICE_NOT_FOUND) {
  674. changes++;
  675. hpsa_scsi_remove_entry(h, hostno, i,
  676. removed, &nremoved);
  677. continue; /* remove ^^^, hence i not incremented */
  678. } else if (device_change == DEVICE_CHANGED) {
  679. changes++;
  680. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  681. added, &nadded, removed, &nremoved);
  682. /* Set it to NULL to prevent it from being freed
  683. * at the bottom of hpsa_update_scsi_devices()
  684. */
  685. sd[entry] = NULL;
  686. }
  687. i++;
  688. }
  689. /* Now, make sure every device listed in sd[] is also
  690. * listed in h->dev[], adding them if they aren't found
  691. */
  692. for (i = 0; i < nsds; i++) {
  693. if (!sd[i]) /* if already added above. */
  694. continue;
  695. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  696. h->ndevices, &entry);
  697. if (device_change == DEVICE_NOT_FOUND) {
  698. changes++;
  699. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  700. added, &nadded) != 0)
  701. break;
  702. sd[i] = NULL; /* prevent from being freed later. */
  703. } else if (device_change == DEVICE_CHANGED) {
  704. /* should never happen... */
  705. changes++;
  706. dev_warn(&h->pdev->dev,
  707. "device unexpectedly changed.\n");
  708. /* but if it does happen, we just ignore that device */
  709. }
  710. }
  711. spin_unlock_irqrestore(&h->devlock, flags);
  712. /* Don't notify scsi mid layer of any changes the first time through
  713. * (or if there are no changes) scsi_scan_host will do it later the
  714. * first time through.
  715. */
  716. if (hostno == -1 || !changes)
  717. goto free_and_out;
  718. sh = h->scsi_host;
  719. /* Notify scsi mid layer of any removed devices */
  720. for (i = 0; i < nremoved; i++) {
  721. struct scsi_device *sdev =
  722. scsi_device_lookup(sh, removed[i]->bus,
  723. removed[i]->target, removed[i]->lun);
  724. if (sdev != NULL) {
  725. scsi_remove_device(sdev);
  726. scsi_device_put(sdev);
  727. } else {
  728. /* We don't expect to get here.
  729. * future cmds to this device will get selection
  730. * timeout as if the device was gone.
  731. */
  732. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  733. " for removal.", hostno, removed[i]->bus,
  734. removed[i]->target, removed[i]->lun);
  735. }
  736. kfree(removed[i]);
  737. removed[i] = NULL;
  738. }
  739. /* Notify scsi mid layer of any added devices */
  740. for (i = 0; i < nadded; i++) {
  741. if (scsi_add_device(sh, added[i]->bus,
  742. added[i]->target, added[i]->lun) == 0)
  743. continue;
  744. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  745. "device not added.\n", hostno, added[i]->bus,
  746. added[i]->target, added[i]->lun);
  747. /* now we have to remove it from h->dev,
  748. * since it didn't get added to scsi mid layer
  749. */
  750. fixup_botched_add(h, added[i]);
  751. }
  752. free_and_out:
  753. kfree(added);
  754. kfree(removed);
  755. }
  756. /*
  757. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  758. * Assume's h->devlock is held.
  759. */
  760. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  761. int bus, int target, int lun)
  762. {
  763. int i;
  764. struct hpsa_scsi_dev_t *sd;
  765. for (i = 0; i < h->ndevices; i++) {
  766. sd = h->dev[i];
  767. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  768. return sd;
  769. }
  770. return NULL;
  771. }
  772. /* link sdev->hostdata to our per-device structure. */
  773. static int hpsa_slave_alloc(struct scsi_device *sdev)
  774. {
  775. struct hpsa_scsi_dev_t *sd;
  776. unsigned long flags;
  777. struct ctlr_info *h;
  778. h = sdev_to_hba(sdev);
  779. spin_lock_irqsave(&h->devlock, flags);
  780. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  781. sdev_id(sdev), sdev->lun);
  782. if (sd != NULL)
  783. sdev->hostdata = sd;
  784. spin_unlock_irqrestore(&h->devlock, flags);
  785. return 0;
  786. }
  787. static void hpsa_slave_destroy(struct scsi_device *sdev)
  788. {
  789. /* nothing to do. */
  790. }
  791. static void hpsa_scsi_setup(struct ctlr_info *h)
  792. {
  793. h->ndevices = 0;
  794. h->scsi_host = NULL;
  795. spin_lock_init(&h->devlock);
  796. }
  797. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  798. {
  799. int i;
  800. if (!h->cmd_sg_list)
  801. return;
  802. for (i = 0; i < h->nr_cmds; i++) {
  803. kfree(h->cmd_sg_list[i]);
  804. h->cmd_sg_list[i] = NULL;
  805. }
  806. kfree(h->cmd_sg_list);
  807. h->cmd_sg_list = NULL;
  808. }
  809. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  810. {
  811. int i;
  812. if (h->chainsize <= 0)
  813. return 0;
  814. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  815. GFP_KERNEL);
  816. if (!h->cmd_sg_list)
  817. return -ENOMEM;
  818. for (i = 0; i < h->nr_cmds; i++) {
  819. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  820. h->chainsize, GFP_KERNEL);
  821. if (!h->cmd_sg_list[i])
  822. goto clean;
  823. }
  824. return 0;
  825. clean:
  826. hpsa_free_sg_chain_blocks(h);
  827. return -ENOMEM;
  828. }
  829. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  830. struct CommandList *c)
  831. {
  832. struct SGDescriptor *chain_sg, *chain_block;
  833. u64 temp64;
  834. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  835. chain_block = h->cmd_sg_list[c->cmdindex];
  836. chain_sg->Ext = HPSA_SG_CHAIN;
  837. chain_sg->Len = sizeof(*chain_sg) *
  838. (c->Header.SGTotal - h->max_cmd_sg_entries);
  839. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  840. PCI_DMA_TODEVICE);
  841. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  842. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  843. }
  844. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  845. struct CommandList *c)
  846. {
  847. struct SGDescriptor *chain_sg;
  848. union u64bit temp64;
  849. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  850. return;
  851. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  852. temp64.val32.lower = chain_sg->Addr.lower;
  853. temp64.val32.upper = chain_sg->Addr.upper;
  854. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  855. }
  856. static void complete_scsi_command(struct CommandList *cp,
  857. int timeout, u32 tag)
  858. {
  859. struct scsi_cmnd *cmd;
  860. struct ctlr_info *h;
  861. struct ErrorInfo *ei;
  862. unsigned char sense_key;
  863. unsigned char asc; /* additional sense code */
  864. unsigned char ascq; /* additional sense code qualifier */
  865. ei = cp->err_info;
  866. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  867. h = cp->h;
  868. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  869. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  870. hpsa_unmap_sg_chain_block(h, cp);
  871. cmd->result = (DID_OK << 16); /* host byte */
  872. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  873. cmd->result |= ei->ScsiStatus;
  874. /* copy the sense data whether we need to or not. */
  875. memcpy(cmd->sense_buffer, ei->SenseInfo,
  876. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  877. SCSI_SENSE_BUFFERSIZE :
  878. ei->SenseLen);
  879. scsi_set_resid(cmd, ei->ResidualCnt);
  880. if (ei->CommandStatus == 0) {
  881. cmd->scsi_done(cmd);
  882. cmd_free(h, cp);
  883. return;
  884. }
  885. /* an error has occurred */
  886. switch (ei->CommandStatus) {
  887. case CMD_TARGET_STATUS:
  888. if (ei->ScsiStatus) {
  889. /* Get sense key */
  890. sense_key = 0xf & ei->SenseInfo[2];
  891. /* Get additional sense code */
  892. asc = ei->SenseInfo[12];
  893. /* Get addition sense code qualifier */
  894. ascq = ei->SenseInfo[13];
  895. }
  896. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  897. if (check_for_unit_attention(h, cp)) {
  898. cmd->result = DID_SOFT_ERROR << 16;
  899. break;
  900. }
  901. if (sense_key == ILLEGAL_REQUEST) {
  902. /*
  903. * SCSI REPORT_LUNS is commonly unsupported on
  904. * Smart Array. Suppress noisy complaint.
  905. */
  906. if (cp->Request.CDB[0] == REPORT_LUNS)
  907. break;
  908. /* If ASC/ASCQ indicate Logical Unit
  909. * Not Supported condition,
  910. */
  911. if ((asc == 0x25) && (ascq == 0x0)) {
  912. dev_warn(&h->pdev->dev, "cp %p "
  913. "has check condition\n", cp);
  914. break;
  915. }
  916. }
  917. if (sense_key == NOT_READY) {
  918. /* If Sense is Not Ready, Logical Unit
  919. * Not ready, Manual Intervention
  920. * required
  921. */
  922. if ((asc == 0x04) && (ascq == 0x03)) {
  923. dev_warn(&h->pdev->dev, "cp %p "
  924. "has check condition: unit "
  925. "not ready, manual "
  926. "intervention required\n", cp);
  927. break;
  928. }
  929. }
  930. if (sense_key == ABORTED_COMMAND) {
  931. /* Aborted command is retryable */
  932. dev_warn(&h->pdev->dev, "cp %p "
  933. "has check condition: aborted command: "
  934. "ASC: 0x%x, ASCQ: 0x%x\n",
  935. cp, asc, ascq);
  936. cmd->result = DID_SOFT_ERROR << 16;
  937. break;
  938. }
  939. /* Must be some other type of check condition */
  940. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  941. "unknown type: "
  942. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  943. "Returning result: 0x%x, "
  944. "cmd=[%02x %02x %02x %02x %02x "
  945. "%02x %02x %02x %02x %02x %02x "
  946. "%02x %02x %02x %02x %02x]\n",
  947. cp, sense_key, asc, ascq,
  948. cmd->result,
  949. cmd->cmnd[0], cmd->cmnd[1],
  950. cmd->cmnd[2], cmd->cmnd[3],
  951. cmd->cmnd[4], cmd->cmnd[5],
  952. cmd->cmnd[6], cmd->cmnd[7],
  953. cmd->cmnd[8], cmd->cmnd[9],
  954. cmd->cmnd[10], cmd->cmnd[11],
  955. cmd->cmnd[12], cmd->cmnd[13],
  956. cmd->cmnd[14], cmd->cmnd[15]);
  957. break;
  958. }
  959. /* Problem was not a check condition
  960. * Pass it up to the upper layers...
  961. */
  962. if (ei->ScsiStatus) {
  963. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  964. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  965. "Returning result: 0x%x\n",
  966. cp, ei->ScsiStatus,
  967. sense_key, asc, ascq,
  968. cmd->result);
  969. } else { /* scsi status is zero??? How??? */
  970. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  971. "Returning no connection.\n", cp),
  972. /* Ordinarily, this case should never happen,
  973. * but there is a bug in some released firmware
  974. * revisions that allows it to happen if, for
  975. * example, a 4100 backplane loses power and
  976. * the tape drive is in it. We assume that
  977. * it's a fatal error of some kind because we
  978. * can't show that it wasn't. We will make it
  979. * look like selection timeout since that is
  980. * the most common reason for this to occur,
  981. * and it's severe enough.
  982. */
  983. cmd->result = DID_NO_CONNECT << 16;
  984. }
  985. break;
  986. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  987. break;
  988. case CMD_DATA_OVERRUN:
  989. dev_warn(&h->pdev->dev, "cp %p has"
  990. " completed with data overrun "
  991. "reported\n", cp);
  992. break;
  993. case CMD_INVALID: {
  994. /* print_bytes(cp, sizeof(*cp), 1, 0);
  995. print_cmd(cp); */
  996. /* We get CMD_INVALID if you address a non-existent device
  997. * instead of a selection timeout (no response). You will
  998. * see this if you yank out a drive, then try to access it.
  999. * This is kind of a shame because it means that any other
  1000. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1001. * missing target. */
  1002. cmd->result = DID_NO_CONNECT << 16;
  1003. }
  1004. break;
  1005. case CMD_PROTOCOL_ERR:
  1006. dev_warn(&h->pdev->dev, "cp %p has "
  1007. "protocol error \n", cp);
  1008. break;
  1009. case CMD_HARDWARE_ERR:
  1010. cmd->result = DID_ERROR << 16;
  1011. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1012. break;
  1013. case CMD_CONNECTION_LOST:
  1014. cmd->result = DID_ERROR << 16;
  1015. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1016. break;
  1017. case CMD_ABORTED:
  1018. cmd->result = DID_ABORT << 16;
  1019. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1020. cp, ei->ScsiStatus);
  1021. break;
  1022. case CMD_ABORT_FAILED:
  1023. cmd->result = DID_ERROR << 16;
  1024. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1025. break;
  1026. case CMD_UNSOLICITED_ABORT:
  1027. cmd->result = DID_RESET << 16;
  1028. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1029. "abort\n", cp);
  1030. break;
  1031. case CMD_TIMEOUT:
  1032. cmd->result = DID_TIME_OUT << 16;
  1033. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1034. break;
  1035. default:
  1036. cmd->result = DID_ERROR << 16;
  1037. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1038. cp, ei->CommandStatus);
  1039. }
  1040. cmd->scsi_done(cmd);
  1041. cmd_free(h, cp);
  1042. }
  1043. static int hpsa_scsi_detect(struct ctlr_info *h)
  1044. {
  1045. struct Scsi_Host *sh;
  1046. int error;
  1047. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1048. if (sh == NULL)
  1049. goto fail;
  1050. sh->io_port = 0;
  1051. sh->n_io_port = 0;
  1052. sh->this_id = -1;
  1053. sh->max_channel = 3;
  1054. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1055. sh->max_lun = HPSA_MAX_LUN;
  1056. sh->max_id = HPSA_MAX_LUN;
  1057. sh->can_queue = h->nr_cmds;
  1058. sh->cmd_per_lun = h->nr_cmds;
  1059. sh->sg_tablesize = h->maxsgentries;
  1060. h->scsi_host = sh;
  1061. sh->hostdata[0] = (unsigned long) h;
  1062. sh->irq = h->intr[PERF_MODE_INT];
  1063. sh->unique_id = sh->irq;
  1064. error = scsi_add_host(sh, &h->pdev->dev);
  1065. if (error)
  1066. goto fail_host_put;
  1067. scsi_scan_host(sh);
  1068. return 0;
  1069. fail_host_put:
  1070. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1071. " failed for controller %d\n", h->ctlr);
  1072. scsi_host_put(sh);
  1073. return error;
  1074. fail:
  1075. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1076. " failed for controller %d\n", h->ctlr);
  1077. return -ENOMEM;
  1078. }
  1079. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1080. struct CommandList *c, int sg_used, int data_direction)
  1081. {
  1082. int i;
  1083. union u64bit addr64;
  1084. for (i = 0; i < sg_used; i++) {
  1085. addr64.val32.lower = c->SG[i].Addr.lower;
  1086. addr64.val32.upper = c->SG[i].Addr.upper;
  1087. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1088. data_direction);
  1089. }
  1090. }
  1091. static void hpsa_map_one(struct pci_dev *pdev,
  1092. struct CommandList *cp,
  1093. unsigned char *buf,
  1094. size_t buflen,
  1095. int data_direction)
  1096. {
  1097. u64 addr64;
  1098. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1099. cp->Header.SGList = 0;
  1100. cp->Header.SGTotal = 0;
  1101. return;
  1102. }
  1103. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1104. cp->SG[0].Addr.lower =
  1105. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1106. cp->SG[0].Addr.upper =
  1107. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1108. cp->SG[0].Len = buflen;
  1109. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1110. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1111. }
  1112. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1113. struct CommandList *c)
  1114. {
  1115. DECLARE_COMPLETION_ONSTACK(wait);
  1116. c->waiting = &wait;
  1117. enqueue_cmd_and_start_io(h, c);
  1118. wait_for_completion(&wait);
  1119. }
  1120. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1121. struct CommandList *c, int data_direction)
  1122. {
  1123. int retry_count = 0;
  1124. do {
  1125. memset(c->err_info, 0, sizeof(c->err_info));
  1126. hpsa_scsi_do_simple_cmd_core(h, c);
  1127. retry_count++;
  1128. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1129. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1130. }
  1131. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1132. {
  1133. struct ErrorInfo *ei;
  1134. struct device *d = &cp->h->pdev->dev;
  1135. ei = cp->err_info;
  1136. switch (ei->CommandStatus) {
  1137. case CMD_TARGET_STATUS:
  1138. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1139. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1140. ei->ScsiStatus);
  1141. if (ei->ScsiStatus == 0)
  1142. dev_warn(d, "SCSI status is abnormally zero. "
  1143. "(probably indicates selection timeout "
  1144. "reported incorrectly due to a known "
  1145. "firmware bug, circa July, 2001.)\n");
  1146. break;
  1147. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1148. dev_info(d, "UNDERRUN\n");
  1149. break;
  1150. case CMD_DATA_OVERRUN:
  1151. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1152. break;
  1153. case CMD_INVALID: {
  1154. /* controller unfortunately reports SCSI passthru's
  1155. * to non-existent targets as invalid commands.
  1156. */
  1157. dev_warn(d, "cp %p is reported invalid (probably means "
  1158. "target device no longer present)\n", cp);
  1159. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1160. print_cmd(cp); */
  1161. }
  1162. break;
  1163. case CMD_PROTOCOL_ERR:
  1164. dev_warn(d, "cp %p has protocol error \n", cp);
  1165. break;
  1166. case CMD_HARDWARE_ERR:
  1167. /* cmd->result = DID_ERROR << 16; */
  1168. dev_warn(d, "cp %p had hardware error\n", cp);
  1169. break;
  1170. case CMD_CONNECTION_LOST:
  1171. dev_warn(d, "cp %p had connection lost\n", cp);
  1172. break;
  1173. case CMD_ABORTED:
  1174. dev_warn(d, "cp %p was aborted\n", cp);
  1175. break;
  1176. case CMD_ABORT_FAILED:
  1177. dev_warn(d, "cp %p reports abort failed\n", cp);
  1178. break;
  1179. case CMD_UNSOLICITED_ABORT:
  1180. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1181. break;
  1182. case CMD_TIMEOUT:
  1183. dev_warn(d, "cp %p timed out\n", cp);
  1184. break;
  1185. default:
  1186. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1187. ei->CommandStatus);
  1188. }
  1189. }
  1190. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1191. unsigned char page, unsigned char *buf,
  1192. unsigned char bufsize)
  1193. {
  1194. int rc = IO_OK;
  1195. struct CommandList *c;
  1196. struct ErrorInfo *ei;
  1197. c = cmd_special_alloc(h);
  1198. if (c == NULL) { /* trouble... */
  1199. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1200. return -ENOMEM;
  1201. }
  1202. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1203. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1204. ei = c->err_info;
  1205. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1206. hpsa_scsi_interpret_error(c);
  1207. rc = -1;
  1208. }
  1209. cmd_special_free(h, c);
  1210. return rc;
  1211. }
  1212. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1213. {
  1214. int rc = IO_OK;
  1215. struct CommandList *c;
  1216. struct ErrorInfo *ei;
  1217. c = cmd_special_alloc(h);
  1218. if (c == NULL) { /* trouble... */
  1219. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1220. return -ENOMEM;
  1221. }
  1222. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1223. hpsa_scsi_do_simple_cmd_core(h, c);
  1224. /* no unmap needed here because no data xfer. */
  1225. ei = c->err_info;
  1226. if (ei->CommandStatus != 0) {
  1227. hpsa_scsi_interpret_error(c);
  1228. rc = -1;
  1229. }
  1230. cmd_special_free(h, c);
  1231. return rc;
  1232. }
  1233. static void hpsa_get_raid_level(struct ctlr_info *h,
  1234. unsigned char *scsi3addr, unsigned char *raid_level)
  1235. {
  1236. int rc;
  1237. unsigned char *buf;
  1238. *raid_level = RAID_UNKNOWN;
  1239. buf = kzalloc(64, GFP_KERNEL);
  1240. if (!buf)
  1241. return;
  1242. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1243. if (rc == 0)
  1244. *raid_level = buf[8];
  1245. if (*raid_level > RAID_UNKNOWN)
  1246. *raid_level = RAID_UNKNOWN;
  1247. kfree(buf);
  1248. return;
  1249. }
  1250. /* Get the device id from inquiry page 0x83 */
  1251. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1252. unsigned char *device_id, int buflen)
  1253. {
  1254. int rc;
  1255. unsigned char *buf;
  1256. if (buflen > 16)
  1257. buflen = 16;
  1258. buf = kzalloc(64, GFP_KERNEL);
  1259. if (!buf)
  1260. return -1;
  1261. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1262. if (rc == 0)
  1263. memcpy(device_id, &buf[8], buflen);
  1264. kfree(buf);
  1265. return rc != 0;
  1266. }
  1267. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1268. struct ReportLUNdata *buf, int bufsize,
  1269. int extended_response)
  1270. {
  1271. int rc = IO_OK;
  1272. struct CommandList *c;
  1273. unsigned char scsi3addr[8];
  1274. struct ErrorInfo *ei;
  1275. c = cmd_special_alloc(h);
  1276. if (c == NULL) { /* trouble... */
  1277. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1278. return -1;
  1279. }
  1280. /* address the controller */
  1281. memset(scsi3addr, 0, sizeof(scsi3addr));
  1282. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1283. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1284. if (extended_response)
  1285. c->Request.CDB[1] = extended_response;
  1286. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1287. ei = c->err_info;
  1288. if (ei->CommandStatus != 0 &&
  1289. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1290. hpsa_scsi_interpret_error(c);
  1291. rc = -1;
  1292. }
  1293. cmd_special_free(h, c);
  1294. return rc;
  1295. }
  1296. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1297. struct ReportLUNdata *buf,
  1298. int bufsize, int extended_response)
  1299. {
  1300. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1301. }
  1302. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1303. struct ReportLUNdata *buf, int bufsize)
  1304. {
  1305. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1306. }
  1307. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1308. int bus, int target, int lun)
  1309. {
  1310. device->bus = bus;
  1311. device->target = target;
  1312. device->lun = lun;
  1313. }
  1314. static int hpsa_update_device_info(struct ctlr_info *h,
  1315. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1316. {
  1317. #define OBDR_TAPE_INQ_SIZE 49
  1318. unsigned char *inq_buff;
  1319. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1320. if (!inq_buff)
  1321. goto bail_out;
  1322. /* Do an inquiry to the device to see what it is. */
  1323. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1324. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1325. /* Inquiry failed (msg printed already) */
  1326. dev_err(&h->pdev->dev,
  1327. "hpsa_update_device_info: inquiry failed\n");
  1328. goto bail_out;
  1329. }
  1330. this_device->devtype = (inq_buff[0] & 0x1f);
  1331. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1332. memcpy(this_device->vendor, &inq_buff[8],
  1333. sizeof(this_device->vendor));
  1334. memcpy(this_device->model, &inq_buff[16],
  1335. sizeof(this_device->model));
  1336. memcpy(this_device->revision, &inq_buff[32],
  1337. sizeof(this_device->revision));
  1338. memset(this_device->device_id, 0,
  1339. sizeof(this_device->device_id));
  1340. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1341. sizeof(this_device->device_id));
  1342. if (this_device->devtype == TYPE_DISK &&
  1343. is_logical_dev_addr_mode(scsi3addr))
  1344. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1345. else
  1346. this_device->raid_level = RAID_UNKNOWN;
  1347. kfree(inq_buff);
  1348. return 0;
  1349. bail_out:
  1350. kfree(inq_buff);
  1351. return 1;
  1352. }
  1353. static unsigned char *msa2xxx_model[] = {
  1354. "MSA2012",
  1355. "MSA2024",
  1356. "MSA2312",
  1357. "MSA2324",
  1358. NULL,
  1359. };
  1360. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1361. {
  1362. int i;
  1363. for (i = 0; msa2xxx_model[i]; i++)
  1364. if (strncmp(device->model, msa2xxx_model[i],
  1365. strlen(msa2xxx_model[i])) == 0)
  1366. return 1;
  1367. return 0;
  1368. }
  1369. /* Helper function to assign bus, target, lun mapping of devices.
  1370. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1371. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1372. * Logical drive target and lun are assigned at this time, but
  1373. * physical device lun and target assignment are deferred (assigned
  1374. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1375. */
  1376. static void figure_bus_target_lun(struct ctlr_info *h,
  1377. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1378. struct hpsa_scsi_dev_t *device)
  1379. {
  1380. u32 lunid;
  1381. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1382. /* logical device */
  1383. if (unlikely(is_scsi_rev_5(h))) {
  1384. /* p1210m, logical drives lun assignments
  1385. * match SCSI REPORT LUNS data.
  1386. */
  1387. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1388. *bus = 0;
  1389. *target = 0;
  1390. *lun = (lunid & 0x3fff) + 1;
  1391. } else {
  1392. /* not p1210m... */
  1393. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1394. if (is_msa2xxx(h, device)) {
  1395. /* msa2xxx way, put logicals on bus 1
  1396. * and match target/lun numbers box
  1397. * reports.
  1398. */
  1399. *bus = 1;
  1400. *target = (lunid >> 16) & 0x3fff;
  1401. *lun = lunid & 0x00ff;
  1402. } else {
  1403. /* Traditional smart array way. */
  1404. *bus = 0;
  1405. *lun = 0;
  1406. *target = lunid & 0x3fff;
  1407. }
  1408. }
  1409. } else {
  1410. /* physical device */
  1411. if (is_hba_lunid(lunaddrbytes))
  1412. if (unlikely(is_scsi_rev_5(h))) {
  1413. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1414. *target = 0;
  1415. *lun = 0;
  1416. return;
  1417. } else
  1418. *bus = 3; /* traditional smartarray */
  1419. else
  1420. *bus = 2; /* physical disk */
  1421. *target = -1;
  1422. *lun = -1; /* we will fill these in later. */
  1423. }
  1424. }
  1425. /*
  1426. * If there is no lun 0 on a target, linux won't find any devices.
  1427. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1428. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1429. * it for some reason. *tmpdevice is the target we're adding,
  1430. * this_device is a pointer into the current element of currentsd[]
  1431. * that we're building up in update_scsi_devices(), below.
  1432. * lunzerobits is a bitmap that tracks which targets already have a
  1433. * lun 0 assigned.
  1434. * Returns 1 if an enclosure was added, 0 if not.
  1435. */
  1436. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1437. struct hpsa_scsi_dev_t *tmpdevice,
  1438. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1439. int bus, int target, int lun, unsigned long lunzerobits[],
  1440. int *nmsa2xxx_enclosures)
  1441. {
  1442. unsigned char scsi3addr[8];
  1443. if (test_bit(target, lunzerobits))
  1444. return 0; /* There is already a lun 0 on this target. */
  1445. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1446. return 0; /* It's the logical targets that may lack lun 0. */
  1447. if (!is_msa2xxx(h, tmpdevice))
  1448. return 0; /* It's only the MSA2xxx that have this problem. */
  1449. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1450. return 0;
  1451. if (is_hba_lunid(scsi3addr))
  1452. return 0; /* Don't add the RAID controller here. */
  1453. if (is_scsi_rev_5(h))
  1454. return 0; /* p1210m doesn't need to do this. */
  1455. #define MAX_MSA2XXX_ENCLOSURES 32
  1456. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1457. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1458. "enclosures exceeded. Check your hardware "
  1459. "configuration.");
  1460. return 0;
  1461. }
  1462. memset(scsi3addr, 0, 8);
  1463. scsi3addr[3] = target;
  1464. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1465. return 0;
  1466. (*nmsa2xxx_enclosures)++;
  1467. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1468. set_bit(target, lunzerobits);
  1469. return 1;
  1470. }
  1471. /*
  1472. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1473. * logdev. The number of luns in physdev and logdev are returned in
  1474. * *nphysicals and *nlogicals, respectively.
  1475. * Returns 0 on success, -1 otherwise.
  1476. */
  1477. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1478. int reportlunsize,
  1479. struct ReportLUNdata *physdev, u32 *nphysicals,
  1480. struct ReportLUNdata *logdev, u32 *nlogicals)
  1481. {
  1482. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1483. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1484. return -1;
  1485. }
  1486. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1487. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1488. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1489. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1490. *nphysicals - HPSA_MAX_PHYS_LUN);
  1491. *nphysicals = HPSA_MAX_PHYS_LUN;
  1492. }
  1493. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1494. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1495. return -1;
  1496. }
  1497. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1498. /* Reject Logicals in excess of our max capability. */
  1499. if (*nlogicals > HPSA_MAX_LUN) {
  1500. dev_warn(&h->pdev->dev,
  1501. "maximum logical LUNs (%d) exceeded. "
  1502. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1503. *nlogicals - HPSA_MAX_LUN);
  1504. *nlogicals = HPSA_MAX_LUN;
  1505. }
  1506. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1507. dev_warn(&h->pdev->dev,
  1508. "maximum logical + physical LUNs (%d) exceeded. "
  1509. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1510. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1511. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1512. }
  1513. return 0;
  1514. }
  1515. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1516. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1517. struct ReportLUNdata *logdev_list)
  1518. {
  1519. /* Helper function, figure out where the LUN ID info is coming from
  1520. * given index i, lists of physical and logical devices, where in
  1521. * the list the raid controller is supposed to appear (first or last)
  1522. */
  1523. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1524. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1525. if (i == raid_ctlr_position)
  1526. return RAID_CTLR_LUNID;
  1527. if (i < logicals_start)
  1528. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1529. if (i < last_device)
  1530. return &logdev_list->LUN[i - nphysicals -
  1531. (raid_ctlr_position == 0)][0];
  1532. BUG();
  1533. return NULL;
  1534. }
  1535. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1536. {
  1537. /* the idea here is we could get notified
  1538. * that some devices have changed, so we do a report
  1539. * physical luns and report logical luns cmd, and adjust
  1540. * our list of devices accordingly.
  1541. *
  1542. * The scsi3addr's of devices won't change so long as the
  1543. * adapter is not reset. That means we can rescan and
  1544. * tell which devices we already know about, vs. new
  1545. * devices, vs. disappearing devices.
  1546. */
  1547. struct ReportLUNdata *physdev_list = NULL;
  1548. struct ReportLUNdata *logdev_list = NULL;
  1549. unsigned char *inq_buff = NULL;
  1550. u32 nphysicals = 0;
  1551. u32 nlogicals = 0;
  1552. u32 ndev_allocated = 0;
  1553. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1554. int ncurrent = 0;
  1555. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1556. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1557. int bus, target, lun;
  1558. int raid_ctlr_position;
  1559. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1560. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1561. GFP_KERNEL);
  1562. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1563. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1564. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1565. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1566. if (!currentsd || !physdev_list || !logdev_list ||
  1567. !inq_buff || !tmpdevice) {
  1568. dev_err(&h->pdev->dev, "out of memory\n");
  1569. goto out;
  1570. }
  1571. memset(lunzerobits, 0, sizeof(lunzerobits));
  1572. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1573. logdev_list, &nlogicals))
  1574. goto out;
  1575. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1576. * but each of them 4 times through different paths. The plus 1
  1577. * is for the RAID controller.
  1578. */
  1579. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1580. /* Allocate the per device structures */
  1581. for (i = 0; i < ndevs_to_allocate; i++) {
  1582. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1583. if (!currentsd[i]) {
  1584. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1585. __FILE__, __LINE__);
  1586. goto out;
  1587. }
  1588. ndev_allocated++;
  1589. }
  1590. if (unlikely(is_scsi_rev_5(h)))
  1591. raid_ctlr_position = 0;
  1592. else
  1593. raid_ctlr_position = nphysicals + nlogicals;
  1594. /* adjust our table of devices */
  1595. nmsa2xxx_enclosures = 0;
  1596. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1597. u8 *lunaddrbytes;
  1598. /* Figure out where the LUN ID info is coming from */
  1599. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1600. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1601. /* skip masked physical devices. */
  1602. if (lunaddrbytes[3] & 0xC0 &&
  1603. i < nphysicals + (raid_ctlr_position == 0))
  1604. continue;
  1605. /* Get device type, vendor, model, device id */
  1606. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1607. continue; /* skip it if we can't talk to it. */
  1608. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1609. tmpdevice);
  1610. this_device = currentsd[ncurrent];
  1611. /*
  1612. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1613. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1614. * is nonetheless an enclosure device there. We have to
  1615. * present that otherwise linux won't find anything if
  1616. * there is no lun 0.
  1617. */
  1618. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1619. lunaddrbytes, bus, target, lun, lunzerobits,
  1620. &nmsa2xxx_enclosures)) {
  1621. ncurrent++;
  1622. this_device = currentsd[ncurrent];
  1623. }
  1624. *this_device = *tmpdevice;
  1625. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1626. switch (this_device->devtype) {
  1627. case TYPE_ROM: {
  1628. /* We don't *really* support actual CD-ROM devices,
  1629. * just "One Button Disaster Recovery" tape drive
  1630. * which temporarily pretends to be a CD-ROM drive.
  1631. * So we check that the device is really an OBDR tape
  1632. * device by checking for "$DR-10" in bytes 43-48 of
  1633. * the inquiry data.
  1634. */
  1635. char obdr_sig[7];
  1636. #define OBDR_TAPE_SIG "$DR-10"
  1637. strncpy(obdr_sig, &inq_buff[43], 6);
  1638. obdr_sig[6] = '\0';
  1639. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1640. /* Not OBDR device, ignore it. */
  1641. break;
  1642. }
  1643. ncurrent++;
  1644. break;
  1645. case TYPE_DISK:
  1646. if (i < nphysicals)
  1647. break;
  1648. ncurrent++;
  1649. break;
  1650. case TYPE_TAPE:
  1651. case TYPE_MEDIUM_CHANGER:
  1652. ncurrent++;
  1653. break;
  1654. case TYPE_RAID:
  1655. /* Only present the Smartarray HBA as a RAID controller.
  1656. * If it's a RAID controller other than the HBA itself
  1657. * (an external RAID controller, MSA500 or similar)
  1658. * don't present it.
  1659. */
  1660. if (!is_hba_lunid(lunaddrbytes))
  1661. break;
  1662. ncurrent++;
  1663. break;
  1664. default:
  1665. break;
  1666. }
  1667. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1668. break;
  1669. }
  1670. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1671. out:
  1672. kfree(tmpdevice);
  1673. for (i = 0; i < ndev_allocated; i++)
  1674. kfree(currentsd[i]);
  1675. kfree(currentsd);
  1676. kfree(inq_buff);
  1677. kfree(physdev_list);
  1678. kfree(logdev_list);
  1679. }
  1680. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1681. * dma mapping and fills in the scatter gather entries of the
  1682. * hpsa command, cp.
  1683. */
  1684. static int hpsa_scatter_gather(struct ctlr_info *h,
  1685. struct CommandList *cp,
  1686. struct scsi_cmnd *cmd)
  1687. {
  1688. unsigned int len;
  1689. struct scatterlist *sg;
  1690. u64 addr64;
  1691. int use_sg, i, sg_index, chained;
  1692. struct SGDescriptor *curr_sg;
  1693. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1694. use_sg = scsi_dma_map(cmd);
  1695. if (use_sg < 0)
  1696. return use_sg;
  1697. if (!use_sg)
  1698. goto sglist_finished;
  1699. curr_sg = cp->SG;
  1700. chained = 0;
  1701. sg_index = 0;
  1702. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1703. if (i == h->max_cmd_sg_entries - 1 &&
  1704. use_sg > h->max_cmd_sg_entries) {
  1705. chained = 1;
  1706. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1707. sg_index = 0;
  1708. }
  1709. addr64 = (u64) sg_dma_address(sg);
  1710. len = sg_dma_len(sg);
  1711. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1712. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1713. curr_sg->Len = len;
  1714. curr_sg->Ext = 0; /* we are not chaining */
  1715. curr_sg++;
  1716. }
  1717. if (use_sg + chained > h->maxSG)
  1718. h->maxSG = use_sg + chained;
  1719. if (chained) {
  1720. cp->Header.SGList = h->max_cmd_sg_entries;
  1721. cp->Header.SGTotal = (u16) (use_sg + 1);
  1722. hpsa_map_sg_chain_block(h, cp);
  1723. return 0;
  1724. }
  1725. sglist_finished:
  1726. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1727. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1728. return 0;
  1729. }
  1730. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  1731. void (*done)(struct scsi_cmnd *))
  1732. {
  1733. struct ctlr_info *h;
  1734. struct hpsa_scsi_dev_t *dev;
  1735. unsigned char scsi3addr[8];
  1736. struct CommandList *c;
  1737. unsigned long flags;
  1738. /* Get the ptr to our adapter structure out of cmd->host. */
  1739. h = sdev_to_hba(cmd->device);
  1740. dev = cmd->device->hostdata;
  1741. if (!dev) {
  1742. cmd->result = DID_NO_CONNECT << 16;
  1743. done(cmd);
  1744. return 0;
  1745. }
  1746. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1747. /* Need a lock as this is being allocated from the pool */
  1748. spin_lock_irqsave(&h->lock, flags);
  1749. c = cmd_alloc(h);
  1750. spin_unlock_irqrestore(&h->lock, flags);
  1751. if (c == NULL) { /* trouble... */
  1752. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1753. return SCSI_MLQUEUE_HOST_BUSY;
  1754. }
  1755. /* Fill in the command list header */
  1756. cmd->scsi_done = done; /* save this for use by completion code */
  1757. /* save c in case we have to abort it */
  1758. cmd->host_scribble = (unsigned char *) c;
  1759. c->cmd_type = CMD_SCSI;
  1760. c->scsi_cmd = cmd;
  1761. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1762. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1763. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1764. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1765. /* Fill in the request block... */
  1766. c->Request.Timeout = 0;
  1767. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1768. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1769. c->Request.CDBLen = cmd->cmd_len;
  1770. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1771. c->Request.Type.Type = TYPE_CMD;
  1772. c->Request.Type.Attribute = ATTR_SIMPLE;
  1773. switch (cmd->sc_data_direction) {
  1774. case DMA_TO_DEVICE:
  1775. c->Request.Type.Direction = XFER_WRITE;
  1776. break;
  1777. case DMA_FROM_DEVICE:
  1778. c->Request.Type.Direction = XFER_READ;
  1779. break;
  1780. case DMA_NONE:
  1781. c->Request.Type.Direction = XFER_NONE;
  1782. break;
  1783. case DMA_BIDIRECTIONAL:
  1784. /* This can happen if a buggy application does a scsi passthru
  1785. * and sets both inlen and outlen to non-zero. ( see
  1786. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1787. */
  1788. c->Request.Type.Direction = XFER_RSVD;
  1789. /* This is technically wrong, and hpsa controllers should
  1790. * reject it with CMD_INVALID, which is the most correct
  1791. * response, but non-fibre backends appear to let it
  1792. * slide by, and give the same results as if this field
  1793. * were set correctly. Either way is acceptable for
  1794. * our purposes here.
  1795. */
  1796. break;
  1797. default:
  1798. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1799. cmd->sc_data_direction);
  1800. BUG();
  1801. break;
  1802. }
  1803. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1804. cmd_free(h, c);
  1805. return SCSI_MLQUEUE_HOST_BUSY;
  1806. }
  1807. enqueue_cmd_and_start_io(h, c);
  1808. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1809. return 0;
  1810. }
  1811. static void hpsa_scan_start(struct Scsi_Host *sh)
  1812. {
  1813. struct ctlr_info *h = shost_to_hba(sh);
  1814. unsigned long flags;
  1815. /* wait until any scan already in progress is finished. */
  1816. while (1) {
  1817. spin_lock_irqsave(&h->scan_lock, flags);
  1818. if (h->scan_finished)
  1819. break;
  1820. spin_unlock_irqrestore(&h->scan_lock, flags);
  1821. wait_event(h->scan_wait_queue, h->scan_finished);
  1822. /* Note: We don't need to worry about a race between this
  1823. * thread and driver unload because the midlayer will
  1824. * have incremented the reference count, so unload won't
  1825. * happen if we're in here.
  1826. */
  1827. }
  1828. h->scan_finished = 0; /* mark scan as in progress */
  1829. spin_unlock_irqrestore(&h->scan_lock, flags);
  1830. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1831. spin_lock_irqsave(&h->scan_lock, flags);
  1832. h->scan_finished = 1; /* mark scan as finished. */
  1833. wake_up_all(&h->scan_wait_queue);
  1834. spin_unlock_irqrestore(&h->scan_lock, flags);
  1835. }
  1836. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1837. unsigned long elapsed_time)
  1838. {
  1839. struct ctlr_info *h = shost_to_hba(sh);
  1840. unsigned long flags;
  1841. int finished;
  1842. spin_lock_irqsave(&h->scan_lock, flags);
  1843. finished = h->scan_finished;
  1844. spin_unlock_irqrestore(&h->scan_lock, flags);
  1845. return finished;
  1846. }
  1847. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1848. int qdepth, int reason)
  1849. {
  1850. struct ctlr_info *h = sdev_to_hba(sdev);
  1851. if (reason != SCSI_QDEPTH_DEFAULT)
  1852. return -ENOTSUPP;
  1853. if (qdepth < 1)
  1854. qdepth = 1;
  1855. else
  1856. if (qdepth > h->nr_cmds)
  1857. qdepth = h->nr_cmds;
  1858. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1859. return sdev->queue_depth;
  1860. }
  1861. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1862. {
  1863. /* we are being forcibly unloaded, and may not refuse. */
  1864. scsi_remove_host(h->scsi_host);
  1865. scsi_host_put(h->scsi_host);
  1866. h->scsi_host = NULL;
  1867. }
  1868. static int hpsa_register_scsi(struct ctlr_info *h)
  1869. {
  1870. int rc;
  1871. rc = hpsa_scsi_detect(h);
  1872. if (rc != 0)
  1873. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1874. " hpsa_scsi_detect(), rc is %d\n", rc);
  1875. return rc;
  1876. }
  1877. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1878. unsigned char lunaddr[])
  1879. {
  1880. int rc = 0;
  1881. int count = 0;
  1882. int waittime = 1; /* seconds */
  1883. struct CommandList *c;
  1884. c = cmd_special_alloc(h);
  1885. if (!c) {
  1886. dev_warn(&h->pdev->dev, "out of memory in "
  1887. "wait_for_device_to_become_ready.\n");
  1888. return IO_ERROR;
  1889. }
  1890. /* Send test unit ready until device ready, or give up. */
  1891. while (count < HPSA_TUR_RETRY_LIMIT) {
  1892. /* Wait for a bit. do this first, because if we send
  1893. * the TUR right away, the reset will just abort it.
  1894. */
  1895. msleep(1000 * waittime);
  1896. count++;
  1897. /* Increase wait time with each try, up to a point. */
  1898. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1899. waittime = waittime * 2;
  1900. /* Send the Test Unit Ready */
  1901. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1902. hpsa_scsi_do_simple_cmd_core(h, c);
  1903. /* no unmap needed here because no data xfer. */
  1904. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1905. break;
  1906. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1907. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1908. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1909. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1910. break;
  1911. dev_warn(&h->pdev->dev, "waiting %d secs "
  1912. "for device to become ready.\n", waittime);
  1913. rc = 1; /* device not ready. */
  1914. }
  1915. if (rc)
  1916. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1917. else
  1918. dev_warn(&h->pdev->dev, "device is ready.\n");
  1919. cmd_special_free(h, c);
  1920. return rc;
  1921. }
  1922. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1923. * complaining. Doing a host- or bus-reset can't do anything good here.
  1924. */
  1925. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1926. {
  1927. int rc;
  1928. struct ctlr_info *h;
  1929. struct hpsa_scsi_dev_t *dev;
  1930. /* find the controller to which the command to be aborted was sent */
  1931. h = sdev_to_hba(scsicmd->device);
  1932. if (h == NULL) /* paranoia */
  1933. return FAILED;
  1934. dev = scsicmd->device->hostdata;
  1935. if (!dev) {
  1936. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1937. "device lookup failed.\n");
  1938. return FAILED;
  1939. }
  1940. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1941. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1942. /* send a reset to the SCSI LUN which the command was sent to */
  1943. rc = hpsa_send_reset(h, dev->scsi3addr);
  1944. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1945. return SUCCESS;
  1946. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1947. return FAILED;
  1948. }
  1949. /*
  1950. * For operations that cannot sleep, a command block is allocated at init,
  1951. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1952. * which ones are free or in use. Lock must be held when calling this.
  1953. * cmd_free() is the complement.
  1954. */
  1955. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1956. {
  1957. struct CommandList *c;
  1958. int i;
  1959. union u64bit temp64;
  1960. dma_addr_t cmd_dma_handle, err_dma_handle;
  1961. do {
  1962. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1963. if (i == h->nr_cmds)
  1964. return NULL;
  1965. } while (test_and_set_bit
  1966. (i & (BITS_PER_LONG - 1),
  1967. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1968. c = h->cmd_pool + i;
  1969. memset(c, 0, sizeof(*c));
  1970. cmd_dma_handle = h->cmd_pool_dhandle
  1971. + i * sizeof(*c);
  1972. c->err_info = h->errinfo_pool + i;
  1973. memset(c->err_info, 0, sizeof(*c->err_info));
  1974. err_dma_handle = h->errinfo_pool_dhandle
  1975. + i * sizeof(*c->err_info);
  1976. h->nr_allocs++;
  1977. c->cmdindex = i;
  1978. INIT_HLIST_NODE(&c->list);
  1979. c->busaddr = (u32) cmd_dma_handle;
  1980. temp64.val = (u64) err_dma_handle;
  1981. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1982. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1983. c->ErrDesc.Len = sizeof(*c->err_info);
  1984. c->h = h;
  1985. return c;
  1986. }
  1987. /* For operations that can wait for kmalloc to possibly sleep,
  1988. * this routine can be called. Lock need not be held to call
  1989. * cmd_special_alloc. cmd_special_free() is the complement.
  1990. */
  1991. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1992. {
  1993. struct CommandList *c;
  1994. union u64bit temp64;
  1995. dma_addr_t cmd_dma_handle, err_dma_handle;
  1996. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1997. if (c == NULL)
  1998. return NULL;
  1999. memset(c, 0, sizeof(*c));
  2000. c->cmdindex = -1;
  2001. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2002. &err_dma_handle);
  2003. if (c->err_info == NULL) {
  2004. pci_free_consistent(h->pdev,
  2005. sizeof(*c), c, cmd_dma_handle);
  2006. return NULL;
  2007. }
  2008. memset(c->err_info, 0, sizeof(*c->err_info));
  2009. INIT_HLIST_NODE(&c->list);
  2010. c->busaddr = (u32) cmd_dma_handle;
  2011. temp64.val = (u64) err_dma_handle;
  2012. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2013. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2014. c->ErrDesc.Len = sizeof(*c->err_info);
  2015. c->h = h;
  2016. return c;
  2017. }
  2018. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2019. {
  2020. int i;
  2021. i = c - h->cmd_pool;
  2022. clear_bit(i & (BITS_PER_LONG - 1),
  2023. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2024. h->nr_frees++;
  2025. }
  2026. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2027. {
  2028. union u64bit temp64;
  2029. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2030. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2031. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2032. c->err_info, (dma_addr_t) temp64.val);
  2033. pci_free_consistent(h->pdev, sizeof(*c),
  2034. c, (dma_addr_t) c->busaddr);
  2035. }
  2036. #ifdef CONFIG_COMPAT
  2037. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2038. {
  2039. IOCTL32_Command_struct __user *arg32 =
  2040. (IOCTL32_Command_struct __user *) arg;
  2041. IOCTL_Command_struct arg64;
  2042. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2043. int err;
  2044. u32 cp;
  2045. err = 0;
  2046. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2047. sizeof(arg64.LUN_info));
  2048. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2049. sizeof(arg64.Request));
  2050. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2051. sizeof(arg64.error_info));
  2052. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2053. err |= get_user(cp, &arg32->buf);
  2054. arg64.buf = compat_ptr(cp);
  2055. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2056. if (err)
  2057. return -EFAULT;
  2058. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2059. if (err)
  2060. return err;
  2061. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2062. sizeof(arg32->error_info));
  2063. if (err)
  2064. return -EFAULT;
  2065. return err;
  2066. }
  2067. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2068. int cmd, void *arg)
  2069. {
  2070. BIG_IOCTL32_Command_struct __user *arg32 =
  2071. (BIG_IOCTL32_Command_struct __user *) arg;
  2072. BIG_IOCTL_Command_struct arg64;
  2073. BIG_IOCTL_Command_struct __user *p =
  2074. compat_alloc_user_space(sizeof(arg64));
  2075. int err;
  2076. u32 cp;
  2077. err = 0;
  2078. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2079. sizeof(arg64.LUN_info));
  2080. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2081. sizeof(arg64.Request));
  2082. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2083. sizeof(arg64.error_info));
  2084. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2085. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2086. err |= get_user(cp, &arg32->buf);
  2087. arg64.buf = compat_ptr(cp);
  2088. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2089. if (err)
  2090. return -EFAULT;
  2091. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2092. if (err)
  2093. return err;
  2094. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2095. sizeof(arg32->error_info));
  2096. if (err)
  2097. return -EFAULT;
  2098. return err;
  2099. }
  2100. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2101. {
  2102. switch (cmd) {
  2103. case CCISS_GETPCIINFO:
  2104. case CCISS_GETINTINFO:
  2105. case CCISS_SETINTINFO:
  2106. case CCISS_GETNODENAME:
  2107. case CCISS_SETNODENAME:
  2108. case CCISS_GETHEARTBEAT:
  2109. case CCISS_GETBUSTYPES:
  2110. case CCISS_GETFIRMVER:
  2111. case CCISS_GETDRIVVER:
  2112. case CCISS_REVALIDVOLS:
  2113. case CCISS_DEREGDISK:
  2114. case CCISS_REGNEWDISK:
  2115. case CCISS_REGNEWD:
  2116. case CCISS_RESCANDISK:
  2117. case CCISS_GETLUNINFO:
  2118. return hpsa_ioctl(dev, cmd, arg);
  2119. case CCISS_PASSTHRU32:
  2120. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2121. case CCISS_BIG_PASSTHRU32:
  2122. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2123. default:
  2124. return -ENOIOCTLCMD;
  2125. }
  2126. }
  2127. #endif
  2128. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2129. {
  2130. struct hpsa_pci_info pciinfo;
  2131. if (!argp)
  2132. return -EINVAL;
  2133. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2134. pciinfo.bus = h->pdev->bus->number;
  2135. pciinfo.dev_fn = h->pdev->devfn;
  2136. pciinfo.board_id = h->board_id;
  2137. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2138. return -EFAULT;
  2139. return 0;
  2140. }
  2141. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2142. {
  2143. DriverVer_type DriverVer;
  2144. unsigned char vmaj, vmin, vsubmin;
  2145. int rc;
  2146. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2147. &vmaj, &vmin, &vsubmin);
  2148. if (rc != 3) {
  2149. dev_info(&h->pdev->dev, "driver version string '%s' "
  2150. "unrecognized.", HPSA_DRIVER_VERSION);
  2151. vmaj = 0;
  2152. vmin = 0;
  2153. vsubmin = 0;
  2154. }
  2155. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2156. if (!argp)
  2157. return -EINVAL;
  2158. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2159. return -EFAULT;
  2160. return 0;
  2161. }
  2162. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2163. {
  2164. IOCTL_Command_struct iocommand;
  2165. struct CommandList *c;
  2166. char *buff = NULL;
  2167. union u64bit temp64;
  2168. if (!argp)
  2169. return -EINVAL;
  2170. if (!capable(CAP_SYS_RAWIO))
  2171. return -EPERM;
  2172. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2173. return -EFAULT;
  2174. if ((iocommand.buf_size < 1) &&
  2175. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2176. return -EINVAL;
  2177. }
  2178. if (iocommand.buf_size > 0) {
  2179. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2180. if (buff == NULL)
  2181. return -EFAULT;
  2182. }
  2183. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2184. /* Copy the data into the buffer we created */
  2185. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2186. kfree(buff);
  2187. return -EFAULT;
  2188. }
  2189. } else
  2190. memset(buff, 0, iocommand.buf_size);
  2191. c = cmd_special_alloc(h);
  2192. if (c == NULL) {
  2193. kfree(buff);
  2194. return -ENOMEM;
  2195. }
  2196. /* Fill in the command type */
  2197. c->cmd_type = CMD_IOCTL_PEND;
  2198. /* Fill in Command Header */
  2199. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2200. if (iocommand.buf_size > 0) { /* buffer to fill */
  2201. c->Header.SGList = 1;
  2202. c->Header.SGTotal = 1;
  2203. } else { /* no buffers to fill */
  2204. c->Header.SGList = 0;
  2205. c->Header.SGTotal = 0;
  2206. }
  2207. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2208. /* use the kernel address the cmd block for tag */
  2209. c->Header.Tag.lower = c->busaddr;
  2210. /* Fill in Request block */
  2211. memcpy(&c->Request, &iocommand.Request,
  2212. sizeof(c->Request));
  2213. /* Fill in the scatter gather information */
  2214. if (iocommand.buf_size > 0) {
  2215. temp64.val = pci_map_single(h->pdev, buff,
  2216. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2217. c->SG[0].Addr.lower = temp64.val32.lower;
  2218. c->SG[0].Addr.upper = temp64.val32.upper;
  2219. c->SG[0].Len = iocommand.buf_size;
  2220. c->SG[0].Ext = 0; /* we are not chaining*/
  2221. }
  2222. hpsa_scsi_do_simple_cmd_core(h, c);
  2223. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2224. check_ioctl_unit_attention(h, c);
  2225. /* Copy the error information out */
  2226. memcpy(&iocommand.error_info, c->err_info,
  2227. sizeof(iocommand.error_info));
  2228. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2229. kfree(buff);
  2230. cmd_special_free(h, c);
  2231. return -EFAULT;
  2232. }
  2233. if (iocommand.Request.Type.Direction == XFER_READ) {
  2234. /* Copy the data out of the buffer we created */
  2235. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2236. kfree(buff);
  2237. cmd_special_free(h, c);
  2238. return -EFAULT;
  2239. }
  2240. }
  2241. kfree(buff);
  2242. cmd_special_free(h, c);
  2243. return 0;
  2244. }
  2245. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2246. {
  2247. BIG_IOCTL_Command_struct *ioc;
  2248. struct CommandList *c;
  2249. unsigned char **buff = NULL;
  2250. int *buff_size = NULL;
  2251. union u64bit temp64;
  2252. BYTE sg_used = 0;
  2253. int status = 0;
  2254. int i;
  2255. u32 left;
  2256. u32 sz;
  2257. BYTE __user *data_ptr;
  2258. if (!argp)
  2259. return -EINVAL;
  2260. if (!capable(CAP_SYS_RAWIO))
  2261. return -EPERM;
  2262. ioc = (BIG_IOCTL_Command_struct *)
  2263. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2264. if (!ioc) {
  2265. status = -ENOMEM;
  2266. goto cleanup1;
  2267. }
  2268. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2269. status = -EFAULT;
  2270. goto cleanup1;
  2271. }
  2272. if ((ioc->buf_size < 1) &&
  2273. (ioc->Request.Type.Direction != XFER_NONE)) {
  2274. status = -EINVAL;
  2275. goto cleanup1;
  2276. }
  2277. /* Check kmalloc limits using all SGs */
  2278. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2279. status = -EINVAL;
  2280. goto cleanup1;
  2281. }
  2282. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2283. status = -EINVAL;
  2284. goto cleanup1;
  2285. }
  2286. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2287. if (!buff) {
  2288. status = -ENOMEM;
  2289. goto cleanup1;
  2290. }
  2291. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2292. if (!buff_size) {
  2293. status = -ENOMEM;
  2294. goto cleanup1;
  2295. }
  2296. left = ioc->buf_size;
  2297. data_ptr = ioc->buf;
  2298. while (left) {
  2299. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2300. buff_size[sg_used] = sz;
  2301. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2302. if (buff[sg_used] == NULL) {
  2303. status = -ENOMEM;
  2304. goto cleanup1;
  2305. }
  2306. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2307. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2308. status = -ENOMEM;
  2309. goto cleanup1;
  2310. }
  2311. } else
  2312. memset(buff[sg_used], 0, sz);
  2313. left -= sz;
  2314. data_ptr += sz;
  2315. sg_used++;
  2316. }
  2317. c = cmd_special_alloc(h);
  2318. if (c == NULL) {
  2319. status = -ENOMEM;
  2320. goto cleanup1;
  2321. }
  2322. c->cmd_type = CMD_IOCTL_PEND;
  2323. c->Header.ReplyQueue = 0;
  2324. if (ioc->buf_size > 0) {
  2325. c->Header.SGList = sg_used;
  2326. c->Header.SGTotal = sg_used;
  2327. } else {
  2328. c->Header.SGList = 0;
  2329. c->Header.SGTotal = 0;
  2330. }
  2331. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2332. c->Header.Tag.lower = c->busaddr;
  2333. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2334. if (ioc->buf_size > 0) {
  2335. int i;
  2336. for (i = 0; i < sg_used; i++) {
  2337. temp64.val = pci_map_single(h->pdev, buff[i],
  2338. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2339. c->SG[i].Addr.lower = temp64.val32.lower;
  2340. c->SG[i].Addr.upper = temp64.val32.upper;
  2341. c->SG[i].Len = buff_size[i];
  2342. /* we are not chaining */
  2343. c->SG[i].Ext = 0;
  2344. }
  2345. }
  2346. hpsa_scsi_do_simple_cmd_core(h, c);
  2347. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2348. check_ioctl_unit_attention(h, c);
  2349. /* Copy the error information out */
  2350. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2351. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2352. cmd_special_free(h, c);
  2353. status = -EFAULT;
  2354. goto cleanup1;
  2355. }
  2356. if (ioc->Request.Type.Direction == XFER_READ) {
  2357. /* Copy the data out of the buffer we created */
  2358. BYTE __user *ptr = ioc->buf;
  2359. for (i = 0; i < sg_used; i++) {
  2360. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2361. cmd_special_free(h, c);
  2362. status = -EFAULT;
  2363. goto cleanup1;
  2364. }
  2365. ptr += buff_size[i];
  2366. }
  2367. }
  2368. cmd_special_free(h, c);
  2369. status = 0;
  2370. cleanup1:
  2371. if (buff) {
  2372. for (i = 0; i < sg_used; i++)
  2373. kfree(buff[i]);
  2374. kfree(buff);
  2375. }
  2376. kfree(buff_size);
  2377. kfree(ioc);
  2378. return status;
  2379. }
  2380. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2381. struct CommandList *c)
  2382. {
  2383. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2384. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2385. (void) check_for_unit_attention(h, c);
  2386. }
  2387. /*
  2388. * ioctl
  2389. */
  2390. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2391. {
  2392. struct ctlr_info *h;
  2393. void __user *argp = (void __user *)arg;
  2394. h = sdev_to_hba(dev);
  2395. switch (cmd) {
  2396. case CCISS_DEREGDISK:
  2397. case CCISS_REGNEWDISK:
  2398. case CCISS_REGNEWD:
  2399. hpsa_scan_start(h->scsi_host);
  2400. return 0;
  2401. case CCISS_GETPCIINFO:
  2402. return hpsa_getpciinfo_ioctl(h, argp);
  2403. case CCISS_GETDRIVVER:
  2404. return hpsa_getdrivver_ioctl(h, argp);
  2405. case CCISS_PASSTHRU:
  2406. return hpsa_passthru_ioctl(h, argp);
  2407. case CCISS_BIG_PASSTHRU:
  2408. return hpsa_big_passthru_ioctl(h, argp);
  2409. default:
  2410. return -ENOTTY;
  2411. }
  2412. }
  2413. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2414. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2415. int cmd_type)
  2416. {
  2417. int pci_dir = XFER_NONE;
  2418. c->cmd_type = CMD_IOCTL_PEND;
  2419. c->Header.ReplyQueue = 0;
  2420. if (buff != NULL && size > 0) {
  2421. c->Header.SGList = 1;
  2422. c->Header.SGTotal = 1;
  2423. } else {
  2424. c->Header.SGList = 0;
  2425. c->Header.SGTotal = 0;
  2426. }
  2427. c->Header.Tag.lower = c->busaddr;
  2428. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2429. c->Request.Type.Type = cmd_type;
  2430. if (cmd_type == TYPE_CMD) {
  2431. switch (cmd) {
  2432. case HPSA_INQUIRY:
  2433. /* are we trying to read a vital product page */
  2434. if (page_code != 0) {
  2435. c->Request.CDB[1] = 0x01;
  2436. c->Request.CDB[2] = page_code;
  2437. }
  2438. c->Request.CDBLen = 6;
  2439. c->Request.Type.Attribute = ATTR_SIMPLE;
  2440. c->Request.Type.Direction = XFER_READ;
  2441. c->Request.Timeout = 0;
  2442. c->Request.CDB[0] = HPSA_INQUIRY;
  2443. c->Request.CDB[4] = size & 0xFF;
  2444. break;
  2445. case HPSA_REPORT_LOG:
  2446. case HPSA_REPORT_PHYS:
  2447. /* Talking to controller so It's a physical command
  2448. mode = 00 target = 0. Nothing to write.
  2449. */
  2450. c->Request.CDBLen = 12;
  2451. c->Request.Type.Attribute = ATTR_SIMPLE;
  2452. c->Request.Type.Direction = XFER_READ;
  2453. c->Request.Timeout = 0;
  2454. c->Request.CDB[0] = cmd;
  2455. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2456. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2457. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2458. c->Request.CDB[9] = size & 0xFF;
  2459. break;
  2460. case HPSA_CACHE_FLUSH:
  2461. c->Request.CDBLen = 12;
  2462. c->Request.Type.Attribute = ATTR_SIMPLE;
  2463. c->Request.Type.Direction = XFER_WRITE;
  2464. c->Request.Timeout = 0;
  2465. c->Request.CDB[0] = BMIC_WRITE;
  2466. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2467. break;
  2468. case TEST_UNIT_READY:
  2469. c->Request.CDBLen = 6;
  2470. c->Request.Type.Attribute = ATTR_SIMPLE;
  2471. c->Request.Type.Direction = XFER_NONE;
  2472. c->Request.Timeout = 0;
  2473. break;
  2474. default:
  2475. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2476. BUG();
  2477. return;
  2478. }
  2479. } else if (cmd_type == TYPE_MSG) {
  2480. switch (cmd) {
  2481. case HPSA_DEVICE_RESET_MSG:
  2482. c->Request.CDBLen = 16;
  2483. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2484. c->Request.Type.Attribute = ATTR_SIMPLE;
  2485. c->Request.Type.Direction = XFER_NONE;
  2486. c->Request.Timeout = 0; /* Don't time out */
  2487. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2488. c->Request.CDB[1] = 0x03; /* Reset target above */
  2489. /* If bytes 4-7 are zero, it means reset the */
  2490. /* LunID device */
  2491. c->Request.CDB[4] = 0x00;
  2492. c->Request.CDB[5] = 0x00;
  2493. c->Request.CDB[6] = 0x00;
  2494. c->Request.CDB[7] = 0x00;
  2495. break;
  2496. default:
  2497. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2498. cmd);
  2499. BUG();
  2500. }
  2501. } else {
  2502. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2503. BUG();
  2504. }
  2505. switch (c->Request.Type.Direction) {
  2506. case XFER_READ:
  2507. pci_dir = PCI_DMA_FROMDEVICE;
  2508. break;
  2509. case XFER_WRITE:
  2510. pci_dir = PCI_DMA_TODEVICE;
  2511. break;
  2512. case XFER_NONE:
  2513. pci_dir = PCI_DMA_NONE;
  2514. break;
  2515. default:
  2516. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2517. }
  2518. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2519. return;
  2520. }
  2521. /*
  2522. * Map (physical) PCI mem into (virtual) kernel space
  2523. */
  2524. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2525. {
  2526. ulong page_base = ((ulong) base) & PAGE_MASK;
  2527. ulong page_offs = ((ulong) base) - page_base;
  2528. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2529. return page_remapped ? (page_remapped + page_offs) : NULL;
  2530. }
  2531. /* Takes cmds off the submission queue and sends them to the hardware,
  2532. * then puts them on the queue of cmds waiting for completion.
  2533. */
  2534. static void start_io(struct ctlr_info *h)
  2535. {
  2536. struct CommandList *c;
  2537. while (!hlist_empty(&h->reqQ)) {
  2538. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2539. /* can't do anything if fifo is full */
  2540. if ((h->access.fifo_full(h))) {
  2541. dev_warn(&h->pdev->dev, "fifo full\n");
  2542. break;
  2543. }
  2544. /* Get the first entry from the Request Q */
  2545. removeQ(c);
  2546. h->Qdepth--;
  2547. /* Tell the controller execute command */
  2548. h->access.submit_command(h, c);
  2549. /* Put job onto the completed Q */
  2550. addQ(&h->cmpQ, c);
  2551. }
  2552. }
  2553. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2554. {
  2555. return h->access.command_completed(h);
  2556. }
  2557. static inline bool interrupt_pending(struct ctlr_info *h)
  2558. {
  2559. return h->access.intr_pending(h);
  2560. }
  2561. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2562. {
  2563. return (h->access.intr_pending(h) == 0) ||
  2564. (h->interrupts_enabled == 0);
  2565. }
  2566. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2567. u32 raw_tag)
  2568. {
  2569. if (unlikely(tag_index >= h->nr_cmds)) {
  2570. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2571. return 1;
  2572. }
  2573. return 0;
  2574. }
  2575. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2576. {
  2577. removeQ(c);
  2578. if (likely(c->cmd_type == CMD_SCSI))
  2579. complete_scsi_command(c, 0, raw_tag);
  2580. else if (c->cmd_type == CMD_IOCTL_PEND)
  2581. complete(c->waiting);
  2582. }
  2583. static inline u32 hpsa_tag_contains_index(u32 tag)
  2584. {
  2585. #define DIRECT_LOOKUP_BIT 0x10
  2586. return tag & DIRECT_LOOKUP_BIT;
  2587. }
  2588. static inline u32 hpsa_tag_to_index(u32 tag)
  2589. {
  2590. #define DIRECT_LOOKUP_SHIFT 5
  2591. return tag >> DIRECT_LOOKUP_SHIFT;
  2592. }
  2593. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2594. {
  2595. #define HPSA_ERROR_BITS 0x03
  2596. return tag & ~HPSA_ERROR_BITS;
  2597. }
  2598. /* process completion of an indexed ("direct lookup") command */
  2599. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2600. u32 raw_tag)
  2601. {
  2602. u32 tag_index;
  2603. struct CommandList *c;
  2604. tag_index = hpsa_tag_to_index(raw_tag);
  2605. if (bad_tag(h, tag_index, raw_tag))
  2606. return next_command(h);
  2607. c = h->cmd_pool + tag_index;
  2608. finish_cmd(c, raw_tag);
  2609. return next_command(h);
  2610. }
  2611. /* process completion of a non-indexed command */
  2612. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2613. u32 raw_tag)
  2614. {
  2615. u32 tag;
  2616. struct CommandList *c = NULL;
  2617. struct hlist_node *tmp;
  2618. tag = hpsa_tag_discard_error_bits(raw_tag);
  2619. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2620. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2621. finish_cmd(c, raw_tag);
  2622. return next_command(h);
  2623. }
  2624. }
  2625. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2626. return next_command(h);
  2627. }
  2628. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2629. {
  2630. struct ctlr_info *h = dev_id;
  2631. unsigned long flags;
  2632. u32 raw_tag;
  2633. if (interrupt_not_for_us(h))
  2634. return IRQ_NONE;
  2635. spin_lock_irqsave(&h->lock, flags);
  2636. while (interrupt_pending(h)) {
  2637. raw_tag = get_next_completion(h);
  2638. while (raw_tag != FIFO_EMPTY) {
  2639. if (hpsa_tag_contains_index(raw_tag))
  2640. raw_tag = process_indexed_cmd(h, raw_tag);
  2641. else
  2642. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2643. }
  2644. }
  2645. spin_unlock_irqrestore(&h->lock, flags);
  2646. return IRQ_HANDLED;
  2647. }
  2648. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2649. {
  2650. struct ctlr_info *h = dev_id;
  2651. unsigned long flags;
  2652. u32 raw_tag;
  2653. spin_lock_irqsave(&h->lock, flags);
  2654. raw_tag = get_next_completion(h);
  2655. while (raw_tag != FIFO_EMPTY) {
  2656. if (hpsa_tag_contains_index(raw_tag))
  2657. raw_tag = process_indexed_cmd(h, raw_tag);
  2658. else
  2659. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2660. }
  2661. spin_unlock_irqrestore(&h->lock, flags);
  2662. return IRQ_HANDLED;
  2663. }
  2664. /* Send a message CDB to the firmware. */
  2665. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2666. unsigned char type)
  2667. {
  2668. struct Command {
  2669. struct CommandListHeader CommandHeader;
  2670. struct RequestBlock Request;
  2671. struct ErrDescriptor ErrorDescriptor;
  2672. };
  2673. struct Command *cmd;
  2674. static const size_t cmd_sz = sizeof(*cmd) +
  2675. sizeof(cmd->ErrorDescriptor);
  2676. dma_addr_t paddr64;
  2677. uint32_t paddr32, tag;
  2678. void __iomem *vaddr;
  2679. int i, err;
  2680. vaddr = pci_ioremap_bar(pdev, 0);
  2681. if (vaddr == NULL)
  2682. return -ENOMEM;
  2683. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2684. * CCISS commands, so they must be allocated from the lower 4GiB of
  2685. * memory.
  2686. */
  2687. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2688. if (err) {
  2689. iounmap(vaddr);
  2690. return -ENOMEM;
  2691. }
  2692. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2693. if (cmd == NULL) {
  2694. iounmap(vaddr);
  2695. return -ENOMEM;
  2696. }
  2697. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2698. * although there's no guarantee, we assume that the address is at
  2699. * least 4-byte aligned (most likely, it's page-aligned).
  2700. */
  2701. paddr32 = paddr64;
  2702. cmd->CommandHeader.ReplyQueue = 0;
  2703. cmd->CommandHeader.SGList = 0;
  2704. cmd->CommandHeader.SGTotal = 0;
  2705. cmd->CommandHeader.Tag.lower = paddr32;
  2706. cmd->CommandHeader.Tag.upper = 0;
  2707. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2708. cmd->Request.CDBLen = 16;
  2709. cmd->Request.Type.Type = TYPE_MSG;
  2710. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2711. cmd->Request.Type.Direction = XFER_NONE;
  2712. cmd->Request.Timeout = 0; /* Don't time out */
  2713. cmd->Request.CDB[0] = opcode;
  2714. cmd->Request.CDB[1] = type;
  2715. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2716. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2717. cmd->ErrorDescriptor.Addr.upper = 0;
  2718. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2719. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2720. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2721. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2722. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2723. break;
  2724. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2725. }
  2726. iounmap(vaddr);
  2727. /* we leak the DMA buffer here ... no choice since the controller could
  2728. * still complete the command.
  2729. */
  2730. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2731. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2732. opcode, type);
  2733. return -ETIMEDOUT;
  2734. }
  2735. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2736. if (tag & HPSA_ERROR_BIT) {
  2737. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2738. opcode, type);
  2739. return -EIO;
  2740. }
  2741. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2742. opcode, type);
  2743. return 0;
  2744. }
  2745. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2746. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2747. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2748. {
  2749. /* the #defines are stolen from drivers/pci/msi.h. */
  2750. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2751. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2752. int pos;
  2753. u16 control = 0;
  2754. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2755. if (pos) {
  2756. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2757. if (control & PCI_MSI_FLAGS_ENABLE) {
  2758. dev_info(&pdev->dev, "resetting MSI\n");
  2759. pci_write_config_word(pdev, msi_control_reg(pos),
  2760. control & ~PCI_MSI_FLAGS_ENABLE);
  2761. }
  2762. }
  2763. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2764. if (pos) {
  2765. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2766. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2767. dev_info(&pdev->dev, "resetting MSI-X\n");
  2768. pci_write_config_word(pdev, msi_control_reg(pos),
  2769. control & ~PCI_MSIX_FLAGS_ENABLE);
  2770. }
  2771. }
  2772. return 0;
  2773. }
  2774. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2775. void * __iomem vaddr, bool use_doorbell)
  2776. {
  2777. u16 pmcsr;
  2778. int pos;
  2779. if (use_doorbell) {
  2780. /* For everything after the P600, the PCI power state method
  2781. * of resetting the controller doesn't work, so we have this
  2782. * other way using the doorbell register.
  2783. */
  2784. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2785. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2786. msleep(1000);
  2787. } else { /* Try to do it the PCI power state way */
  2788. /* Quoting from the Open CISS Specification: "The Power
  2789. * Management Control/Status Register (CSR) controls the power
  2790. * state of the device. The normal operating state is D0,
  2791. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2792. * the controller, place the interface device in D3 then to D0,
  2793. * this causes a secondary PCI reset which will reset the
  2794. * controller." */
  2795. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2796. if (pos == 0) {
  2797. dev_err(&pdev->dev,
  2798. "hpsa_reset_controller: "
  2799. "PCI PM not supported\n");
  2800. return -ENODEV;
  2801. }
  2802. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2803. /* enter the D3hot power management state */
  2804. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2805. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2806. pmcsr |= PCI_D3hot;
  2807. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2808. msleep(500);
  2809. /* enter the D0 power management state */
  2810. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2811. pmcsr |= PCI_D0;
  2812. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2813. msleep(500);
  2814. }
  2815. return 0;
  2816. }
  2817. /* This does a hard reset of the controller using PCI power management
  2818. * states or the using the doorbell register.
  2819. */
  2820. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2821. {
  2822. u16 saved_config_space[32];
  2823. u64 cfg_offset;
  2824. u32 cfg_base_addr;
  2825. u64 cfg_base_addr_index;
  2826. void __iomem *vaddr;
  2827. unsigned long paddr;
  2828. u32 misc_fw_support, active_transport;
  2829. int rc, i;
  2830. struct CfgTable __iomem *cfgtable;
  2831. bool use_doorbell;
  2832. u32 board_id;
  2833. /* For controllers as old as the P600, this is very nearly
  2834. * the same thing as
  2835. *
  2836. * pci_save_state(pci_dev);
  2837. * pci_set_power_state(pci_dev, PCI_D3hot);
  2838. * pci_set_power_state(pci_dev, PCI_D0);
  2839. * pci_restore_state(pci_dev);
  2840. *
  2841. * but we can't use these nice canned kernel routines on
  2842. * kexec, because they also check the MSI/MSI-X state in PCI
  2843. * configuration space and do the wrong thing when it is
  2844. * set/cleared. Also, the pci_save/restore_state functions
  2845. * violate the ordering requirements for restoring the
  2846. * configuration space from the CCISS document (see the
  2847. * comment below). So we roll our own ....
  2848. *
  2849. * For controllers newer than the P600, the pci power state
  2850. * method of resetting doesn't work so we have another way
  2851. * using the doorbell register.
  2852. */
  2853. /* Exclude 640x boards. These are two pci devices in one slot
  2854. * which share a battery backed cache module. One controls the
  2855. * cache, the other accesses the cache through the one that controls
  2856. * it. If we reset the one controlling the cache, the other will
  2857. * likely not be happy. Just forbid resetting this conjoined mess.
  2858. * The 640x isn't really supported by hpsa anyway.
  2859. */
  2860. hpsa_lookup_board_id(pdev, &board_id);
  2861. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2862. return -ENOTSUPP;
  2863. for (i = 0; i < 32; i++)
  2864. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2865. /* find the first memory BAR, so we can find the cfg table */
  2866. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2867. if (rc)
  2868. return rc;
  2869. vaddr = remap_pci_mem(paddr, 0x250);
  2870. if (!vaddr)
  2871. return -ENOMEM;
  2872. /* find cfgtable in order to check if reset via doorbell is supported */
  2873. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2874. &cfg_base_addr_index, &cfg_offset);
  2875. if (rc)
  2876. goto unmap_vaddr;
  2877. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2878. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2879. if (!cfgtable) {
  2880. rc = -ENOMEM;
  2881. goto unmap_vaddr;
  2882. }
  2883. /* If reset via doorbell register is supported, use that. */
  2884. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2885. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2886. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2887. if (rc)
  2888. goto unmap_cfgtable;
  2889. /* Restore the PCI configuration space. The Open CISS
  2890. * Specification says, "Restore the PCI Configuration
  2891. * Registers, offsets 00h through 60h. It is important to
  2892. * restore the command register, 16-bits at offset 04h,
  2893. * last. Do not restore the configuration status register,
  2894. * 16-bits at offset 06h." Note that the offset is 2*i.
  2895. */
  2896. for (i = 0; i < 32; i++) {
  2897. if (i == 2 || i == 3)
  2898. continue;
  2899. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2900. }
  2901. wmb();
  2902. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2903. /* Some devices (notably the HP Smart Array 5i Controller)
  2904. need a little pause here */
  2905. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2906. /* Controller should be in simple mode at this point. If it's not,
  2907. * It means we're on one of those controllers which doesn't support
  2908. * the doorbell reset method and on which the PCI power management reset
  2909. * method doesn't work (P800, for example.)
  2910. * In those cases, pretend the reset worked and hope for the best.
  2911. */
  2912. active_transport = readl(&cfgtable->TransportActive);
  2913. if (active_transport & PERFORMANT_MODE) {
  2914. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2915. " proceeding anyway.\n");
  2916. rc = -ENOTSUPP;
  2917. }
  2918. unmap_cfgtable:
  2919. iounmap(cfgtable);
  2920. unmap_vaddr:
  2921. iounmap(vaddr);
  2922. return rc;
  2923. }
  2924. /*
  2925. * We cannot read the structure directly, for portability we must use
  2926. * the io functions.
  2927. * This is for debug only.
  2928. */
  2929. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2930. {
  2931. #ifdef HPSA_DEBUG
  2932. int i;
  2933. char temp_name[17];
  2934. dev_info(dev, "Controller Configuration information\n");
  2935. dev_info(dev, "------------------------------------\n");
  2936. for (i = 0; i < 4; i++)
  2937. temp_name[i] = readb(&(tb->Signature[i]));
  2938. temp_name[4] = '\0';
  2939. dev_info(dev, " Signature = %s\n", temp_name);
  2940. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2941. dev_info(dev, " Transport methods supported = 0x%x\n",
  2942. readl(&(tb->TransportSupport)));
  2943. dev_info(dev, " Transport methods active = 0x%x\n",
  2944. readl(&(tb->TransportActive)));
  2945. dev_info(dev, " Requested transport Method = 0x%x\n",
  2946. readl(&(tb->HostWrite.TransportRequest)));
  2947. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2948. readl(&(tb->HostWrite.CoalIntDelay)));
  2949. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2950. readl(&(tb->HostWrite.CoalIntCount)));
  2951. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2952. readl(&(tb->CmdsOutMax)));
  2953. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2954. for (i = 0; i < 16; i++)
  2955. temp_name[i] = readb(&(tb->ServerName[i]));
  2956. temp_name[16] = '\0';
  2957. dev_info(dev, " Server Name = %s\n", temp_name);
  2958. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2959. readl(&(tb->HeartBeat)));
  2960. #endif /* HPSA_DEBUG */
  2961. }
  2962. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2963. {
  2964. int i, offset, mem_type, bar_type;
  2965. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2966. return 0;
  2967. offset = 0;
  2968. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2969. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2970. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2971. offset += 4;
  2972. else {
  2973. mem_type = pci_resource_flags(pdev, i) &
  2974. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2975. switch (mem_type) {
  2976. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2977. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2978. offset += 4; /* 32 bit */
  2979. break;
  2980. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2981. offset += 8;
  2982. break;
  2983. default: /* reserved in PCI 2.2 */
  2984. dev_warn(&pdev->dev,
  2985. "base address is invalid\n");
  2986. return -1;
  2987. break;
  2988. }
  2989. }
  2990. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2991. return i + 1;
  2992. }
  2993. return -1;
  2994. }
  2995. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2996. * controllers that are capable. If not, we use IO-APIC mode.
  2997. */
  2998. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2999. {
  3000. #ifdef CONFIG_PCI_MSI
  3001. int err;
  3002. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3003. {0, 2}, {0, 3}
  3004. };
  3005. /* Some boards advertise MSI but don't really support it */
  3006. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3007. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3008. goto default_int_mode;
  3009. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3010. dev_info(&h->pdev->dev, "MSIX\n");
  3011. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3012. if (!err) {
  3013. h->intr[0] = hpsa_msix_entries[0].vector;
  3014. h->intr[1] = hpsa_msix_entries[1].vector;
  3015. h->intr[2] = hpsa_msix_entries[2].vector;
  3016. h->intr[3] = hpsa_msix_entries[3].vector;
  3017. h->msix_vector = 1;
  3018. return;
  3019. }
  3020. if (err > 0) {
  3021. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3022. "available\n", err);
  3023. goto default_int_mode;
  3024. } else {
  3025. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3026. err);
  3027. goto default_int_mode;
  3028. }
  3029. }
  3030. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3031. dev_info(&h->pdev->dev, "MSI\n");
  3032. if (!pci_enable_msi(h->pdev))
  3033. h->msi_vector = 1;
  3034. else
  3035. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3036. }
  3037. default_int_mode:
  3038. #endif /* CONFIG_PCI_MSI */
  3039. /* if we get here we're going to use the default interrupt mode */
  3040. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3041. }
  3042. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3043. {
  3044. int i;
  3045. u32 subsystem_vendor_id, subsystem_device_id;
  3046. subsystem_vendor_id = pdev->subsystem_vendor;
  3047. subsystem_device_id = pdev->subsystem_device;
  3048. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3049. subsystem_vendor_id;
  3050. for (i = 0; i < ARRAY_SIZE(products); i++)
  3051. if (*board_id == products[i].board_id)
  3052. return i;
  3053. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3054. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3055. !hpsa_allow_any) {
  3056. dev_warn(&pdev->dev, "unrecognized board ID: "
  3057. "0x%08x, ignoring.\n", *board_id);
  3058. return -ENODEV;
  3059. }
  3060. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3061. }
  3062. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3063. {
  3064. u16 command;
  3065. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3066. return ((command & PCI_COMMAND_MEMORY) == 0);
  3067. }
  3068. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3069. unsigned long *memory_bar)
  3070. {
  3071. int i;
  3072. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3073. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3074. /* addressing mode bits already removed */
  3075. *memory_bar = pci_resource_start(pdev, i);
  3076. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3077. *memory_bar);
  3078. return 0;
  3079. }
  3080. dev_warn(&pdev->dev, "no memory BAR found\n");
  3081. return -ENODEV;
  3082. }
  3083. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  3084. {
  3085. int i;
  3086. u32 scratchpad;
  3087. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  3088. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3089. if (scratchpad == HPSA_FIRMWARE_READY)
  3090. return 0;
  3091. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3092. }
  3093. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  3094. return -ENODEV;
  3095. }
  3096. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3097. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3098. u64 *cfg_offset)
  3099. {
  3100. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3101. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3102. *cfg_base_addr &= (u32) 0x0000ffff;
  3103. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3104. if (*cfg_base_addr_index == -1) {
  3105. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3106. return -ENODEV;
  3107. }
  3108. return 0;
  3109. }
  3110. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3111. {
  3112. u64 cfg_offset;
  3113. u32 cfg_base_addr;
  3114. u64 cfg_base_addr_index;
  3115. u32 trans_offset;
  3116. int rc;
  3117. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3118. &cfg_base_addr_index, &cfg_offset);
  3119. if (rc)
  3120. return rc;
  3121. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3122. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3123. if (!h->cfgtable)
  3124. return -ENOMEM;
  3125. /* Find performant mode table. */
  3126. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3127. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3128. cfg_base_addr_index)+cfg_offset+trans_offset,
  3129. sizeof(*h->transtable));
  3130. if (!h->transtable)
  3131. return -ENOMEM;
  3132. return 0;
  3133. }
  3134. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3135. {
  3136. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3137. if (h->max_commands < 16) {
  3138. dev_warn(&h->pdev->dev, "Controller reports "
  3139. "max supported commands of %d, an obvious lie. "
  3140. "Using 16. Ensure that firmware is up to date.\n",
  3141. h->max_commands);
  3142. h->max_commands = 16;
  3143. }
  3144. }
  3145. /* Interrogate the hardware for some limits:
  3146. * max commands, max SG elements without chaining, and with chaining,
  3147. * SG chain block size, etc.
  3148. */
  3149. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3150. {
  3151. hpsa_get_max_perf_mode_cmds(h);
  3152. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3153. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3154. /*
  3155. * Limit in-command s/g elements to 32 save dma'able memory.
  3156. * Howvever spec says if 0, use 31
  3157. */
  3158. h->max_cmd_sg_entries = 31;
  3159. if (h->maxsgentries > 512) {
  3160. h->max_cmd_sg_entries = 32;
  3161. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3162. h->maxsgentries--; /* save one for chain pointer */
  3163. } else {
  3164. h->maxsgentries = 31; /* default to traditional values */
  3165. h->chainsize = 0;
  3166. }
  3167. }
  3168. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3169. {
  3170. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3171. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3172. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3173. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3174. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3175. return false;
  3176. }
  3177. return true;
  3178. }
  3179. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3180. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3181. {
  3182. #ifdef CONFIG_X86
  3183. u32 prefetch;
  3184. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3185. prefetch |= 0x100;
  3186. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3187. #endif
  3188. }
  3189. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3190. * in a prefetch beyond physical memory.
  3191. */
  3192. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3193. {
  3194. u32 dma_prefetch;
  3195. if (h->board_id != 0x3225103C)
  3196. return;
  3197. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3198. dma_prefetch |= 0x8000;
  3199. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3200. }
  3201. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3202. {
  3203. int i;
  3204. /* under certain very rare conditions, this can take awhile.
  3205. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3206. * as we enter this code.)
  3207. */
  3208. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3209. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3210. break;
  3211. /* delay and try again */
  3212. msleep(10);
  3213. }
  3214. }
  3215. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3216. {
  3217. u32 trans_support;
  3218. trans_support = readl(&(h->cfgtable->TransportSupport));
  3219. if (!(trans_support & SIMPLE_MODE))
  3220. return -ENOTSUPP;
  3221. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3222. /* Update the field, and then ring the doorbell */
  3223. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3224. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3225. hpsa_wait_for_mode_change_ack(h);
  3226. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3227. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3228. dev_warn(&h->pdev->dev,
  3229. "unable to get board into simple mode\n");
  3230. return -ENODEV;
  3231. }
  3232. return 0;
  3233. }
  3234. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3235. {
  3236. int prod_index, err;
  3237. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3238. if (prod_index < 0)
  3239. return -ENODEV;
  3240. h->product_name = products[prod_index].product_name;
  3241. h->access = *(products[prod_index].access);
  3242. if (hpsa_board_disabled(h->pdev)) {
  3243. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3244. return -ENODEV;
  3245. }
  3246. err = pci_enable_device(h->pdev);
  3247. if (err) {
  3248. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3249. return err;
  3250. }
  3251. err = pci_request_regions(h->pdev, "hpsa");
  3252. if (err) {
  3253. dev_err(&h->pdev->dev,
  3254. "cannot obtain PCI resources, aborting\n");
  3255. return err;
  3256. }
  3257. hpsa_interrupt_mode(h);
  3258. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3259. if (err)
  3260. goto err_out_free_res;
  3261. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3262. if (!h->vaddr) {
  3263. err = -ENOMEM;
  3264. goto err_out_free_res;
  3265. }
  3266. err = hpsa_wait_for_board_ready(h);
  3267. if (err)
  3268. goto err_out_free_res;
  3269. err = hpsa_find_cfgtables(h);
  3270. if (err)
  3271. goto err_out_free_res;
  3272. hpsa_find_board_params(h);
  3273. if (!hpsa_CISS_signature_present(h)) {
  3274. err = -ENODEV;
  3275. goto err_out_free_res;
  3276. }
  3277. hpsa_enable_scsi_prefetch(h);
  3278. hpsa_p600_dma_prefetch_quirk(h);
  3279. err = hpsa_enter_simple_mode(h);
  3280. if (err)
  3281. goto err_out_free_res;
  3282. return 0;
  3283. err_out_free_res:
  3284. if (h->transtable)
  3285. iounmap(h->transtable);
  3286. if (h->cfgtable)
  3287. iounmap(h->cfgtable);
  3288. if (h->vaddr)
  3289. iounmap(h->vaddr);
  3290. /*
  3291. * Deliberately omit pci_disable_device(): it does something nasty to
  3292. * Smart Array controllers that pci_enable_device does not undo
  3293. */
  3294. pci_release_regions(h->pdev);
  3295. return err;
  3296. }
  3297. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3298. {
  3299. int rc;
  3300. #define HBA_INQUIRY_BYTE_COUNT 64
  3301. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3302. if (!h->hba_inquiry_data)
  3303. return;
  3304. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3305. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3306. if (rc != 0) {
  3307. kfree(h->hba_inquiry_data);
  3308. h->hba_inquiry_data = NULL;
  3309. }
  3310. }
  3311. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3312. {
  3313. int rc, i;
  3314. if (!reset_devices)
  3315. return 0;
  3316. /* Reset the controller with a PCI power-cycle or via doorbell */
  3317. rc = hpsa_kdump_hard_reset_controller(pdev);
  3318. /* -ENOTSUPP here means we cannot reset the controller
  3319. * but it's already (and still) up and running in
  3320. * "performant mode". Or, it might be 640x, which can't reset
  3321. * due to concerns about shared bbwc between 6402/6404 pair.
  3322. */
  3323. if (rc == -ENOTSUPP)
  3324. return 0; /* just try to do the kdump anyhow. */
  3325. if (rc)
  3326. return -ENODEV;
  3327. if (hpsa_reset_msi(pdev))
  3328. return -ENODEV;
  3329. /* Now try to get the controller to respond to a no-op */
  3330. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3331. if (hpsa_noop(pdev) == 0)
  3332. break;
  3333. else
  3334. dev_warn(&pdev->dev, "no-op failed%s\n",
  3335. (i < 11 ? "; re-trying" : ""));
  3336. }
  3337. return 0;
  3338. }
  3339. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3340. const struct pci_device_id *ent)
  3341. {
  3342. int dac, rc;
  3343. struct ctlr_info *h;
  3344. if (number_of_controllers == 0)
  3345. printk(KERN_INFO DRIVER_NAME "\n");
  3346. rc = hpsa_init_reset_devices(pdev);
  3347. if (rc)
  3348. return rc;
  3349. /* Command structures must be aligned on a 32-byte boundary because
  3350. * the 5 lower bits of the address are used by the hardware. and by
  3351. * the driver. See comments in hpsa.h for more info.
  3352. */
  3353. #define COMMANDLIST_ALIGNMENT 32
  3354. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3355. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3356. if (!h)
  3357. return -ENOMEM;
  3358. h->pdev = pdev;
  3359. h->busy_initializing = 1;
  3360. INIT_HLIST_HEAD(&h->cmpQ);
  3361. INIT_HLIST_HEAD(&h->reqQ);
  3362. rc = hpsa_pci_init(h);
  3363. if (rc != 0)
  3364. goto clean1;
  3365. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3366. h->ctlr = number_of_controllers;
  3367. number_of_controllers++;
  3368. /* configure PCI DMA stuff */
  3369. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3370. if (rc == 0) {
  3371. dac = 1;
  3372. } else {
  3373. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3374. if (rc == 0) {
  3375. dac = 0;
  3376. } else {
  3377. dev_err(&pdev->dev, "no suitable DMA available\n");
  3378. goto clean1;
  3379. }
  3380. }
  3381. /* make sure the board interrupts are off */
  3382. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3383. if (h->msix_vector || h->msi_vector)
  3384. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3385. IRQF_DISABLED, h->devname, h);
  3386. else
  3387. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3388. IRQF_DISABLED, h->devname, h);
  3389. if (rc) {
  3390. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3391. h->intr[PERF_MODE_INT], h->devname);
  3392. goto clean2;
  3393. }
  3394. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3395. h->devname, pdev->device,
  3396. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3397. h->cmd_pool_bits =
  3398. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3399. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3400. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3401. h->nr_cmds * sizeof(*h->cmd_pool),
  3402. &(h->cmd_pool_dhandle));
  3403. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3404. h->nr_cmds * sizeof(*h->errinfo_pool),
  3405. &(h->errinfo_pool_dhandle));
  3406. if ((h->cmd_pool_bits == NULL)
  3407. || (h->cmd_pool == NULL)
  3408. || (h->errinfo_pool == NULL)) {
  3409. dev_err(&pdev->dev, "out of memory");
  3410. rc = -ENOMEM;
  3411. goto clean4;
  3412. }
  3413. if (hpsa_allocate_sg_chain_blocks(h))
  3414. goto clean4;
  3415. spin_lock_init(&h->lock);
  3416. spin_lock_init(&h->scan_lock);
  3417. init_waitqueue_head(&h->scan_wait_queue);
  3418. h->scan_finished = 1; /* no scan currently in progress */
  3419. pci_set_drvdata(pdev, h);
  3420. memset(h->cmd_pool_bits, 0,
  3421. ((h->nr_cmds + BITS_PER_LONG -
  3422. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3423. hpsa_scsi_setup(h);
  3424. /* Turn the interrupts on so we can service requests */
  3425. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3426. hpsa_put_ctlr_into_performant_mode(h);
  3427. hpsa_hba_inquiry(h);
  3428. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3429. h->busy_initializing = 0;
  3430. return 1;
  3431. clean4:
  3432. hpsa_free_sg_chain_blocks(h);
  3433. kfree(h->cmd_pool_bits);
  3434. if (h->cmd_pool)
  3435. pci_free_consistent(h->pdev,
  3436. h->nr_cmds * sizeof(struct CommandList),
  3437. h->cmd_pool, h->cmd_pool_dhandle);
  3438. if (h->errinfo_pool)
  3439. pci_free_consistent(h->pdev,
  3440. h->nr_cmds * sizeof(struct ErrorInfo),
  3441. h->errinfo_pool,
  3442. h->errinfo_pool_dhandle);
  3443. free_irq(h->intr[PERF_MODE_INT], h);
  3444. clean2:
  3445. clean1:
  3446. h->busy_initializing = 0;
  3447. kfree(h);
  3448. return rc;
  3449. }
  3450. static void hpsa_flush_cache(struct ctlr_info *h)
  3451. {
  3452. char *flush_buf;
  3453. struct CommandList *c;
  3454. flush_buf = kzalloc(4, GFP_KERNEL);
  3455. if (!flush_buf)
  3456. return;
  3457. c = cmd_special_alloc(h);
  3458. if (!c) {
  3459. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3460. goto out_of_memory;
  3461. }
  3462. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3463. RAID_CTLR_LUNID, TYPE_CMD);
  3464. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3465. if (c->err_info->CommandStatus != 0)
  3466. dev_warn(&h->pdev->dev,
  3467. "error flushing cache on controller\n");
  3468. cmd_special_free(h, c);
  3469. out_of_memory:
  3470. kfree(flush_buf);
  3471. }
  3472. static void hpsa_shutdown(struct pci_dev *pdev)
  3473. {
  3474. struct ctlr_info *h;
  3475. h = pci_get_drvdata(pdev);
  3476. /* Turn board interrupts off and send the flush cache command
  3477. * sendcmd will turn off interrupt, and send the flush...
  3478. * To write all data in the battery backed cache to disks
  3479. */
  3480. hpsa_flush_cache(h);
  3481. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3482. free_irq(h->intr[PERF_MODE_INT], h);
  3483. #ifdef CONFIG_PCI_MSI
  3484. if (h->msix_vector)
  3485. pci_disable_msix(h->pdev);
  3486. else if (h->msi_vector)
  3487. pci_disable_msi(h->pdev);
  3488. #endif /* CONFIG_PCI_MSI */
  3489. }
  3490. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3491. {
  3492. struct ctlr_info *h;
  3493. if (pci_get_drvdata(pdev) == NULL) {
  3494. dev_err(&pdev->dev, "unable to remove device \n");
  3495. return;
  3496. }
  3497. h = pci_get_drvdata(pdev);
  3498. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3499. hpsa_shutdown(pdev);
  3500. iounmap(h->vaddr);
  3501. iounmap(h->transtable);
  3502. iounmap(h->cfgtable);
  3503. hpsa_free_sg_chain_blocks(h);
  3504. pci_free_consistent(h->pdev,
  3505. h->nr_cmds * sizeof(struct CommandList),
  3506. h->cmd_pool, h->cmd_pool_dhandle);
  3507. pci_free_consistent(h->pdev,
  3508. h->nr_cmds * sizeof(struct ErrorInfo),
  3509. h->errinfo_pool, h->errinfo_pool_dhandle);
  3510. pci_free_consistent(h->pdev, h->reply_pool_size,
  3511. h->reply_pool, h->reply_pool_dhandle);
  3512. kfree(h->cmd_pool_bits);
  3513. kfree(h->blockFetchTable);
  3514. kfree(h->hba_inquiry_data);
  3515. /*
  3516. * Deliberately omit pci_disable_device(): it does something nasty to
  3517. * Smart Array controllers that pci_enable_device does not undo
  3518. */
  3519. pci_release_regions(pdev);
  3520. pci_set_drvdata(pdev, NULL);
  3521. kfree(h);
  3522. }
  3523. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3524. __attribute__((unused)) pm_message_t state)
  3525. {
  3526. return -ENOSYS;
  3527. }
  3528. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3529. {
  3530. return -ENOSYS;
  3531. }
  3532. static struct pci_driver hpsa_pci_driver = {
  3533. .name = "hpsa",
  3534. .probe = hpsa_init_one,
  3535. .remove = __devexit_p(hpsa_remove_one),
  3536. .id_table = hpsa_pci_device_id, /* id_table */
  3537. .shutdown = hpsa_shutdown,
  3538. .suspend = hpsa_suspend,
  3539. .resume = hpsa_resume,
  3540. };
  3541. /* Fill in bucket_map[], given nsgs (the max number of
  3542. * scatter gather elements supported) and bucket[],
  3543. * which is an array of 8 integers. The bucket[] array
  3544. * contains 8 different DMA transfer sizes (in 16
  3545. * byte increments) which the controller uses to fetch
  3546. * commands. This function fills in bucket_map[], which
  3547. * maps a given number of scatter gather elements to one of
  3548. * the 8 DMA transfer sizes. The point of it is to allow the
  3549. * controller to only do as much DMA as needed to fetch the
  3550. * command, with the DMA transfer size encoded in the lower
  3551. * bits of the command address.
  3552. */
  3553. static void calc_bucket_map(int bucket[], int num_buckets,
  3554. int nsgs, int *bucket_map)
  3555. {
  3556. int i, j, b, size;
  3557. /* even a command with 0 SGs requires 4 blocks */
  3558. #define MINIMUM_TRANSFER_BLOCKS 4
  3559. #define NUM_BUCKETS 8
  3560. /* Note, bucket_map must have nsgs+1 entries. */
  3561. for (i = 0; i <= nsgs; i++) {
  3562. /* Compute size of a command with i SG entries */
  3563. size = i + MINIMUM_TRANSFER_BLOCKS;
  3564. b = num_buckets; /* Assume the biggest bucket */
  3565. /* Find the bucket that is just big enough */
  3566. for (j = 0; j < 8; j++) {
  3567. if (bucket[j] >= size) {
  3568. b = j;
  3569. break;
  3570. }
  3571. }
  3572. /* for a command with i SG entries, use bucket b. */
  3573. bucket_map[i] = b;
  3574. }
  3575. }
  3576. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3577. {
  3578. int i;
  3579. unsigned long register_value;
  3580. /* This is a bit complicated. There are 8 registers on
  3581. * the controller which we write to to tell it 8 different
  3582. * sizes of commands which there may be. It's a way of
  3583. * reducing the DMA done to fetch each command. Encoded into
  3584. * each command's tag are 3 bits which communicate to the controller
  3585. * which of the eight sizes that command fits within. The size of
  3586. * each command depends on how many scatter gather entries there are.
  3587. * Each SG entry requires 16 bytes. The eight registers are programmed
  3588. * with the number of 16-byte blocks a command of that size requires.
  3589. * The smallest command possible requires 5 such 16 byte blocks.
  3590. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3591. * blocks. Note, this only extends to the SG entries contained
  3592. * within the command block, and does not extend to chained blocks
  3593. * of SG elements. bft[] contains the eight values we write to
  3594. * the registers. They are not evenly distributed, but have more
  3595. * sizes for small commands, and fewer sizes for larger commands.
  3596. */
  3597. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3598. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3599. /* 5 = 1 s/g entry or 4k
  3600. * 6 = 2 s/g entry or 8k
  3601. * 8 = 4 s/g entry or 16k
  3602. * 10 = 6 s/g entry or 24k
  3603. */
  3604. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3605. /* Controller spec: zero out this buffer. */
  3606. memset(h->reply_pool, 0, h->reply_pool_size);
  3607. h->reply_pool_head = h->reply_pool;
  3608. bft[7] = h->max_sg_entries + 4;
  3609. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3610. for (i = 0; i < 8; i++)
  3611. writel(bft[i], &h->transtable->BlockFetch[i]);
  3612. /* size of controller ring buffer */
  3613. writel(h->max_commands, &h->transtable->RepQSize);
  3614. writel(1, &h->transtable->RepQCount);
  3615. writel(0, &h->transtable->RepQCtrAddrLow32);
  3616. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3617. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3618. writel(0, &h->transtable->RepQAddr0High32);
  3619. writel(CFGTBL_Trans_Performant,
  3620. &(h->cfgtable->HostWrite.TransportRequest));
  3621. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3622. hpsa_wait_for_mode_change_ack(h);
  3623. register_value = readl(&(h->cfgtable->TransportActive));
  3624. if (!(register_value & CFGTBL_Trans_Performant)) {
  3625. dev_warn(&h->pdev->dev, "unable to get board into"
  3626. " performant mode\n");
  3627. return;
  3628. }
  3629. }
  3630. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3631. {
  3632. u32 trans_support;
  3633. trans_support = readl(&(h->cfgtable->TransportSupport));
  3634. if (!(trans_support & PERFORMANT_MODE))
  3635. return;
  3636. hpsa_get_max_perf_mode_cmds(h);
  3637. h->max_sg_entries = 32;
  3638. /* Performant mode ring buffer and supporting data structures */
  3639. h->reply_pool_size = h->max_commands * sizeof(u64);
  3640. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3641. &(h->reply_pool_dhandle));
  3642. /* Need a block fetch table for performant mode */
  3643. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3644. sizeof(u32)), GFP_KERNEL);
  3645. if ((h->reply_pool == NULL)
  3646. || (h->blockFetchTable == NULL))
  3647. goto clean_up;
  3648. hpsa_enter_performant_mode(h);
  3649. /* Change the access methods to the performant access methods */
  3650. h->access = SA5_performant_access;
  3651. h->transMethod = CFGTBL_Trans_Performant;
  3652. return;
  3653. clean_up:
  3654. if (h->reply_pool)
  3655. pci_free_consistent(h->pdev, h->reply_pool_size,
  3656. h->reply_pool, h->reply_pool_dhandle);
  3657. kfree(h->blockFetchTable);
  3658. }
  3659. /*
  3660. * This is it. Register the PCI driver information for the cards we control
  3661. * the OS will call our registered routines when it finds one of our cards.
  3662. */
  3663. static int __init hpsa_init(void)
  3664. {
  3665. return pci_register_driver(&hpsa_pci_driver);
  3666. }
  3667. static void __exit hpsa_cleanup(void)
  3668. {
  3669. pci_unregister_driver(&hpsa_pci_driver);
  3670. }
  3671. module_init(hpsa_init);
  3672. module_exit(hpsa_cleanup);