rx.c 17 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc.
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * rx.c
  26. *
  27. * Abstract: Hardware miniport for Drawbridge specific hardware functions.
  28. *
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/init.h>
  32. #include <linux/types.h>
  33. #include <linux/pci.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/blkdev.h>
  36. #include <linux/delay.h>
  37. #include <linux/completion.h>
  38. #include <linux/time.h>
  39. #include <linux/interrupt.h>
  40. #include <scsi/scsi_host.h>
  41. #include "aacraid.h"
  42. static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id)
  43. {
  44. struct aac_dev *dev = dev_id;
  45. unsigned long bellbits;
  46. u8 intstat = rx_readb(dev, MUnit.OISR);
  47. /*
  48. * Read mask and invert because drawbridge is reversed.
  49. * This allows us to only service interrupts that have
  50. * been enabled.
  51. * Check to see if this is our interrupt. If it isn't just return
  52. */
  53. if (likely(intstat & ~(dev->OIMR))) {
  54. bellbits = rx_readl(dev, OutboundDoorbellReg);
  55. if (unlikely(bellbits & DoorBellPrintfReady)) {
  56. aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5]));
  57. rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
  58. rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
  59. }
  60. else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) {
  61. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
  62. aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
  63. }
  64. else if (likely(bellbits & DoorBellAdapterNormRespReady)) {
  65. rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
  66. aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
  67. }
  68. else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) {
  69. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  70. }
  71. else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) {
  72. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  73. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
  74. }
  75. return IRQ_HANDLED;
  76. }
  77. return IRQ_NONE;
  78. }
  79. static irqreturn_t aac_rx_intr_message(int irq, void *dev_id)
  80. {
  81. struct aac_dev *dev = dev_id;
  82. u32 Index = rx_readl(dev, MUnit.OutboundQueue);
  83. if (unlikely(Index == 0xFFFFFFFFL))
  84. Index = rx_readl(dev, MUnit.OutboundQueue);
  85. if (likely(Index != 0xFFFFFFFFL)) {
  86. do {
  87. if (unlikely(aac_intr_normal(dev, Index))) {
  88. rx_writel(dev, MUnit.OutboundQueue, Index);
  89. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady);
  90. }
  91. Index = rx_readl(dev, MUnit.OutboundQueue);
  92. } while (Index != 0xFFFFFFFFL);
  93. return IRQ_HANDLED;
  94. }
  95. return IRQ_NONE;
  96. }
  97. /**
  98. * aac_rx_disable_interrupt - Disable interrupts
  99. * @dev: Adapter
  100. */
  101. static void aac_rx_disable_interrupt(struct aac_dev *dev)
  102. {
  103. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  104. }
  105. /**
  106. * aac_rx_enable_interrupt_producer - Enable interrupts
  107. * @dev: Adapter
  108. */
  109. static void aac_rx_enable_interrupt_producer(struct aac_dev *dev)
  110. {
  111. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  112. }
  113. /**
  114. * aac_rx_enable_interrupt_message - Enable interrupts
  115. * @dev: Adapter
  116. */
  117. static void aac_rx_enable_interrupt_message(struct aac_dev *dev)
  118. {
  119. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  120. }
  121. /**
  122. * rx_sync_cmd - send a command and wait
  123. * @dev: Adapter
  124. * @command: Command to execute
  125. * @p1: first parameter
  126. * @ret: adapter status
  127. *
  128. * This routine will send a synchronous command to the adapter and wait
  129. * for its completion.
  130. */
  131. static int rx_sync_cmd(struct aac_dev *dev, u32 command,
  132. u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
  133. u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
  134. {
  135. unsigned long start;
  136. int ok;
  137. /*
  138. * Write the command into Mailbox 0
  139. */
  140. writel(command, &dev->IndexRegs->Mailbox[0]);
  141. /*
  142. * Write the parameters into Mailboxes 1 - 6
  143. */
  144. writel(p1, &dev->IndexRegs->Mailbox[1]);
  145. writel(p2, &dev->IndexRegs->Mailbox[2]);
  146. writel(p3, &dev->IndexRegs->Mailbox[3]);
  147. writel(p4, &dev->IndexRegs->Mailbox[4]);
  148. /*
  149. * Clear the synch command doorbell to start on a clean slate.
  150. */
  151. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  152. /*
  153. * Disable doorbell interrupts
  154. */
  155. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  156. /*
  157. * Force the completion of the mask register write before issuing
  158. * the interrupt.
  159. */
  160. rx_readb (dev, MUnit.OIMR);
  161. /*
  162. * Signal that there is a new synch command
  163. */
  164. rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
  165. ok = 0;
  166. start = jiffies;
  167. /*
  168. * Wait up to 30 seconds
  169. */
  170. while (time_before(jiffies, start+30*HZ))
  171. {
  172. udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
  173. /*
  174. * Mon960 will set doorbell0 bit when it has completed the command.
  175. */
  176. if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
  177. /*
  178. * Clear the doorbell.
  179. */
  180. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  181. ok = 1;
  182. break;
  183. }
  184. /*
  185. * Yield the processor in case we are slow
  186. */
  187. msleep(1);
  188. }
  189. if (unlikely(ok != 1)) {
  190. /*
  191. * Restore interrupt mask even though we timed out
  192. */
  193. aac_adapter_enable_int(dev);
  194. return -ETIMEDOUT;
  195. }
  196. /*
  197. * Pull the synch status from Mailbox 0.
  198. */
  199. if (status)
  200. *status = readl(&dev->IndexRegs->Mailbox[0]);
  201. if (r1)
  202. *r1 = readl(&dev->IndexRegs->Mailbox[1]);
  203. if (r2)
  204. *r2 = readl(&dev->IndexRegs->Mailbox[2]);
  205. if (r3)
  206. *r3 = readl(&dev->IndexRegs->Mailbox[3]);
  207. if (r4)
  208. *r4 = readl(&dev->IndexRegs->Mailbox[4]);
  209. /*
  210. * Clear the synch command doorbell.
  211. */
  212. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  213. /*
  214. * Restore interrupt mask
  215. */
  216. aac_adapter_enable_int(dev);
  217. return 0;
  218. }
  219. /**
  220. * aac_rx_interrupt_adapter - interrupt adapter
  221. * @dev: Adapter
  222. *
  223. * Send an interrupt to the i960 and breakpoint it.
  224. */
  225. static void aac_rx_interrupt_adapter(struct aac_dev *dev)
  226. {
  227. rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  228. }
  229. /**
  230. * aac_rx_notify_adapter - send an event to the adapter
  231. * @dev: Adapter
  232. * @event: Event to send
  233. *
  234. * Notify the i960 that something it probably cares about has
  235. * happened.
  236. */
  237. static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
  238. {
  239. switch (event) {
  240. case AdapNormCmdQue:
  241. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
  242. break;
  243. case HostNormRespNotFull:
  244. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
  245. break;
  246. case AdapNormRespQue:
  247. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
  248. break;
  249. case HostNormCmdNotFull:
  250. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
  251. break;
  252. case HostShutdown:
  253. break;
  254. case FastIo:
  255. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
  256. break;
  257. case AdapPrintfDone:
  258. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
  259. break;
  260. default:
  261. BUG();
  262. break;
  263. }
  264. }
  265. /**
  266. * aac_rx_start_adapter - activate adapter
  267. * @dev: Adapter
  268. *
  269. * Start up processing on an i960 based AAC adapter
  270. */
  271. static void aac_rx_start_adapter(struct aac_dev *dev)
  272. {
  273. struct aac_init *init;
  274. init = dev->init;
  275. init->HostElapsedSeconds = cpu_to_le32(get_seconds());
  276. // We can only use a 32 bit address here
  277. rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
  278. 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  279. }
  280. /**
  281. * aac_rx_check_health
  282. * @dev: device to check if healthy
  283. *
  284. * Will attempt to determine if the specified adapter is alive and
  285. * capable of handling requests, returning 0 if alive.
  286. */
  287. static int aac_rx_check_health(struct aac_dev *dev)
  288. {
  289. u32 status = rx_readl(dev, MUnit.OMRx[0]);
  290. /*
  291. * Check to see if the board failed any self tests.
  292. */
  293. if (unlikely(status & SELF_TEST_FAILED))
  294. return -1;
  295. /*
  296. * Check to see if the board panic'd.
  297. */
  298. if (unlikely(status & KERNEL_PANIC)) {
  299. char * buffer;
  300. struct POSTSTATUS {
  301. __le32 Post_Command;
  302. __le32 Post_Address;
  303. } * post;
  304. dma_addr_t paddr, baddr;
  305. int ret;
  306. if (likely((status & 0xFF000000L) == 0xBC000000L))
  307. return (status >> 16) & 0xFF;
  308. buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
  309. ret = -2;
  310. if (unlikely(buffer == NULL))
  311. return ret;
  312. post = pci_alloc_consistent(dev->pdev,
  313. sizeof(struct POSTSTATUS), &paddr);
  314. if (unlikely(post == NULL)) {
  315. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  316. return ret;
  317. }
  318. memset(buffer, 0, 512);
  319. post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
  320. post->Post_Address = cpu_to_le32(baddr);
  321. rx_writel(dev, MUnit.IMRx[0], paddr);
  322. rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
  323. NULL, NULL, NULL, NULL, NULL);
  324. pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
  325. post, paddr);
  326. if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) {
  327. ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10);
  328. ret <<= 4;
  329. ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10);
  330. }
  331. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  332. return ret;
  333. }
  334. /*
  335. * Wait for the adapter to be up and running.
  336. */
  337. if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
  338. return -3;
  339. /*
  340. * Everything is OK
  341. */
  342. return 0;
  343. }
  344. /**
  345. * aac_rx_deliver_producer
  346. * @fib: fib to issue
  347. *
  348. * Will send a fib, returning 0 if successful.
  349. */
  350. int aac_rx_deliver_producer(struct fib * fib)
  351. {
  352. struct aac_dev *dev = fib->dev;
  353. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  354. unsigned long qflags;
  355. u32 Index;
  356. unsigned long nointr = 0;
  357. spin_lock_irqsave(q->lock, qflags);
  358. aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr);
  359. q->numpending++;
  360. *(q->headers.producer) = cpu_to_le32(Index + 1);
  361. spin_unlock_irqrestore(q->lock, qflags);
  362. if (!(nointr & aac_config.irq_mod))
  363. aac_adapter_notify(dev, AdapNormCmdQueue);
  364. return 0;
  365. }
  366. /**
  367. * aac_rx_deliver_message
  368. * @fib: fib to issue
  369. *
  370. * Will send a fib, returning 0 if successful.
  371. */
  372. static int aac_rx_deliver_message(struct fib * fib)
  373. {
  374. struct aac_dev *dev = fib->dev;
  375. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  376. unsigned long qflags;
  377. u32 Index;
  378. u64 addr;
  379. volatile void __iomem *device;
  380. unsigned long count = 10000000L; /* 50 seconds */
  381. spin_lock_irqsave(q->lock, qflags);
  382. q->numpending++;
  383. spin_unlock_irqrestore(q->lock, qflags);
  384. for(;;) {
  385. Index = rx_readl(dev, MUnit.InboundQueue);
  386. if (unlikely(Index == 0xFFFFFFFFL))
  387. Index = rx_readl(dev, MUnit.InboundQueue);
  388. if (likely(Index != 0xFFFFFFFFL))
  389. break;
  390. if (--count == 0) {
  391. spin_lock_irqsave(q->lock, qflags);
  392. q->numpending--;
  393. spin_unlock_irqrestore(q->lock, qflags);
  394. return -ETIMEDOUT;
  395. }
  396. udelay(5);
  397. }
  398. device = dev->base + Index;
  399. addr = fib->hw_fib_pa;
  400. writel((u32)(addr & 0xffffffff), device);
  401. device += sizeof(u32);
  402. writel((u32)(addr >> 32), device);
  403. device += sizeof(u32);
  404. writel(le16_to_cpu(fib->hw_fib_va->header.Size), device);
  405. rx_writel(dev, MUnit.InboundQueue, Index);
  406. return 0;
  407. }
  408. /**
  409. * aac_rx_ioremap
  410. * @size: mapping resize request
  411. *
  412. */
  413. static int aac_rx_ioremap(struct aac_dev * dev, u32 size)
  414. {
  415. if (!size) {
  416. iounmap(dev->regs.rx);
  417. return 0;
  418. }
  419. dev->base = dev->regs.rx = ioremap(dev->scsi_host_ptr->base, size);
  420. if (dev->base == NULL)
  421. return -1;
  422. dev->IndexRegs = &dev->regs.rx->IndexRegs;
  423. return 0;
  424. }
  425. static int aac_rx_restart_adapter(struct aac_dev *dev, int bled)
  426. {
  427. u32 var;
  428. if (!(dev->supplement_adapter_info.SupportedOptions2 &
  429. AAC_OPTION_MU_RESET) || (bled >= 0) || (bled == -2)) {
  430. if (bled)
  431. printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
  432. dev->name, dev->id, bled);
  433. else {
  434. bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
  435. 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL);
  436. if (!bled && (var != 0x00000001) && (var != 0x3803000F))
  437. bled = -EINVAL;
  438. }
  439. if (bled && (bled != -ETIMEDOUT))
  440. bled = aac_adapter_sync_cmd(dev, IOP_RESET,
  441. 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL);
  442. if (bled && (bled != -ETIMEDOUT))
  443. return -EINVAL;
  444. }
  445. if (bled || (var == 0x3803000F)) { /* USE_OTHER_METHOD */
  446. rx_writel(dev, MUnit.reserved2, 3);
  447. msleep(5000); /* Delay 5 seconds */
  448. var = 0x00000001;
  449. }
  450. if (var != 0x00000001)
  451. return -EINVAL;
  452. if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC)
  453. return -ENODEV;
  454. if (startup_timeout < 300)
  455. startup_timeout = 300;
  456. return 0;
  457. }
  458. /**
  459. * aac_rx_select_comm - Select communications method
  460. * @dev: Adapter
  461. * @comm: communications method
  462. */
  463. int aac_rx_select_comm(struct aac_dev *dev, int comm)
  464. {
  465. switch (comm) {
  466. case AAC_COMM_PRODUCER:
  467. dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer;
  468. dev->a_ops.adapter_intr = aac_rx_intr_producer;
  469. dev->a_ops.adapter_deliver = aac_rx_deliver_producer;
  470. break;
  471. case AAC_COMM_MESSAGE:
  472. dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message;
  473. dev->a_ops.adapter_intr = aac_rx_intr_message;
  474. dev->a_ops.adapter_deliver = aac_rx_deliver_message;
  475. break;
  476. default:
  477. return 1;
  478. }
  479. return 0;
  480. }
  481. /**
  482. * aac_rx_init - initialize an i960 based AAC card
  483. * @dev: device to configure
  484. *
  485. * Allocate and set up resources for the i960 based AAC variants. The
  486. * device_interface in the commregion will be allocated and linked
  487. * to the comm region.
  488. */
  489. int _aac_rx_init(struct aac_dev *dev)
  490. {
  491. unsigned long start;
  492. unsigned long status;
  493. int restart = 0;
  494. int instance = dev->id;
  495. const char * name = dev->name;
  496. if (aac_adapter_ioremap(dev, dev->base_size)) {
  497. printk(KERN_WARNING "%s: unable to map adapter.\n", name);
  498. goto error_iounmap;
  499. }
  500. /* Failure to reset here is an option ... */
  501. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  502. dev->a_ops.adapter_enable_int = aac_rx_disable_interrupt;
  503. dev->OIMR = status = rx_readb (dev, MUnit.OIMR);
  504. if ((((status & 0x0c) != 0x0c) || aac_reset_devices || reset_devices) &&
  505. !aac_rx_restart_adapter(dev, 0))
  506. /* Make sure the Hardware FIFO is empty */
  507. while ((++restart < 512) &&
  508. (rx_readl(dev, MUnit.OutboundQueue) != 0xFFFFFFFFL));
  509. /*
  510. * Check to see if the board panic'd while booting.
  511. */
  512. status = rx_readl(dev, MUnit.OMRx[0]);
  513. if (status & KERNEL_PANIC) {
  514. if (aac_rx_restart_adapter(dev, aac_rx_check_health(dev)))
  515. goto error_iounmap;
  516. ++restart;
  517. }
  518. /*
  519. * Check to see if the board failed any self tests.
  520. */
  521. status = rx_readl(dev, MUnit.OMRx[0]);
  522. if (status & SELF_TEST_FAILED) {
  523. printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
  524. goto error_iounmap;
  525. }
  526. /*
  527. * Check to see if the monitor panic'd while booting.
  528. */
  529. if (status & MONITOR_PANIC) {
  530. printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
  531. goto error_iounmap;
  532. }
  533. start = jiffies;
  534. /*
  535. * Wait for the adapter to be up and running. Wait up to 3 minutes
  536. */
  537. while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING))
  538. {
  539. if ((restart &&
  540. (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
  541. time_after(jiffies, start+HZ*startup_timeout)) {
  542. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  543. dev->name, instance, status);
  544. goto error_iounmap;
  545. }
  546. if (!restart &&
  547. ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
  548. time_after(jiffies, start + HZ *
  549. ((startup_timeout > 60)
  550. ? (startup_timeout - 60)
  551. : (startup_timeout / 2))))) {
  552. if (likely(!aac_rx_restart_adapter(dev, aac_rx_check_health(dev))))
  553. start = jiffies;
  554. ++restart;
  555. }
  556. msleep(1);
  557. }
  558. if (restart && aac_commit)
  559. aac_commit = 1;
  560. /*
  561. * Fill in the common function dispatch table.
  562. */
  563. dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
  564. dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
  565. dev->a_ops.adapter_notify = aac_rx_notify_adapter;
  566. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  567. dev->a_ops.adapter_check_health = aac_rx_check_health;
  568. dev->a_ops.adapter_restart = aac_rx_restart_adapter;
  569. /*
  570. * First clear out all interrupts. Then enable the one's that we
  571. * can handle.
  572. */
  573. aac_adapter_comm(dev, AAC_COMM_PRODUCER);
  574. aac_adapter_disable_int(dev);
  575. rx_writel(dev, MUnit.ODR, 0xffffffff);
  576. aac_adapter_enable_int(dev);
  577. if (aac_init_adapter(dev) == NULL)
  578. goto error_iounmap;
  579. aac_adapter_comm(dev, dev->comm_interface);
  580. dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
  581. if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
  582. IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
  583. if (dev->msi)
  584. pci_disable_msi(dev->pdev);
  585. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  586. name, instance);
  587. goto error_iounmap;
  588. }
  589. aac_adapter_enable_int(dev);
  590. /*
  591. * Tell the adapter that all is configured, and it can
  592. * start accepting requests
  593. */
  594. aac_rx_start_adapter(dev);
  595. return 0;
  596. error_iounmap:
  597. return -1;
  598. }
  599. int aac_rx_init(struct aac_dev *dev)
  600. {
  601. /*
  602. * Fill in the function dispatch table.
  603. */
  604. dev->a_ops.adapter_ioremap = aac_rx_ioremap;
  605. dev->a_ops.adapter_comm = aac_rx_select_comm;
  606. return _aac_rx_init(dev);
  607. }