islpci_dev.c 27 KB

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  1. /*
  2. * Copyright (C) 2002 Intersil Americas Inc.
  3. * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
  4. * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/ethtool.h>
  24. #include <linux/pci.h>
  25. #include <linux/sched.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/delay.h>
  28. #include <linux/if_arp.h>
  29. #include <asm/io.h>
  30. #include "prismcompat.h"
  31. #include "isl_38xx.h"
  32. #include "isl_ioctl.h"
  33. #include "islpci_dev.h"
  34. #include "islpci_mgt.h"
  35. #include "islpci_eth.h"
  36. #include "oid_mgt.h"
  37. #define ISL3877_IMAGE_FILE "isl3877"
  38. #define ISL3886_IMAGE_FILE "isl3886"
  39. #define ISL3890_IMAGE_FILE "isl3890"
  40. MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
  41. MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
  42. MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
  43. static int prism54_bring_down(islpci_private *);
  44. static int islpci_alloc_memory(islpci_private *);
  45. /* Temporary dummy MAC address to use until firmware is loaded.
  46. * The idea there is that some tools (such as nameif) may query
  47. * the MAC address before the netdev is 'open'. By using a valid
  48. * OUI prefix, they can process the netdev properly.
  49. * Of course, this is not the final/real MAC address. It doesn't
  50. * matter, as you are suppose to be able to change it anytime via
  51. * ndev->set_mac_address. Jean II */
  52. static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
  53. static int
  54. isl_upload_firmware(islpci_private *priv)
  55. {
  56. u32 reg, rc;
  57. void __iomem *device_base = priv->device_base;
  58. /* clear the RAMBoot and the Reset bit */
  59. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  60. reg &= ~ISL38XX_CTRL_STAT_RESET;
  61. reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
  62. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  63. wmb();
  64. udelay(ISL38XX_WRITEIO_DELAY);
  65. /* set the Reset bit without reading the register ! */
  66. reg |= ISL38XX_CTRL_STAT_RESET;
  67. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  68. wmb();
  69. udelay(ISL38XX_WRITEIO_DELAY);
  70. /* clear the Reset bit */
  71. reg &= ~ISL38XX_CTRL_STAT_RESET;
  72. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  73. wmb();
  74. /* wait a while for the device to reboot */
  75. mdelay(50);
  76. {
  77. const struct firmware *fw_entry = NULL;
  78. long fw_len;
  79. const u32 *fw_ptr;
  80. rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
  81. if (rc) {
  82. printk(KERN_ERR
  83. "%s: request_firmware() failed for '%s'\n",
  84. "prism54", priv->firmware);
  85. return rc;
  86. }
  87. /* prepare the Direct Memory Base register */
  88. reg = ISL38XX_DEV_FIRMWARE_ADDRES;
  89. fw_ptr = (u32 *) fw_entry->data;
  90. fw_len = fw_entry->size;
  91. if (fw_len % 4) {
  92. printk(KERN_ERR
  93. "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
  94. "prism54", priv->firmware);
  95. release_firmware(fw_entry);
  96. return -EILSEQ; /* Illegal byte sequence */;
  97. }
  98. while (fw_len > 0) {
  99. long _fw_len =
  100. (fw_len >
  101. ISL38XX_MEMORY_WINDOW_SIZE) ?
  102. ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
  103. u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
  104. /* set the card's base address for writing the data */
  105. isl38xx_w32_flush(device_base, reg,
  106. ISL38XX_DIR_MEM_BASE_REG);
  107. wmb(); /* be paranoid */
  108. /* increment the write address for next iteration */
  109. reg += _fw_len;
  110. fw_len -= _fw_len;
  111. /* write the data to the Direct Memory Window 32bit-wise */
  112. /* memcpy_toio() doesn't guarantee 32bit writes :-| */
  113. while (_fw_len > 0) {
  114. /* use non-swapping writel() */
  115. __raw_writel(*fw_ptr, dev_fw_ptr);
  116. fw_ptr++, dev_fw_ptr++;
  117. _fw_len -= 4;
  118. }
  119. /* flush PCI posting */
  120. (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
  121. wmb(); /* be paranoid again */
  122. BUG_ON(_fw_len != 0);
  123. }
  124. BUG_ON(fw_len != 0);
  125. /* Firmware version is at offset 40 (also for "newmac") */
  126. printk(KERN_DEBUG "%s: firmware version: %.8s\n",
  127. priv->ndev->name, fw_entry->data + 40);
  128. release_firmware(fw_entry);
  129. }
  130. /* now reset the device
  131. * clear the Reset & ClkRun bit, set the RAMBoot bit */
  132. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  133. reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
  134. reg &= ~ISL38XX_CTRL_STAT_RESET;
  135. reg |= ISL38XX_CTRL_STAT_RAMBOOT;
  136. isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
  137. wmb();
  138. udelay(ISL38XX_WRITEIO_DELAY);
  139. /* set the reset bit latches the host override and RAMBoot bits
  140. * into the device for operation when the reset bit is reset */
  141. reg |= ISL38XX_CTRL_STAT_RESET;
  142. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  143. /* don't do flush PCI posting here! */
  144. wmb();
  145. udelay(ISL38XX_WRITEIO_DELAY);
  146. /* clear the reset bit should start the whole circus */
  147. reg &= ~ISL38XX_CTRL_STAT_RESET;
  148. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  149. /* don't do flush PCI posting here! */
  150. wmb();
  151. udelay(ISL38XX_WRITEIO_DELAY);
  152. return 0;
  153. }
  154. /******************************************************************************
  155. Device Interrupt Handler
  156. ******************************************************************************/
  157. irqreturn_t
  158. islpci_interrupt(int irq, void *config)
  159. {
  160. u32 reg;
  161. islpci_private *priv = config;
  162. struct net_device *ndev = priv->ndev;
  163. void __iomem *device = priv->device_base;
  164. int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
  165. /* lock the interrupt handler */
  166. spin_lock(&priv->slock);
  167. /* received an interrupt request on a shared IRQ line
  168. * first check whether the device is in sleep mode */
  169. reg = readl(device + ISL38XX_CTRL_STAT_REG);
  170. if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
  171. /* device is in sleep mode, IRQ was generated by someone else */
  172. {
  173. #if VERBOSE > SHOW_ERROR_MESSAGES
  174. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  175. #endif
  176. spin_unlock(&priv->slock);
  177. return IRQ_NONE;
  178. }
  179. /* check whether there is any source of interrupt on the device */
  180. reg = readl(device + ISL38XX_INT_IDENT_REG);
  181. /* also check the contents of the Interrupt Enable Register, because this
  182. * will filter out interrupt sources from other devices on the same irq ! */
  183. reg &= readl(device + ISL38XX_INT_EN_REG);
  184. reg &= ISL38XX_INT_SOURCES;
  185. if (reg != 0) {
  186. if (islpci_get_state(priv) != PRV_STATE_SLEEP)
  187. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  188. /* reset the request bits in the Identification register */
  189. isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
  190. #if VERBOSE > SHOW_ERROR_MESSAGES
  191. DEBUG(SHOW_FUNCTION_CALLS,
  192. "IRQ: Identification register 0x%p 0x%x\n", device, reg);
  193. #endif
  194. /* check for each bit in the register separately */
  195. if (reg & ISL38XX_INT_IDENT_UPDATE) {
  196. #if VERBOSE > SHOW_ERROR_MESSAGES
  197. /* Queue has been updated */
  198. DEBUG(SHOW_TRACING, "IRQ: Update flag\n");
  199. DEBUG(SHOW_QUEUE_INDEXES,
  200. "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
  201. le32_to_cpu(priv->control_block->
  202. driver_curr_frag[0]),
  203. le32_to_cpu(priv->control_block->
  204. driver_curr_frag[1]),
  205. le32_to_cpu(priv->control_block->
  206. driver_curr_frag[2]),
  207. le32_to_cpu(priv->control_block->
  208. driver_curr_frag[3]),
  209. le32_to_cpu(priv->control_block->
  210. driver_curr_frag[4]),
  211. le32_to_cpu(priv->control_block->
  212. driver_curr_frag[5])
  213. );
  214. DEBUG(SHOW_QUEUE_INDEXES,
  215. "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
  216. le32_to_cpu(priv->control_block->
  217. device_curr_frag[0]),
  218. le32_to_cpu(priv->control_block->
  219. device_curr_frag[1]),
  220. le32_to_cpu(priv->control_block->
  221. device_curr_frag[2]),
  222. le32_to_cpu(priv->control_block->
  223. device_curr_frag[3]),
  224. le32_to_cpu(priv->control_block->
  225. device_curr_frag[4]),
  226. le32_to_cpu(priv->control_block->
  227. device_curr_frag[5])
  228. );
  229. #endif
  230. /* cleanup the data low transmit queue */
  231. islpci_eth_cleanup_transmit(priv, priv->control_block);
  232. /* device is in active state, update the
  233. * powerstate flag if necessary */
  234. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  235. /* check all three queues in priority order
  236. * call the PIMFOR receive function until the
  237. * queue is empty */
  238. if (isl38xx_in_queue(priv->control_block,
  239. ISL38XX_CB_RX_MGMTQ) != 0) {
  240. #if VERBOSE > SHOW_ERROR_MESSAGES
  241. DEBUG(SHOW_TRACING,
  242. "Received frame in Management Queue\n");
  243. #endif
  244. islpci_mgt_receive(ndev);
  245. islpci_mgt_cleanup_transmit(ndev);
  246. /* Refill slots in receive queue */
  247. islpci_mgmt_rx_fill(ndev);
  248. /* no need to trigger the device, next
  249. islpci_mgt_transaction does it */
  250. }
  251. while (isl38xx_in_queue(priv->control_block,
  252. ISL38XX_CB_RX_DATA_LQ) != 0) {
  253. #if VERBOSE > SHOW_ERROR_MESSAGES
  254. DEBUG(SHOW_TRACING,
  255. "Received frame in Data Low Queue\n");
  256. #endif
  257. islpci_eth_receive(priv);
  258. }
  259. /* check whether the data transmit queues were full */
  260. if (priv->data_low_tx_full) {
  261. /* check whether the transmit is not full anymore */
  262. if (ISL38XX_CB_TX_QSIZE -
  263. isl38xx_in_queue(priv->control_block,
  264. ISL38XX_CB_TX_DATA_LQ) >=
  265. ISL38XX_MIN_QTHRESHOLD) {
  266. /* nope, the driver is ready for more network frames */
  267. netif_wake_queue(priv->ndev);
  268. /* reset the full flag */
  269. priv->data_low_tx_full = 0;
  270. }
  271. }
  272. }
  273. if (reg & ISL38XX_INT_IDENT_INIT) {
  274. /* Device has been initialized */
  275. #if VERBOSE > SHOW_ERROR_MESSAGES
  276. DEBUG(SHOW_TRACING,
  277. "IRQ: Init flag, device initialized\n");
  278. #endif
  279. wake_up(&priv->reset_done);
  280. }
  281. if (reg & ISL38XX_INT_IDENT_SLEEP) {
  282. /* Device intends to move to powersave state */
  283. #if VERBOSE > SHOW_ERROR_MESSAGES
  284. DEBUG(SHOW_TRACING, "IRQ: Sleep flag\n");
  285. #endif
  286. isl38xx_handle_sleep_request(priv->control_block,
  287. &powerstate,
  288. priv->device_base);
  289. }
  290. if (reg & ISL38XX_INT_IDENT_WAKEUP) {
  291. /* Device has been woken up to active state */
  292. #if VERBOSE > SHOW_ERROR_MESSAGES
  293. DEBUG(SHOW_TRACING, "IRQ: Wakeup flag\n");
  294. #endif
  295. isl38xx_handle_wakeup(priv->control_block,
  296. &powerstate, priv->device_base);
  297. }
  298. } else {
  299. #if VERBOSE > SHOW_ERROR_MESSAGES
  300. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  301. #endif
  302. spin_unlock(&priv->slock);
  303. return IRQ_NONE;
  304. }
  305. /* sleep -> ready */
  306. if (islpci_get_state(priv) == PRV_STATE_SLEEP
  307. && powerstate == ISL38XX_PSM_ACTIVE_STATE)
  308. islpci_set_state(priv, PRV_STATE_READY);
  309. /* !sleep -> sleep */
  310. if (islpci_get_state(priv) != PRV_STATE_SLEEP
  311. && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
  312. islpci_set_state(priv, PRV_STATE_SLEEP);
  313. /* unlock the interrupt handler */
  314. spin_unlock(&priv->slock);
  315. return IRQ_HANDLED;
  316. }
  317. /******************************************************************************
  318. Network Interface Control & Statistical functions
  319. ******************************************************************************/
  320. static int
  321. islpci_open(struct net_device *ndev)
  322. {
  323. u32 rc;
  324. islpci_private *priv = netdev_priv(ndev);
  325. /* reset data structures, upload firmware and reset device */
  326. rc = islpci_reset(priv,1);
  327. if (rc) {
  328. prism54_bring_down(priv);
  329. return rc; /* Returns informative message */
  330. }
  331. netif_start_queue(ndev);
  332. /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
  333. * once the firmware receives a trap of being associated
  334. * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
  335. * should just leave the carrier on as its expected the firmware
  336. * won't send us a trigger. */
  337. if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
  338. netif_carrier_off(ndev);
  339. else
  340. netif_carrier_on(ndev);
  341. return 0;
  342. }
  343. static int
  344. islpci_close(struct net_device *ndev)
  345. {
  346. islpci_private *priv = netdev_priv(ndev);
  347. printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
  348. netif_stop_queue(ndev);
  349. return prism54_bring_down(priv);
  350. }
  351. static int
  352. prism54_bring_down(islpci_private *priv)
  353. {
  354. void __iomem *device_base = priv->device_base;
  355. u32 reg;
  356. /* we are going to shutdown the device */
  357. islpci_set_state(priv, PRV_STATE_PREBOOT);
  358. /* disable all device interrupts in case they weren't */
  359. isl38xx_disable_interrupts(priv->device_base);
  360. /* For safety reasons, we may want to ensure that no DMA transfer is
  361. * currently in progress by emptying the TX and RX queues. */
  362. /* wait until interrupts have finished executing on other CPUs */
  363. synchronize_irq(priv->pdev->irq);
  364. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  365. reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
  366. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  367. wmb();
  368. udelay(ISL38XX_WRITEIO_DELAY);
  369. reg |= ISL38XX_CTRL_STAT_RESET;
  370. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  371. wmb();
  372. udelay(ISL38XX_WRITEIO_DELAY);
  373. /* clear the Reset bit */
  374. reg &= ~ISL38XX_CTRL_STAT_RESET;
  375. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  376. wmb();
  377. /* wait a while for the device to reset */
  378. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  379. return 0;
  380. }
  381. static int
  382. islpci_upload_fw(islpci_private *priv)
  383. {
  384. islpci_state_t old_state;
  385. u32 rc;
  386. old_state = islpci_set_state(priv, PRV_STATE_BOOT);
  387. printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
  388. rc = isl_upload_firmware(priv);
  389. if (rc) {
  390. /* error uploading the firmware */
  391. printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
  392. priv->ndev->name, priv->firmware);
  393. islpci_set_state(priv, old_state);
  394. return rc;
  395. }
  396. printk(KERN_DEBUG "%s: firmware upload complete\n",
  397. priv->ndev->name);
  398. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  399. return 0;
  400. }
  401. static int
  402. islpci_reset_if(islpci_private *priv)
  403. {
  404. long remaining;
  405. int result = -ETIME;
  406. int count;
  407. DEFINE_WAIT(wait);
  408. prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
  409. /* now the last step is to reset the interface */
  410. isl38xx_interface_reset(priv->device_base, priv->device_host_address);
  411. islpci_set_state(priv, PRV_STATE_PREINIT);
  412. for(count = 0; count < 2 && result; count++) {
  413. /* The software reset acknowledge needs about 220 msec here.
  414. * Be conservative and wait for up to one second. */
  415. remaining = schedule_timeout_uninterruptible(HZ);
  416. if(remaining > 0) {
  417. result = 0;
  418. break;
  419. }
  420. /* If we're here it's because our IRQ hasn't yet gone through.
  421. * Retry a bit more...
  422. */
  423. printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
  424. priv->ndev->name);
  425. }
  426. finish_wait(&priv->reset_done, &wait);
  427. if (result) {
  428. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  429. return result;
  430. }
  431. islpci_set_state(priv, PRV_STATE_INIT);
  432. /* Now that the device is 100% up, let's allow
  433. * for the other interrupts --
  434. * NOTE: this is not *yet* true since we've only allowed the
  435. * INIT interrupt on the IRQ line. We can perhaps poll
  436. * the IRQ line until we know for sure the reset went through */
  437. isl38xx_enable_common_interrupts(priv->device_base);
  438. down_write(&priv->mib_sem);
  439. result = mgt_commit(priv);
  440. if (result) {
  441. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  442. up_write(&priv->mib_sem);
  443. return result;
  444. }
  445. up_write(&priv->mib_sem);
  446. islpci_set_state(priv, PRV_STATE_READY);
  447. printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
  448. return 0;
  449. }
  450. int
  451. islpci_reset(islpci_private *priv, int reload_firmware)
  452. {
  453. isl38xx_control_block *cb = /* volatile not needed */
  454. (isl38xx_control_block *) priv->control_block;
  455. unsigned counter;
  456. int rc;
  457. if (reload_firmware)
  458. islpci_set_state(priv, PRV_STATE_PREBOOT);
  459. else
  460. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  461. printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
  462. /* disable all device interrupts in case they weren't */
  463. isl38xx_disable_interrupts(priv->device_base);
  464. /* flush all management queues */
  465. priv->index_mgmt_tx = 0;
  466. priv->index_mgmt_rx = 0;
  467. /* clear the indexes in the frame pointer */
  468. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  469. cb->driver_curr_frag[counter] = cpu_to_le32(0);
  470. cb->device_curr_frag[counter] = cpu_to_le32(0);
  471. }
  472. /* reset the mgmt receive queue */
  473. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  474. isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
  475. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  476. frag->flags = 0;
  477. frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
  478. }
  479. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  480. cb->rx_data_low[counter].address =
  481. cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
  482. }
  483. /* since the receive queues are filled with empty fragments, now we can
  484. * set the corresponding indexes in the Control Block */
  485. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
  486. cpu_to_le32(ISL38XX_CB_RX_QSIZE);
  487. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
  488. cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
  489. /* reset the remaining real index registers and full flags */
  490. priv->free_data_rx = 0;
  491. priv->free_data_tx = 0;
  492. priv->data_low_tx_full = 0;
  493. if (reload_firmware) { /* Should we load the firmware ? */
  494. /* now that the data structures are cleaned up, upload
  495. * firmware and reset interface */
  496. rc = islpci_upload_fw(priv);
  497. if (rc) {
  498. printk(KERN_ERR "%s: islpci_reset: failure\n",
  499. priv->ndev->name);
  500. return rc;
  501. }
  502. }
  503. /* finally reset interface */
  504. rc = islpci_reset_if(priv);
  505. if (rc)
  506. printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
  507. return rc;
  508. }
  509. /******************************************************************************
  510. Network device configuration functions
  511. ******************************************************************************/
  512. static int
  513. islpci_alloc_memory(islpci_private *priv)
  514. {
  515. int counter;
  516. #if VERBOSE > SHOW_ERROR_MESSAGES
  517. printk(KERN_DEBUG "islpci_alloc_memory\n");
  518. #endif
  519. /* remap the PCI device base address to accessable */
  520. if (!(priv->device_base =
  521. ioremap(pci_resource_start(priv->pdev, 0),
  522. ISL38XX_PCI_MEM_SIZE))) {
  523. /* error in remapping the PCI device memory address range */
  524. printk(KERN_ERR "PCI memory remapping failed\n");
  525. return -1;
  526. }
  527. /* memory layout for consistent DMA region:
  528. *
  529. * Area 1: Control Block for the device interface
  530. * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
  531. * the number of supported stations in the AP determines the minimal
  532. * size of the buffer !
  533. */
  534. /* perform the allocation */
  535. priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
  536. HOST_MEM_BLOCK,
  537. &priv->
  538. device_host_address);
  539. if (!priv->driver_mem_address) {
  540. /* error allocating the block of PCI memory */
  541. printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
  542. "prism54");
  543. return -1;
  544. }
  545. /* assign the Control Block to the first address of the allocated area */
  546. priv->control_block =
  547. (isl38xx_control_block *) priv->driver_mem_address;
  548. /* set the Power Save Buffer pointer directly behind the CB */
  549. priv->device_psm_buffer =
  550. priv->device_host_address + CONTROL_BLOCK_SIZE;
  551. /* make sure all buffer pointers are initialized */
  552. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  553. priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
  554. priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
  555. }
  556. priv->index_mgmt_rx = 0;
  557. memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
  558. memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
  559. /* allocate rx queue for management frames */
  560. if (islpci_mgmt_rx_fill(priv->ndev) < 0)
  561. goto out_free;
  562. /* now get the data rx skb's */
  563. memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
  564. memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
  565. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  566. struct sk_buff *skb;
  567. /* allocate an sk_buff for received data frames storage
  568. * each frame on receive size consists of 1 fragment
  569. * include any required allignment operations */
  570. if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
  571. /* error allocating an sk_buff structure elements */
  572. printk(KERN_ERR "Error allocating skb.\n");
  573. skb = NULL;
  574. goto out_free;
  575. }
  576. skb_reserve(skb, (4 - (long) skb->data) & 0x03);
  577. /* add the new allocated sk_buff to the buffer array */
  578. priv->data_low_rx[counter] = skb;
  579. /* map the allocated skb data area to pci */
  580. priv->pci_map_rx_address[counter] =
  581. pci_map_single(priv->pdev, (void *) skb->data,
  582. MAX_FRAGMENT_SIZE_RX + 2,
  583. PCI_DMA_FROMDEVICE);
  584. if (!priv->pci_map_rx_address[counter]) {
  585. /* error mapping the buffer to device
  586. accessable memory address */
  587. printk(KERN_ERR "failed to map skb DMA'able\n");
  588. goto out_free;
  589. }
  590. }
  591. prism54_acl_init(&priv->acl);
  592. prism54_wpa_bss_ie_init(priv);
  593. if (mgt_init(priv))
  594. goto out_free;
  595. return 0;
  596. out_free:
  597. islpci_free_memory(priv);
  598. return -1;
  599. }
  600. int
  601. islpci_free_memory(islpci_private *priv)
  602. {
  603. int counter;
  604. if (priv->device_base)
  605. iounmap(priv->device_base);
  606. priv->device_base = NULL;
  607. /* free consistent DMA area... */
  608. if (priv->driver_mem_address)
  609. pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
  610. priv->driver_mem_address,
  611. priv->device_host_address);
  612. /* clear some dangling pointers */
  613. priv->driver_mem_address = NULL;
  614. priv->device_host_address = 0;
  615. priv->device_psm_buffer = 0;
  616. priv->control_block = NULL;
  617. /* clean up mgmt rx buffers */
  618. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  619. struct islpci_membuf *buf = &priv->mgmt_rx[counter];
  620. if (buf->pci_addr)
  621. pci_unmap_single(priv->pdev, buf->pci_addr,
  622. buf->size, PCI_DMA_FROMDEVICE);
  623. buf->pci_addr = 0;
  624. kfree(buf->mem);
  625. buf->size = 0;
  626. buf->mem = NULL;
  627. }
  628. /* clean up data rx buffers */
  629. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  630. if (priv->pci_map_rx_address[counter])
  631. pci_unmap_single(priv->pdev,
  632. priv->pci_map_rx_address[counter],
  633. MAX_FRAGMENT_SIZE_RX + 2,
  634. PCI_DMA_FROMDEVICE);
  635. priv->pci_map_rx_address[counter] = 0;
  636. if (priv->data_low_rx[counter])
  637. dev_kfree_skb(priv->data_low_rx[counter]);
  638. priv->data_low_rx[counter] = NULL;
  639. }
  640. /* Free the acces control list and the WPA list */
  641. prism54_acl_clean(&priv->acl);
  642. prism54_wpa_bss_ie_clean(priv);
  643. mgt_clean(priv);
  644. return 0;
  645. }
  646. #if 0
  647. static void
  648. islpci_set_multicast_list(struct net_device *dev)
  649. {
  650. /* put device into promisc mode and let network layer handle it */
  651. }
  652. #endif
  653. static void islpci_ethtool_get_drvinfo(struct net_device *dev,
  654. struct ethtool_drvinfo *info)
  655. {
  656. strcpy(info->driver, DRV_NAME);
  657. strcpy(info->version, DRV_VERSION);
  658. }
  659. static const struct ethtool_ops islpci_ethtool_ops = {
  660. .get_drvinfo = islpci_ethtool_get_drvinfo,
  661. };
  662. static const struct net_device_ops islpci_netdev_ops = {
  663. .ndo_open = islpci_open,
  664. .ndo_stop = islpci_close,
  665. .ndo_do_ioctl = prism54_ioctl,
  666. .ndo_start_xmit = islpci_eth_transmit,
  667. .ndo_tx_timeout = islpci_eth_tx_timeout,
  668. .ndo_set_mac_address = prism54_set_mac_address,
  669. .ndo_change_mtu = eth_change_mtu,
  670. .ndo_validate_addr = eth_validate_addr,
  671. };
  672. struct net_device *
  673. islpci_setup(struct pci_dev *pdev)
  674. {
  675. islpci_private *priv;
  676. struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
  677. if (!ndev)
  678. return ndev;
  679. pci_set_drvdata(pdev, ndev);
  680. #if defined(SET_NETDEV_DEV)
  681. SET_NETDEV_DEV(ndev, &pdev->dev);
  682. #endif
  683. /* setup the structure members */
  684. ndev->base_addr = pci_resource_start(pdev, 0);
  685. ndev->irq = pdev->irq;
  686. /* initialize the function pointers */
  687. ndev->netdev_ops = &islpci_netdev_ops;
  688. ndev->wireless_handlers = &prism54_handler_def;
  689. ndev->ethtool_ops = &islpci_ethtool_ops;
  690. /* ndev->set_multicast_list = &islpci_set_multicast_list; */
  691. ndev->addr_len = ETH_ALEN;
  692. /* Get a non-zero dummy MAC address for nameif. Jean II */
  693. memcpy(ndev->dev_addr, dummy_mac, 6);
  694. ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
  695. /* allocate a private device structure to the network device */
  696. priv = netdev_priv(ndev);
  697. priv->ndev = ndev;
  698. priv->pdev = pdev;
  699. priv->monitor_type = ARPHRD_IEEE80211;
  700. priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
  701. priv->monitor_type : ARPHRD_ETHER;
  702. /* Add pointers to enable iwspy support. */
  703. priv->wireless_data.spy_data = &priv->spy_data;
  704. ndev->wireless_data = &priv->wireless_data;
  705. /* save the start and end address of the PCI memory area */
  706. ndev->mem_start = (unsigned long) priv->device_base;
  707. ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
  708. #if VERBOSE > SHOW_ERROR_MESSAGES
  709. DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
  710. #endif
  711. init_waitqueue_head(&priv->reset_done);
  712. /* init the queue read locks, process wait counter */
  713. mutex_init(&priv->mgmt_lock);
  714. priv->mgmt_received = NULL;
  715. init_waitqueue_head(&priv->mgmt_wqueue);
  716. mutex_init(&priv->stats_lock);
  717. spin_lock_init(&priv->slock);
  718. /* init state machine with off#1 state */
  719. priv->state = PRV_STATE_OFF;
  720. priv->state_off = 1;
  721. /* initialize workqueue's */
  722. INIT_WORK(&priv->stats_work, prism54_update_stats);
  723. priv->stats_timestamp = 0;
  724. INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
  725. priv->reset_task_pending = 0;
  726. /* allocate various memory areas */
  727. if (islpci_alloc_memory(priv))
  728. goto do_free_netdev;
  729. /* select the firmware file depending on the device id */
  730. switch (pdev->device) {
  731. case 0x3877:
  732. strcpy(priv->firmware, ISL3877_IMAGE_FILE);
  733. break;
  734. case 0x3886:
  735. strcpy(priv->firmware, ISL3886_IMAGE_FILE);
  736. break;
  737. default:
  738. strcpy(priv->firmware, ISL3890_IMAGE_FILE);
  739. break;
  740. }
  741. if (register_netdev(ndev)) {
  742. DEBUG(SHOW_ERROR_MESSAGES,
  743. "ERROR: register_netdev() failed\n");
  744. goto do_islpci_free_memory;
  745. }
  746. return ndev;
  747. do_islpci_free_memory:
  748. islpci_free_memory(priv);
  749. do_free_netdev:
  750. pci_set_drvdata(pdev, NULL);
  751. free_netdev(ndev);
  752. priv = NULL;
  753. return NULL;
  754. }
  755. islpci_state_t
  756. islpci_set_state(islpci_private *priv, islpci_state_t new_state)
  757. {
  758. islpci_state_t old_state;
  759. /* lock */
  760. old_state = priv->state;
  761. /* this means either a race condition or some serious error in
  762. * the driver code */
  763. switch (new_state) {
  764. case PRV_STATE_OFF:
  765. priv->state_off++;
  766. default:
  767. priv->state = new_state;
  768. break;
  769. case PRV_STATE_PREBOOT:
  770. /* there are actually many off-states, enumerated by
  771. * state_off */
  772. if (old_state == PRV_STATE_OFF)
  773. priv->state_off--;
  774. /* only if hw_unavailable is zero now it means we either
  775. * were in off#1 state, or came here from
  776. * somewhere else */
  777. if (!priv->state_off)
  778. priv->state = new_state;
  779. break;
  780. }
  781. #if 0
  782. printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
  783. priv->ndev->name, old_state, new_state, priv->state_off);
  784. #endif
  785. /* invariants */
  786. BUG_ON(priv->state_off < 0);
  787. BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
  788. BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
  789. /* unlock */
  790. return old_state;
  791. }